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aoptcpu.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 anni fa |
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aoptcpub.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 anni fa |
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aoptcpud.pas
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19c8abac0b
+ enable jump optimizer for i8086
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12 anni fa |
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cgcpu.pas
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8bfe2a56dd
* optimized SAR by 31 to use only one SAR instruction in tcg8086.a_op_const_reg
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11 anni fa |
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cpubase.inc
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c48d572996
Implement support for saving and restoring address registers.
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12 anni fa |
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cpuinfo.pas
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b327eac688
- disable cs_opt_regvar from -O2 on i8086, since it's not working properly yet
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12 anni fa |
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cpunode.pas
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b342588af1
+ i8086 specific far proc aware implementation of ttypeconvnode.second_proc_to_procvar
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12 anni fa |
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cpupara.pas
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99de108c68
* renamed all paramanagers to tcpuparamanager so the llvm paramanager can
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11 anni fa |
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cpupi.pas
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c916105db8
- rm ti8086procinfo.allocate_got_register as it isn't used on the i8086
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12 anni fa |
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cputarg.pas
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eff0894a66
all the extra i8086 units added
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12 anni fa |
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hlcgcpu.pas
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039979fdcc
* handle 4-byte records in registers as well in location_force_mem on i8086
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11 anni fa |
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i8086att.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 anni fa |
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i8086atts.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 anni fa |
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i8086int.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 anni fa |
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i8086nop.inc
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0f69362edd
- rm LEA reg,imm from x86ins.dat, as that's not a valid x86 instruction,
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12 anni fa |
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i8086op.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 anni fa |
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i8086prop.inc
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f6e846c574
+ added the NEC V20/V30 instructions
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12 anni fa |
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i8086tab.inc
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f132a804d6
+ handle 32 bit references on x86-64 so lea can be used for 32 bit arithmetics
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11 anni fa |
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n8086add.pas
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2a64ba0ad3
* do a 32-bit comparison on far and huge pointers
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12 anni fa |
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n8086cal.pas
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3853d06ac0
+ added n8086cal.pas, based on n386cal.pas; this pulls in nx86cal.pas as well and fixes compilation of the system unit on i8086 after the merge of the i8086 branch to trunk
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12 anni fa |
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n8086cnv.pas
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645cd11b9d
* fixed the assignment of global functions to nested procvars in i8086 far code
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12 anni fa |
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n8086con.pas
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a308994423
* i8086 specific code from tcgpointerconstnode.pass_generate_code moved to an i8086 specific overriden method
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12 anni fa |
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n8086inl.pas
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97ca0fa323
- removed ti8086inlinenode.second_round_real, second_trunc_real and load_fpu_location as they mostly repeat the code in tx86inlinenode.load_fpu_location; tx86inlinenode.load_fpu_location adapted for i8086 instead
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12 anni fa |
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n8086mat.pas
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43dba74a5c
+ implemented 64-bit shl and shr for i8086
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12 anni fa |
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n8086mem.pas
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6aae88578c
+ getting the address of a label now returns a far pointer in i8086 far code memory models; this fixes the call to fpc_raiseexception in the raise node
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12 anni fa |
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r8086ari.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086att.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086con.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086dwrf.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086int.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086iri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086nasm.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086nor.inc
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107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
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12 anni fa |
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r8086nri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086num.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086ot.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086rni.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086sri.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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r8086stab.inc
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107a6f6552
* i8086 versions of i386*.inc and r386*.inc renamed to i8086*.inc and r8086*.inc
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12 anni fa |
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r8086std.inc
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5af873ee5b
* x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files.
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12 anni fa |
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ra8086att.pas
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a04cbc09b0
* changed the default i8086 asmmode to Intel
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12 anni fa |
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ra8086int.pas
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a04cbc09b0
* changed the default i8086 asmmode to Intel
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12 anni fa |
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rgcpu.pas
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42e82c9de3
* when a i8086 reference uses only one register, choose it from the set [BX,BP,SI,DI] as it can be treated either as a base or an index, depending on what's convenient
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12 anni fa |
Jonas Maebe
99de108c68
* renamed all paramanagers to tcpuparamanager so the llvm paramanager can