ncgadd.pas 30 KB

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  1. {
  2. Copyright (c) 2000-2002 by the FPC development team
  3. Code generation for add nodes (generic version)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase;
  22. type
  23. tcgaddnode = class(taddnode)
  24. { function pass_1: tnode; override;}
  25. procedure pass_generate_code;override;
  26. protected
  27. { call secondpass for both left and right }
  28. procedure pass_left_right; virtual;
  29. { set the register of the result location }
  30. procedure set_result_location_reg;
  31. { load left and right nodes into registers }
  32. procedure force_reg_left_right(allow_swap,allow_constant:boolean);
  33. procedure second_opfloat;
  34. procedure second_opboolean;
  35. procedure second_opsmallset;
  36. procedure second_op64bit;
  37. procedure second_opordinal;
  38. procedure second_addstring;virtual;
  39. procedure second_addfloat;virtual;abstract;
  40. procedure second_addboolean;virtual;
  41. procedure second_addsmallset;virtual;
  42. procedure second_addsmallsetelement;virtual;
  43. {$ifdef x86}
  44. {$ifdef SUPPORT_MMX}
  45. procedure second_opmmx;virtual;abstract;
  46. {$endif SUPPORT_MMX}
  47. {$endif x86}
  48. procedure second_opvector;virtual;abstract;
  49. procedure second_add64bit;virtual;
  50. procedure second_addordinal;virtual;
  51. procedure second_cmpfloat;virtual;abstract;
  52. procedure second_cmpboolean;virtual;
  53. procedure second_cmpsmallset;virtual;abstract;
  54. procedure second_cmp64bit;virtual;abstract;
  55. procedure second_cmpordinal;virtual;abstract;
  56. end;
  57. implementation
  58. uses
  59. globtype,systems,
  60. cutils,verbose,globals,
  61. symconst,symdef,paramgr,
  62. aasmbase,aasmtai,aasmdata,defutil,
  63. cgbase,procinfo,pass_2,tgobj,
  64. nutils,ncon,nset,ncgutil,cgobj,cgutils,
  65. hlcgobj
  66. ;
  67. {*****************************************************************************
  68. Helpers
  69. *****************************************************************************}
  70. procedure tcgaddnode.pass_left_right;
  71. var
  72. tmpreg : tregister;
  73. {$ifdef x86}
  74. pushedfpu,
  75. {$endif x86}
  76. isjump : boolean;
  77. otl,ofl : tasmlabel;
  78. begin
  79. { calculate the operator which is more difficult }
  80. firstcomplex(self);
  81. { in case of constant put it to the left }
  82. if (left.nodetype=ordconstn) then
  83. swapleftright;
  84. isjump:=(left.expectloc=LOC_JUMP);
  85. if isjump then
  86. begin
  87. otl:=current_procinfo.CurrTrueLabel;
  88. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  89. ofl:=current_procinfo.CurrFalseLabel;
  90. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  91. end;
  92. secondpass(left);
  93. if left.location.loc in [LOC_FLAGS,LOC_JUMP] then
  94. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,resultdef,false);
  95. if isjump then
  96. begin
  97. current_procinfo.CurrTrueLabel:=otl;
  98. current_procinfo.CurrFalseLabel:=ofl;
  99. end;
  100. {$ifdef x86}
  101. { are too few registers free? }
  102. pushedfpu:=false;
  103. if (left.location.loc=LOC_FPUREGISTER) and
  104. (node_resources_fpu(right)>=maxfpuregs) then
  105. begin
  106. location_force_mem(current_asmdata.CurrAsmList,left.location);
  107. pushedfpu:=true;
  108. end;
  109. {$endif x86}
  110. isjump:=(right.expectloc=LOC_JUMP);
  111. if isjump then
  112. begin
  113. otl:=current_procinfo.CurrTrueLabel;
  114. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  115. ofl:=current_procinfo.CurrFalseLabel;
  116. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  117. end;
  118. secondpass(right);
  119. if right.location.loc in [LOC_FLAGS,LOC_JUMP] then
  120. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,false);
  121. if isjump then
  122. begin
  123. current_procinfo.CurrTrueLabel:=otl;
  124. current_procinfo.CurrFalseLabel:=ofl;
  125. end;
  126. {$ifdef x86}
  127. if pushedfpu then
  128. begin
  129. if use_vectorfpu(left.resultdef) then
  130. begin
  131. tmpreg := cg.getmmregister(current_asmdata.CurrAsmList,left.location.size);
  132. cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg,mms_movescalar);
  133. location_freetemp(current_asmdata.CurrAsmList,left.location);
  134. location_reset(left.location,LOC_MMREGISTER,left.location.size);
  135. left.location.register:=tmpreg;
  136. end
  137. else
  138. begin
  139. tmpreg := cg.getfpuregister(current_asmdata.CurrAsmList,left.location.size);
  140. cg.a_loadfpu_loc_reg(current_asmdata.CurrAsmList,left.location.size,left.location,tmpreg);
  141. location_freetemp(current_asmdata.CurrAsmList,left.location);
  142. location_reset(left.location,LOC_FPUREGISTER,left.location.size);
  143. left.location.register := tmpreg;
  144. { left operand is now on top of the stack, instead of the right one! }
  145. if (right.location.loc=LOC_FPUREGISTER) then
  146. toggleflag(nf_swapped);
  147. end;
  148. end;
  149. {$endif x86}
  150. end;
  151. procedure tcgaddnode.set_result_location_reg;
  152. begin
  153. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  154. {$ifdef x86}
  155. if left.location.loc=LOC_REGISTER then
  156. begin
  157. if TCGSize2Size[left.location.size]<>TCGSize2Size[location.size] then
  158. internalerror(200307041);
  159. {$ifndef cpu64bitalu}
  160. if location.size in [OS_64,OS_S64] then
  161. begin
  162. location.register64.reglo := left.location.register64.reglo;
  163. location.register64.reghi := left.location.register64.reghi;
  164. end
  165. else
  166. {$endif}
  167. location.register := left.location.register;
  168. end
  169. else
  170. if right.location.loc=LOC_REGISTER then
  171. begin
  172. if TCGSize2Size[right.location.size]<>TCGSize2Size[location.size] then
  173. internalerror(200307042);
  174. {$ifndef cpu64bitalu}
  175. if location.size in [OS_64,OS_S64] then
  176. begin
  177. location.register64.reglo := right.location.register64.reglo;
  178. location.register64.reghi := right.location.register64.reghi;
  179. end
  180. else
  181. {$endif}
  182. location.register := right.location.register;
  183. end
  184. else
  185. {$endif}
  186. begin
  187. {$ifndef cpu64bitalu}
  188. if location.size in [OS_64,OS_S64] then
  189. begin
  190. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  191. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  192. end
  193. else
  194. {$endif}
  195. location.register := hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  196. end;
  197. end;
  198. procedure tcgaddnode.force_reg_left_right(allow_swap,allow_constant:boolean);
  199. begin
  200. if (left.location.loc<>LOC_REGISTER) and
  201. not(
  202. allow_constant and
  203. (left.location.loc in [LOC_CONSTANT,LOC_CREGISTER])
  204. ) then
  205. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  206. if (right.location.loc<>LOC_REGISTER) and
  207. not(
  208. allow_constant and
  209. (right.location.loc in [LOC_CONSTANT,LOC_CREGISTER]) and
  210. (left.location.loc<>LOC_CONSTANT)
  211. ) then
  212. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,right.resultdef,false);
  213. { Left is always a register, right can be register or constant }
  214. if left.location.loc=LOC_CONSTANT then
  215. begin
  216. { when it is not allowed to swap we have a constant on
  217. left, that will give problems }
  218. if not allow_swap then
  219. internalerror(200307043);
  220. swapleftright;
  221. end;
  222. end;
  223. {*****************************************************************************
  224. Smallsets
  225. *****************************************************************************}
  226. procedure tcgaddnode.second_opsmallset;
  227. begin
  228. { when a setdef is passed, it has to be a smallset }
  229. if not(
  230. ((left.nodetype=setelementn) or is_smallset(left.resultdef)) and
  231. ((right.nodetype=setelementn) or is_smallset(right.resultdef))
  232. ) then
  233. internalerror(200203302);
  234. if (left.nodetype=setelementn) or (right.nodetype=setelementn) then
  235. second_addsmallsetelement
  236. else if nodetype in [equaln,unequaln,gtn,gten,lten,ltn] then
  237. second_cmpsmallset
  238. else
  239. second_addsmallset;
  240. end;
  241. procedure tcgaddnode.second_addsmallset;
  242. var
  243. cgop : TOpCg;
  244. opdone : boolean;
  245. begin
  246. opdone := false;
  247. pass_left_right;
  248. force_reg_left_right(true,true);
  249. set_result_location_reg;
  250. case nodetype of
  251. addn :
  252. cgop:=OP_OR;
  253. symdifn :
  254. cgop:=OP_XOR;
  255. muln :
  256. cgop:=OP_AND;
  257. subn :
  258. begin
  259. cgop:=OP_AND;
  260. if (not(nf_swapped in flags)) then
  261. if (right.location.loc=LOC_CONSTANT) then
  262. right.location.value := not(right.location.value)
  263. else
  264. opdone := true
  265. else if (left.location.loc=LOC_CONSTANT) then
  266. left.location.value := not(left.location.value)
  267. else
  268. begin
  269. swapleftright;
  270. opdone := true;
  271. end;
  272. if opdone then
  273. begin
  274. if (right.location.size<>left.location.size) or
  275. (location.size<>left.location.size) then
  276. internalerror(2010123001);
  277. { make sure we don't modify left/right.location, because we told
  278. force_reg_left_right above that they can be constant }
  279. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NOT,resultdef,right.location.register,location.register);
  280. if left.location.loc = LOC_CONSTANT then
  281. hlcg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,resultdef,left.location.value,location.register)
  282. else
  283. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_AND,resultdef,left.location.register,location.register);
  284. end;
  285. end;
  286. else
  287. internalerror(2002072701);
  288. end;
  289. if not opdone then
  290. begin
  291. // these are all commutative operations
  292. if (left.location.loc = LOC_CONSTANT) then
  293. swapleftright;
  294. if (right.location.loc = LOC_CONSTANT) then
  295. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
  296. right.location.value,left.location.register,
  297. location.register)
  298. else
  299. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
  300. right.location.register,left.location.register,
  301. location.register);
  302. end;
  303. end;
  304. procedure tcgaddnode.second_addsmallsetelement;
  305. var
  306. tmpreg : tregister;
  307. mask,
  308. setbase : aint;
  309. cgop : TOpCg;
  310. begin
  311. if nodetype<>addn then
  312. internalerror(20080302);
  313. { no range support for smallsets }
  314. if assigned(tsetelementnode(right).right) then
  315. internalerror(20080303);
  316. pass_left_right;
  317. { setelementn is a special case, it must be on right }
  318. if (nf_swapped in flags) and
  319. (left.nodetype=setelementn) then
  320. swapleftright;
  321. force_reg_left_right(false,false);
  322. set_result_location_reg;
  323. setbase:=tsetdef(left.resultdef).setbase;
  324. if (right.location.loc = LOC_CONSTANT) then
  325. begin
  326. if (target_info.endian=endian_big) then
  327. mask:=aint((aword(1) shl (resultdef.size*8-1)) shr aword(right.location.value-setbase))
  328. else
  329. mask:=aint(1 shl (right.location.value-setbase));
  330. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,
  331. mask,left.location.register,location.register);
  332. end
  333. else
  334. begin
  335. if (target_info.endian=endian_big) then
  336. begin
  337. mask:=aint((aword(1) shl (resultdef.size*8-1)));
  338. cgop:=OP_SHR
  339. end
  340. else
  341. begin
  342. mask:=1;
  343. cgop:=OP_SHL
  344. end;
  345. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  346. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,mask,tmpreg);
  347. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,resultdef,true);
  348. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,right.location,setbase);
  349. hlcg.a_op_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
  350. right.location.register,tmpreg);
  351. if left.location.loc <> LOC_CONSTANT then
  352. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,tmpreg,
  353. left.location.register,location.register)
  354. else
  355. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_OR,resultdef,
  356. left.location.value,tmpreg,location.register);
  357. end;
  358. end;
  359. {*****************************************************************************
  360. Boolean
  361. *****************************************************************************}
  362. procedure tcgaddnode.second_opboolean;
  363. begin
  364. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  365. second_cmpboolean
  366. else
  367. second_addboolean;
  368. end;
  369. procedure tcgaddnode.second_addboolean;
  370. var
  371. cgop : TOpCg;
  372. otl,ofl : tasmlabel;
  373. oldflowcontrol : tflowcontrol;
  374. begin
  375. { And,Or will only evaluate from left to right only the
  376. needed nodes unless full boolean evaluation is enabled }
  377. if (nodetype in [orn,andn]) and
  378. (not(cs_full_boolean_eval in current_settings.localswitches) or
  379. (nf_short_bool in flags)) then
  380. begin
  381. location_reset(location,LOC_JUMP,OS_NO);
  382. case nodetype of
  383. andn :
  384. begin
  385. otl:=current_procinfo.CurrTrueLabel;
  386. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  387. secondpass(left);
  388. hlcg.maketojumpbool(current_asmdata.CurrAsmList,left);
  389. hlcg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  390. current_procinfo.CurrTrueLabel:=otl;
  391. end;
  392. orn :
  393. begin
  394. ofl:=current_procinfo.CurrFalseLabel;
  395. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  396. secondpass(left);
  397. hlcg.maketojumpbool(current_asmdata.CurrAsmList,left);
  398. hlcg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  399. current_procinfo.CurrFalseLabel:=ofl;
  400. end;
  401. else
  402. internalerror(200307044);
  403. end;
  404. { these jumps mean we're now in a flow control construct }
  405. oldflowcontrol:=flowcontrol;
  406. include(flowcontrol,fc_inflowcontrol);
  407. secondpass(right);
  408. hlcg.maketojumpbool(current_asmdata.CurrAsmList,right);
  409. flowcontrol:=oldflowcontrol+(flowcontrol-[fc_inflowcontrol]);
  410. end
  411. else
  412. begin
  413. pass_left_right;
  414. force_reg_left_right(false,true);
  415. set_result_location_reg;
  416. case nodetype of
  417. xorn :
  418. cgop:=OP_XOR;
  419. orn :
  420. cgop:=OP_OR;
  421. andn :
  422. cgop:=OP_AND;
  423. else
  424. internalerror(200203247);
  425. end;
  426. {$ifndef cpu64bitalu}
  427. if right.location.size in [OS_64,OS_S64] then
  428. begin
  429. if right.location.loc <> LOC_CONSTANT then
  430. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  431. left.location.register64,right.location.register64,
  432. location.register64)
  433. else
  434. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,cgop,location.size,
  435. right.location.value,left.location.register64,
  436. location.register64);
  437. end
  438. else
  439. {$endif cpu64bitalu}
  440. begin
  441. if right.location.loc <> LOC_CONSTANT then
  442. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
  443. left.location.register,right.location.register,
  444. location.register)
  445. else
  446. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,resultdef,
  447. right.location.value,left.location.register,
  448. location.register);
  449. end;
  450. end;
  451. end;
  452. {*****************************************************************************
  453. 64-bit
  454. *****************************************************************************}
  455. procedure tcgaddnode.second_op64bit;
  456. begin
  457. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  458. second_cmp64bit
  459. else
  460. second_add64bit;
  461. end;
  462. procedure tcgaddnode.second_add64bit;
  463. var
  464. op : TOpCG;
  465. checkoverflow : boolean;
  466. ovloc : tlocation;
  467. begin
  468. ovloc.loc:=LOC_VOID;
  469. pass_left_right;
  470. force_reg_left_right(false,true);
  471. set_result_location_reg;
  472. { assume no overflow checking is required }
  473. checkoverflow := false;
  474. case nodetype of
  475. addn :
  476. begin
  477. op:=OP_ADD;
  478. checkoverflow:=true;
  479. end;
  480. subn :
  481. begin
  482. op:=OP_SUB;
  483. checkoverflow:=true;
  484. end;
  485. xorn:
  486. op:=OP_XOR;
  487. orn:
  488. op:=OP_OR;
  489. andn:
  490. op:=OP_AND;
  491. muln:
  492. begin
  493. { should be handled in pass_1 (JM) }
  494. internalerror(200109051);
  495. end;
  496. else
  497. internalerror(2002072705);
  498. end;
  499. checkoverflow:=
  500. checkoverflow and
  501. (left.resultdef.typ<>pointerdef) and
  502. (right.resultdef.typ<>pointerdef) and
  503. (cs_check_overflow in current_settings.localswitches);
  504. {$ifdef cpu64bitalu}
  505. case nodetype of
  506. xorn,orn,andn,addn:
  507. begin
  508. if (right.location.loc = LOC_CONSTANT) then
  509. hlcg.a_op_const_reg_reg(current_asmdata.CurrAsmList,op,resultdef,right.location.value,
  510. left.location.register,location.register)
  511. else
  512. hlcg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,op,resultdef,right.location.register,
  513. left.location.register,location.register);
  514. end;
  515. subn:
  516. begin
  517. if (nf_swapped in flags) then
  518. swapleftright;
  519. if left.location.loc <> LOC_CONSTANT then
  520. begin
  521. if right.location.loc <> LOC_CONSTANT then
  522. // reg64 - reg64
  523. hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  524. right.location.register,left.location.register,location.register,
  525. checkoverflow,ovloc)
  526. else
  527. // reg64 - const64
  528. hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  529. right.location.value,left.location.register,location.register,
  530. checkoverflow,ovloc);
  531. end
  532. else
  533. begin
  534. // const64 - reg64
  535. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  536. hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  537. right.location.register,left.location.register,location.register,
  538. checkoverflow,ovloc);
  539. end;
  540. end;
  541. else
  542. internalerror(2002072803);
  543. end;
  544. {$else cpu64bitalu}
  545. case nodetype of
  546. xorn,orn,andn,addn:
  547. begin
  548. if (right.location.loc = LOC_CONSTANT) then
  549. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  550. left.location.register64,location.register64,
  551. checkoverflow,ovloc)
  552. else
  553. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  554. left.location.register64,location.register64,
  555. checkoverflow,ovloc);
  556. end;
  557. subn:
  558. begin
  559. if (nf_swapped in flags) then
  560. swapleftright;
  561. if left.location.loc <> LOC_CONSTANT then
  562. begin
  563. if right.location.loc <> LOC_CONSTANT then
  564. // reg64 - reg64
  565. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  566. right.location.register64,left.location.register64,
  567. location.register64,
  568. checkoverflow,ovloc)
  569. else
  570. // reg64 - const64
  571. cg64.a_op64_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  572. right.location.value64,left.location.register64,
  573. location.register64,
  574. checkoverflow,ovloc)
  575. end
  576. else
  577. begin
  578. // const64 - reg64
  579. location_force_reg(current_asmdata.CurrAsmList,left.location,left.location.size,true);
  580. cg64.a_op64_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,location.size,
  581. right.location.register64,left.location.register64,
  582. location.register64,
  583. checkoverflow,ovloc);
  584. end;
  585. end;
  586. else
  587. internalerror(2002072803);
  588. end;
  589. {$endif cpu64bitalu}
  590. { emit overflow check if enabled }
  591. if checkoverflow then
  592. hlcg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  593. end;
  594. {*****************************************************************************
  595. Strings
  596. *****************************************************************************}
  597. procedure tcgaddnode.second_addstring;
  598. begin
  599. { this should already be handled in pass1 }
  600. internalerror(2002072402);
  601. end;
  602. {*****************************************************************************
  603. Floats
  604. *****************************************************************************}
  605. procedure tcgaddnode.second_opfloat;
  606. begin
  607. if nodetype in [ltn,lten,gtn,gten,equaln,unequaln] then
  608. second_cmpfloat
  609. else
  610. second_addfloat;
  611. end;
  612. {*****************************************************************************
  613. Ordinals
  614. *****************************************************************************}
  615. procedure tcgaddnode.second_opordinal;
  616. begin
  617. if (nodetype in [ltn,lten,gtn,gten,equaln,unequaln]) then
  618. second_cmpordinal
  619. else
  620. second_addordinal;
  621. end;
  622. procedure tcgaddnode.second_addordinal;
  623. var
  624. unsigned,
  625. checkoverflow : boolean;
  626. cgop : topcg;
  627. tmpreg : tregister;
  628. ovloc : tlocation;
  629. begin
  630. ovloc.loc:=LOC_VOID;
  631. pass_left_right;
  632. force_reg_left_right(false,true);
  633. set_result_location_reg;
  634. { determine if the comparison will be unsigned }
  635. unsigned:=not(is_signed(left.resultdef)) or
  636. not(is_signed(right.resultdef));
  637. { assume no overflow checking is require }
  638. checkoverflow := false;
  639. case nodetype of
  640. addn:
  641. begin
  642. cgop:=OP_ADD;
  643. checkoverflow:=true;
  644. end;
  645. xorn :
  646. begin
  647. cgop:=OP_XOR;
  648. end;
  649. orn :
  650. begin
  651. cgop:=OP_OR;
  652. end;
  653. andn:
  654. begin
  655. cgop:=OP_AND;
  656. end;
  657. muln:
  658. begin
  659. checkoverflow:=true;
  660. if unsigned then
  661. cgop:=OP_MUL
  662. else
  663. cgop:=OP_IMUL;
  664. end;
  665. subn :
  666. begin
  667. checkoverflow:=true;
  668. cgop:=OP_SUB;
  669. end;
  670. end;
  671. checkoverflow:=
  672. checkoverflow and
  673. (left.resultdef.typ<>pointerdef) and
  674. (right.resultdef.typ<>pointerdef) and
  675. (cs_check_overflow in current_settings.localswitches);
  676. if nodetype<>subn then
  677. begin
  678. if (right.location.loc<>LOC_CONSTANT) then
  679. hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,resultdef,
  680. left.location.register,right.location.register,
  681. location.register,checkoverflow,ovloc)
  682. else
  683. hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,cgop,resultdef,
  684. right.location.value,left.location.register,
  685. location.register,checkoverflow,ovloc);
  686. end
  687. else { subtract is a special case since its not commutative }
  688. begin
  689. if (nf_swapped in flags) then
  690. swapleftright;
  691. if left.location.loc<>LOC_CONSTANT then
  692. begin
  693. if right.location.loc<>LOC_CONSTANT then
  694. hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  695. right.location.register,left.location.register,
  696. location.register,checkoverflow,ovloc)
  697. else
  698. hlcg.a_op_const_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  699. right.location.value,left.location.register,
  700. location.register,checkoverflow,ovloc);
  701. end
  702. else
  703. begin
  704. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  705. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
  706. left.location.value,tmpreg);
  707. hlcg.a_op_reg_reg_reg_checkoverflow(current_asmdata.CurrAsmList,OP_SUB,resultdef,
  708. right.location.register,tmpreg,location.register,checkoverflow,ovloc);
  709. end;
  710. end;
  711. { emit overflow check if required }
  712. if checkoverflow then
  713. hlcg.g_overflowcheck_loc(current_asmdata.CurrAsmList,Location,resultdef,ovloc);
  714. end;
  715. procedure tcgaddnode.second_cmpboolean;
  716. begin
  717. second_cmpordinal;
  718. end;
  719. {*****************************************************************************
  720. pass_generate_code;
  721. *****************************************************************************}
  722. procedure tcgaddnode.pass_generate_code;
  723. begin
  724. case left.resultdef.typ of
  725. orddef :
  726. begin
  727. { handling boolean expressions }
  728. if is_boolean(left.resultdef) and
  729. is_boolean(right.resultdef) then
  730. second_opboolean
  731. { 64bit operations }
  732. else if is_64bit(left.resultdef) then
  733. second_op64bit
  734. else
  735. second_opordinal;
  736. end;
  737. stringdef :
  738. begin
  739. second_addstring;
  740. end;
  741. setdef :
  742. begin
  743. if is_smallset(tsetdef(left.resultdef)) then
  744. second_opsmallset
  745. else
  746. internalerror(200109041);
  747. end;
  748. arraydef :
  749. begin
  750. { support dynarr=nil }
  751. if is_dynamic_array(left.resultdef) then
  752. second_opordinal
  753. else
  754. if (cs_support_vectors in current_settings.globalswitches) and
  755. is_vector(left.resultdef) then
  756. second_opvector
  757. {$ifdef SUPPORT_MMX}
  758. else
  759. if is_mmx_able_array(left.resultdef) then
  760. second_opmmx
  761. {$endif SUPPORT_MMX}
  762. else
  763. internalerror(200306016);
  764. end;
  765. floatdef :
  766. second_opfloat;
  767. else
  768. second_opordinal;
  769. end;
  770. end;
  771. begin
  772. caddnode:=tcgaddnode;
  773. end.