| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120 |  {    Copyright (c) 1998-2004 by Jonas Maebe, member of the Free Pascal    Development Team    This unit contains several types and constants necessary for the    optimizer to work on the sparc architecture    This program is free software; you can redistribute it and/or modify    it under the terms of the GNU General Public License as published by    the Free Software Foundation; either version 2 of the License, or    (at your option) any later version.    This program is distributed in the hope that it will be useful,    but WITHOUT ANY WARRANTY; without even the implied warranty of    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the    GNU General Public License for more details.    You should have received a copy of the GNU General Public License    along with this program; if not, write to the Free Software    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. ****************************************************************************}Unit aoptcpub; { Assembler OPTimizer CPU specific Base }{$i fpcdefs.inc}{ enable the following define if memory references can have both a base and }{ index register in 1 operand                                               }{$define RefsHaveIndexReg}{ enable the following define if memory references can have a scaled index }{ define RefsHaveScale}{ enable the following define if memory references can have a segment }{ override                                                            }{ define RefsHaveSegment}InterfaceUses  cpubase,aasmcpu,AOptBase;Type{ type of a normal instruction }  TInstr = Taicpu;  PInstr = ^TInstr;{ ************************************************************************* }{ **************************** TCondRegs ********************************** }{ ************************************************************************* }{ Info about the conditional registers                                      }  TCondRegs = Object    Constructor Init;    Destructor Done;  End;{ ************************************************************************* }{ **************************** TAoptBaseCpu ******************************* }{ ************************************************************************* }  TAoptBaseCpu = class(TAoptBase)  End;{ ************************************************************************* }{ ******************************* Constants ******************************* }{ ************************************************************************* }Const{ the maximum number of things (registers, memory, ...) a single instruction }{ changes                                                                    }  MaxCh = 3;{ the maximum number of operands an instruction has }  MaxOps = 3;{Oper index of operand that contains the source (reference) with a load }{instruction                                                            }  LoadSrc = 0;{Oper index of operand that contains the destination (register) with a load }{instruction                                                                }  LoadDst = 1;{Oper index of operand that contains the source (register) with a store }{instruction                                                            }  StoreSrc = 0;{Oper index of operand that contains the destination (reference) with a load }{instruction                                                                 }  StoreDst = 1;  aopt_uncondjmp = A_BA;  aopt_condjmp = A_Bxx;Implementation{ ************************************************************************* }{ **************************** TCondRegs ********************************** }{ ************************************************************************* }Constructor TCondRegs.init;BeginEnd;Destructor TCondRegs.Done; {$ifdef inl} inline; {$endif inl}BeginEnd;End.
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