cgobj.pas 86 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2005 by Florian Klaempfl
  4. Member of the Free Pascal development team
  5. This unit implements the basic code generator object
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. {# @abstract(Abstract code generator unit)
  20. Abstreact code generator unit. This contains the base class
  21. to implement for all new supported processors.
  22. WARNING: None of the routines implemented in these modules,
  23. or their descendants, should use the temp. allocator, as
  24. these routines may be called inside genentrycode, and the
  25. stack frame is already setup!
  26. }
  27. unit cgobj;
  28. {$i fpcdefs.inc}
  29. interface
  30. uses
  31. cclasses,globtype,
  32. cpubase,cgbase,cgutils,parabase,
  33. aasmbase,aasmtai,aasmcpu,
  34. symconst,symbase,symtype,symdef,symtable,rgobj
  35. ;
  36. type
  37. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. alignment : talignment;
  48. rg : array[tregistertype] of trgobj;
  49. t_times : longint;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {$ifdef flowgraph}
  61. procedure init_flowgraph;
  62. procedure done_flowgraph;
  63. {$endif}
  64. {# Gets a register suitable to do integer operations on.}
  65. function getintregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  66. {# Gets a register suitable to do integer operations on.}
  67. function getaddressregister(list:Taasmoutput):Tregister;virtual;
  68. function getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  69. function getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;
  70. function getflagregister(list:Taasmoutput;size:Tcgsize):Tregister;virtual;abstract;
  71. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  72. the cpu specific child cg object have such a method?}
  73. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  74. procedure add_move_instruction(instr:Taicpu);virtual;
  75. function uses_registers(rt:Tregistertype):boolean;virtual;
  76. {# Get a specific register.}
  77. procedure getcpuregister(list:Taasmoutput;r:Tregister);virtual;
  78. procedure ungetcpuregister(list:Taasmoutput;r:Tregister);virtual;
  79. {# Get multiple registers specified.}
  80. procedure alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  81. {# Free multiple registers specified.}
  82. procedure dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);virtual;
  83. procedure do_register_allocation(list:Taasmoutput;headertai:tai);virtual;
  84. function makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  85. {# Emit a label to the instruction stream. }
  86. procedure a_label(list : taasmoutput;l : tasmlabel);virtual;
  87. {# Allocates register r by inserting a pai_realloc record }
  88. procedure a_reg_alloc(list : taasmoutput;r : tregister);
  89. {# Deallocates register r by inserting a pa_regdealloc record}
  90. procedure a_reg_dealloc(list : taasmoutput;r : tregister);
  91. { Synchronize register, make sure it is still valid }
  92. procedure a_reg_sync(list : taasmoutput;r : tregister);
  93. {# Pass a parameter, which is located in a register, to a routine.
  94. This routine should push/send the parameter to the routine, as
  95. required by the specific processor ABI and routine modifiers.
  96. This must be overriden for each CPU target.
  97. @param(size size of the operand in the register)
  98. @param(r register source of the operand)
  99. @param(cgpara where the parameter will be stored)
  100. }
  101. procedure a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  102. {# Pass a parameter, which is a constant, to a routine.
  103. A generic version is provided. This routine should
  104. be overriden for optimization purposes if the cpu
  105. permits directly sending this type of parameter.
  106. @param(size size of the operand in constant)
  107. @param(a value of constant to send)
  108. @param(cgpara where the parameter will be stored)
  109. }
  110. procedure a_param_const(list : taasmoutput;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  111. {# Pass the value of a parameter, which is located in memory, to a routine.
  112. A generic version is provided. This routine should
  113. be overriden for optimization purposes if the cpu
  114. permits directly sending this type of parameter.
  115. @param(size size of the operand in constant)
  116. @param(r Memory reference of value to send)
  117. @param(cgpara where the parameter will be stored)
  118. }
  119. procedure a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  120. {# Pass the value of a parameter, which can be located either in a register or memory location,
  121. to a routine.
  122. A generic version is provided.
  123. @param(l location of the operand to send)
  124. @param(nr parameter number (starting from one) of routine (from left to right))
  125. @param(cgpara where the parameter will be stored)
  126. }
  127. procedure a_param_loc(list : taasmoutput;const l : tlocation;const cgpara : TCGPara);
  128. {# Pass the address of a reference to a routine. This routine
  129. will calculate the address of the reference, and pass this
  130. calculated address as a parameter.
  131. A generic version is provided. This routine should
  132. be overriden for optimization purposes if the cpu
  133. permits directly sending this type of parameter.
  134. @param(r reference to get address from)
  135. @param(nr parameter number (starting from one) of routine (from left to right))
  136. }
  137. procedure a_paramaddr_ref(list : taasmoutput;const r : treference;const cgpara : TCGPara);virtual;
  138. { Remarks:
  139. * If a method specifies a size you have only to take care
  140. of that number of bits, i.e. load_const_reg with OP_8 must
  141. only load the lower 8 bit of the specified register
  142. the rest of the register can be undefined
  143. if necessary the compiler will call a method
  144. to zero or sign extend the register
  145. * The a_load_XX_XX with OP_64 needn't to be
  146. implemented for 32 bit
  147. processors, the code generator takes care of that
  148. * the addr size is for work with the natural pointer
  149. size
  150. * the procedures without fpu/mm are only for integer usage
  151. * normally the first location is the source and the
  152. second the destination
  153. }
  154. {# Emits instruction to call the method specified by symbol name.
  155. This routine must be overriden for each new target cpu.
  156. There is no a_call_ref because loading the reference will use
  157. a temp register on most cpu's resulting in conflicts with the
  158. registers used for the parameters (PFV)
  159. }
  160. procedure a_call_name(list : taasmoutput;const s : string);virtual; abstract;
  161. procedure a_call_reg(list : taasmoutput;reg : tregister);virtual;abstract;
  162. { move instructions }
  163. procedure a_load_const_reg(list : taasmoutput;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  164. procedure a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);virtual;
  165. procedure a_load_const_loc(list : taasmoutput;a : aint;const loc : tlocation);
  166. procedure a_load_reg_ref(list : taasmoutput;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  167. procedure a_load_reg_reg(list : taasmoutput;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  168. procedure a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  169. procedure a_load_ref_reg(list : taasmoutput;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  170. procedure a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  171. procedure a_load_loc_reg(list : taasmoutput;tosize: tcgsize; const loc: tlocation; reg : tregister);
  172. procedure a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  173. procedure a_loadaddr_ref_reg(list : taasmoutput;const ref : treference;r : tregister);virtual; abstract;
  174. { fpu move instructions }
  175. procedure a_loadfpu_reg_reg(list: taasmoutput; size:tcgsize; reg1, reg2: tregister); virtual; abstract;
  176. procedure a_loadfpu_ref_reg(list: taasmoutput; size: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  177. procedure a_loadfpu_reg_ref(list: taasmoutput; size: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  178. procedure a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  179. procedure a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  180. procedure a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  181. procedure a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  182. { vector register move instructions }
  183. procedure a_loadmm_reg_reg(list: taasmoutput; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual; abstract;
  184. procedure a_loadmm_ref_reg(list: taasmoutput; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual; abstract;
  185. procedure a_loadmm_reg_ref(list: taasmoutput; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual; abstract;
  186. procedure a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  187. procedure a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  188. procedure a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  189. procedure a_parammm_ref(list: taasmoutput; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  190. procedure a_parammm_loc(list: taasmoutput; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  191. procedure a_opmm_reg_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;abstract;
  192. procedure a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  193. procedure a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  194. procedure a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  195. { basic arithmetic operations }
  196. { note: for operators which require only one argument (not, neg), use }
  197. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  198. { that in this case the *second* operand is used as both source and }
  199. { destination (JM) }
  200. procedure a_op_const_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  201. procedure a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  202. procedure a_op_const_loc(list : taasmoutput; Op: TOpCG; a: Aint; const loc: tlocation);
  203. procedure a_op_reg_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  204. procedure a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  205. procedure a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  206. procedure a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  207. procedure a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  208. { trinary operations for processors that support them, 'emulated' }
  209. { on others. None with "ref" arguments since I don't think there }
  210. { are any processors that support it (JM) }
  211. procedure a_op_const_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  212. procedure a_op_reg_reg_reg(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  213. procedure a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  214. procedure a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  215. { comparison operations }
  216. procedure a_cmp_const_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  217. l : tasmlabel);virtual; abstract;
  218. procedure a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  219. l : tasmlabel); virtual;
  220. procedure a_cmp_const_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  221. l : tasmlabel);
  222. procedure a_cmp_reg_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  223. procedure a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  224. procedure a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  225. procedure a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  226. procedure a_cmp_ref_loc_label(list: taasmoutput; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  227. l : tasmlabel);
  228. procedure a_jmp_name(list : taasmoutput;const s : string); virtual; abstract;
  229. procedure a_jmp_always(list : taasmoutput;l: tasmlabel); virtual; abstract;
  230. procedure a_jmp_flags(list : taasmoutput;const f : TResFlags;l: tasmlabel); virtual; abstract;
  231. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  232. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  233. }
  234. procedure g_flags2reg(list: taasmoutput; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  235. procedure g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  236. {
  237. This routine tries to optimize the const_reg opcode, and should be
  238. called at the start of a_op_const_reg. It returns the actual opcode
  239. to emit, and the constant value to emit. If this routine returns
  240. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  241. @param(op The opcode to emit, returns the opcode which must be emitted)
  242. @param(a The constant which should be emitted, returns the constant which must
  243. be emitted)
  244. @param(reg The register to emit the opcode with, returns the register with
  245. which the opcode will be emitted)
  246. }
  247. function optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg: tregister): boolean;virtual;
  248. {#
  249. This routine is used in exception management nodes. It should
  250. save the exception reason currently in the FUNCTION_RETURN_REG. The
  251. save should be done either to a temp (pointed to by href).
  252. or on the stack (pushing the value on the stack).
  253. The size of the value to save is OS_S32. The default version
  254. saves the exception reason to a temp. memory area.
  255. }
  256. procedure g_exception_reason_save(list : taasmoutput; const href : treference);virtual;
  257. {#
  258. This routine is used in exception management nodes. It should
  259. save the exception reason constant. The
  260. save should be done either to a temp (pointed to by href).
  261. or on the stack (pushing the value on the stack).
  262. The size of the value to save is OS_S32. The default version
  263. saves the exception reason to a temp. memory area.
  264. }
  265. procedure g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);virtual;
  266. {#
  267. This routine is used in exception management nodes. It should
  268. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  269. should either be in the temp. area (pointed to by href , href should
  270. *NOT* be freed) or on the stack (the value should be popped).
  271. The size of the value to save is OS_S32. The default version
  272. saves the exception reason to a temp. memory area.
  273. }
  274. procedure g_exception_reason_load(list : taasmoutput; const href : treference);virtual;
  275. procedure g_maybe_testself(list : taasmoutput;reg:tregister);
  276. procedure g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  277. {# This should emit the opcode to copy len bytes from the source
  278. to destination.
  279. It must be overriden for each new target processor.
  280. @param(source Source reference of copy)
  281. @param(dest Destination reference of copy)
  282. }
  283. procedure g_concatcopy(list : taasmoutput;const source,dest : treference;len : aint);virtual; abstract;
  284. {# This should emit the opcode to copy len bytes from the an unaligned source
  285. to destination.
  286. It must be overriden for each new target processor.
  287. @param(source Source reference of copy)
  288. @param(dest Destination reference of copy)
  289. }
  290. procedure g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint);virtual;
  291. {# This should emit the opcode to a shortrstring from the source
  292. to destination.
  293. @param(source Source reference of copy)
  294. @param(dest Destination reference of copy)
  295. }
  296. procedure g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte);
  297. procedure g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  298. procedure g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  299. procedure g_initialize(list : taasmoutput;t : tdef;const ref : treference);
  300. procedure g_finalize(list : taasmoutput;t : tdef;const ref : treference);
  301. {# Generates range checking code. It is to note
  302. that this routine does not need to be overriden,
  303. as it takes care of everything.
  304. @param(p Node which contains the value to check)
  305. @param(todef Type definition of node to range check)
  306. }
  307. procedure g_rangecheck(list: taasmoutput; const l:tlocation; fromdef,todef: tdef); virtual;
  308. {# Generates overflow checking code for a node }
  309. procedure g_overflowcheck(list: taasmoutput; const Loc:tlocation; def:tdef); virtual;abstract;
  310. procedure g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  311. procedure g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  312. procedure g_releasevaluepara_openarray(list : taasmoutput;const l:tlocation);virtual;
  313. {# Emits instructions when compilation is done in profile
  314. mode (this is set as a command line option). The default
  315. behavior does nothing, should be overriden as required.
  316. }
  317. procedure g_profilecode(list : taasmoutput);virtual;
  318. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  319. @param(size Number of bytes to allocate)
  320. }
  321. procedure g_stackpointer_alloc(list : taasmoutput;size : longint);virtual; abstract;
  322. {# Emits instruction for allocating the locals in entry
  323. code of a routine. This is one of the first
  324. routine called in @var(genentrycode).
  325. @param(localsize Number of bytes to allocate as locals)
  326. }
  327. procedure g_proc_entry(list : taasmoutput;localsize : longint;nostackframe:boolean);virtual; abstract;
  328. {# Emits instructions for returning from a subroutine.
  329. Should also restore the framepointer and stack.
  330. @param(parasize Number of bytes of parameters to deallocate from stack)
  331. }
  332. procedure g_proc_exit(list : taasmoutput;parasize:longint;nostackframe:boolean);virtual;abstract;
  333. {# This routine is called when generating the code for the entry point
  334. of a routine. It should save all registers which are not used in this
  335. routine, and which should be declared as saved in the std_saved_registers
  336. set.
  337. This routine is mainly used when linking to code which is generated
  338. by ABI-compliant compilers (like GCC), to make sure that the reserved
  339. registers of that ABI are not clobbered.
  340. @param(usedinproc Registers which are used in the code of this routine)
  341. }
  342. procedure g_save_standard_registers(list:Taasmoutput);virtual;
  343. {# This routine is called when generating the code for the exit point
  344. of a routine. It should restore all registers which were previously
  345. saved in @var(g_save_standard_registers).
  346. @param(usedinproc Registers which are used in the code of this routine)
  347. }
  348. procedure g_restore_standard_registers(list:Taasmoutput);virtual;
  349. procedure g_intf_wrapper(list: TAAsmoutput; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  350. procedure g_adjust_self_value(list:taasmoutput;procdef: tprocdef;ioffset: aint);virtual;
  351. end;
  352. {$ifndef cpu64bit}
  353. {# @abstract(Abstract code generator for 64 Bit operations)
  354. This class implements an abstract code generator class
  355. for 64 Bit operations.
  356. }
  357. tcg64 = class
  358. procedure a_load64_const_ref(list : taasmoutput;value : int64;const ref : treference);virtual;abstract;
  359. procedure a_load64_reg_ref(list : taasmoutput;reg : tregister64;const ref : treference);virtual;abstract;
  360. procedure a_load64_ref_reg(list : taasmoutput;const ref : treference;reg : tregister64);virtual;abstract;
  361. procedure a_load64_reg_reg(list : taasmoutput;regsrc,regdst : tregister64);virtual;abstract;
  362. procedure a_load64_const_reg(list : taasmoutput;value : int64;reg : tregister64);virtual;abstract;
  363. procedure a_load64_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister64);virtual;abstract;
  364. procedure a_load64_loc_ref(list : taasmoutput;const l : tlocation;const ref : treference);virtual;abstract;
  365. procedure a_load64_const_loc(list : taasmoutput;value : int64;const l : tlocation);virtual;abstract;
  366. procedure a_load64_reg_loc(list : taasmoutput;reg : tregister64;const l : tlocation);virtual;abstract;
  367. procedure a_load64high_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  368. procedure a_load64low_reg_ref(list : taasmoutput;reg : tregister;const ref : treference);virtual;abstract;
  369. procedure a_load64high_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  370. procedure a_load64low_ref_reg(list : taasmoutput;const ref : treference;reg : tregister);virtual;abstract;
  371. procedure a_load64high_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  372. procedure a_load64low_loc_reg(list : taasmoutput;const l : tlocation;reg : tregister);virtual;abstract;
  373. procedure a_op64_ref_reg(list : taasmoutput;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  374. procedure a_op64_reg_reg(list : taasmoutput;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  375. procedure a_op64_reg_ref(list : taasmoutput;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  376. procedure a_op64_const_reg(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  377. procedure a_op64_const_ref(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  378. procedure a_op64_const_loc(list : taasmoutput;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  379. procedure a_op64_reg_loc(list : taasmoutput;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  380. procedure a_op64_loc_reg(list : taasmoutput;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  381. procedure a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  382. procedure a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  383. procedure a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  384. procedure a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  385. procedure a_param64_reg(list : taasmoutput;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  386. procedure a_param64_const(list : taasmoutput;value : int64;const loc : TCGPara);virtual;abstract;
  387. procedure a_param64_ref(list : taasmoutput;const r : treference;const loc : TCGPara);virtual;abstract;
  388. procedure a_param64_loc(list : taasmoutput;const l : tlocation;const loc : TCGPara);virtual;abstract;
  389. {
  390. This routine tries to optimize the const_reg opcode, and should be
  391. called at the start of a_op64_const_reg. It returns the actual opcode
  392. to emit, and the constant value to emit. If this routine returns
  393. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  394. @param(op The opcode to emit, returns the opcode which must be emitted)
  395. @param(a The constant which should be emitted, returns the constant which must
  396. be emitted)
  397. @param(reg The register to emit the opcode with, returns the register with
  398. which the opcode will be emitted)
  399. }
  400. function optimize64_op_const_reg(list: taasmoutput; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  401. { override to catch 64bit rangechecks }
  402. procedure g_rangecheck64(list: taasmoutput; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  403. end;
  404. {$endif cpu64bit}
  405. var
  406. {# Main code generator class }
  407. cg : tcg;
  408. {$ifndef cpu64bit}
  409. {# Code generator class for all operations working with 64-Bit operands }
  410. cg64 : tcg64;
  411. {$endif cpu64bit}
  412. implementation
  413. uses
  414. globals,options,systems,
  415. verbose,defutil,paramgr,symsym,
  416. tgobj,cutils,procinfo;
  417. const
  418. { Please leave this here, this module should NOT use
  419. exprasmlist, the lists are always passed as arguments.
  420. Declaring it as string here results in an error when compiling (PFV) }
  421. exprasmlist = 'error';
  422. {*****************************************************************************
  423. basic functionallity
  424. ******************************************************************************}
  425. constructor tcg.create;
  426. begin
  427. end;
  428. {*****************************************************************************
  429. register allocation
  430. ******************************************************************************}
  431. procedure tcg.init_register_allocators;
  432. begin
  433. fillchar(rg,sizeof(rg),0);
  434. add_reg_instruction_hook:=@add_reg_instruction;
  435. end;
  436. procedure tcg.done_register_allocators;
  437. begin
  438. { Safety }
  439. fillchar(rg,sizeof(rg),0);
  440. add_reg_instruction_hook:=nil;
  441. end;
  442. {$ifdef flowgraph}
  443. procedure Tcg.init_flowgraph;
  444. begin
  445. aktflownode:=0;
  446. end;
  447. procedure Tcg.done_flowgraph;
  448. begin
  449. end;
  450. {$endif}
  451. function tcg.getintregister(list:Taasmoutput;size:Tcgsize):Tregister;
  452. begin
  453. if not assigned(rg[R_INTREGISTER]) then
  454. internalerror(200312122);
  455. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(size));
  456. end;
  457. function tcg.getfpuregister(list:Taasmoutput;size:Tcgsize):Tregister;
  458. begin
  459. if not assigned(rg[R_FPUREGISTER]) then
  460. internalerror(200312123);
  461. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(size));
  462. end;
  463. function tcg.getmmregister(list:Taasmoutput;size:Tcgsize):Tregister;
  464. begin
  465. if not assigned(rg[R_MMREGISTER]) then
  466. internalerror(200312124);
  467. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(size));
  468. end;
  469. function tcg.getaddressregister(list:Taasmoutput):Tregister;
  470. begin
  471. if assigned(rg[R_ADDRESSREGISTER]) then
  472. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  473. else
  474. begin
  475. if not assigned(rg[R_INTREGISTER]) then
  476. internalerror(200312121);
  477. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  478. end;
  479. end;
  480. function Tcg.makeregsize(list:Taasmoutput;reg:Tregister;size:Tcgsize):Tregister;
  481. var
  482. subreg:Tsubregister;
  483. begin
  484. subreg:=cgsize2subreg(size);
  485. result:=reg;
  486. setsubreg(result,subreg);
  487. { notify RA }
  488. if result<>reg then
  489. list.concat(tai_regalloc.resize(result));
  490. end;
  491. procedure tcg.getcpuregister(list:Taasmoutput;r:Tregister);
  492. begin
  493. if not assigned(rg[getregtype(r)]) then
  494. internalerror(200312125);
  495. rg[getregtype(r)].getcpuregister(list,r);
  496. end;
  497. procedure tcg.ungetcpuregister(list:Taasmoutput;r:Tregister);
  498. begin
  499. if not assigned(rg[getregtype(r)]) then
  500. internalerror(200312126);
  501. rg[getregtype(r)].ungetcpuregister(list,r);
  502. end;
  503. procedure tcg.alloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  504. begin
  505. if assigned(rg[rt]) then
  506. rg[rt].alloccpuregisters(list,r)
  507. else
  508. internalerror(200310092);
  509. end;
  510. procedure tcg.dealloccpuregisters(list:Taasmoutput;rt:Tregistertype;r:Tcpuregisterset);
  511. begin
  512. if assigned(rg[rt]) then
  513. rg[rt].dealloccpuregisters(list,r)
  514. else
  515. internalerror(200310093);
  516. end;
  517. function tcg.uses_registers(rt:Tregistertype):boolean;
  518. begin
  519. if assigned(rg[rt]) then
  520. result:=rg[rt].uses_registers
  521. else
  522. result:=false;
  523. end;
  524. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  525. var
  526. rt : tregistertype;
  527. begin
  528. rt:=getregtype(r);
  529. { Only add it when a register allocator is configured.
  530. No IE can be generated, because the VMT is written
  531. without a valid rg[] }
  532. if assigned(rg[rt]) then
  533. rg[rt].add_reg_instruction(instr,r);
  534. end;
  535. procedure tcg.add_move_instruction(instr:Taicpu);
  536. var
  537. rt : tregistertype;
  538. begin
  539. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  540. if assigned(rg[rt]) then
  541. rg[rt].add_move_instruction(instr)
  542. else
  543. internalerror(200310095);
  544. end;
  545. procedure tcg.do_register_allocation(list:Taasmoutput;headertai:tai);
  546. var
  547. rt : tregistertype;
  548. begin
  549. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  550. begin
  551. if assigned(rg[rt]) then
  552. rg[rt].do_register_allocation(list,headertai);
  553. end;
  554. { running the other register allocator passes could require addition int/addr. registers
  555. when spilling so run int/addr register allocation at the end }
  556. if assigned(rg[R_INTREGISTER]) then
  557. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  558. if assigned(rg[R_ADDRESSREGISTER]) then
  559. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  560. end;
  561. procedure tcg.a_reg_alloc(list : taasmoutput;r : tregister);
  562. begin
  563. list.concat(tai_regalloc.alloc(r,nil));
  564. end;
  565. procedure tcg.a_reg_dealloc(list : taasmoutput;r : tregister);
  566. begin
  567. list.concat(tai_regalloc.dealloc(r,nil));
  568. end;
  569. procedure tcg.a_reg_sync(list : taasmoutput;r : tregister);
  570. var
  571. instr : tai;
  572. begin
  573. instr:=tai_regalloc.sync(r);
  574. list.concat(instr);
  575. add_reg_instruction(instr,r);
  576. end;
  577. procedure tcg.a_label(list : taasmoutput;l : tasmlabel);
  578. begin
  579. list.concat(tai_label.create(l));
  580. end;
  581. {*****************************************************************************
  582. for better code generation these methods should be overridden
  583. ******************************************************************************}
  584. procedure tcg.a_param_reg(list : taasmoutput;size : tcgsize;r : tregister;const cgpara : TCGPara);
  585. var
  586. ref : treference;
  587. begin
  588. cgpara.check_simple_location;
  589. case cgpara.location^.loc of
  590. LOC_REGISTER,LOC_CREGISTER:
  591. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  592. LOC_REFERENCE,LOC_CREFERENCE:
  593. begin
  594. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  595. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  596. end
  597. else
  598. internalerror(2002071004);
  599. end;
  600. end;
  601. procedure tcg.a_param_const(list : taasmoutput;size : tcgsize;a : aint;const cgpara : TCGPara);
  602. var
  603. ref : treference;
  604. begin
  605. cgpara.check_simple_location;
  606. case cgpara.location^.loc of
  607. LOC_REGISTER,LOC_CREGISTER:
  608. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  609. LOC_REFERENCE,LOC_CREFERENCE:
  610. begin
  611. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  612. a_load_const_ref(list,cgpara.location^.size,a,ref);
  613. end
  614. else
  615. internalerror(2002071004);
  616. end;
  617. end;
  618. procedure tcg.a_param_ref(list : taasmoutput;size : tcgsize;const r : treference;const cgpara : TCGPara);
  619. var
  620. ref : treference;
  621. begin
  622. cgpara.check_simple_location;
  623. case cgpara.location^.loc of
  624. LOC_REGISTER,LOC_CREGISTER:
  625. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  626. LOC_REFERENCE,LOC_CREFERENCE:
  627. begin
  628. reference_reset(ref);
  629. ref.base:=cgpara.location^.reference.index;
  630. ref.offset:=cgpara.location^.reference.offset;
  631. { use concatcopy, because it can also be a float which fails when
  632. load_ref_ref is used }
  633. g_concatcopy(list,r,ref,tcgsize2size[size]);
  634. end
  635. else
  636. internalerror(2002071004);
  637. end;
  638. end;
  639. procedure tcg.a_param_loc(list : taasmoutput;const l:tlocation;const cgpara : TCGPara);
  640. begin
  641. case l.loc of
  642. LOC_REGISTER,
  643. LOC_CREGISTER :
  644. a_param_reg(list,l.size,l.register,cgpara);
  645. LOC_CONSTANT :
  646. a_param_const(list,l.size,l.value,cgpara);
  647. LOC_CREFERENCE,
  648. LOC_REFERENCE :
  649. a_param_ref(list,l.size,l.reference,cgpara);
  650. else
  651. internalerror(2002032211);
  652. end;
  653. end;
  654. procedure tcg.a_paramaddr_ref(list : taasmoutput;const r : treference;const cgpara : TCGPara);
  655. var
  656. hr : tregister;
  657. begin
  658. cgpara.check_simple_location;
  659. hr:=getaddressregister(list);
  660. a_loadaddr_ref_reg(list,r,hr);
  661. a_param_reg(list,OS_ADDR,hr,cgpara);
  662. end;
  663. {****************************************************************************
  664. some generic implementations
  665. ****************************************************************************}
  666. procedure tcg.a_load_ref_ref(list : taasmoutput;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  667. var
  668. tmpreg: tregister;
  669. begin
  670. { verify if we have the same reference }
  671. if references_equal(sref,dref) then
  672. exit;
  673. tmpreg:=getintregister(list,tosize);
  674. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  675. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  676. end;
  677. procedure tcg.a_load_const_ref(list : taasmoutput;size : tcgsize;a : aint;const ref : treference);
  678. var
  679. tmpreg: tregister;
  680. begin
  681. tmpreg:=getintregister(list,size);
  682. a_load_const_reg(list,size,a,tmpreg);
  683. a_load_reg_ref(list,size,size,tmpreg,ref);
  684. end;
  685. procedure tcg.a_load_const_loc(list : taasmoutput;a : aint;const loc: tlocation);
  686. begin
  687. case loc.loc of
  688. LOC_REFERENCE,LOC_CREFERENCE:
  689. a_load_const_ref(list,loc.size,a,loc.reference);
  690. LOC_REGISTER,LOC_CREGISTER:
  691. a_load_const_reg(list,loc.size,a,loc.register);
  692. else
  693. internalerror(200203272);
  694. end;
  695. end;
  696. procedure tcg.a_load_reg_loc(list : taasmoutput;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  697. begin
  698. case loc.loc of
  699. LOC_REFERENCE,LOC_CREFERENCE:
  700. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  701. LOC_REGISTER,LOC_CREGISTER:
  702. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  703. else
  704. internalerror(200203271);
  705. end;
  706. end;
  707. procedure tcg.a_load_loc_reg(list : taasmoutput; tosize: tcgsize; const loc: tlocation; reg : tregister);
  708. begin
  709. case loc.loc of
  710. LOC_REFERENCE,LOC_CREFERENCE:
  711. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  712. LOC_REGISTER,LOC_CREGISTER:
  713. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  714. LOC_CONSTANT:
  715. a_load_const_reg(list,tosize,loc.value,reg);
  716. else
  717. internalerror(200109092);
  718. end;
  719. end;
  720. procedure tcg.a_load_loc_ref(list : taasmoutput;tosize: tcgsize; const loc: tlocation; const ref : treference);
  721. begin
  722. case loc.loc of
  723. LOC_REFERENCE,LOC_CREFERENCE:
  724. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  725. LOC_REGISTER,LOC_CREGISTER:
  726. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  727. LOC_CONSTANT:
  728. a_load_const_ref(list,tosize,loc.value,ref);
  729. else
  730. internalerror(200109302);
  731. end;
  732. end;
  733. function tcg.optimize_op_const_reg(list: taasmoutput; var op: topcg; var a : aint; var reg:tregister): boolean;
  734. var
  735. powerval : longint;
  736. begin
  737. optimize_op_const_reg := false;
  738. case op of
  739. { or with zero returns same result }
  740. OP_OR : if a = 0 then optimize_op_const_reg := true;
  741. { and with max returns same result }
  742. OP_AND : if (a = high(a)) then optimize_op_const_reg := true;
  743. { division by 1 returns result }
  744. OP_DIV :
  745. begin
  746. if a = 1 then
  747. optimize_op_const_reg := true
  748. else if ispowerof2(int64(a), powerval) then
  749. begin
  750. a := powerval;
  751. op:= OP_SHR;
  752. end;
  753. exit;
  754. end;
  755. OP_IDIV:
  756. begin
  757. if a = 1 then
  758. optimize_op_const_reg := true
  759. else if ispowerof2(int64(a), powerval) then
  760. begin
  761. a := powerval;
  762. op:= OP_SAR;
  763. end;
  764. exit;
  765. end;
  766. OP_MUL,OP_IMUL:
  767. begin
  768. if a = 1 then
  769. optimize_op_const_reg := true
  770. else if ispowerof2(int64(a), powerval) then
  771. begin
  772. a := powerval;
  773. op:= OP_SHL;
  774. end;
  775. exit;
  776. end;
  777. OP_SAR,OP_SHL,OP_SHR:
  778. begin
  779. if a = 0 then
  780. optimize_op_const_reg := true;
  781. exit;
  782. end;
  783. end;
  784. end;
  785. procedure tcg.a_loadfpu_loc_reg(list: taasmoutput; const loc: tlocation; const reg: tregister);
  786. begin
  787. case loc.loc of
  788. LOC_REFERENCE, LOC_CREFERENCE:
  789. a_loadfpu_ref_reg(list,loc.size,loc.reference,reg);
  790. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  791. a_loadfpu_reg_reg(list,loc.size,loc.register,reg);
  792. else
  793. internalerror(200203301);
  794. end;
  795. end;
  796. procedure tcg.a_loadfpu_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation);
  797. begin
  798. case loc.loc of
  799. LOC_REFERENCE, LOC_CREFERENCE:
  800. a_loadfpu_reg_ref(list,size,reg,loc.reference);
  801. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  802. a_loadfpu_reg_reg(list,size,reg,loc.register);
  803. else
  804. internalerror(48991);
  805. end;
  806. end;
  807. procedure tcg.a_paramfpu_reg(list : taasmoutput;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  808. var
  809. ref : treference;
  810. begin
  811. cgpara.check_simple_location;
  812. case cgpara.location^.loc of
  813. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  814. a_loadfpu_reg_reg(list,size,r,cgpara.location^.register);
  815. LOC_REFERENCE,LOC_CREFERENCE:
  816. begin
  817. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  818. a_loadfpu_reg_ref(list,size,r,ref);
  819. end
  820. else
  821. internalerror(2002071004);
  822. end;
  823. end;
  824. procedure tcg.a_paramfpu_ref(list : taasmoutput;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  825. var
  826. href : treference;
  827. begin
  828. cgpara.check_simple_location;
  829. case cgpara.location^.loc of
  830. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  831. a_loadfpu_ref_reg(list,size,ref,cgpara.location^.register);
  832. LOC_REFERENCE,LOC_CREFERENCE:
  833. begin
  834. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  835. { concatcopy should choose the best way to copy the data }
  836. g_concatcopy(list,ref,href,tcgsize2size[size]);
  837. end
  838. else
  839. internalerror(200402201);
  840. end;
  841. end;
  842. procedure tcg.a_op_const_ref(list : taasmoutput; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  843. var
  844. tmpreg : tregister;
  845. begin
  846. tmpreg:=getintregister(list,size);
  847. a_load_ref_reg(list,size,size,ref,tmpreg);
  848. a_op_const_reg(list,op,size,a,tmpreg);
  849. a_load_reg_ref(list,size,size,tmpreg,ref);
  850. end;
  851. procedure tcg.a_op_const_loc(list : taasmoutput; Op: TOpCG; a: aint; const loc: tlocation);
  852. begin
  853. case loc.loc of
  854. LOC_REGISTER, LOC_CREGISTER:
  855. a_op_const_reg(list,op,loc.size,a,loc.register);
  856. LOC_REFERENCE, LOC_CREFERENCE:
  857. a_op_const_ref(list,op,loc.size,a,loc.reference);
  858. else
  859. internalerror(200109061);
  860. end;
  861. end;
  862. procedure tcg.a_op_reg_ref(list : taasmoutput; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  863. var
  864. tmpreg : tregister;
  865. begin
  866. tmpreg:=getintregister(list,size);
  867. a_load_ref_reg(list,size,size,ref,tmpreg);
  868. a_op_reg_reg(list,op,size,reg,tmpreg);
  869. a_load_reg_ref(list,size,size,tmpreg,ref);
  870. end;
  871. procedure tcg.a_op_ref_reg(list : taasmoutput; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  872. var
  873. tmpreg: tregister;
  874. begin
  875. case op of
  876. OP_NOT,OP_NEG:
  877. { handle it as "load ref,reg; op reg" }
  878. begin
  879. a_load_ref_reg(list,size,size,ref,reg);
  880. a_op_reg_reg(list,op,size,reg,reg);
  881. end;
  882. else
  883. begin
  884. tmpreg:=getintregister(list,size);
  885. a_load_ref_reg(list,size,size,ref,tmpreg);
  886. a_op_reg_reg(list,op,size,tmpreg,reg);
  887. end;
  888. end;
  889. end;
  890. procedure tcg.a_op_reg_loc(list : taasmoutput; Op: TOpCG; reg: tregister; const loc: tlocation);
  891. begin
  892. case loc.loc of
  893. LOC_REGISTER, LOC_CREGISTER:
  894. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  895. LOC_REFERENCE, LOC_CREFERENCE:
  896. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  897. else
  898. internalerror(200109061);
  899. end;
  900. end;
  901. procedure tcg.a_op_ref_loc(list : taasmoutput; Op: TOpCG; const ref: TReference; const loc: tlocation);
  902. var
  903. tmpreg: tregister;
  904. begin
  905. case loc.loc of
  906. LOC_REGISTER,LOC_CREGISTER:
  907. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  908. LOC_REFERENCE,LOC_CREFERENCE:
  909. begin
  910. tmpreg:=getintregister(list,loc.size);
  911. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  912. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  913. end;
  914. else
  915. internalerror(200109061);
  916. end;
  917. end;
  918. procedure Tcg.a_op_const_reg_reg(list:Taasmoutput;op:Topcg;size:Tcgsize;
  919. a:aint;src,dst:Tregister);
  920. begin
  921. a_load_reg_reg(list,size,size,src,dst);
  922. a_op_const_reg(list,op,size,a,dst);
  923. end;
  924. procedure tcg.a_op_reg_reg_reg(list: taasmoutput; op: TOpCg;
  925. size: tcgsize; src1, src2, dst: tregister);
  926. var
  927. tmpreg: tregister;
  928. begin
  929. if (dst<>src1) then
  930. begin
  931. a_load_reg_reg(list,size,size,src2,dst);
  932. a_op_reg_reg(list,op,size,src1,dst);
  933. end
  934. else
  935. begin
  936. tmpreg:=getintregister(list,size);
  937. a_load_reg_reg(list,size,size,src2,tmpreg);
  938. a_op_reg_reg(list,op,size,src1,tmpreg);
  939. a_load_reg_reg(list,size,size,tmpreg,dst);
  940. end;
  941. end;
  942. procedure tcg.a_op_const_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  943. begin
  944. a_op_const_reg_reg(list,op,size,a,src,dst);
  945. ovloc.loc:=LOC_VOID;
  946. end;
  947. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: taasmoutput; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  948. begin
  949. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  950. ovloc.loc:=LOC_VOID;
  951. end;
  952. procedure tcg.a_cmp_const_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  953. l : tasmlabel);
  954. var
  955. tmpreg: tregister;
  956. begin
  957. tmpreg:=getintregister(list,size);
  958. a_load_ref_reg(list,size,size,ref,tmpreg);
  959. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  960. end;
  961. procedure tcg.a_cmp_const_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  962. l : tasmlabel);
  963. begin
  964. case loc.loc of
  965. LOC_REGISTER,LOC_CREGISTER:
  966. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  967. LOC_REFERENCE,LOC_CREFERENCE:
  968. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  969. else
  970. internalerror(200109061);
  971. end;
  972. end;
  973. procedure tcg.a_cmp_ref_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  974. var
  975. tmpreg: tregister;
  976. begin
  977. tmpreg:=getintregister(list,size);
  978. a_load_ref_reg(list,size,size,ref,tmpreg);
  979. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  980. end;
  981. procedure tcg.a_cmp_reg_ref_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  982. var
  983. tmpreg: tregister;
  984. begin
  985. tmpreg:=getintregister(list,size);
  986. a_load_ref_reg(list,size,size,ref,tmpreg);
  987. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  988. end;
  989. procedure tcg.a_cmp_loc_reg_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  990. begin
  991. case loc.loc of
  992. LOC_REGISTER,
  993. LOC_CREGISTER:
  994. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  995. LOC_REFERENCE,
  996. LOC_CREFERENCE :
  997. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  998. LOC_CONSTANT:
  999. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1000. else
  1001. internalerror(200203231);
  1002. end;
  1003. end;
  1004. procedure tcg.a_cmp_ref_loc_label(list : taasmoutput;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1005. l : tasmlabel);
  1006. var
  1007. tmpreg: tregister;
  1008. begin
  1009. case loc.loc of
  1010. LOC_REGISTER,LOC_CREGISTER:
  1011. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1012. LOC_REFERENCE,LOC_CREFERENCE:
  1013. begin
  1014. tmpreg:=getintregister(list,size);
  1015. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1016. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1017. end
  1018. else
  1019. internalerror(200109061);
  1020. end;
  1021. end;
  1022. procedure tcg.a_loadmm_loc_reg(list: taasmoutput; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1023. begin
  1024. case loc.loc of
  1025. LOC_MMREGISTER,LOC_CMMREGISTER:
  1026. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1027. LOC_REFERENCE,LOC_CREFERENCE:
  1028. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1029. else
  1030. internalerror(200310121);
  1031. end;
  1032. end;
  1033. procedure tcg.a_loadmm_reg_loc(list: taasmoutput; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1034. begin
  1035. case loc.loc of
  1036. LOC_MMREGISTER,LOC_CMMREGISTER:
  1037. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1038. LOC_REFERENCE,LOC_CREFERENCE:
  1039. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1040. else
  1041. internalerror(200310122);
  1042. end;
  1043. end;
  1044. procedure tcg.a_parammm_reg(list: taasmoutput; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1045. var
  1046. href : treference;
  1047. begin
  1048. cgpara.check_simple_location;
  1049. case cgpara.location^.loc of
  1050. LOC_MMREGISTER,LOC_CMMREGISTER:
  1051. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1052. LOC_REFERENCE,LOC_CREFERENCE:
  1053. begin
  1054. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset);
  1055. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1056. end
  1057. else
  1058. internalerror(200310123);
  1059. end;
  1060. end;
  1061. procedure tcg.a_parammm_ref(list: taasmoutput; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1062. var
  1063. hr : tregister;
  1064. hs : tmmshuffle;
  1065. begin
  1066. cgpara.check_simple_location;
  1067. hr:=getmmregister(list,cgpara.location^.size);
  1068. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1069. if realshuffle(shuffle) then
  1070. begin
  1071. hs:=shuffle^;
  1072. removeshuffles(hs);
  1073. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  1074. end
  1075. else
  1076. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  1077. end;
  1078. procedure tcg.a_parammm_loc(list: taasmoutput;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1079. begin
  1080. case loc.loc of
  1081. LOC_MMREGISTER,LOC_CMMREGISTER:
  1082. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  1083. LOC_REFERENCE,LOC_CREFERENCE:
  1084. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  1085. else
  1086. internalerror(200310123);
  1087. end;
  1088. end;
  1089. procedure tcg.a_opmm_ref_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1090. var
  1091. hr : tregister;
  1092. hs : tmmshuffle;
  1093. begin
  1094. hr:=getmmregister(list,size);
  1095. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1096. if realshuffle(shuffle) then
  1097. begin
  1098. hs:=shuffle^;
  1099. removeshuffles(hs);
  1100. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1101. end
  1102. else
  1103. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1104. end;
  1105. procedure tcg.a_opmm_reg_ref(list: taasmoutput; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1106. var
  1107. hr : tregister;
  1108. hs : tmmshuffle;
  1109. begin
  1110. hr:=getmmregister(list,size);
  1111. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1112. if realshuffle(shuffle) then
  1113. begin
  1114. hs:=shuffle^;
  1115. removeshuffles(hs);
  1116. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1117. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1118. end
  1119. else
  1120. begin
  1121. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1122. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1123. end;
  1124. end;
  1125. procedure tcg.a_opmm_loc_reg(list: taasmoutput; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1126. begin
  1127. case loc.loc of
  1128. LOC_CMMREGISTER,LOC_MMREGISTER:
  1129. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1130. LOC_CREFERENCE,LOC_REFERENCE:
  1131. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1132. else
  1133. internalerror(200312232);
  1134. end;
  1135. end;
  1136. procedure tcg.g_concatcopy_unaligned(list : taasmoutput;const source,dest : treference;len : aint);
  1137. begin
  1138. g_concatcopy(list,source,dest,len);
  1139. end;
  1140. procedure tcg.g_copyshortstring(list : taasmoutput;const source,dest : treference;len:byte);
  1141. var
  1142. cgpara1,cgpara2,cgpara3 : TCGPara;
  1143. begin
  1144. cgpara1.init;
  1145. cgpara2.init;
  1146. cgpara3.init;
  1147. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1148. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1149. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1150. paramanager.allocparaloc(list,cgpara3);
  1151. a_paramaddr_ref(list,dest,cgpara3);
  1152. paramanager.allocparaloc(list,cgpara2);
  1153. a_paramaddr_ref(list,source,cgpara2);
  1154. paramanager.allocparaloc(list,cgpara1);
  1155. a_param_const(list,OS_INT,len,cgpara1);
  1156. paramanager.freeparaloc(list,cgpara3);
  1157. paramanager.freeparaloc(list,cgpara2);
  1158. paramanager.freeparaloc(list,cgpara1);
  1159. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1160. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1161. a_call_name(list,'FPC_SHORTSTR_ASSIGN');
  1162. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1163. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1164. cgpara3.done;
  1165. cgpara2.done;
  1166. cgpara1.done;
  1167. end;
  1168. procedure tcg.g_incrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  1169. var
  1170. href : treference;
  1171. incrfunc : string;
  1172. cgpara1,cgpara2 : TCGPara;
  1173. begin
  1174. cgpara1.init;
  1175. cgpara2.init;
  1176. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1177. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1178. if is_interfacecom(t) then
  1179. incrfunc:='FPC_INTF_INCR_REF'
  1180. else if is_ansistring(t) then
  1181. {$ifdef ansistring_bits}
  1182. begin
  1183. case Tstringdef(t).string_typ of
  1184. st_ansistring16:
  1185. incrfunc:='FPC_ANSISTR16_INCR_REF';
  1186. st_ansistring32:
  1187. incrfunc:='FPC_ANSISTR32_INCR_REF';
  1188. st_ansistring64:
  1189. incrfunc:='FPC_ANSISTR64_INCR_REF';
  1190. end;
  1191. end
  1192. {$else}
  1193. incrfunc:='FPC_ANSISTR_INCR_REF'
  1194. {$endif}
  1195. else if is_widestring(t) then
  1196. incrfunc:='FPC_WIDESTR_INCR_REF'
  1197. else if is_dynamic_array(t) then
  1198. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1199. else
  1200. incrfunc:='';
  1201. { call the special incr function or the generic addref }
  1202. if incrfunc<>'' then
  1203. begin
  1204. paramanager.allocparaloc(list,cgpara1);
  1205. { these functions get the pointer by value }
  1206. a_param_ref(list,OS_ADDR,ref,cgpara1);
  1207. paramanager.freeparaloc(list,cgpara1);
  1208. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1209. a_call_name(list,incrfunc);
  1210. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1211. end
  1212. else
  1213. begin
  1214. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1215. paramanager.allocparaloc(list,cgpara2);
  1216. a_paramaddr_ref(list,href,cgpara2);
  1217. paramanager.allocparaloc(list,cgpara1);
  1218. a_paramaddr_ref(list,ref,cgpara1);
  1219. paramanager.freeparaloc(list,cgpara1);
  1220. paramanager.freeparaloc(list,cgpara2);
  1221. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1222. a_call_name(list,'FPC_ADDREF');
  1223. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1224. end;
  1225. cgpara2.done;
  1226. cgpara1.done;
  1227. end;
  1228. procedure tcg.g_decrrefcount(list : taasmoutput;t: tdef; const ref: treference);
  1229. var
  1230. href : treference;
  1231. decrfunc : string;
  1232. needrtti : boolean;
  1233. cgpara1,cgpara2 : TCGPara;
  1234. begin
  1235. cgpara1.init;
  1236. cgpara2.init;
  1237. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1238. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1239. needrtti:=false;
  1240. if is_interfacecom(t) then
  1241. decrfunc:='FPC_INTF_DECR_REF'
  1242. else if is_ansistring(t) then
  1243. {$ifdef ansistring_bits}
  1244. begin
  1245. case Tstringdef(t).string_typ of
  1246. st_ansistring16:
  1247. decrfunc:='FPC_ANSISTR16_DECR_REF';
  1248. st_ansistring32:
  1249. decrfunc:='FPC_ANSISTR32_DECR_REF';
  1250. st_ansistring64:
  1251. decrfunc:='FPC_ANSISTR64_DECR_REF';
  1252. end;
  1253. end
  1254. {$else}
  1255. decrfunc:='FPC_ANSISTR_DECR_REF'
  1256. {$endif}
  1257. else if is_widestring(t) then
  1258. decrfunc:='FPC_WIDESTR_DECR_REF'
  1259. else if is_dynamic_array(t) then
  1260. begin
  1261. decrfunc:='FPC_DYNARRAY_DECR_REF';
  1262. needrtti:=true;
  1263. end
  1264. else
  1265. decrfunc:='';
  1266. { call the special decr function or the generic decref }
  1267. if decrfunc<>'' then
  1268. begin
  1269. if needrtti then
  1270. begin
  1271. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1272. paramanager.allocparaloc(list,cgpara2);
  1273. a_paramaddr_ref(list,href,cgpara2);
  1274. end;
  1275. paramanager.allocparaloc(list,cgpara1);
  1276. a_paramaddr_ref(list,ref,cgpara1);
  1277. paramanager.freeparaloc(list,cgpara1);
  1278. if needrtti then
  1279. paramanager.freeparaloc(list,cgpara2);
  1280. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1281. a_call_name(list,decrfunc);
  1282. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1283. end
  1284. else
  1285. begin
  1286. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1287. paramanager.allocparaloc(list,cgpara2);
  1288. a_paramaddr_ref(list,href,cgpara2);
  1289. paramanager.allocparaloc(list,cgpara1);
  1290. a_paramaddr_ref(list,ref,cgpara1);
  1291. paramanager.freeparaloc(list,cgpara1);
  1292. paramanager.freeparaloc(list,cgpara2);
  1293. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1294. a_call_name(list,'FPC_DECREF');
  1295. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1296. end;
  1297. cgpara2.done;
  1298. cgpara1.done;
  1299. end;
  1300. procedure tcg.g_initialize(list : taasmoutput;t : tdef;const ref : treference);
  1301. var
  1302. href : treference;
  1303. cgpara1,cgpara2 : TCGPara;
  1304. begin
  1305. cgpara1.init;
  1306. cgpara2.init;
  1307. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1308. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1309. if is_ansistring(t) or
  1310. is_widestring(t) or
  1311. is_interfacecom(t) or
  1312. is_dynamic_array(t) then
  1313. a_load_const_ref(list,OS_ADDR,0,ref)
  1314. else
  1315. begin
  1316. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1317. paramanager.allocparaloc(list,cgpara2);
  1318. a_paramaddr_ref(list,href,cgpara2);
  1319. paramanager.allocparaloc(list,cgpara1);
  1320. a_paramaddr_ref(list,ref,cgpara1);
  1321. paramanager.freeparaloc(list,cgpara1);
  1322. paramanager.freeparaloc(list,cgpara2);
  1323. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1324. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1325. a_call_name(list,'FPC_INITIALIZE');
  1326. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1327. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1328. end;
  1329. cgpara1.done;
  1330. cgpara2.done;
  1331. end;
  1332. procedure tcg.g_finalize(list : taasmoutput;t : tdef;const ref : treference);
  1333. var
  1334. href : treference;
  1335. cgpara1,cgpara2 : TCGPara;
  1336. begin
  1337. cgpara1.init;
  1338. cgpara2.init;
  1339. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1340. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1341. if is_ansistring(t) or
  1342. is_widestring(t) or
  1343. is_interfacecom(t) then
  1344. begin
  1345. g_decrrefcount(list,t,ref);
  1346. a_load_const_ref(list,OS_ADDR,0,ref);
  1347. end
  1348. else
  1349. begin
  1350. reference_reset_symbol(href,tstoreddef(t).get_rtti_label(initrtti),0);
  1351. paramanager.allocparaloc(list,cgpara2);
  1352. a_paramaddr_ref(list,href,cgpara2);
  1353. paramanager.allocparaloc(list,cgpara1);
  1354. a_paramaddr_ref(list,ref,cgpara1);
  1355. paramanager.freeparaloc(list,cgpara1);
  1356. paramanager.freeparaloc(list,cgpara2);
  1357. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1358. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1359. a_call_name(list,'FPC_FINALIZE');
  1360. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1361. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1362. end;
  1363. cgpara1.done;
  1364. cgpara2.done;
  1365. end;
  1366. procedure tcg.g_rangecheck(list: taasmoutput; const l:tlocation;fromdef,todef: tdef);
  1367. { generate range checking code for the value at location p. The type }
  1368. { type used is checked against todefs ranges. fromdef (p.resulttype.def) }
  1369. { is the original type used at that location. When both defs are equal }
  1370. { the check is also insert (needed for succ,pref,inc,dec) }
  1371. {$ifndef ver1_0}
  1372. const
  1373. aintmax=high(aint);
  1374. {$endif}
  1375. var
  1376. neglabel : tasmlabel;
  1377. hreg : tregister;
  1378. lto,hto,
  1379. lfrom,hfrom : TConstExprInt;
  1380. from_signed: boolean;
  1381. {$ifdef ver1_0}
  1382. aintmax : aint;
  1383. {$endif ver1_0}
  1384. begin
  1385. {$ifdef ver1_0}
  1386. {$ifdef cpu64bit}
  1387. { this is required to prevent incorrect code }
  1388. aintmax:=$7fffffff;
  1389. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1390. aintmax:=int64(aintmax shl 16) or int64($ffff);
  1391. {$else cpu64bit}
  1392. aintmax:=high(aint);
  1393. {$endif cpu64bit}
  1394. {$endif}
  1395. { range checking on and range checkable value? }
  1396. if not(cs_check_range in aktlocalswitches) or
  1397. not(fromdef.deftype in [orddef,enumdef,arraydef]) then
  1398. exit;
  1399. {$ifndef cpu64bit}
  1400. { handle 64bit rangechecks separate for 32bit processors }
  1401. if is_64bit(fromdef) or is_64bit(todef) then
  1402. begin
  1403. cg64.g_rangecheck64(list,l,fromdef,todef);
  1404. exit;
  1405. end;
  1406. {$endif cpu64bit}
  1407. { only check when assigning to scalar, subranges are different, }
  1408. { when todef=fromdef then the check is always generated }
  1409. getrange(fromdef,lfrom,hfrom);
  1410. getrange(todef,lto,hto);
  1411. from_signed := is_signed(fromdef);
  1412. { no range check if from and to are equal and are both longint/dword }
  1413. { (if we have a 32bit processor) or int64/qword, since such }
  1414. { operations can at most cause overflows (JM) }
  1415. { Note that these checks are mostly processor independent, they only }
  1416. { have to be changed once we introduce 64bit subrange types }
  1417. {$ifdef cpu64bit}
  1418. if (fromdef = todef) and
  1419. (fromdef.deftype=orddef) and
  1420. (((((torddef(fromdef).typ = s64bit) and
  1421. (lfrom = low(int64)) and
  1422. (hfrom = high(int64))) or
  1423. ((torddef(fromdef).typ = u64bit) and
  1424. (lfrom = low(qword)) and
  1425. (hfrom = high(qword)))))) then
  1426. exit;
  1427. {$else cpu64bit}
  1428. if (fromdef = todef) and
  1429. (fromdef.deftype=orddef) and
  1430. (((((torddef(fromdef).typ = s32bit) and
  1431. (lfrom = low(longint)) and
  1432. (hfrom = high(longint))) or
  1433. ((torddef(fromdef).typ = u32bit) and
  1434. (lfrom = low(cardinal)) and
  1435. (hfrom = high(cardinal)))))) then
  1436. exit;
  1437. {$endif cpu64bit}
  1438. { if the from-range falls completely in the to-range, no check }
  1439. { is necessary. Don't do this conversion for the largest unsigned type }
  1440. if (todef<>fromdef) and
  1441. (from_signed or (hfrom>=0)) and
  1442. (lto<=lfrom) and (hto>=hfrom) then
  1443. exit;
  1444. { generate the rangecheck code for the def where we are going to }
  1445. { store the result }
  1446. { use the trick that }
  1447. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  1448. { To be able to do that, we have to make sure however that either }
  1449. { fromdef and todef are both signed or unsigned, or that we leave }
  1450. { the parts < 0 and > maxlongint out }
  1451. { is_signed now also works for arrays (it checks the rangetype) (JM) }
  1452. if from_signed xor is_signed(todef) then
  1453. begin
  1454. if from_signed then
  1455. { from is signed, to is unsigned }
  1456. begin
  1457. { if high(from) < 0 -> always range error }
  1458. if (hfrom < 0) or
  1459. { if low(to) > maxlongint also range error }
  1460. (lto > aintmax) then
  1461. begin
  1462. a_call_name(list,'FPC_RANGEERROR');
  1463. exit
  1464. end;
  1465. { from is signed and to is unsigned -> when looking at to }
  1466. { as an signed value, it must be < maxaint (otherwise }
  1467. { it will become negative, which is invalid since "to" is unsigned) }
  1468. if hto > aintmax then
  1469. hto := aintmax;
  1470. end
  1471. else
  1472. { from is unsigned, to is signed }
  1473. begin
  1474. if (lfrom > aintmax) or
  1475. (hto < 0) then
  1476. begin
  1477. a_call_name(list,'FPC_RANGEERROR');
  1478. exit
  1479. end;
  1480. { from is unsigned and to is signed -> when looking at to }
  1481. { as an unsigned value, it must be >= 0 (since negative }
  1482. { values are the same as values > maxlongint) }
  1483. if lto < 0 then
  1484. lto := 0;
  1485. end;
  1486. end;
  1487. hreg:=getintregister(list,OS_INT);
  1488. a_load_loc_reg(list,OS_INT,l,hreg);
  1489. a_op_const_reg(list,OP_SUB,OS_INT,aint(lto),hreg);
  1490. objectlibrary.getlabel(neglabel);
  1491. {
  1492. if from_signed then
  1493. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  1494. else
  1495. }
  1496. {$ifdef cpu64bit}
  1497. if qword(hto-lto)>qword(aintmax) then
  1498. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  1499. else
  1500. {$endif cpu64bit}
  1501. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(hto-lto),hreg,neglabel);
  1502. a_call_name(list,'FPC_RANGEERROR');
  1503. a_label(list,neglabel);
  1504. end;
  1505. procedure tcg.g_overflowCheck_loc(List:TAasmOutput;const Loc:TLocation;def:TDef;ovloc : tlocation);
  1506. begin
  1507. g_overflowCheck(list,loc,def);
  1508. end;
  1509. procedure tcg.g_flags2ref(list: taasmoutput; size: TCgSize; const f: tresflags; const ref:TReference);
  1510. var
  1511. tmpreg : tregister;
  1512. begin
  1513. tmpreg:=getintregister(list,size);
  1514. g_flags2reg(list,size,f,tmpreg);
  1515. a_load_reg_ref(list,size,size,tmpreg,ref);
  1516. end;
  1517. procedure tcg.g_maybe_testself(list : taasmoutput;reg:tregister);
  1518. var
  1519. OKLabel : tasmlabel;
  1520. cgpara1 : TCGPara;
  1521. begin
  1522. if (cs_check_object in aktlocalswitches) or
  1523. (cs_check_range in aktlocalswitches) then
  1524. begin
  1525. objectlibrary.getlabel(oklabel);
  1526. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  1527. cgpara1.init;
  1528. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1529. paramanager.allocparaloc(list,cgpara1);
  1530. a_param_const(list,OS_INT,210,cgpara1);
  1531. paramanager.freeparaloc(list,cgpara1);
  1532. a_call_name(list,'FPC_HANDLEERROR');
  1533. a_label(list,oklabel);
  1534. cgpara1.done;
  1535. end;
  1536. end;
  1537. procedure tcg.g_maybe_testvmt(list : taasmoutput;reg:tregister;objdef:tobjectdef);
  1538. var
  1539. hrefvmt : treference;
  1540. cgpara1,cgpara2 : TCGPara;
  1541. begin
  1542. cgpara1.init;
  1543. cgpara2.init;
  1544. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1545. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1546. if (cs_check_object in aktlocalswitches) then
  1547. begin
  1548. reference_reset_symbol(hrefvmt,objectlibrary.newasmsymbol(objdef.vmt_mangledname,AB_EXTERNAL,AT_DATA),0);
  1549. paramanager.allocparaloc(list,cgpara2);
  1550. a_paramaddr_ref(list,hrefvmt,cgpara2);
  1551. paramanager.allocparaloc(list,cgpara1);
  1552. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1553. paramanager.freeparaloc(list,cgpara1);
  1554. paramanager.freeparaloc(list,cgpara2);
  1555. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1556. a_call_name(list,'FPC_CHECK_OBJECT_EXT');
  1557. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1558. end
  1559. else
  1560. if (cs_check_range in aktlocalswitches) then
  1561. begin
  1562. paramanager.allocparaloc(list,cgpara1);
  1563. a_param_reg(list,OS_ADDR,reg,cgpara1);
  1564. paramanager.freeparaloc(list,cgpara1);
  1565. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1566. a_call_name(list,'FPC_CHECK_OBJECT');
  1567. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1568. end;
  1569. cgpara1.done;
  1570. cgpara2.done;
  1571. end;
  1572. {*****************************************************************************
  1573. Entry/Exit Code Functions
  1574. *****************************************************************************}
  1575. procedure tcg.g_copyvaluepara_openarray(list : taasmoutput;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  1576. var
  1577. sizereg,sourcereg,lenreg : tregister;
  1578. cgpara1,cgpara2,cgpara3 : TCGPara;
  1579. begin
  1580. { because some abis don't support dynamic stack allocation properly
  1581. open array value parameters are copied onto the heap
  1582. }
  1583. { calculate necessary memory }
  1584. { read/write operations on one register make the life of the register allocator hard }
  1585. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  1586. begin
  1587. lenreg:=getintregister(list,OS_INT);
  1588. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  1589. end
  1590. else
  1591. lenreg:=lenloc.register;
  1592. sizereg:=getintregister(list,OS_INT);
  1593. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  1594. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  1595. { load source }
  1596. sourcereg:=getaddressregister(list);
  1597. a_loadaddr_ref_reg(list,ref,sourcereg);
  1598. { do getmem call }
  1599. cgpara1.init;
  1600. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1601. paramanager.allocparaloc(list,cgpara1);
  1602. a_param_reg(list,OS_INT,sizereg,cgpara1);
  1603. paramanager.freeparaloc(list,cgpara1);
  1604. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1605. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1606. a_call_name(list,'FPC_GETMEM');
  1607. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1608. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1609. cgpara1.done;
  1610. { return the new address }
  1611. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  1612. { do move call }
  1613. cgpara1.init;
  1614. cgpara2.init;
  1615. cgpara3.init;
  1616. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1617. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1618. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1619. { load size }
  1620. paramanager.allocparaloc(list,cgpara3);
  1621. a_param_reg(list,OS_INT,sizereg,cgpara3);
  1622. { load destination }
  1623. paramanager.allocparaloc(list,cgpara2);
  1624. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  1625. { load source }
  1626. paramanager.allocparaloc(list,cgpara1);
  1627. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  1628. paramanager.freeparaloc(list,cgpara3);
  1629. paramanager.freeparaloc(list,cgpara2);
  1630. paramanager.freeparaloc(list,cgpara1);
  1631. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1632. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1633. a_call_name(list,'FPC_MOVE');
  1634. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1635. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1636. cgpara3.done;
  1637. cgpara2.done;
  1638. cgpara1.done;
  1639. end;
  1640. procedure tcg.g_releasevaluepara_openarray(list : taasmoutput;const l:tlocation);
  1641. var
  1642. cgpara1 : TCGPara;
  1643. begin
  1644. { do move call }
  1645. cgpara1.init;
  1646. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1647. { load source }
  1648. paramanager.allocparaloc(list,cgpara1);
  1649. a_param_loc(list,l,cgpara1);
  1650. paramanager.freeparaloc(list,cgpara1);
  1651. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1652. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1653. a_call_name(list,'FPC_FREEMEM');
  1654. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  1655. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1656. cgpara1.done;
  1657. end;
  1658. procedure tcg.g_save_standard_registers(list:Taasmoutput);
  1659. var
  1660. href : treference;
  1661. size : longint;
  1662. r : integer;
  1663. begin
  1664. { Get temp }
  1665. size:=0;
  1666. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1667. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1668. inc(size,sizeof(aint));
  1669. if size>0 then
  1670. begin
  1671. tg.GetTemp(list,size,tt_noreuse,current_procinfo.save_regs_ref);
  1672. { Copy registers to temp }
  1673. href:=current_procinfo.save_regs_ref;
  1674. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1675. begin
  1676. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1677. begin
  1678. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  1679. inc(href.offset,sizeof(aint));
  1680. end;
  1681. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  1682. end;
  1683. end;
  1684. end;
  1685. procedure tcg.g_restore_standard_registers(list:Taasmoutput);
  1686. var
  1687. href : treference;
  1688. r : integer;
  1689. hreg : tregister;
  1690. begin
  1691. { Copy registers from temp }
  1692. href:=current_procinfo.save_regs_ref;
  1693. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  1694. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  1695. begin
  1696. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  1697. { Allocate register so the optimizer does remove the load }
  1698. a_reg_alloc(list,hreg);
  1699. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  1700. inc(href.offset,sizeof(aint));
  1701. end;
  1702. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  1703. end;
  1704. procedure tcg.g_profilecode(list : taasmoutput);
  1705. begin
  1706. end;
  1707. procedure tcg.g_exception_reason_save(list : taasmoutput; const href : treference);
  1708. begin
  1709. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  1710. end;
  1711. procedure tcg.g_exception_reason_save_const(list : taasmoutput; const href : treference; a: aint);
  1712. begin
  1713. a_load_const_ref(list, OS_INT, a, href);
  1714. end;
  1715. procedure tcg.g_exception_reason_load(list : taasmoutput; const href : treference);
  1716. begin
  1717. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  1718. end;
  1719. procedure tcg.g_adjust_self_value(list:taasmoutput;procdef: tprocdef;ioffset: aint);
  1720. var
  1721. hsym : tsym;
  1722. href : treference;
  1723. paraloc : tcgparalocation;
  1724. begin
  1725. { calculate the parameter info for the procdef }
  1726. if not procdef.has_paraloc_info then
  1727. begin
  1728. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  1729. procdef.has_paraloc_info:=true;
  1730. end;
  1731. hsym:=tsym(procdef.parast.search('self'));
  1732. if not(assigned(hsym) and
  1733. (hsym.typ=paravarsym)) then
  1734. internalerror(200305251);
  1735. paraloc:=tparavarsym(hsym).paraloc[callerside].location^;
  1736. case paraloc.loc of
  1737. LOC_REGISTER:
  1738. cg.a_op_const_reg(list,OP_SUB,paraloc.size,ioffset,paraloc.register);
  1739. LOC_REFERENCE:
  1740. begin
  1741. { offset in the wrapper needs to be adjusted for the stored
  1742. return address }
  1743. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset+sizeof(aint));
  1744. cg.a_op_const_ref(list,OP_SUB,paraloc.size,ioffset,href);
  1745. end
  1746. else
  1747. internalerror(200309189);
  1748. end;
  1749. end;
  1750. {*****************************************************************************
  1751. TCG64
  1752. *****************************************************************************}
  1753. {$ifndef cpu64bit}
  1754. procedure tcg64.a_op64_const_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  1755. begin
  1756. a_load64_reg_reg(list,regsrc,regdst);
  1757. a_op64_const_reg(list,op,size,value,regdst);
  1758. end;
  1759. procedure tcg64.a_op64_reg_reg_reg(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  1760. var
  1761. tmpreg64 : tregister64;
  1762. begin
  1763. { when src1=dst then we need to first create a temp to prevent
  1764. overwriting src1 with src2 }
  1765. if (regsrc1.reghi=regdst.reghi) or
  1766. (regsrc1.reglo=regdst.reghi) or
  1767. (regsrc1.reghi=regdst.reglo) or
  1768. (regsrc1.reglo=regdst.reglo) then
  1769. begin
  1770. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  1771. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  1772. a_load64_reg_reg(list,regsrc2,tmpreg64);
  1773. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  1774. a_load64_reg_reg(list,tmpreg64,regdst);
  1775. end
  1776. else
  1777. begin
  1778. a_load64_reg_reg(list,regsrc2,regdst);
  1779. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  1780. end;
  1781. end;
  1782. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1783. begin
  1784. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  1785. ovloc.loc:=LOC_VOID;
  1786. end;
  1787. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: taasmoutput;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  1788. begin
  1789. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  1790. ovloc.loc:=LOC_VOID;
  1791. end;
  1792. {$endif cpu64bit}
  1793. initialization
  1794. ;
  1795. finalization
  1796. cg.free;
  1797. {$ifndef cpu64bit}
  1798. cg64.free;
  1799. {$endif cpu64bit}
  1800. end.
  1801. {
  1802. $Log$
  1803. Revision 1.195 2005-02-14 17:13:06 peter
  1804. * truncate log
  1805. Revision 1.194 2005/02/13 18:55:19 florian
  1806. + overflow checking for the arm
  1807. Revision 1.193 2005/01/29 00:32:53 peter
  1808. * finalize for refcounted strings shall also reset temps to 0, the
  1809. previous exception that decrrefcnt already set it to 0 is not valid
  1810. anymore
  1811. Revision 1.192 2005/01/27 20:32:51 florian
  1812. + implemented overflow checking for 64 bit types on sparc
  1813. Revision 1.191 2005/01/24 22:08:32 peter
  1814. * interface wrapper generation moved to cgobj
  1815. * generate interface wrappers after the module is parsed
  1816. Revision 1.190 2005/01/20 17:47:01 peter
  1817. * remove copy_value_on_stack and a_param_copy_ref
  1818. Revision 1.189 2005/01/20 16:38:45 peter
  1819. * load jmp_buf_size from system unit
  1820. Revision 1.188 2005/01/18 22:19:20 peter
  1821. * multiple location support for i386 a_param_ref
  1822. * remove a_param_copy_ref for i386
  1823. }