nppcinl.pas 4.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155
  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Florian Klaempfl
  4. Generate i386 inline nodes
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit nppcinl;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. node,ninl,ncginl;
  23. type
  24. tppcinlinenode = class(tcginlinenode)
  25. { first pass override
  26. so that the code generator will actually generate
  27. these nodes.
  28. }
  29. function first_abs_real: tnode; override;
  30. function first_sqr_real: tnode; override;
  31. procedure second_abs_real; override;
  32. procedure second_sqr_real; override;
  33. private
  34. procedure load_fpu_location;
  35. end;
  36. implementation
  37. uses
  38. cutils,globals,
  39. aasmtai,aasmcpu,
  40. symconst,symdef,
  41. cginfo,cgbase,pass_2,
  42. cpubase,ncgutil,
  43. cgobj,rgobj;
  44. {*****************************************************************************
  45. TPPCINLINENODE
  46. *****************************************************************************}
  47. function tppcinlinenode.first_abs_real : tnode;
  48. begin
  49. expectloc:=LOC_FPUREGISTER;
  50. registers32:=left.registers32;
  51. registersfpu:=max(left.registersfpu,1);
  52. {$ifdef SUPPORT_MMX}
  53. registersmmx:=left.registersmmx;
  54. {$endif SUPPORT_MMX}
  55. first_abs_real := nil;
  56. end;
  57. function tppcinlinenode.first_sqr_real : tnode;
  58. begin
  59. expectloc:=LOC_FPUREGISTER;
  60. registers32:=left.registers32;
  61. registersfpu:=max(left.registersfpu,1);
  62. {$ifdef SUPPORT_MMX}
  63. registersmmx:=left.registersmmx;
  64. {$endif SUPPORT_MMX}
  65. first_sqr_real := nil;
  66. end;
  67. { load the FPU into the an fpu register }
  68. procedure tppcinlinenode.load_fpu_location;
  69. begin
  70. location_reset(location,LOC_FPUREGISTER,def_cgsize(resulttype.def));
  71. secondpass(left);
  72. location_force_fpureg(exprasmlist,left.location,true);
  73. location_copy(location,left.location);
  74. if (location.loc = LOC_CFPUREGISTER) then
  75. begin
  76. location.loc := LOC_FPUREGISTER;
  77. location.register := rg.getregisterfpu(exprasmlist,OS_F64);
  78. end;
  79. end;
  80. procedure tppcinlinenode.second_abs_real;
  81. begin
  82. location.loc:=LOC_FPUREGISTER;
  83. load_fpu_location;
  84. exprasmlist.concat(taicpu.op_reg_reg(A_FABS,location.register,
  85. left.location.register));
  86. end;
  87. procedure tppcinlinenode.second_sqr_real;
  88. begin
  89. location.loc:=LOC_FPUREGISTER;
  90. load_fpu_location;
  91. exprasmlist.concat(taicpu.op_reg_reg_reg(A_FMUL,location.register,
  92. location.register,left.location.register));
  93. end;
  94. begin
  95. cinlinenode:=tppcinlinenode;
  96. end.
  97. {
  98. $Log$
  99. Revision 1.9 2003-08-08 19:01:02 jonas
  100. * fixed bug in load_fpu_location found by Olle
  101. Revision 1.8 2003/06/13 17:03:38 jonas
  102. * fixed bugs in case the left node was a LOC_(C)REFERENCE
  103. Revision 1.7 2003/06/01 21:38:06 peter
  104. * getregisterfpu size parameter added
  105. * op_const_reg size parameter added
  106. * sparc updates
  107. Revision 1.6 2003/05/24 13:39:32 jonas
  108. * fsqrt is an optional instruction in the ppc architecture and isn't
  109. implemented by any current ppc afaik, so use the generic sqrt routine
  110. instead (adapted so it works with compilerproc)
  111. Revision 1.5 2003/04/23 12:35:35 florian
  112. * fixed several issues with powerpc
  113. + applied a patch from Jonas for nested function calls (PowerPC only)
  114. * ...
  115. Revision 1.4 2002/11/25 17:43:28 peter
  116. * splitted defbase in defutil,symutil,defcmp
  117. * merged isconvertable and is_equal into compare_defs(_ext)
  118. * made operator search faster by walking the list only once
  119. Revision 1.3 2002/09/18 09:19:37 jonas
  120. * fixed LOC_REFERENCE/LOC_CREFERENCE problems
  121. Revision 1.2 2002/08/19 17:35:42 jonas
  122. * fixes
  123. Revision 1.1 2002/08/10 17:15:00 jonas
  124. + abs, sqr, sqrt implementations
  125. }