rax86.pas 24 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. T386Operand=class(TOperand)
  35. opsize : topsize;
  36. Procedure SetSize(_size:longint;force:boolean);override;
  37. Procedure SetCorrectSize(opcode:tasmop);override;
  38. end;
  39. T386Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { opcode adding }
  50. procedure ConcatInstruction(p : taasmoutput);override;
  51. end;
  52. tstr2opentry = class(Tnamedindexitem)
  53. op: TAsmOp;
  54. end;
  55. const
  56. AsmPrefixes = 6;
  57. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  58. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  59. );
  60. AsmOverrides = 6;
  61. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  62. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  63. );
  64. CondAsmOps=3;
  65. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  66. A_CMOVcc, A_Jcc, A_SETcc
  67. );
  68. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  69. 'CMOV','J','SET'
  70. );
  71. implementation
  72. uses
  73. globtype,globals,systems,verbose,
  74. cpuinfo,cginfo,
  75. itx86att,cgx86;
  76. {$define ATTOP}
  77. {$define INTELOP}
  78. {$ifdef NORA386INT}
  79. {$ifdef NOAG386NSM}
  80. {$ifdef NOAG386INT}
  81. {$undef INTELOP}
  82. {$endif}
  83. {$endif}
  84. {$endif}
  85. {$ifdef NORA386ATT}
  86. {$ifdef NOAG386ATT}
  87. {$undef ATTOP}
  88. {$endif}
  89. {$endif}
  90. {*****************************************************************************
  91. Parser Helpers
  92. *****************************************************************************}
  93. function is_prefix(t:tasmop):boolean;
  94. var
  95. i : longint;
  96. Begin
  97. is_prefix:=false;
  98. for i:=1 to AsmPrefixes do
  99. if t=AsmPrefix[i-1] then
  100. begin
  101. is_prefix:=true;
  102. exit;
  103. end;
  104. end;
  105. function is_override(t:tasmop):boolean;
  106. var
  107. i : longint;
  108. Begin
  109. is_override:=false;
  110. for i:=1 to AsmOverrides do
  111. if t=AsmOverride[i-1] then
  112. begin
  113. is_override:=true;
  114. exit;
  115. end;
  116. end;
  117. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  118. { Checks if the prefix is valid with the following opcode }
  119. { return false if not, otherwise true }
  120. Begin
  121. CheckPrefix := TRUE;
  122. (* Case prefix of
  123. A_REP,A_REPNE,A_REPE:
  124. Case opcode Of
  125. A_SCASB,A_SCASW,A_SCASD,
  126. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  127. Else
  128. Begin
  129. CheckPrefix := FALSE;
  130. exit;
  131. end;
  132. end; { case }
  133. A_LOCK:
  134. Case opcode Of
  135. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  136. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  137. Else
  138. Begin
  139. CheckPrefix := FALSE;
  140. Exit;
  141. end;
  142. end; { case }
  143. A_NONE: exit; { no prefix here }
  144. else
  145. CheckPrefix := FALSE;
  146. end; { end case } *)
  147. end;
  148. Function CheckOverride(overrideop,op:tasmop): Boolean;
  149. { Check if the override is valid, and if so then }
  150. { update the instr variable accordingly. }
  151. Begin
  152. CheckOverride := true;
  153. { Case instr.getinstruction of
  154. A_MOVS,A_XLAT,A_CMPS:
  155. Begin
  156. CheckOverride := TRUE;
  157. Message(assem_e_segment_override_not_supported);
  158. end
  159. end }
  160. end;
  161. Procedure FWaitWarning;
  162. begin
  163. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  164. Message(asmr_w_fwait_emu_prob);
  165. end;
  166. {*****************************************************************************
  167. T386Operand
  168. *****************************************************************************}
  169. Procedure T386Operand.SetSize(_size:longint;force:boolean);
  170. begin
  171. inherited SetSize(_size,force);
  172. { OS_64 will be set to S_L and be fixed later
  173. in SetCorrectSize }
  174. opsize:=TCGSize2Opsize[size];
  175. end;
  176. Procedure T386Operand.SetCorrectSize(opcode:tasmop);
  177. begin
  178. if gas_needsuffix[opcode]=attsufFPU then
  179. begin
  180. case size of
  181. OS_32 : opsize:=S_FS;
  182. OS_64 : opsize:=S_FL;
  183. end;
  184. end
  185. else if gas_needsuffix[opcode]=attsufFPUint then
  186. begin
  187. case size of
  188. OS_16 : opsize:=S_IS;
  189. OS_32 : opsize:=S_IL;
  190. OS_64 : opsize:=S_IQ;
  191. end;
  192. end;
  193. end;
  194. {*****************************************************************************
  195. T386Instruction
  196. *****************************************************************************}
  197. constructor T386Instruction.Create;
  198. begin
  199. inherited Create;
  200. Opsize:=S_NO;
  201. end;
  202. procedure T386Instruction.SwapOperands;
  203. begin
  204. Inherited SwapOperands;
  205. { mark the correct order }
  206. if OpOrder=op_intel then
  207. OpOrder:=op_att
  208. else
  209. OpOrder:=op_intel;
  210. end;
  211. procedure T386Instruction.AddReferenceSizes;
  212. { this will add the sizes for references like [esi] which do not
  213. have the size set yet, it will take only the size if the other
  214. operand is a register }
  215. var
  216. operand2,i : longint;
  217. s : tasmsymbol;
  218. so : longint;
  219. begin
  220. for i:=1to ops do
  221. begin
  222. operands[i].SetCorrectSize(opcode);
  223. if t386operand(operands[i]).opsize=S_NO then
  224. begin
  225. case operands[i].Opr.Typ of
  226. OPR_REFERENCE :
  227. begin
  228. if i=2 then
  229. operand2:=1
  230. else
  231. operand2:=2;
  232. if operand2<ops then
  233. begin
  234. { Only allow register as operand to take the size from }
  235. if operands[operand2].opr.typ=OPR_REGISTER then
  236. begin
  237. if ((opcode<>A_MOVD) and
  238. (opcode<>A_CVTSI2SS)) then
  239. t386operand(operands[i]).opsize:=t386operand(operands[operand2]).opsize;
  240. end
  241. else
  242. begin
  243. { if no register then take the opsize (which is available with ATT),
  244. if not availble then give an error }
  245. if opsize<>S_NO then
  246. t386operand(operands[i]).opsize:=opsize
  247. else
  248. begin
  249. Message(asmr_e_unable_to_determine_reference_size);
  250. { recovery }
  251. t386operand(operands[i]).opsize:=S_L;
  252. end;
  253. end;
  254. end
  255. else
  256. begin
  257. if opsize<>S_NO then
  258. t386operand(operands[i]).opsize:=opsize
  259. end;
  260. end;
  261. OPR_SYMBOL :
  262. begin
  263. { Fix lea which need a reference }
  264. if opcode=A_LEA then
  265. begin
  266. s:=operands[i].opr.symbol;
  267. so:=operands[i].opr.symofs;
  268. operands[i].opr.typ:=OPR_REFERENCE;
  269. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  270. operands[i].opr.ref.symbol:=s;
  271. operands[i].opr.ref.offset:=so;
  272. end;
  273. t386operand(operands[i]).opsize:=S_L;
  274. end;
  275. end;
  276. end;
  277. end;
  278. end;
  279. procedure T386Instruction.SetInstructionOpsize;
  280. begin
  281. if opsize<>S_NO then
  282. exit;
  283. if (OpOrder=op_intel) then
  284. SwapOperands;
  285. case ops of
  286. 0 : ;
  287. 1 :
  288. begin
  289. { "push es" must be stored as a long PM }
  290. if ((opcode=A_PUSH) or
  291. (opcode=A_POP)) and
  292. (operands[1].opr.typ=OPR_REGISTER) and
  293. is_segment_reg(operands[1].opr.reg) then
  294. opsize:=S_L
  295. else
  296. opsize:=t386operand(operands[1]).opsize;
  297. end;
  298. 2 :
  299. begin
  300. case opcode of
  301. A_MOVZX,A_MOVSX :
  302. begin
  303. case t386operand(operands[1]).opsize of
  304. S_W :
  305. case t386operand(operands[2]).opsize of
  306. S_L :
  307. opsize:=S_WL;
  308. end;
  309. S_B :
  310. case t386operand(operands[2]).opsize of
  311. S_W :
  312. opsize:=S_BW;
  313. S_L :
  314. opsize:=S_BL;
  315. end;
  316. end;
  317. end;
  318. A_MOVD : { movd is a move from a mmx register to a
  319. 32 bit register or memory, so no opsize is correct here PM }
  320. exit;
  321. A_OUT :
  322. opsize:=t386operand(operands[1]).opsize;
  323. else
  324. opsize:=t386operand(operands[2]).opsize;
  325. end;
  326. end;
  327. 3 :
  328. opsize:=t386operand(operands[3]).opsize;
  329. end;
  330. end;
  331. procedure T386Instruction.CheckOperandSizes;
  332. var
  333. sizeerr : boolean;
  334. i : longint;
  335. begin
  336. { Check only the most common opcodes here, the others are done in
  337. the assembler pass }
  338. case opcode of
  339. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  340. A_CMP,A_MOV,
  341. A_ADD,A_SUB,A_ADC,A_SBB,
  342. A_AND,A_OR,A_TEST,A_XOR: ;
  343. else
  344. exit;
  345. end;
  346. { Handle the BW,BL,WL separatly }
  347. sizeerr:=false;
  348. { special push/pop selector case }
  349. if ((opcode=A_PUSH) or
  350. (opcode=A_POP)) and
  351. (operands[1].opr.typ=OPR_REGISTER) and
  352. is_segment_reg(operands[1].opr.reg) then
  353. exit;
  354. if opsize in [S_BW,S_BL,S_WL] then
  355. begin
  356. if ops<>2 then
  357. sizeerr:=true
  358. else
  359. begin
  360. case opsize of
  361. S_BW :
  362. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_W);
  363. S_BL :
  364. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_L);
  365. S_WL :
  366. sizeerr:=(t386operand(operands[1]).opsize<>S_W) or (t386operand(operands[2]).opsize<>S_L);
  367. end;
  368. end;
  369. end
  370. else
  371. begin
  372. for i:=1 to ops do
  373. begin
  374. if (operands[i].opr.typ<>OPR_CONSTANT) and
  375. (t386operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  376. (t386operand(operands[i]).opsize<>opsize) then
  377. sizeerr:=true;
  378. end;
  379. end;
  380. if sizeerr then
  381. begin
  382. { if range checks are on then generate an error }
  383. if (cs_compilesystem in aktmoduleswitches) or
  384. not (cs_check_range in aktlocalswitches) then
  385. Message(asmr_w_size_suffix_and_dest_dont_match)
  386. else
  387. Message(asmr_e_size_suffix_and_dest_dont_match);
  388. end;
  389. end;
  390. { This check must be done with the operand in ATT order
  391. i.e.after swapping in the intel reader
  392. but before swapping in the NASM and TASM writers PM }
  393. procedure T386Instruction.CheckNonCommutativeOpcodes;
  394. begin
  395. if (OpOrder=op_intel) then
  396. SwapOperands;
  397. if (
  398. (ops=2) and
  399. (operands[1].opr.typ=OPR_REGISTER) and
  400. (operands[2].opr.typ=OPR_REGISTER) and
  401. { if the first is ST and the second is also a register
  402. it is necessarily ST1 .. ST7 }
  403. ((operands[1].opr.reg=NR_ST) or
  404. (operands[1].opr.reg=NR_ST0))
  405. ) or
  406. (ops=0) then
  407. if opcode=A_FSUBR then
  408. opcode:=A_FSUB
  409. else if opcode=A_FSUB then
  410. opcode:=A_FSUBR
  411. else if opcode=A_FDIVR then
  412. opcode:=A_FDIV
  413. else if opcode=A_FDIV then
  414. opcode:=A_FDIVR
  415. else if opcode=A_FSUBRP then
  416. opcode:=A_FSUBP
  417. else if opcode=A_FSUBP then
  418. opcode:=A_FSUBRP
  419. else if opcode=A_FDIVRP then
  420. opcode:=A_FDIVP
  421. else if opcode=A_FDIVP then
  422. opcode:=A_FDIVRP;
  423. if (
  424. (ops=1) and
  425. (operands[1].opr.typ=OPR_REGISTER) and
  426. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  427. (operands[1].opr.reg<>NR_ST) and
  428. (operands[1].opr.reg<>NR_ST0)
  429. ) then
  430. if opcode=A_FSUBRP then
  431. opcode:=A_FSUBP
  432. else if opcode=A_FSUBP then
  433. opcode:=A_FSUBRP
  434. else if opcode=A_FDIVRP then
  435. opcode:=A_FDIVP
  436. else if opcode=A_FDIVP then
  437. opcode:=A_FDIVRP;
  438. end;
  439. {*****************************************************************************
  440. opcode Adding
  441. *****************************************************************************}
  442. procedure T386Instruction.ConcatInstruction(p : taasmoutput);
  443. var
  444. siz : topsize;
  445. i,asize : longint;
  446. ai : taicpu;
  447. begin
  448. if (OpOrder=op_intel) then
  449. SwapOperands;
  450. { Get Opsize }
  451. if (opsize<>S_NO) or (Ops=0) then
  452. siz:=opsize
  453. else
  454. begin
  455. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  456. siz:=t386operand(operands[1]).opsize
  457. else
  458. siz:=t386operand(operands[Ops]).opsize;
  459. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  460. if (ops=2) and
  461. (t386operand(operands[1]).opsize<>S_NO) and
  462. (t386operand(operands[2]).opsize<>S_NO) and
  463. (t386operand(operands[1]).opsize<>t386operand(operands[2]).opsize) then
  464. siz:=S_NO;
  465. end;
  466. if ((opcode=A_MOVD)or
  467. (opcode=A_CVTSI2SS)) and
  468. ((t386operand(operands[1]).opsize=S_NO) or
  469. (t386operand(operands[2]).opsize=S_NO)) then
  470. siz:=S_NO;
  471. { NASM does not support FADD without args
  472. as alias of FADDP
  473. and GNU AS interprets FADD without operand differently
  474. for version 2.9.1 and 2.9.5 !! }
  475. if (ops=0) and
  476. ((opcode=A_FADD) or
  477. (opcode=A_FMUL) or
  478. (opcode=A_FSUB) or
  479. (opcode=A_FSUBR) or
  480. (opcode=A_FDIV) or
  481. (opcode=A_FDIVR)) then
  482. begin
  483. if opcode=A_FADD then
  484. opcode:=A_FADDP
  485. else if opcode=A_FMUL then
  486. opcode:=A_FMULP
  487. else if opcode=A_FSUB then
  488. opcode:=A_FSUBP
  489. else if opcode=A_FSUBR then
  490. opcode:=A_FSUBRP
  491. else if opcode=A_FDIV then
  492. opcode:=A_FDIVP
  493. else if opcode=A_FDIVR then
  494. opcode:=A_FDIVRP;
  495. {$ifdef ATTOP}
  496. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  497. {$else}
  498. {$ifdef INTELOP}
  499. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  500. {$else}
  501. message1(asmr_w_fadd_to_faddp,'fXX');
  502. {$endif INTELOP}
  503. {$endif ATTOP}
  504. end;
  505. { GNU AS interprets FDIV without operand differently
  506. for version 2.9.1 and 2.10
  507. we add explicit args to it !! }
  508. if (ops=0) and
  509. ((opcode=A_FSUBP) or
  510. (opcode=A_FSUBRP) or
  511. (opcode=A_FDIVP) or
  512. (opcode=A_FDIVRP) or
  513. (opcode=A_FSUB) or
  514. (opcode=A_FSUBR) or
  515. (opcode=A_FDIV) or
  516. (opcode=A_FDIVR)) then
  517. begin
  518. {$ifdef ATTOP}
  519. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  520. {$else}
  521. {$ifdef INTELOP}
  522. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  523. {$else}
  524. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  525. {$endif INTELOP}
  526. {$endif ATTOP}
  527. ops:=2;
  528. operands[1].opr.typ:=OPR_REGISTER;
  529. operands[2].opr.typ:=OPR_REGISTER;
  530. operands[1].opr.reg:=NR_ST0;
  531. operands[2].opr.reg:=NR_ST1;
  532. end;
  533. if (ops=1) and
  534. (
  535. (operands[1].opr.typ=OPR_REGISTER) and
  536. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  537. (operands[1].opr.reg<>NR_ST) and
  538. (operands[1].opr.reg<>NR_ST0)
  539. ) and
  540. (
  541. (opcode=A_FSUBP) or
  542. (opcode=A_FSUBRP) or
  543. (opcode=A_FDIVP) or
  544. (opcode=A_FDIVRP) or
  545. (opcode=A_FADDP) or
  546. (opcode=A_FMULP)
  547. ) then
  548. begin
  549. {$ifdef ATTOP}
  550. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  551. {$else}
  552. {$ifdef INTELOP}
  553. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  554. {$else}
  555. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  556. {$endif INTELOP}
  557. {$endif ATTOP}
  558. ops:=2;
  559. operands[2].opr.typ:=OPR_REGISTER;
  560. operands[2].opr.reg:=operands[1].opr.reg;
  561. operands[1].opr.reg:=NR_ST0;
  562. end;
  563. if (ops=1) and
  564. (
  565. (operands[1].opr.typ=OPR_REGISTER) and
  566. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  567. (operands[1].opr.reg<>NR_ST) and
  568. (operands[1].opr.reg<>NR_ST0)
  569. ) and
  570. (
  571. (opcode=A_FSUB) or
  572. (opcode=A_FSUBR) or
  573. (opcode=A_FDIV) or
  574. (opcode=A_FDIVR) or
  575. (opcode=A_FADD) or
  576. (opcode=A_FMUL)
  577. ) then
  578. begin
  579. {$ifdef ATTOP}
  580. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  581. {$else}
  582. {$ifdef INTELOP}
  583. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  584. {$else}
  585. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  586. {$endif INTELOP}
  587. {$endif ATTOP}
  588. ops:=2;
  589. operands[2].opr.typ:=OPR_REGISTER;
  590. operands[2].opr.reg:=NR_ST0;
  591. end;
  592. { I tried to convince Linus Torvalds to add
  593. code to support ENTER instruction
  594. (when raising a stack page fault)
  595. but he replied that ENTER is a bad instruction and
  596. Linux does not need to support it
  597. So I think its at least a good idea to add a warning
  598. if someone uses this in assembler code
  599. FPC itself does not use it at all PM }
  600. if (opcode=A_ENTER) and
  601. (target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
  602. Message(asmr_w_enter_not_supported_by_linux);
  603. ai:=taicpu.op_none(opcode,siz);
  604. ai.SetOperandOrder(OpOrder);
  605. ai.Ops:=Ops;
  606. for i:=1to Ops do
  607. begin
  608. case operands[i].opr.typ of
  609. OPR_CONSTANT :
  610. ai.loadconst(i-1,aword(operands[i].opr.val));
  611. OPR_REGISTER:
  612. ai.loadreg(i-1,operands[i].opr.reg);
  613. OPR_SYMBOL:
  614. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  615. OPR_REFERENCE:
  616. begin
  617. ai.loadref(i-1,operands[i].opr.ref);
  618. if operands[i].size<>OS_NO then
  619. begin
  620. asize:=0;
  621. case operands[i].size of
  622. OS_8,OS_S8 :
  623. asize:=OT_BITS8;
  624. OS_16,OS_S16 :
  625. asize:=OT_BITS16;
  626. OS_32,OS_S32,OS_F32 :
  627. asize:=OT_BITS32;
  628. OS_64,OS_S64:
  629. begin
  630. { Only FPU operations know about 64bit values, for all
  631. integer operations it is seen as 32bit }
  632. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  633. asize:=OT_BITS64
  634. else
  635. asize:=OT_BITS32;
  636. end;
  637. OS_F64,OS_C64 :
  638. asize:=OT_BITS64;
  639. OS_F80 :
  640. asize:=OT_BITS80;
  641. end;
  642. if asize<>0 then
  643. ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
  644. end;
  645. end;
  646. end;
  647. end;
  648. if (opcode=A_CALL) and (opsize=S_FAR) then
  649. opcode:=A_LCALL;
  650. if (opcode=A_JMP) and (opsize=S_FAR) then
  651. opcode:=A_LJMP;
  652. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  653. opsize:=S_FAR;
  654. { Condition ? }
  655. if condition<>C_None then
  656. ai.SetCondition(condition);
  657. { Concat the opcode or give an error }
  658. if assigned(ai) then
  659. begin
  660. { Check the instruction if it's valid }
  661. {$ifndef NOAG386BIN}
  662. ai.CheckIfValid;
  663. {$endif NOAG386BIN}
  664. p.concat(ai);
  665. end
  666. else
  667. Message(asmr_e_invalid_opcode_and_operand);
  668. end;
  669. end.
  670. {
  671. $Log$
  672. Revision 1.8 2003-09-03 15:55:02 peter
  673. * NEWRA branch merged
  674. Revision 1.7.2.4 2003/08/31 16:18:05 peter
  675. * more fixes
  676. Revision 1.7.2.3 2003/08/29 17:29:00 peter
  677. * next batch of updates
  678. Revision 1.7.2.2 2003/08/28 18:35:08 peter
  679. * tregister changed to cardinal
  680. Revision 1.7.2.1 2003/08/27 21:06:34 peter
  681. * more updates
  682. Revision 1.7 2003/08/26 12:42:45 peter
  683. * fix wrong registers in reference
  684. Revision 1.6 2003/06/20 12:57:15 pierre
  685. * fix a bug preventing correct reading of intel 'mov [edi],al'
  686. Revision 1.5 2003/06/07 10:23:50 peter
  687. * 32bit operands need ofcourse 32bit size
  688. Revision 1.4 2003/05/31 16:22:28 peter
  689. * fixed opsize and operand size setting for 64bit values
  690. Revision 1.3 2003/05/30 23:57:08 peter
  691. * more sparc cleanup
  692. * accumulator removed, splitted in function_return_reg (called) and
  693. function_result_reg (caller)
  694. Revision 1.2 2003/05/22 21:33:31 peter
  695. * removed some unit dependencies
  696. Revision 1.1 2003/04/30 15:45:35 florian
  697. * merged more x86-64/i386 code
  698. Revision 1.30 2003/04/25 12:04:31 florian
  699. * merged agx64att and ag386att to x86/agx86att
  700. Revision 1.29 2003/02/19 22:00:16 daniel
  701. * Code generator converted to new register notation
  702. - Horribily outdated todo.txt removed
  703. Revision 1.28 2003/02/03 22:47:14 daniel
  704. - Removed reg_2_opsize array
  705. Revision 1.27 2003/01/08 18:43:57 daniel
  706. * Tregister changed into a record
  707. Revision 1.26 2002/11/15 01:58:58 peter
  708. * merged changes from 1.0.7 up to 04-11
  709. - -V option for generating bug report tracing
  710. - more tracing for option parsing
  711. - errors for cdecl and high()
  712. - win32 import stabs
  713. - win32 records<=8 are returned in eax:edx (turned off by default)
  714. - heaptrc update
  715. - more info for temp management in .s file with EXTDEBUG
  716. Revision 1.25 2002/10/31 13:28:32 pierre
  717. * correct last wrong fix for tw2158
  718. Revision 1.24 2002/10/30 17:10:00 pierre
  719. * merge of fix for tw2158 bug
  720. Revision 1.23 2002/07/26 21:15:44 florian
  721. * rewrote the system handling
  722. Revision 1.22 2002/07/01 18:46:34 peter
  723. * internal linker
  724. * reorganized aasm layer
  725. Revision 1.21 2002/05/18 13:34:25 peter
  726. * readded missing revisions
  727. Revision 1.20 2002/05/16 19:46:52 carl
  728. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  729. + try to fix temp allocation (still in ifdef)
  730. + generic constructor calls
  731. + start of tassembler / tmodulebase class cleanup
  732. Revision 1.18 2002/05/12 16:53:18 peter
  733. * moved entry and exitcode to ncgutil and cgobj
  734. * foreach gets extra argument for passing local data to the
  735. iterator function
  736. * -CR checks also class typecasts at runtime by changing them
  737. into as
  738. * fixed compiler to cycle with the -CR option
  739. * fixed stabs with elf writer, finally the global variables can
  740. be watched
  741. * removed a lot of routines from cga unit and replaced them by
  742. calls to cgobj
  743. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  744. u32bit then the other is typecasted also to u32bit without giving
  745. a rangecheck warning/error.
  746. * fixed pascal calling method with reversing also the high tree in
  747. the parast, detected by tcalcst3 test
  748. Revision 1.17 2002/04/15 19:12:09 carl
  749. + target_info.size_of_pointer -> pointer_size
  750. + some cleanup of unused types/variables
  751. * move several constants from cpubase to their specific units
  752. (where they are used)
  753. + att_Reg2str -> gas_reg2str
  754. + int_reg2str -> std_reg2str
  755. Revision 1.16 2002/04/04 19:06:13 peter
  756. * removed unused units
  757. * use tlocation.size in cg.a_*loc*() routines
  758. Revision 1.15 2002/04/02 17:11:39 peter
  759. * tlocation,treference update
  760. * LOC_CONSTANT added for better constant handling
  761. * secondadd splitted in multiple routines
  762. * location_force_reg added for loading a location to a register
  763. of a specified size
  764. * secondassignment parses now first the right and then the left node
  765. (this is compatible with Kylix). This saves a lot of push/pop especially
  766. with string operations
  767. * adapted some routines to use the new cg methods
  768. Revision 1.14 2002/01/24 18:25:53 peter
  769. * implicit result variable generation for assembler routines
  770. * removed m_tp modeswitch, use m_tp7 or not(m_fpc) instead
  771. }