narmcnv.pas 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348
  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate ARM assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit narmcnv;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ncnv,ncgcnv,defcmp;
  22. type
  23. tarmtypeconvnode = class(tcgtypeconvnode)
  24. protected
  25. function first_int_to_real: tnode;override;
  26. { procedure second_int_to_int;override; }
  27. { procedure second_string_to_string;override; }
  28. { procedure second_cstring_to_pchar;override; }
  29. { procedure second_string_to_chararray;override; }
  30. { procedure second_array_to_pointer;override; }
  31. // function first_int_to_real: tnode; override;
  32. { procedure second_pointer_to_array;override; }
  33. { procedure second_chararray_to_string;override; }
  34. { procedure second_char_to_string;override; }
  35. procedure second_int_to_real;override;
  36. // procedure second_real_to_real;override;
  37. { procedure second_cord_to_pointer;override; }
  38. { procedure second_proc_to_procvar;override; }
  39. { procedure second_bool_to_int;override; }
  40. procedure second_int_to_bool;override;
  41. { procedure second_load_smallset;override; }
  42. { procedure second_ansistring_to_pchar;override; }
  43. { procedure second_pchar_to_string;override; }
  44. { procedure second_class_to_intf;override; }
  45. { procedure second_char_to_char;override; }
  46. end;
  47. implementation
  48. uses
  49. verbose,globtype,globals,systems,
  50. symconst,symdef,aasmbase,aasmtai,aasmdata,
  51. defutil,
  52. cgbase,cgutils,
  53. pass_1,pass_2,procinfo,
  54. ncon,ncal,
  55. ncgutil,
  56. cpubase,cpuinfo,aasmcpu,
  57. rgobj,tgobj,cgobj,hlcgobj,cgcpu;
  58. {*****************************************************************************
  59. FirstTypeConv
  60. *****************************************************************************}
  61. function tarmtypeconvnode.first_int_to_real: tnode;
  62. var
  63. fname: string[19];
  64. begin
  65. if cs_fp_emulation in current_settings.moduleswitches then
  66. result:=inherited first_int_to_real
  67. else
  68. begin
  69. { converting a 64bit integer to a float requires a helper }
  70. if is_64bitint(left.resultdef) or
  71. is_currency(left.resultdef) then
  72. begin
  73. { hack to avoid double division by 10000, as it's
  74. already done by typecheckpass.resultdef_int_to_real }
  75. if is_currency(left.resultdef) then
  76. left.resultdef := s64inttype;
  77. if is_signed(left.resultdef) then
  78. fname := 'fpc_int64_to_double'
  79. else
  80. fname := 'fpc_qword_to_double';
  81. result := ccallnode.createintern(fname,ccallparanode.create(
  82. left,nil));
  83. left:=nil;
  84. if (tfloatdef(resultdef).floattype=s32real) then
  85. inserttypeconv(result,s32floattype);
  86. firstpass(result);
  87. exit;
  88. end
  89. else
  90. { other integers are supposed to be 32 bit }
  91. begin
  92. if is_signed(left.resultdef) then
  93. inserttypeconv(left,s32inttype)
  94. else
  95. inserttypeconv(left,u32inttype);
  96. firstpass(left);
  97. end;
  98. result := nil;
  99. case current_settings.fputype of
  100. fpu_fpa,
  101. fpu_fpa10,
  102. fpu_fpa11:
  103. expectloc:=LOC_FPUREGISTER;
  104. fpu_vfpv2,
  105. fpu_vfpv3,
  106. fpu_vfpv3_d16:
  107. expectloc:=LOC_MMREGISTER;
  108. else
  109. internalerror(2009112702);
  110. end;
  111. end;
  112. end;
  113. procedure tarmtypeconvnode.second_int_to_real;
  114. const
  115. signedprec2vfpop: array[boolean,OS_F32..OS_F64] of tasmop =
  116. ((A_FUITOS,A_FUITOD),
  117. (A_FSITOS,A_FSITOD));
  118. var
  119. instr : taicpu;
  120. href : treference;
  121. l1,l2 : tasmlabel;
  122. hregister : tregister;
  123. signed : boolean;
  124. begin
  125. case current_settings.fputype of
  126. fpu_fpa,
  127. fpu_fpa10,
  128. fpu_fpa11:
  129. begin
  130. { convert first to double to avoid precision loss }
  131. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  132. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
  133. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  134. instr:=taicpu.op_reg_reg(A_FLT,location.register,left.location.register);
  135. if is_signed(left.resultdef) then
  136. begin
  137. instr.oppostfix:=cgsize2fpuoppostfix[def_cgsize(resultdef)];
  138. current_asmdata.CurrAsmList.concat(instr);
  139. end
  140. else
  141. begin
  142. { flt does a signed load, fix this }
  143. case tfloatdef(resultdef).floattype of
  144. s32real,
  145. s64real:
  146. begin
  147. { converting dword to s64real first and cut off at the end avoids precision loss }
  148. instr.oppostfix:=PF_D;
  149. current_asmdata.CurrAsmList.concat(instr);
  150. current_asmdata.getdatalabel(l1);
  151. current_asmdata.getjumplabel(l2);
  152. reference_reset_symbol(href,l1,0,const_align(8));
  153. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  154. current_asmdata.CurrAsmList.concat(Taicpu.op_reg_const(A_CMP,left.location.register,0));
  155. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_GE,l2);
  156. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  157. hregister:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
  158. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(8));
  159. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  160. { I got this constant from a test program (FK) }
  161. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($41f00000));
  162. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
  163. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F64,OS_F64,href,hregister);
  164. current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg_reg(A_ADF,location.register,hregister,location.register),PF_D));
  165. cg.a_label(current_asmdata.CurrAsmList,l2);
  166. { cut off if we should convert to single }
  167. if tfloatdef(resultdef).floattype=s32real then
  168. begin
  169. hregister:=location.register;
  170. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  171. current_asmdata.CurrAsmList.concat(setoppostfix(taicpu.op_reg_reg(A_MVF,location.register,hregister),PF_S));
  172. end;
  173. end;
  174. else
  175. internalerror(200410031);
  176. end;
  177. end;
  178. end;
  179. fpu_vfpv2,
  180. fpu_vfpv3,
  181. fpu_vfpv3_d16:
  182. begin
  183. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  184. signed:=left.location.size=OS_S32;
  185. location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,false);
  186. if (left.location.size<>OS_F32) then
  187. internalerror(2009112703);
  188. if left.location.size<>location.size then
  189. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size)
  190. else
  191. location.register:=left.location.register;
  192. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(
  193. signedprec2vfpop[signed,location.size],location.register,left.location.register));
  194. end;
  195. end;
  196. end;
  197. procedure tarmtypeconvnode.second_int_to_bool;
  198. var
  199. hreg1,
  200. hregister : tregister;
  201. href : treference;
  202. resflags : tresflags;
  203. hlabel,oldTrueLabel,oldFalseLabel : tasmlabel;
  204. newsize : tcgsize;
  205. begin
  206. oldTrueLabel:=current_procinfo.CurrTrueLabel;
  207. oldFalseLabel:=current_procinfo.CurrFalseLabel;
  208. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  209. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  210. secondpass(left);
  211. if codegenerror then
  212. exit;
  213. { Explicit typecasts from any ordinal type to a boolean type }
  214. { must not change the ordinal value }
  215. if (nf_explicit in flags) and
  216. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  217. begin
  218. location_copy(location,left.location);
  219. newsize:=def_cgsize(resultdef);
  220. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  221. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  222. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  223. hlcg.location_force_reg(current_asmdata.CurrAsmList,location,left.resultdef,resultdef,true)
  224. else
  225. location.size:=newsize;
  226. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  227. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  228. exit;
  229. end;
  230. { Load left node into flag F_NE/F_E }
  231. resflags:=F_NE;
  232. case left.location.loc of
  233. LOC_CREFERENCE,
  234. LOC_REFERENCE :
  235. begin
  236. if left.location.size in [OS_64,OS_S64] then
  237. begin
  238. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  239. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.reference,hregister);
  240. href:=left.location.reference;
  241. inc(href.offset,4);
  242. tcgarm(cg).cgsetflags:=true;
  243. cg.a_op_ref_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,href,hregister);
  244. tcgarm(cg).cgsetflags:=false;
  245. end
  246. else
  247. begin
  248. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  249. tcgarm(cg).cgsetflags:=true;
  250. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  251. tcgarm(cg).cgsetflags:=false;
  252. end;
  253. end;
  254. LOC_FLAGS :
  255. begin
  256. resflags:=left.location.resflags;
  257. end;
  258. LOC_REGISTER,LOC_CREGISTER :
  259. begin
  260. if left.location.size in [OS_64,OS_S64] then
  261. begin
  262. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  263. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,left.location.register64.reglo,hregister);
  264. tcgarm(cg).cgsetflags:=true;
  265. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,hregister);
  266. tcgarm(cg).cgsetflags:=false;
  267. end
  268. else
  269. begin
  270. tcgarm(cg).cgsetflags:=true;
  271. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,left.location.size,left.location.register,left.location.register);
  272. tcgarm(cg).cgsetflags:=false;
  273. end;
  274. end;
  275. LOC_JUMP :
  276. begin
  277. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  278. current_asmdata.getjumplabel(hlabel);
  279. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  280. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,hregister);
  281. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  282. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  283. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hregister);
  284. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  285. tcgarm(cg).cgsetflags:=true;
  286. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_INT,hregister,hregister);
  287. tcgarm(cg).cgsetflags:=false;
  288. end;
  289. else
  290. internalerror(200311301);
  291. end;
  292. { load flags to register }
  293. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  294. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,location.size);
  295. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,hreg1);
  296. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_DEFAULTFLAGS);
  297. if (is_cbool(resultdef)) then
  298. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,hreg1,hreg1);
  299. {$ifndef cpu64bitalu}
  300. if (location.size in [OS_64,OS_S64]) then
  301. begin
  302. location.register64.reglo:=hreg1;
  303. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  304. if (is_cbool(resultdef)) then
  305. { reglo is either 0 or -1 -> reghi has to become the same }
  306. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  307. else
  308. { unsigned }
  309. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  310. end
  311. else
  312. {$endif cpu64bitalu}
  313. location.register:=hreg1;
  314. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  315. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  316. end;
  317. begin
  318. ctypeconvnode:=tarmtypeconvnode;
  319. end.