Tomas Hajny cfd4252ec3 * EMX should be treated the same way as OS/2 with regard to cdecl (the same C compiler is used) 10 éve
..
aopt386.pas ba5297be37 * support disabling the i386 peephole optimizer with -Oonopeephole 11 éve
cgcpu.pas 35a04ad095 * modified patch of Paul W to replace leave by mov/pop, resolves #26455 10 éve
cpubase.inc bfbb0c5b9d * optimize mov/lea 12 éve
cpuelf.pas 74581a07af AROS: assembler fixes 11 éve
cpuinfo.pas 5c67fcc43f + change always floating point divisions into multiplications if they are a power of two, 10 éve
cpunode.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- 11 éve
cpupara.pas cfd4252ec3 * EMX should be treated the same way as OS/2 with regard to cdecl (the same C compiler is used) 10 éve
cpupi.pas b1dc518ac4 * removed systems_need_16_byte_stack_alignment and use target_info.stackalign instead 13 éve
cputarg.pas 4431ba2c08 merged/updated AROS/i386 target to trunk from AROS branch, to support Marcus Sackrow's work on AROS support which will hopefully benefit all Amiga-like targets (classic, MorphOS) on the long run. Compiler only, RTL comes in the next run. 11 éve
csopt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 11 éve
daopt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 11 éve
hlcgcpu.pas 26b53607f8 + added method reference_reset_base with support for different pointer types to 11 éve
i386att.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. 11 éve
i386atts.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. 11 éve
i386int.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. 11 éve
i386nop.inc 842e027a9f + prove of concept how FMA4 could be supported in inline assembler 11 éve
i386op.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. 11 éve
i386prop.inc dc628b8969 * x86: Completely skip instructions that do not exist for target CPU bit width. The existing behavior of writing mnemonics and properties but no encoding allows an invalid instruction to be recognized by assembler reader or even generated by compiler, but it but won't assemble anyway. 11 éve
i386tab.inc 842e027a9f + prove of concept how FMA4 could be supported in inline assembler 11 éve
n386add.pas 07ad2a04ac * fix warnings when compiling the compiler with DFA optimizer enabled on i386 11 éve
n386cal.pas 4ee15b84da AROS: syscall (library call) support for based on the Amiga/68k and MorphOS/PPC versions 11 éve
n386flw.pas ed4e876f4f * Generate exception filters data on i386-win32 and x86_64-win64 without using global labels. 10 éve
n386inl.pas 66e82f1655 + i386: generate optimized code for 64-bit arithmetic shifts by constant amount. Shifts by 63 and by less than 32 take just two instructions, shifts by 32..62 bits are done with 3 instructions. 12 éve
n386ld.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- 11 éve
n386mat.pas 5356f17fa5 * i386: switch the div/mod node to shared code, leaving in place the specific optimization for division by power of 2. 11 éve
n386mem.pas 338c064beb * moved x86-specific tpointerdef functionality to architecture-specific 11 éve
n386set.pas d0db391d7c * cleanup of unused units 12 éve
popt386.pas 06fd4223e9 + optimization setting level4 10 éve
r386ari.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386att.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386con.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386dwrf.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386int.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386iri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386nasm.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386nor.inc 283ff05127 * merged avx support in inline assembler developed by Torsten Grundke 13 éve
r386nri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386num.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386ot.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386rni.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386sri.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
r386stab.inc 283ff05127 * merged avx support in inline assembler developed by Torsten Grundke 13 éve
r386std.inc 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 éve
ra386att.pas 757ed4e8d3 * standard assembler reader for i386 20 éve
ra386int.pas 6c6bf452ca * Fixed level 2 comment warnings. 17 éve
rgcpu.pas b7fe6797bf Merged revisions 2921-2922,2925 via svnmerge from 19 éve
rropt386.pas 4d5119bf1c * fixes several issues which cause warnings by the dfa code when using it to detect uninitialized variables 11 éve
symcpu.pas aa6b62cf4c Add new procedure option: po_syscall_has_libsym, 11 éve