aoptcpu.pas 46 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else if (p1.typ = ait_instruction) and (taicpu(p1).opcode=A_MOVW) and
  113. ((TRegister(ord(taicpu(p1).oper[0]^.reg)+1)=reg) or (TRegister(ord(taicpu(p1).oper[1]^.reg)+1)=reg) or
  114. (taicpu(p1).oper[0]^.reg=reg) or (taicpu(p1).oper[1]^.reg=reg)) then
  115. Result:=true
  116. else
  117. Result:=inherited RegInInstruction(Reg, p1);
  118. end;
  119. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  120. var Next: tai; reg: TRegister): Boolean;
  121. begin
  122. Next:=Current;
  123. repeat
  124. Result:=GetNextInstruction(Next,Next);
  125. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  126. (is_calljmp(taicpu(Next).opcode));
  127. end;
  128. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  129. var
  130. p: taicpu;
  131. begin
  132. if not assigned(hp) or
  133. (hp.typ <> ait_instruction) then
  134. begin
  135. Result := false;
  136. exit;
  137. end;
  138. p := taicpu(hp);
  139. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[1]^.reg))) or
  140. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  141. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  142. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  143. end;
  144. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  145. var
  146. p: taicpu;
  147. i: longint;
  148. begin
  149. Result := false;
  150. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  151. exit;
  152. p:=taicpu(hp);
  153. i:=0;
  154. { we do not care about the stack pointer }
  155. if p.opcode in [A_POP] then
  156. exit;
  157. { first operand only written?
  158. then skip it }
  159. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  160. i:=1;
  161. while i<p.ops do
  162. begin
  163. case p.oper[i]^.typ of
  164. top_reg:
  165. Result := (p.oper[i]^.reg = reg) or
  166. { MOVW }
  167. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  168. top_ref:
  169. Result :=
  170. (p.oper[i]^.ref^.base = reg) or
  171. (p.oper[i]^.ref^.index = reg);
  172. end;
  173. { Bailout if we found something }
  174. if Result then
  175. exit;
  176. Inc(i);
  177. end;
  178. end;
  179. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  180. var
  181. hp1,hp2,hp3,hp4,hp5: tai;
  182. alloc, dealloc: tai_regalloc;
  183. i: integer;
  184. l: TAsmLabel;
  185. TmpUsedRegs : TAllUsedRegs;
  186. begin
  187. result := false;
  188. case p.typ of
  189. ait_instruction:
  190. begin
  191. {
  192. change
  193. <op> reg,x,y
  194. cp reg,r1
  195. into
  196. <op>s reg,x,y
  197. }
  198. { this optimization can applied only to the currently enabled operations because
  199. the other operations do not update all flags and FPC does not track flag usage }
  200. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  201. A_INC,A_LSL,A_LSR,
  202. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  203. GetNextInstruction(p, hp1) and
  204. ((MatchInstruction(hp1, A_CP) and
  205. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  206. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  207. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  208. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  209. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  210. A_LSL,A_LSR,
  211. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  212. (MatchInstruction(hp1, A_CPI) and
  213. (taicpu(p).opcode = A_ANDI) and
  214. (taicpu(p).oper[1]^.typ=top_const) and
  215. (taicpu(hp1).oper[1]^.typ=top_const) and
  216. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  217. GetNextInstruction(hp1, hp2) and
  218. { be careful here, following instructions could use other flags
  219. however after a jump fpc never depends on the value of flags }
  220. { All above instructions set Z and N according to the following
  221. Z := result = 0;
  222. N := result[31];
  223. EQ = Z=1; NE = Z=0;
  224. MI = N=1; PL = N=0; }
  225. MatchInstruction(hp2, A_BRxx) and
  226. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  227. { sub/sbc set all flags }
  228. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  229. no flag allocation tracking implemented yet on avr
  230. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  231. begin
  232. { move flag allocation if possible }
  233. { no flag allocation tracking implemented yet on avr
  234. GetLastInstruction(hp1, hp2);
  235. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  236. if assigned(hp2) then
  237. begin
  238. asml.Remove(hp2);
  239. asml.insertbefore(hp2, p);
  240. end;
  241. }
  242. // If we compare to the same value we are masking then invert the comparison
  243. if (taicpu(hp1).opcode=A_CPI) or
  244. { sub/sbc with reverted? }
  245. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  246. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  247. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  248. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  249. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  250. DebugMsg('Peephole OpCp2Op performed', p);
  251. asml.remove(hp1);
  252. hp1.free;
  253. Result:=true;
  254. end
  255. else
  256. case taicpu(p).opcode of
  257. A_LDI:
  258. begin
  259. { turn
  260. ldi reg0, imm
  261. cp/mov reg1, reg0
  262. dealloc reg0
  263. into
  264. cpi/ldi reg1, imm
  265. }
  266. if MatchOpType(taicpu(p),top_reg,top_const) and
  267. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  268. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  269. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  270. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  271. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  272. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  273. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  274. begin
  275. CopyUsedRegs(TmpUsedRegs);
  276. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  277. begin
  278. case taicpu(hp1).opcode of
  279. A_CP:
  280. taicpu(hp1).opcode:=A_CPI;
  281. A_MOV:
  282. taicpu(hp1).opcode:=A_LDI;
  283. else
  284. internalerror(2016111901);
  285. end;
  286. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  287. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  288. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  289. if assigned(alloc) and assigned(dealloc) then
  290. begin
  291. asml.Remove(alloc);
  292. alloc.Free;
  293. asml.Remove(dealloc);
  294. dealloc.Free;
  295. end;
  296. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  297. RemoveCurrentP(p);
  298. end;
  299. ReleaseUsedRegs(TmpUsedRegs);
  300. end;
  301. end;
  302. A_STS:
  303. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  304. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  305. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  306. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  307. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  308. (taicpu(p).oper[0]^.ref^.offset>=32) and
  309. (taicpu(p).oper[0]^.ref^.offset<=95) then
  310. begin
  311. DebugMsg('Peephole Sts2Out performed', p);
  312. taicpu(p).opcode:=A_OUT;
  313. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  314. end;
  315. A_LDS:
  316. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  317. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  318. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  319. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  320. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  321. (taicpu(p).oper[1]^.ref^.offset>=32) and
  322. (taicpu(p).oper[1]^.ref^.offset<=95) then
  323. begin
  324. DebugMsg('Peephole Lds2In performed', p);
  325. taicpu(p).opcode:=A_IN;
  326. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  327. end;
  328. A_IN:
  329. if GetNextInstruction(p,hp1) then
  330. begin
  331. {
  332. in rX,Y
  333. ori rX,n
  334. out Y,rX
  335. into
  336. sbi rX,lg(n)
  337. }
  338. if (taicpu(p).oper[1]^.val<=31) and
  339. MatchInstruction(hp1,A_ORI) and
  340. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  341. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  342. GetNextInstruction(hp1,hp2) and
  343. MatchInstruction(hp2,A_OUT) and
  344. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  345. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  346. begin
  347. DebugMsg('Peephole InOriOut2Sbi performed', p);
  348. taicpu(p).opcode:=A_SBI;
  349. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  350. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  351. asml.Remove(hp1);
  352. hp1.Free;
  353. asml.Remove(hp2);
  354. hp2.Free;
  355. result:=true;
  356. end
  357. {
  358. in rX,Y
  359. andi rX,not(n)
  360. out Y,rX
  361. into
  362. cbi rX,lg(n)
  363. }
  364. else if (taicpu(p).oper[1]^.val<=31) and
  365. MatchInstruction(hp1,A_ANDI) and
  366. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  367. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  368. GetNextInstruction(hp1,hp2) and
  369. MatchInstruction(hp2,A_OUT) and
  370. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  371. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  372. begin
  373. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  374. taicpu(p).opcode:=A_CBI;
  375. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  376. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  377. asml.Remove(hp1);
  378. hp1.Free;
  379. asml.Remove(hp2);
  380. hp2.Free;
  381. result:=true;
  382. end
  383. {
  384. in rX,Y
  385. andi rX,n
  386. breq/brne L1
  387. into
  388. sbis/sbic Y,lg(n)
  389. jmp L1
  390. .Ltemp:
  391. }
  392. else if (taicpu(p).oper[1]^.val<=31) and
  393. MatchInstruction(hp1,A_ANDI) and
  394. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  395. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  396. GetNextInstruction(hp1,hp2) and
  397. MatchInstruction(hp2,A_BRxx) and
  398. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  399. begin
  400. if taicpu(hp2).condition=C_EQ then
  401. taicpu(p).opcode:=A_SBIS
  402. else
  403. taicpu(p).opcode:=A_SBIC;
  404. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  405. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  406. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  407. asml.Remove(hp1);
  408. hp1.Free;
  409. taicpu(hp2).condition:=C_None;
  410. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  411. taicpu(hp2).opcode:=A_JMP
  412. else
  413. taicpu(hp2).opcode:=A_RJMP;
  414. current_asmdata.getjumplabel(l);
  415. l.increfs;
  416. asml.InsertAfter(tai_label.create(l), hp2);
  417. result:=true;
  418. end;
  419. end;
  420. A_SBRS,
  421. A_SBRC:
  422. begin
  423. {
  424. Turn
  425. in rx, y
  426. sbr* rx, z
  427. Into
  428. sbi* y, z
  429. }
  430. if (taicpu(p).ops=2) and
  431. (taicpu(p).oper[0]^.typ=top_reg) and
  432. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  433. GetLastInstruction(p,hp1) and
  434. (hp1.typ=ait_instruction) and
  435. (taicpu(hp1).opcode=A_IN) and
  436. (taicpu(hp1).ops=2) and
  437. (taicpu(hp1).oper[1]^.typ=top_const) and
  438. (taicpu(hp1).oper[1]^.val in [0..31]) and
  439. MatchOperand(taicpu(hp1).oper[0]^,taicpu(p).oper[0]^.reg) and
  440. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, hp1, p)) then
  441. begin
  442. if taicpu(p).opcode=A_SBRS then
  443. taicpu(p).opcode:=A_SBIS
  444. else
  445. taicpu(p).opcode:=A_SBIC;
  446. taicpu(p).loadconst(0, taicpu(hp1).oper[1]^.val);
  447. DebugMsg('Peephole InSbrx2Sbix performed', p);
  448. asml.Remove(hp1);
  449. hp1.free;
  450. result:=true;
  451. end;
  452. end;
  453. A_ANDI:
  454. begin
  455. {
  456. Turn
  457. andi rx, #pow2
  458. brne l
  459. <op>
  460. l:
  461. Into
  462. sbrs rx, #(1 shl imm)
  463. <op>
  464. l:
  465. }
  466. if (taicpu(p).ops=2) and
  467. (taicpu(p).oper[1]^.typ=top_const) and
  468. ispowerof2(taicpu(p).oper[1]^.val,i) and
  469. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  470. GetNextInstruction(p,hp1) and
  471. (hp1.typ=ait_instruction) and
  472. (taicpu(hp1).opcode=A_BRxx) and
  473. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  474. (taicpu(hp1).ops>0) and
  475. (taicpu(hp1).oper[0]^.typ = top_ref) and
  476. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  477. GetNextInstruction(hp1,hp2) and
  478. (hp2.typ=ait_instruction) and
  479. GetNextInstruction(hp2,hp3) and
  480. (hp3.typ=ait_label) and
  481. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  482. begin
  483. DebugMsg('Peephole AndiBr2Sbr performed', p);
  484. taicpu(p).oper[1]^.val:=i;
  485. if taicpu(hp1).condition=C_NE then
  486. taicpu(p).opcode:=A_SBRS
  487. else
  488. taicpu(p).opcode:=A_SBRC;
  489. asml.Remove(hp1);
  490. hp1.free;
  491. result:=true;
  492. end
  493. {
  494. Remove
  495. andi rx, #y
  496. dealloc rx
  497. }
  498. else if (taicpu(p).ops=2) and
  499. (taicpu(p).oper[0]^.typ=top_reg) and
  500. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  501. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  502. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  503. begin
  504. DebugMsg('Redundant Andi removed', p);
  505. result:=RemoveCurrentP(p);
  506. end;
  507. end;
  508. A_ADD:
  509. begin
  510. if (taicpu(p).oper[1]^.reg=NR_R1) and
  511. GetNextInstruction(p, hp1) and
  512. MatchInstruction(hp1,A_ADC) then
  513. begin
  514. DebugMsg('Peephole AddAdc2Add performed', p);
  515. result:=RemoveCurrentP(p);
  516. end;
  517. end;
  518. A_SUB:
  519. begin
  520. if (taicpu(p).oper[1]^.reg=NR_R1) and
  521. GetNextInstruction(p, hp1) and
  522. MatchInstruction(hp1,A_SBC) then
  523. begin
  524. DebugMsg('Peephole SubSbc2Sub performed', p);
  525. taicpu(hp1).opcode:=A_SUB;
  526. result:=RemoveCurrentP(p);
  527. end;
  528. end;
  529. A_CLR:
  530. begin
  531. { turn the common
  532. clr rX
  533. mov/ld rX, rY
  534. into
  535. mov/ld rX, rY
  536. }
  537. if (taicpu(p).ops=1) and
  538. (taicpu(p).oper[0]^.typ=top_reg) and
  539. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  540. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  541. (hp1.typ=ait_instruction) and
  542. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  543. (taicpu(hp1).ops>0) and
  544. (taicpu(hp1).oper[0]^.typ=top_reg) and
  545. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  546. begin
  547. DebugMsg('Peephole ClrMov2Mov performed', p);
  548. result:=RemoveCurrentP(p);
  549. end
  550. { turn
  551. clr rX
  552. ...
  553. adc rY, rX
  554. into
  555. ...
  556. adc rY, r1
  557. }
  558. else if (taicpu(p).ops=1) and
  559. (taicpu(p).oper[0]^.typ=top_reg) and
  560. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  561. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  562. (hp1.typ=ait_instruction) and
  563. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  564. (taicpu(hp1).ops=2) and
  565. (taicpu(hp1).oper[1]^.typ=top_reg) and
  566. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  567. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  568. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  569. begin
  570. DebugMsg('Peephole ClrAdc2Adc performed', p);
  571. taicpu(hp1).oper[1]^.reg:=NR_R1;
  572. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  573. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  574. if assigned(alloc) and assigned(dealloc) then
  575. begin
  576. asml.Remove(alloc);
  577. alloc.Free;
  578. asml.Remove(dealloc);
  579. dealloc.Free;
  580. end;
  581. result:=RemoveCurrentP(p);
  582. end;
  583. end;
  584. A_PUSH:
  585. begin
  586. { turn
  587. push reg0
  588. push reg1
  589. pop reg3
  590. pop reg2
  591. into
  592. movw reg2,reg0
  593. or
  594. mov reg3,reg1
  595. mov reg2,reg0
  596. }
  597. if GetNextInstruction(p,hp1) and
  598. MatchInstruction(hp1,A_PUSH) and
  599. GetNextInstruction(hp1,hp2) and
  600. MatchInstruction(hp2,A_POP) and
  601. GetNextInstruction(hp2,hp3) and
  602. MatchInstruction(hp3,A_POP) then
  603. begin
  604. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  605. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  606. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  607. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  608. begin
  609. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  610. taicpu(hp3).ops:=2;
  611. taicpu(hp3).opcode:=A_MOVW;
  612. taicpu(hp3).loadreg(1, taicpu(p).oper[0]^.reg);
  613. RemoveCurrentP(p);
  614. RemoveCurrentP(p);
  615. result:=RemoveCurrentP(p);
  616. end
  617. else
  618. begin
  619. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  620. taicpu(p).ops:=2;
  621. taicpu(p).opcode:=A_MOV;
  622. taicpu(hp1).ops:=2;
  623. taicpu(hp1).opcode:=A_MOV;
  624. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  625. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  626. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  627. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  628. { life range of reg2 and reg3 is increased, fix register allocation entries }
  629. CopyUsedRegs(TmpUsedRegs);
  630. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  631. AllocRegBetween(taicpu(hp2).oper[0]^.reg,hp1,hp2,TmpUsedRegs);
  632. ReleaseUsedRegs(TmpUsedRegs);
  633. CopyUsedRegs(TmpUsedRegs);
  634. AllocRegBetween(taicpu(hp3).oper[0]^.reg,p,hp3,TmpUsedRegs);
  635. ReleaseUsedRegs(TmpUsedRegs);
  636. IncludeRegInUsedRegs(taicpu(hp3).oper[0]^.reg,UsedRegs);
  637. UpdateUsedRegs(tai(p.Next));
  638. asml.Remove(hp2);
  639. hp2.Free;
  640. asml.Remove(hp3);
  641. hp3.Free;
  642. result:=true;
  643. end
  644. end;
  645. end;
  646. A_CALL:
  647. if (cs_opt_level4 in current_settings.optimizerswitches) and
  648. GetNextInstruction(p,hp1) and
  649. MatchInstruction(hp1,A_RET) then
  650. begin
  651. DebugMsg('Peephole CallReg2Jmp performed', p);
  652. taicpu(p).opcode:=A_JMP;
  653. asml.Remove(hp1);
  654. hp1.Free;
  655. result:=true;
  656. end;
  657. A_RCALL:
  658. if (cs_opt_level4 in current_settings.optimizerswitches) and
  659. GetNextInstruction(p,hp1) and
  660. MatchInstruction(hp1,A_RET) then
  661. begin
  662. DebugMsg('Peephole RCallReg2RJmp performed', p);
  663. taicpu(p).opcode:=A_RJMP;
  664. asml.Remove(hp1);
  665. hp1.Free;
  666. result:=true;
  667. end;
  668. A_MOV:
  669. begin
  670. { change
  671. mov reg0, reg1
  672. dealloc reg0
  673. into
  674. dealloc reg0
  675. }
  676. if MatchOpType(taicpu(p),top_reg,top_reg) then
  677. begin
  678. CopyUsedRegs(TmpUsedRegs);
  679. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  680. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  681. { reg. allocation information before calls is not perfect, so don't do this before
  682. calls/icalls }
  683. GetNextInstruction(p,hp1) and
  684. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  685. begin
  686. DebugMsg('Peephole Mov2Nop performed', p);
  687. result:=RemoveCurrentP(p);
  688. ReleaseUsedRegs(TmpUsedRegs);
  689. exit;
  690. end;
  691. ReleaseUsedRegs(TmpUsedRegs);
  692. end;
  693. { turn
  694. mov reg0, reg1
  695. <op> reg2,reg0
  696. dealloc reg0
  697. into
  698. <op> reg2,reg1
  699. }
  700. if MatchOpType(taicpu(p),top_reg,top_reg) and
  701. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  702. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  703. (MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  704. A_OUT,A_IN]) or
  705. { the reference register of ST/STD cannot be replaced }
  706. (MatchInstruction(hp1,[A_STD,A_ST]) and (MatchOperand(taicpu(p).oper[0]^,taicpu(hp1).oper[1]^)))) and
  707. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  708. {(taicpu(hp1).ops=1) and
  709. (taicpu(hp1).oper[0]^.typ = top_reg) and
  710. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  711. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  712. begin
  713. DebugMsg('Peephole MovOp2Op performed', p);
  714. for i := 0 to taicpu(hp1).ops-1 do
  715. if taicpu(hp1).oper[i]^.typ=top_reg then
  716. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  717. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  718. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  719. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  720. if assigned(alloc) and assigned(dealloc) then
  721. begin
  722. asml.Remove(alloc);
  723. alloc.Free;
  724. asml.Remove(dealloc);
  725. dealloc.Free;
  726. end;
  727. { life range of reg1 is increased }
  728. AllocRegBetween(taicpu(p).oper[1]^.reg,p,hp1,usedregs);
  729. { p will be removed, update used register as we continue
  730. with the next instruction after p }
  731. result:=RemoveCurrentP(p);
  732. end
  733. { remove
  734. mov reg0,reg0
  735. }
  736. else if (taicpu(p).ops=2) and
  737. (taicpu(p).oper[0]^.typ = top_reg) and
  738. (taicpu(p).oper[1]^.typ = top_reg) and
  739. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  740. begin
  741. DebugMsg('Peephole RedundantMov performed', p);
  742. result:=RemoveCurrentP(p);
  743. end
  744. {
  745. Turn
  746. mov rx,ry
  747. op rx,rz
  748. mov ry, rx
  749. Into
  750. op ry,rz
  751. }
  752. else if (taicpu(p).ops=2) and
  753. MatchOpType(taicpu(p),top_reg,top_reg) and
  754. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  755. (hp1.typ=ait_instruction) and
  756. (taicpu(hp1).ops >= 1) and
  757. (taicpu(hp1).oper[0]^.typ = top_reg) and
  758. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  759. MatchInstruction(hp2,A_MOV) and
  760. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  761. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  762. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  763. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  764. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  765. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  766. A_INC,A_DEC,
  767. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  768. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  769. begin
  770. DebugMsg('Peephole MovOpMov2Op performed', p);
  771. if (taicpu(hp1).ops=2) and
  772. (taicpu(hp1).oper[1]^.typ=top_reg) and
  773. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  774. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  775. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  776. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  777. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  778. if assigned(alloc) and assigned(dealloc) then
  779. begin
  780. asml.Remove(alloc);
  781. alloc.Free;
  782. asml.Remove(dealloc);
  783. dealloc.Free;
  784. end;
  785. asml.remove(hp2);
  786. hp2.free;
  787. result:=RemoveCurrentP(p);
  788. end
  789. {
  790. Turn
  791. mov rx,ry
  792. op rx,rw
  793. mov rw,rx
  794. Into
  795. op rw,ry
  796. }
  797. else if (taicpu(p).ops=2) and
  798. MatchOpType(taicpu(p),top_reg,top_reg) and
  799. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  800. (hp1.typ=ait_instruction) and
  801. (taicpu(hp1).ops = 2) and
  802. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  803. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  804. (hp2.typ=ait_instruction) and
  805. (taicpu(hp2).opcode=A_MOV) and
  806. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  807. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  808. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  809. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  810. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  811. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  812. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  813. begin
  814. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  815. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  816. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  817. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  818. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  819. if assigned(alloc) and assigned(dealloc) then
  820. begin
  821. asml.Remove(alloc);
  822. alloc.Free;
  823. asml.Remove(dealloc);
  824. dealloc.Free;
  825. end;
  826. result:=RemoveCurrentP(p);
  827. asml.remove(hp2);
  828. hp2.free;
  829. end
  830. { fold
  831. mov reg2,reg0
  832. mov reg3,reg1
  833. to
  834. movw reg2,reg0
  835. }
  836. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  837. (taicpu(p).ops=2) and
  838. (taicpu(p).oper[0]^.typ = top_reg) and
  839. (taicpu(p).oper[1]^.typ = top_reg) and
  840. getnextinstruction(p,hp1) and
  841. (hp1.typ = ait_instruction) and
  842. (taicpu(hp1).opcode = A_MOV) and
  843. (taicpu(hp1).ops=2) and
  844. (taicpu(hp1).oper[0]^.typ = top_reg) and
  845. (taicpu(hp1).oper[1]^.typ = top_reg) and
  846. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  847. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  848. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  849. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  850. begin
  851. DebugMsg('Peephole MovMov2Movw performed', p);
  852. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  853. if assigned(alloc) then
  854. begin
  855. asml.Remove(alloc);
  856. asml.InsertBefore(alloc,p);
  857. { proper book keeping of currently used registers }
  858. IncludeRegInUsedRegs(taicpu(hp1).oper[0]^.reg,UsedRegs);
  859. end;
  860. taicpu(p).opcode:=A_MOVW;
  861. asml.remove(hp1);
  862. hp1.free;
  863. result:=true;
  864. end
  865. {
  866. This removes the first mov from
  867. mov rX,...
  868. mov rX,...
  869. }
  870. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  871. while MatchInstruction(hp1,A_MOV) and
  872. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  873. { don't remove the first mov if the second is a mov rX,rX }
  874. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  875. begin
  876. DebugMsg('Peephole MovMov2Mov performed', p);
  877. result:=RemoveCurrentP(p);
  878. GetNextInstruction(hp1,hp1);
  879. if not assigned(hp1) then
  880. break;
  881. end;
  882. end;
  883. A_SBIC,
  884. A_SBIS:
  885. begin
  886. {
  887. Turn
  888. sbic/sbis X, y
  889. jmp .L1
  890. op
  891. .L1:
  892. into
  893. sbis/sbic X,y
  894. op
  895. .L1:
  896. }
  897. if GetNextInstruction(p, hp1) and
  898. (hp1.typ=ait_instruction) and
  899. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  900. (taicpu(hp1).ops>0) and
  901. (taicpu(hp1).oper[0]^.typ = top_ref) and
  902. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  903. GetNextInstruction(hp1, hp2) and
  904. (hp2.typ=ait_instruction) and
  905. (not taicpu(hp2).is_jmp) and
  906. GetNextInstruction(hp2, hp3) and
  907. (hp3.typ=ait_label) and
  908. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  909. begin
  910. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  911. if taicpu(p).opcode=A_SBIC then
  912. taicpu(p).opcode:=A_SBIS
  913. else
  914. taicpu(p).opcode:=A_SBIC;
  915. tai_label(hp3).labsym.decrefs;
  916. AsmL.remove(hp1);
  917. taicpu(hp1).Free;
  918. result:=true;
  919. end
  920. {
  921. Turn
  922. sbiX X, y
  923. jmp .L1
  924. jmp .L2
  925. .L1:
  926. op
  927. .L2:
  928. into
  929. sbiX X,y
  930. .L1:
  931. op
  932. .L2:
  933. }
  934. else if GetNextInstruction(p, hp1) and
  935. (hp1.typ=ait_instruction) and
  936. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  937. (taicpu(hp1).ops>0) and
  938. (taicpu(hp1).oper[0]^.typ = top_ref) and
  939. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  940. GetNextInstruction(hp1, hp2) and
  941. (hp2.typ=ait_instruction) and
  942. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  943. (taicpu(hp2).ops>0) and
  944. (taicpu(hp2).oper[0]^.typ = top_ref) and
  945. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  946. GetNextInstruction(hp2, hp3) and
  947. (hp3.typ=ait_label) and
  948. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  949. GetNextInstruction(hp3, hp4) and
  950. (hp4.typ=ait_instruction) and
  951. GetNextInstruction(hp4, hp5) and
  952. (hp3.typ=ait_label) and
  953. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  954. begin
  955. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  956. tai_label(hp3).labsym.decrefs;
  957. tai_label(hp5).labsym.decrefs;
  958. AsmL.remove(hp1);
  959. taicpu(hp1).Free;
  960. AsmL.remove(hp2);
  961. taicpu(hp2).Free;
  962. result:=true;
  963. end;
  964. end;
  965. end;
  966. end;
  967. end;
  968. end;
  969. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  970. begin
  971. end;
  972. begin
  973. casmoptimizer:=TCpuAsmOptimizer;
  974. End.