daopt386.pas 95 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmcpu,cgbase,cgutils,
  25. cpubase,optbase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { usefull for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,OS_NO);
  48. {********************************* Types *********************************}
  49. type
  50. TRegArray = Array[RS_EAX..RS_ESP] of tsuperregister;
  51. TRegSet = Set of RS_EAX..RS_ESP;
  52. toptreginfo = Record
  53. NewRegsEncountered, OldRegsEncountered: TRegSet;
  54. RegsLoadedForRef: TRegSet;
  55. lastReload: array[RS_EAX..RS_ESP] of tai;
  56. New2OldReg: TRegArray;
  57. end;
  58. {possible actions on an operand: read, write or modify (= read & write)}
  59. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  60. {the possible states of a flag}
  61. TFlagContents = (F_Unknown, F_notSet, F_Set);
  62. TContent = Packed Record
  63. {start and end of block instructions that defines the
  64. content of this register.}
  65. StartMod: tai;
  66. MemWrite: taicpu;
  67. {how many instructions starting with StarMod does the block consist of}
  68. NrOfMods: Word;
  69. {the type of the content of the register: unknown, memory, constant}
  70. Typ: Byte;
  71. case byte of
  72. {starts at 0, gets increased everytime the register is written to}
  73. 1: (WState: Byte;
  74. {starts at 0, gets increased everytime the register is read from}
  75. RState: Byte);
  76. { to compare both states in one operation }
  77. 2: (state: word);
  78. end;
  79. {Contents of the integer registers}
  80. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  81. {contents of the FPU registers}
  82. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  83. {$ifdef tempOpts}
  84. { linked list which allows searching/deleting based on value, no extra frills}
  85. PSearchLinkedListItem = ^TSearchLinkedListItem;
  86. TSearchLinkedListItem = object(TLinkedList_Item)
  87. constructor init;
  88. function equals(p: PSearchLinkedListItem): boolean; virtual;
  89. end;
  90. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  91. TSearchDoubleIntItem = object(TLinkedList_Item)
  92. constructor init(_int1,_int2: longint);
  93. function equals(p: PSearchLinkedListItem): boolean; virtual;
  94. private
  95. int1, int2: longint;
  96. end;
  97. PSearchLinkedList = ^TSearchLinkedList;
  98. TSearchLinkedList = object(TLinkedList)
  99. function searchByValue(p: PSearchLinkedListItem): boolean;
  100. procedure removeByValue(p: PSearchLinkedListItem);
  101. end;
  102. {$endif tempOpts}
  103. {information record with the contents of every register. Every tai object
  104. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  105. TtaiProp = Record
  106. Regs: TRegContent;
  107. { FPURegs: TRegFPUContent;} {currently not yet used}
  108. { allocated Registers }
  109. UsedRegs: TRegSet;
  110. { status of the direction flag }
  111. DirFlag: TFlagContents;
  112. {$ifdef tempOpts}
  113. { currently used temps }
  114. tempAllocs: PSearchLinkedList;
  115. {$endif tempOpts}
  116. { can this instruction be removed? }
  117. CanBeRemoved: Boolean;
  118. { are the resultflags set by this instruction used? }
  119. FlagsUsed: Boolean;
  120. end;
  121. ptaiprop = ^TtaiProp;
  122. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  123. PtaiPropBlock = ^TtaiPropBlock;
  124. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  125. TLabelTableItem = Record
  126. taiObj: tai;
  127. {$ifDef JumpAnal}
  128. InstrNr: Longint;
  129. RefsFound: Word;
  130. JmpsProcessed: Word
  131. {$endif JumpAnal}
  132. end;
  133. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  134. PLabelTable = ^TLabelTable;
  135. {*********************** procedures and functions ************************}
  136. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  137. function RefsEqual(const R1, R2: TReference): Boolean;
  138. function isgp32reg(supreg: tsuperregister): Boolean;
  139. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  140. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  141. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  142. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  143. function reginop(supreg: tsuperregister; const o:toper): boolean;
  144. function instrWritesFlags(p: tai): boolean;
  145. function instrReadsFlags(p: tai): boolean;
  146. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  147. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  148. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  149. const c: tcontent): boolean;
  150. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  151. const c: tcontent; var memwritedestroyed: boolean): boolean;
  152. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  153. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  154. procedure SkipHead(var p: tai);
  155. function labelCanBeSkipped(p: tai_label): boolean;
  156. procedure RemoveLastDeallocForFuncRes(asmL: TAAsmOutput; p: tai);
  157. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  158. hp: tai): boolean;
  159. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  160. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  161. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  162. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  163. function sizescompatible(loadsize,newsize: topsize): boolean;
  164. function OpsEqual(const o1,o2:toper): Boolean;
  165. type
  166. tdfaobj = class
  167. constructor create(_list: taasmoutput); virtual;
  168. function pass_1(_blockstart: tai): tai;
  169. function pass_2: boolean;
  170. procedure clear;
  171. function getlabelwithsym(sym: tasmlabel): tai;
  172. private
  173. { Walks through the list to find the lowest and highest label number, inits the }
  174. { labeltable and fixes/optimizes some regallocs }
  175. procedure initlabeltable;
  176. function initdfapass2: boolean;
  177. procedure dodfapass2;
  178. { asm list we're working on }
  179. list: taasmoutput;
  180. { current part of the asm list }
  181. blockstart, blockend: tai;
  182. { the amount of taiObjects in the current part of the assembler list }
  183. nroftaiobjs: longint;
  184. { Array which holds all TtaiProps }
  185. taipropblock: ptaipropblock;
  186. { all labels in the current block: their value mapped to their location }
  187. lolab, hilab, labdif: longint;
  188. labeltable: plabeltable;
  189. end;
  190. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  191. procedure incState(var S: Byte; amount: longint);
  192. {******************************* Variables *******************************}
  193. var
  194. dfa: tdfaobj;
  195. {*********************** end of Interface section ************************}
  196. Implementation
  197. Uses
  198. {$ifdef csdebug}
  199. cutils,
  200. {$else}
  201. {$ifdef statedebug}
  202. cutils,
  203. {$else}
  204. {$ifdef allocregdebug}
  205. cutils,
  206. {$endif}
  207. {$endif}
  208. {$endif}
  209. globals, systems, verbose, symconst, cgobj,procinfo;
  210. Type
  211. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  212. var
  213. {How many instructions are between the current instruction and the last one
  214. that modified the register}
  215. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  216. {$ifdef tempOpts}
  217. constructor TSearchLinkedListItem.init;
  218. begin
  219. end;
  220. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  221. begin
  222. equals := false;
  223. end;
  224. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  225. begin
  226. int1 := _int1;
  227. int2 := _int2;
  228. end;
  229. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  230. begin
  231. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  232. (TSearchDoubleIntItem(p).int2 = int2);
  233. end;
  234. function TSearchLinkedList.searchByValue(p: PSearchLinkedListItem): boolean;
  235. var temp: PSearchLinkedListItem;
  236. begin
  237. temp := first;
  238. while (temp <> last.next) and
  239. not(temp.equals(p)) do
  240. temp := temp.next;
  241. searchByValue := temp <> last.next;
  242. end;
  243. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  244. begin
  245. temp := first;
  246. while (temp <> last.next) and
  247. not(temp.equals(p)) do
  248. temp := temp.next;
  249. if temp <> last.next then
  250. begin
  251. remove(temp);
  252. dispose(temp,done);
  253. end;
  254. end;
  255. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  256. {updates UsedRegs with the RegAlloc Information coming after p}
  257. begin
  258. repeat
  259. while assigned(p) and
  260. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  261. ((p.typ = ait_label) and
  262. labelCanBeSkipped(tai_label(current)))) Do
  263. p := tai(p.next);
  264. while assigned(p) and
  265. (p.typ=ait_RegAlloc) Do
  266. begin
  267. case tai_regalloc(p).ratype of
  268. ra_alloc :
  269. UsedRegs := UsedRegs + [tai_regalloc(p).reg];
  270. ra_dealloc :
  271. UsedRegs := UsedRegs - [tai_regalloc(p).reg];
  272. end;
  273. p := tai(p.next);
  274. end;
  275. until not(assigned(p)) or
  276. (not(p.typ in SkipInstr) and
  277. not((p.typ = ait_label) and
  278. labelCanBeSkipped(tai_label(current))));
  279. end;
  280. {$endif tempOpts}
  281. {************************ Create the Label table ************************}
  282. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  283. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  284. { starting with Starttai and ending with the next "real" instruction }
  285. begin
  286. findregalloc := false;
  287. repeat
  288. while assigned(starttai) and
  289. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  290. ((starttai.typ = ait_label) and
  291. labelcanbeskipped(tai_label(starttai)))) do
  292. starttai := tai(starttai.next);
  293. if assigned(starttai) and
  294. (starttai.typ = ait_regalloc) then
  295. begin
  296. if (tai_regalloc(Starttai).ratype = ratyp) and
  297. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  298. begin
  299. findregalloc:=true;
  300. break;
  301. end;
  302. starttai := tai(starttai.next);
  303. end
  304. else
  305. break;
  306. until false;
  307. end;
  308. procedure RemoveLastDeallocForFuncRes(asml: taasmoutput; p: tai);
  309. procedure DoRemoveLastDeallocForFuncRes(asml: taasmoutput; supreg: tsuperregister);
  310. var
  311. hp2: tai;
  312. begin
  313. hp2 := p;
  314. repeat
  315. hp2 := tai(hp2.previous);
  316. if assigned(hp2) and
  317. (hp2.typ = ait_regalloc) and
  318. (tai_regalloc(hp2).ratype=ra_dealloc) and
  319. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  320. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  321. begin
  322. asml.remove(hp2);
  323. hp2.free;
  324. break;
  325. end;
  326. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  327. end;
  328. begin
  329. case current_procinfo.procdef.rettype.def.deftype of
  330. arraydef,recorddef,pointerdef,
  331. stringdef,enumdef,procdef,objectdef,errordef,
  332. filedef,setdef,procvardef,
  333. classrefdef,forwarddef:
  334. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  335. orddef:
  336. if current_procinfo.procdef.rettype.def.size <> 0 then
  337. begin
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. { for int64/qword }
  340. if current_procinfo.procdef.rettype.def.size = 8 then
  341. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  342. end;
  343. end;
  344. end;
  345. procedure getNoDeallocRegs(var regs: tregset);
  346. var
  347. regCounter: TSuperRegister;
  348. begin
  349. regs := [];
  350. case current_procinfo.procdef.rettype.def.deftype of
  351. arraydef,recorddef,pointerdef,
  352. stringdef,enumdef,procdef,objectdef,errordef,
  353. filedef,setdef,procvardef,
  354. classrefdef,forwarddef:
  355. regs := [RS_EAX];
  356. orddef:
  357. if current_procinfo.procdef.rettype.def.size <> 0 then
  358. begin
  359. regs := [RS_EAX];
  360. { for int64/qword }
  361. if current_procinfo.procdef.rettype.def.size = 8 then
  362. regs := regs + [RS_EDX];
  363. end;
  364. end;
  365. for regCounter := RS_EAX to RS_EBX do
  366. { if not(regCounter in rg.usableregsint) then}
  367. include(regs,regcounter);
  368. end;
  369. procedure AddRegDeallocFor(asml: taasmoutput; reg: tregister; p: tai);
  370. var
  371. hp1: tai;
  372. funcResRegs: tregset;
  373. funcResReg: boolean;
  374. begin
  375. { if not(supreg in rg.usableregsint) then
  376. exit;}
  377. { if not(supreg in [RS_EDI]) then
  378. exit;}
  379. getNoDeallocRegs(funcresregs);
  380. { funcResRegs := funcResRegs - rg.usableregsint;}
  381. { funcResRegs := funcResRegs - [RS_EDI];}
  382. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  383. funcResReg := getsupreg(reg) in funcresregs;
  384. hp1 := p;
  385. {
  386. while not(funcResReg and
  387. (p.typ = ait_instruction) and
  388. (taicpu(p).opcode = A_JMP) and
  389. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  390. getLastInstruction(p, p) and
  391. not(regInInstruction(supreg, p)) do
  392. hp1 := p;
  393. }
  394. { don't insert a dealloc for registers which contain the function result }
  395. { if they are followed by a jump to the exit label (for exit(...)) }
  396. { if not(funcResReg) or
  397. not((hp1.typ = ait_instruction) and
  398. (taicpu(hp1).opcode = A_JMP) and
  399. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  400. begin
  401. p := tai_regalloc.deAlloc(reg,nil);
  402. insertLLItem(AsmL, hp1.previous, hp1, p);
  403. end;
  404. end;
  405. {************************ Search the Label table ************************}
  406. function findlabel(l: tasmlabel; var hp: tai): boolean;
  407. {searches for the specified label starting from hp as long as the
  408. encountered instructions are labels, to be able to optimize constructs like
  409. jne l2 jmp l2
  410. jmp l3 and l1:
  411. l1: l2:
  412. l2:}
  413. var
  414. p: tai;
  415. begin
  416. p := hp;
  417. while assigned(p) and
  418. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  419. if (p.typ <> ait_Label) or
  420. (tai_label(p).l <> l) then
  421. GetNextInstruction(p, p)
  422. else
  423. begin
  424. hp := p;
  425. findlabel := true;
  426. exit
  427. end;
  428. findlabel := false;
  429. end;
  430. {************************ Some general functions ************************}
  431. function tch2reg(ch: tinschange): tsuperregister;
  432. {converts a TChange variable to a TRegister}
  433. const
  434. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  435. begin
  436. if (ch <= CH_REDI) then
  437. tch2reg := ch2reg[ch]
  438. else if (ch <= CH_WEDI) then
  439. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  440. else if (ch <= CH_RWEDI) then
  441. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  442. else if (ch <= CH_MEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  444. else
  445. InternalError($db)
  446. end;
  447. { inserts new_one between prev and foll }
  448. procedure InsertLLItem(AsmL: TAAsmOutput; prev, foll, new_one: TLinkedListItem);
  449. begin
  450. if assigned(prev) then
  451. if assigned(foll) then
  452. begin
  453. if assigned(new_one) then
  454. begin
  455. new_one.previous := prev;
  456. new_one.next := foll;
  457. prev.next := new_one;
  458. foll.previous := new_one;
  459. { shgould we update line information }
  460. if (not (tai(new_one).typ in SkipLineInfo)) and
  461. (not (tai(foll).typ in SkipLineInfo)) then
  462. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  463. end;
  464. end
  465. else
  466. asml.Concat(new_one)
  467. else
  468. if assigned(foll) then
  469. asml.Insert(new_one)
  470. end;
  471. {********************* Compare parts of tai objects *********************}
  472. function regssamesize(reg1, reg2: tregister): boolean;
  473. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  474. 8bit, 16bit or 32bit)}
  475. begin
  476. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  477. internalerror(2003111602);
  478. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  479. end;
  480. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  481. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  482. OldReg and NewReg have the same size (has to be chcked in advance with
  483. RegsSameSize) and that neither equals RS_INVALID}
  484. var
  485. newsupreg, oldsupreg: tsuperregister;
  486. begin
  487. if (newreg = NR_NO) or (oldreg = NR_NO) then
  488. internalerror(2003111601);
  489. newsupreg := getsupreg(newreg);
  490. oldsupreg := getsupreg(oldreg);
  491. with RegInfo Do
  492. begin
  493. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  494. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  495. New2OldReg[newsupreg] := oldsupreg;
  496. end;
  497. end;
  498. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  499. begin
  500. case o.typ Of
  501. top_reg:
  502. if (o.reg <> NR_NO) then
  503. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  504. top_ref:
  505. begin
  506. if o.ref^.base <> NR_NO then
  507. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  508. if o.ref^.index <> NR_NO then
  509. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  510. end;
  511. end;
  512. end;
  513. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  514. begin
  515. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  516. if RegsSameSize(oldreg, newreg) then
  517. with reginfo do
  518. {here we always check for the 32 bit component, because it is possible that
  519. the 8 bit component has not been set, event though NewReg already has been
  520. processed. This happens if it has been compared with a register that doesn't
  521. have an 8 bit component (such as EDI). in that case the 8 bit component is
  522. still set to RS_NO and the comparison in the else-part will fail}
  523. if (getsupreg(oldReg) in OldRegsEncountered) then
  524. if (getsupreg(NewReg) in NewRegsEncountered) then
  525. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  526. { if we haven't encountered the new register yet, but we have encountered the
  527. old one already, the new one can only be correct if it's being written to
  528. (and consequently the old one is also being written to), otherwise
  529. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  530. movl (%eax), %eax movl (%edx), %edx
  531. are considered equivalent}
  532. else
  533. if (opact = opact_write) then
  534. begin
  535. AddReg2RegInfo(oldreg, newreg, reginfo);
  536. RegsEquivalent := true
  537. end
  538. else
  539. Regsequivalent := false
  540. else
  541. if not(getsupreg(newreg) in NewRegsEncountered) and
  542. ((opact = opact_write) or
  543. ((newreg = oldreg) and
  544. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  545. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  546. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  547. begin
  548. AddReg2RegInfo(oldreg, newreg, reginfo);
  549. RegsEquivalent := true
  550. end
  551. else
  552. RegsEquivalent := false
  553. else
  554. RegsEquivalent := false
  555. else
  556. RegsEquivalent := oldreg = newreg
  557. end;
  558. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  559. begin
  560. RefsEquivalent :=
  561. (r1.offset = r2.offset) and
  562. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  563. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  564. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  565. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  566. (r1.relsymbol = r2.relsymbol);
  567. end;
  568. function refsequal(const r1, r2: treference): boolean;
  569. begin
  570. refsequal :=
  571. (r1.offset = r2.offset) and
  572. (r1.segment = r2.segment) and (r1.base = r2.base) and
  573. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  574. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  575. (r1.relsymbol = r2.relsymbol);
  576. end;
  577. {$ifdef q+}
  578. {$q-}
  579. {$define overflowon}
  580. {$endif q+}
  581. // checks whether a write to r2 of size "size" contains address r1
  582. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  583. var
  584. realsize1, realsize2: aint;
  585. begin
  586. realsize1 := tcgsize2size[size1];
  587. realsize2 := tcgsize2size[size2];
  588. refsoverlapping :=
  589. (r2.offset <= r1.offset+realsize1) and
  590. (r1.offset <= r2.offset+realsize2) and
  591. (r1.segment = r2.segment) and (r1.base = r2.base) and
  592. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  593. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  594. (r1.relsymbol = r2.relsymbol);
  595. end;
  596. {$ifdef overflowon}
  597. {$q+}
  598. {$undef overflowon}
  599. {$endif overflowon}
  600. function isgp32reg(supreg: tsuperregister): boolean;
  601. {Checks if the register is a 32 bit general purpose register}
  602. begin
  603. isgp32reg := false;
  604. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  605. isgp32reg := true
  606. end;
  607. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  608. begin {checks whether ref contains a reference to reg}
  609. reginref :=
  610. ((ref.base <> NR_NO) and
  611. (getsupreg(ref.base) = supreg)) or
  612. ((ref.index <> NR_NO) and
  613. (getsupreg(ref.index) = supreg))
  614. end;
  615. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  616. var
  617. p: taicpu;
  618. opcount: longint;
  619. begin
  620. RegReadByInstruction := false;
  621. if hp.typ <> ait_instruction then
  622. exit;
  623. p := taicpu(hp);
  624. case p.opcode of
  625. A_CALL:
  626. regreadbyinstruction := true;
  627. A_IMUL:
  628. case p.ops of
  629. 1:
  630. regReadByInstruction :=
  631. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  632. 2,3:
  633. regReadByInstruction :=
  634. reginop(supreg,p.oper[0]^) or
  635. reginop(supreg,p.oper[1]^);
  636. end;
  637. A_IDIV,A_DIV,A_MUL:
  638. begin
  639. regReadByInstruction :=
  640. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  641. end;
  642. else
  643. begin
  644. for opcount := 0 to p.ops-1 do
  645. if (p.oper[opCount]^.typ = top_ref) and
  646. reginref(supreg,p.oper[opcount]^.ref^) then
  647. begin
  648. RegReadByInstruction := true;
  649. exit
  650. end;
  651. for opcount := 1 to maxinschanges do
  652. case insprop[p.opcode].ch[opcount] of
  653. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  654. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  655. begin
  656. RegReadByInstruction := true;
  657. exit
  658. end;
  659. CH_RWOP1,CH_ROP1,CH_MOP1:
  660. if //(p.oper[0]^.typ = top_reg) and
  661. reginop(supreg,p.oper[0]^) then
  662. begin
  663. RegReadByInstruction := true;
  664. exit
  665. end;
  666. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  667. if //(p.oper[1]^.typ = top_reg) and
  668. reginop(supreg,p.oper[1]^) then
  669. begin
  670. RegReadByInstruction := true;
  671. exit
  672. end;
  673. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  674. if //(p.oper[2]^.typ = top_reg) and
  675. reginop(supreg,p.oper[2]^) then
  676. begin
  677. RegReadByInstruction := true;
  678. exit
  679. end;
  680. end;
  681. end;
  682. end;
  683. end;
  684. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  685. { Checks if reg is used by the instruction p1 }
  686. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  687. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  688. var
  689. p: taicpu;
  690. opcount: Word;
  691. begin
  692. regInInstruction := false;
  693. if p1.typ <> ait_instruction then
  694. exit;
  695. p := taicpu(p1);
  696. case p.opcode of
  697. A_CALL:
  698. regininstruction := true;
  699. A_IMUL:
  700. case p.ops of
  701. 1:
  702. regInInstruction :=
  703. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  704. 2,3:
  705. regInInstruction :=
  706. reginop(supreg,p.oper[0]^) or
  707. reginop(supreg,p.oper[1]^) or
  708. (assigned(p.oper[2]) and
  709. reginop(supreg,p.oper[2]^));
  710. end;
  711. A_IDIV,A_DIV,A_MUL:
  712. regInInstruction :=
  713. reginop(supreg,p.oper[0]^) or
  714. (supreg in [RS_EAX,RS_EDX])
  715. else
  716. begin
  717. for opcount := 1 to maxinschanges do
  718. case insprop[p.opcode].Ch[opCount] of
  719. CH_REAX..CH_MEDI:
  720. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  721. begin
  722. regInInstruction := true;
  723. exit;
  724. end;
  725. CH_ROp1..CH_MOp1:
  726. if reginop(supreg,p.oper[0]^) then
  727. begin
  728. regInInstruction := true;
  729. exit
  730. end;
  731. Ch_ROp2..Ch_MOp2:
  732. if reginop(supreg,p.oper[1]^) then
  733. begin
  734. regInInstruction := true;
  735. exit
  736. end;
  737. Ch_ROp3..Ch_MOp3:
  738. if reginop(supreg,p.oper[2]^) then
  739. begin
  740. regInInstruction := true;
  741. exit
  742. end;
  743. end;
  744. end;
  745. end;
  746. end;
  747. function reginop(supreg: tsuperregister; const o:toper): boolean;
  748. begin
  749. reginop := false;
  750. case o.typ Of
  751. top_reg:
  752. reginop :=
  753. (getregtype(o.reg) = R_INTREGISTER) and
  754. (supreg = getsupreg(o.reg));
  755. top_ref:
  756. reginop :=
  757. ((o.ref^.base <> NR_NO) and
  758. (supreg = getsupreg(o.ref^.base))) or
  759. ((o.ref^.index <> NR_NO) and
  760. (supreg = getsupreg(o.ref^.index)));
  761. end;
  762. end;
  763. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  764. var
  765. InstrProp: TInsProp;
  766. TmpResult: Boolean;
  767. Cnt: Word;
  768. begin
  769. TmpResult := False;
  770. if supreg = RS_INVALID then
  771. exit;
  772. if (p1.typ = ait_instruction) then
  773. case taicpu(p1).opcode of
  774. A_IMUL:
  775. With taicpu(p1) Do
  776. TmpResult :=
  777. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  778. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  779. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  780. A_DIV, A_IDIV, A_MUL:
  781. With taicpu(p1) Do
  782. TmpResult :=
  783. (supreg in [RS_EAX,RS_EDX]);
  784. else
  785. begin
  786. Cnt := 1;
  787. InstrProp := InsProp[taicpu(p1).OpCode];
  788. while (Cnt <= maxinschanges) and
  789. (InstrProp.Ch[Cnt] <> Ch_None) and
  790. not(TmpResult) Do
  791. begin
  792. case InstrProp.Ch[Cnt] Of
  793. Ch_WEAX..Ch_MEDI:
  794. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  795. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  796. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  797. reginop(supreg,taicpu(p1).oper[0]^);
  798. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  799. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  800. reginop(supreg,taicpu(p1).oper[1]^);
  801. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  802. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  803. reginop(supreg,taicpu(p1).oper[2]^);
  804. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  805. Ch_ALL: TmpResult := true;
  806. end;
  807. inc(Cnt)
  808. end
  809. end
  810. end;
  811. RegModifiedByInstruction := TmpResult
  812. end;
  813. function instrWritesFlags(p: tai): boolean;
  814. var
  815. l: longint;
  816. begin
  817. instrWritesFlags := true;
  818. case p.typ of
  819. ait_instruction:
  820. begin
  821. for l := 1 to maxinschanges do
  822. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  823. exit;
  824. end;
  825. ait_label:
  826. exit;
  827. end;
  828. instrWritesFlags := false;
  829. end;
  830. function instrReadsFlags(p: tai): boolean;
  831. var
  832. l: longint;
  833. begin
  834. instrReadsFlags := true;
  835. case p.typ of
  836. ait_instruction:
  837. begin
  838. for l := 1 to maxinschanges do
  839. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  840. exit;
  841. end;
  842. ait_label:
  843. exit;
  844. end;
  845. instrReadsFlags := false;
  846. end;
  847. {********************* GetNext and GetLastInstruction *********************}
  848. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  849. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  850. { next tai object in Next. Returns false if there isn't any }
  851. begin
  852. repeat
  853. if (Current.typ = ait_marker) and
  854. (tai_Marker(current).Kind = AsmBlockStart) then
  855. begin
  856. GetNextInstruction := False;
  857. Next := Nil;
  858. Exit
  859. end;
  860. Current := tai(current.Next);
  861. while assigned(Current) and
  862. ((current.typ in skipInstr) or
  863. ((current.typ = ait_label) and
  864. labelCanBeSkipped(tai_label(current)))) do
  865. Current := tai(current.Next);
  866. { if assigned(Current) and
  867. (current.typ = ait_Marker) and
  868. (tai_Marker(current).Kind = NoPropInfoStart) then
  869. begin
  870. while assigned(Current) and
  871. ((current.typ <> ait_Marker) or
  872. (tai_Marker(current).Kind <> NoPropInfoend)) Do
  873. Current := tai(current.Next);
  874. end;}
  875. until not(assigned(Current)) or
  876. (current.typ <> ait_Marker) or
  877. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  878. Next := Current;
  879. if assigned(Current) and
  880. not((current.typ in SkipInstr) or
  881. ((current.typ = ait_label) and
  882. labelCanBeSkipped(tai_label(current))))
  883. then
  884. GetNextInstruction :=
  885. not((current.typ = ait_marker) and
  886. (tai_marker(current).kind = asmBlockStart))
  887. else
  888. begin
  889. GetNextInstruction := False;
  890. Next := nil;
  891. end;
  892. end;
  893. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  894. {skips the ait-types in SkipInstr puts the previous tai object in
  895. Last. Returns false if there isn't any}
  896. begin
  897. repeat
  898. Current := tai(current.previous);
  899. while assigned(Current) and
  900. (((current.typ = ait_Marker) and
  901. not(tai_Marker(current).Kind in [AsmBlockend{,NoPropInfoend}])) or
  902. (current.typ in SkipInstr) or
  903. ((current.typ = ait_label) and
  904. labelCanBeSkipped(tai_label(current)))) Do
  905. Current := tai(current.previous);
  906. { if assigned(Current) and
  907. (current.typ = ait_Marker) and
  908. (tai_Marker(current).Kind = NoPropInfoend) then
  909. begin
  910. while assigned(Current) and
  911. ((current.typ <> ait_Marker) or
  912. (tai_Marker(current).Kind <> NoPropInfoStart)) Do
  913. Current := tai(current.previous);
  914. end;}
  915. until not(assigned(Current)) or
  916. (current.typ <> ait_Marker) or
  917. not(tai_Marker(current).Kind in [NoPropInfoStart,NoPropInfoend]);
  918. if not(assigned(Current)) or
  919. (current.typ in SkipInstr) or
  920. ((current.typ = ait_label) and
  921. labelCanBeSkipped(tai_label(current))) or
  922. ((current.typ = ait_Marker) and
  923. (tai_Marker(current).Kind = AsmBlockend))
  924. then
  925. begin
  926. Last := nil;
  927. GetLastInstruction := False
  928. end
  929. else
  930. begin
  931. Last := Current;
  932. GetLastInstruction := True;
  933. end;
  934. end;
  935. procedure SkipHead(var p: tai);
  936. var
  937. oldp: tai;
  938. begin
  939. repeat
  940. oldp := p;
  941. if (p.typ in SkipInstr) or
  942. ((p.typ = ait_marker) and
  943. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend])) then
  944. GetNextInstruction(p,p)
  945. else if ((p.Typ = Ait_Marker) and
  946. (tai_Marker(p).Kind = nopropinfostart)) then
  947. {a marker of the NoPropInfoStart can't be the first instruction of a
  948. TAAsmoutput list}
  949. GetNextInstruction(tai(p.previous),p);
  950. until p = oldp
  951. end;
  952. function labelCanBeSkipped(p: tai_label): boolean;
  953. begin
  954. labelCanBeSkipped := not(p.l.is_used) or p.l.is_addr;
  955. end;
  956. {******************* The Data Flow Analyzer functions ********************}
  957. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  958. hp: tai): boolean;
  959. { assumes reg is a 32bit register }
  960. var
  961. p: taicpu;
  962. begin
  963. if not assigned(hp) or
  964. (hp.typ <> ait_instruction) then
  965. begin
  966. regLoadedWithNewValue := false;
  967. exit;
  968. end;
  969. p := taicpu(hp);
  970. regLoadedWithNewValue :=
  971. (((p.opcode = A_MOV) or
  972. (p.opcode = A_MOVZX) or
  973. (p.opcode = A_MOVSX) or
  974. (p.opcode = A_LEA)) and
  975. (p.oper[1]^.typ = top_reg) and
  976. (getsupreg(p.oper[1]^.reg) = supreg) and
  977. (canDependOnPrevValue or
  978. (p.oper[0]^.typ <> top_ref) or
  979. not regInRef(supreg,p.oper[0]^.ref^)) or
  980. ((p.opcode = A_POP) and
  981. (getsupreg(p.oper[0]^.reg) = supreg)));
  982. end;
  983. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  984. {updates UsedRegs with the RegAlloc Information coming after p}
  985. begin
  986. repeat
  987. while assigned(p) and
  988. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  989. ((p.typ = ait_label) and
  990. labelCanBeSkipped(tai_label(p))) or
  991. ((p.typ = ait_marker) and
  992. (tai_Marker(p).Kind in [AsmBlockend,inlinestart,inlineend]))) do
  993. p := tai(p.next);
  994. while assigned(p) and
  995. (p.typ=ait_RegAlloc) Do
  996. begin
  997. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  998. begin
  999. case tai_regalloc(p).ratype of
  1000. ra_alloc :
  1001. UsedRegs := UsedRegs + [getsupreg(tai_regalloc(p).reg)];
  1002. ra_dealloc :
  1003. UsedRegs := UsedRegs - [getsupreg(tai_regalloc(p).reg)];
  1004. end;
  1005. end;
  1006. p := tai(p.next);
  1007. end;
  1008. until not(assigned(p)) or
  1009. (not(p.typ in SkipInstr) and
  1010. not((p.typ = ait_label) and
  1011. labelCanBeSkipped(tai_label(p))));
  1012. end;
  1013. procedure AllocRegBetween(asml: taasmoutput; reg: tregister; p1, p2: tai; const initialusedregs: tregset);
  1014. { allocates register reg between (and including) instructions p1 and p2 }
  1015. { the type of p1 and p2 must not be in SkipInstr }
  1016. { note that this routine is both called from the peephole optimizer }
  1017. { where optinfo is not yet initialised) and from the cse (where it is) }
  1018. var
  1019. hp: tai;
  1020. lastRemovedWasDealloc: boolean;
  1021. supreg: tsuperregister;
  1022. begin
  1023. {$ifdef EXTDEBUG}
  1024. if assigned(p1.optinfo) and
  1025. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1026. internalerror(2004101010);
  1027. {$endif EXTDEBUG}
  1028. supreg := getsupreg(reg);
  1029. { if not(supreg in rg.usableregsint+[RS_EDI,RS_ESI]) or
  1030. not(assigned(p1)) then}
  1031. if not(supreg in [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_EDI,RS_ESI]) or
  1032. not(assigned(p1)) then
  1033. { this happens with registers which are loaded implicitely, outside the }
  1034. { current block (e.g. esi with self) }
  1035. exit;
  1036. { make sure we allocate it for this instruction }
  1037. getnextinstruction(p2,p2);
  1038. lastRemovedWasDealloc := false;
  1039. {$ifdef allocregdebug}
  1040. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1041. ' from here...'));
  1042. insertllitem(asml,p1.previous,p1,hp);
  1043. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1044. ' till here...'));
  1045. insertllitem(asml,p2,p1.next,hp);
  1046. {$endif allocregdebug}
  1047. if not(supreg in initialusedregs) then
  1048. begin
  1049. hp := tai_regalloc.alloc(reg,nil);
  1050. insertllItem(asmL,p1.previous,p1,hp);
  1051. end;
  1052. while assigned(p1) and
  1053. (p1 <> p2) do
  1054. begin
  1055. if assigned(p1.optinfo) then
  1056. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1057. p1 := tai(p1.next);
  1058. repeat
  1059. while assigned(p1) and
  1060. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1061. p1 := tai(p1.next);
  1062. { remove all allocation/deallocation info about the register in between }
  1063. if assigned(p1) and
  1064. (p1.typ = ait_regalloc) then
  1065. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1066. begin
  1067. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1068. hp := tai(p1.Next);
  1069. asml.Remove(p1);
  1070. p1.free;
  1071. p1 := hp;
  1072. end
  1073. else p1 := tai(p1.next);
  1074. until not(assigned(p1)) or
  1075. not(p1.typ in SkipInstr);
  1076. end;
  1077. if assigned(p1) then
  1078. begin
  1079. if lastRemovedWasDealloc then
  1080. begin
  1081. hp := tai_regalloc.DeAlloc(reg,nil);
  1082. insertLLItem(asmL,p1.previous,p1,hp);
  1083. end;
  1084. end;
  1085. end;
  1086. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1087. var
  1088. hp: tai;
  1089. first: boolean;
  1090. begin
  1091. findregdealloc := false;
  1092. first := true;
  1093. while assigned(p.previous) and
  1094. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1095. ((tai(p.previous).typ = ait_label) and
  1096. labelCanBeSkipped(tai_label(p.previous)))) do
  1097. begin
  1098. p := tai(p.previous);
  1099. if (p.typ = ait_regalloc) and
  1100. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1101. if (tai_regalloc(p).ratype=ra_dealloc) then
  1102. if first then
  1103. begin
  1104. findregdealloc := true;
  1105. break;
  1106. end
  1107. else
  1108. begin
  1109. findRegDealloc :=
  1110. getNextInstruction(p,hp) and
  1111. regLoadedWithNewValue(supreg,false,hp);
  1112. break
  1113. end
  1114. else
  1115. first := false;
  1116. end
  1117. end;
  1118. procedure incState(var S: Byte; amount: longint);
  1119. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1120. errors}
  1121. begin
  1122. if (s <= $ff - amount) then
  1123. inc(s, amount)
  1124. else s := longint(s) + amount - $ff;
  1125. end;
  1126. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1127. { Content is the sequence of instructions that describes the contents of }
  1128. { seqReg. reg is being overwritten by the current instruction. if the }
  1129. { content of seqReg depends on reg (ie. because of a }
  1130. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1131. var
  1132. p: tai;
  1133. Counter: Word;
  1134. TmpResult: Boolean;
  1135. RegsChecked: TRegSet;
  1136. begin
  1137. RegsChecked := [];
  1138. p := Content.StartMod;
  1139. TmpResult := False;
  1140. Counter := 1;
  1141. while not(TmpResult) and
  1142. (Counter <= Content.NrOfMods) Do
  1143. begin
  1144. if (p.typ = ait_instruction) and
  1145. ((taicpu(p).opcode = A_MOV) or
  1146. (taicpu(p).opcode = A_MOVZX) or
  1147. (taicpu(p).opcode = A_MOVSX) or
  1148. (taicpu(p).opcode = A_LEA)) and
  1149. (taicpu(p).oper[0]^.typ = top_ref) then
  1150. With taicpu(p).oper[0]^.ref^ Do
  1151. if ((base = current_procinfo.FramePointer) or
  1152. (assigned(symbol) and (base = NR_NO))) and
  1153. (index = NR_NO) then
  1154. begin
  1155. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1156. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1157. break;
  1158. end
  1159. else
  1160. tmpResult :=
  1161. regReadByInstruction(supreg,p) and
  1162. regModifiedByInstruction(seqReg,p)
  1163. else
  1164. tmpResult :=
  1165. regReadByInstruction(supreg,p) and
  1166. regModifiedByInstruction(seqReg,p);
  1167. inc(Counter);
  1168. GetNextInstruction(p,p)
  1169. end;
  1170. sequenceDependsonReg := TmpResult
  1171. end;
  1172. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1173. var
  1174. counter: tsuperregister;
  1175. begin
  1176. for counter := RS_EAX to RS_EDI do
  1177. if counter <> supreg then
  1178. with p1^.regs[counter] Do
  1179. begin
  1180. if (typ in [con_ref,con_noRemoveRef]) and
  1181. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1182. if typ in [con_ref, con_invalid] then
  1183. typ := con_invalid
  1184. { con_noRemoveRef = con_unknown }
  1185. else
  1186. typ := con_unknown;
  1187. if assigned(memwrite) and
  1188. regInRef(counter,memwrite.oper[1]^.ref^) then
  1189. memwrite := nil;
  1190. end;
  1191. end;
  1192. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1193. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1194. contents of registers are loaded with a memory location based on reg.
  1195. doincState is false when this register has to be destroyed not because
  1196. it's contents are directly modified/overwritten, but because of an indirect
  1197. action (e.g. this register holds the contents of a variable and the value
  1198. of the variable in memory is changed) }
  1199. begin
  1200. { the following happens for fpu registers }
  1201. if (supreg < low(NrOfInstrSinceLastMod)) or
  1202. (supreg > high(NrOfInstrSinceLastMod)) then
  1203. exit;
  1204. NrOfInstrSinceLastMod[supreg] := 0;
  1205. with p1^.regs[supreg] do
  1206. begin
  1207. if doincState then
  1208. begin
  1209. incState(wstate,1);
  1210. typ := con_unknown;
  1211. startmod := nil;
  1212. end
  1213. else
  1214. if typ in [con_ref,con_const,con_invalid] then
  1215. typ := con_invalid
  1216. { con_noRemoveRef = con_unknown }
  1217. else
  1218. typ := con_unknown;
  1219. memwrite := nil;
  1220. end;
  1221. invalidateDependingRegs(p1,supreg);
  1222. end;
  1223. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1224. begin
  1225. if (p.typ = ait_instruction) then
  1226. begin
  1227. case taicpu(p).oper[0]^.typ Of
  1228. top_reg:
  1229. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1230. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1231. top_ref:
  1232. With TReference(taicpu(p).oper[0]^) Do
  1233. begin
  1234. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1235. then RegSet := RegSet + [base];
  1236. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1237. then RegSet := RegSet + [index];
  1238. end;
  1239. end;
  1240. case taicpu(p).oper[1]^.typ Of
  1241. top_reg:
  1242. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1243. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1244. top_ref:
  1245. With TReference(taicpu(p).oper[1]^) Do
  1246. begin
  1247. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1248. then RegSet := RegSet + [base];
  1249. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1250. then RegSet := RegSet + [index];
  1251. end;
  1252. end;
  1253. end;
  1254. end;}
  1255. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1256. begin {checks whether the two ops are equivalent}
  1257. OpsEquivalent := False;
  1258. if o1.typ=o2.typ then
  1259. case o1.typ Of
  1260. top_reg:
  1261. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1262. top_ref:
  1263. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1264. Top_Const:
  1265. OpsEquivalent := o1.val = o2.val;
  1266. Top_None:
  1267. OpsEquivalent := True
  1268. end;
  1269. end;
  1270. function OpsEqual(const o1,o2:toper): Boolean;
  1271. begin {checks whether the two ops are equal}
  1272. OpsEqual := False;
  1273. if o1.typ=o2.typ then
  1274. case o1.typ Of
  1275. top_reg :
  1276. OpsEqual:=o1.reg=o2.reg;
  1277. top_ref :
  1278. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1279. Top_Const :
  1280. OpsEqual:=o1.val=o2.val;
  1281. Top_None :
  1282. OpsEqual := True
  1283. end;
  1284. end;
  1285. function sizescompatible(loadsize,newsize: topsize): boolean;
  1286. begin
  1287. case loadsize of
  1288. S_B,S_BW,S_BL:
  1289. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1290. S_W,S_WL:
  1291. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1292. else
  1293. sizescompatible := newsize = S_L;
  1294. end;
  1295. end;
  1296. function opscompatible(p1,p2: taicpu): boolean;
  1297. begin
  1298. case p1.opcode of
  1299. A_MOVZX,A_MOVSX:
  1300. opscompatible :=
  1301. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1302. sizescompatible(p1.opsize,p2.opsize);
  1303. else
  1304. opscompatible :=
  1305. (p1.opcode = p2.opcode) and
  1306. (p1.ops = p2.ops) and
  1307. (p1.opsize = p2.opsize);
  1308. end;
  1309. end;
  1310. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1311. {$ifdef csdebug}
  1312. var
  1313. hp: tai;
  1314. {$endif csdebug}
  1315. begin {checks whether two taicpu instructions are equal}
  1316. if assigned(p1) and assigned(p2) and
  1317. (tai(p1).typ = ait_instruction) and
  1318. (tai(p2).typ = ait_instruction) and
  1319. opscompatible(taicpu(p1),taicpu(p2)) and
  1320. (not(assigned(taicpu(p1).oper[0])) or
  1321. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1322. (not(assigned(taicpu(p1).oper[1])) or
  1323. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1324. (not(assigned(taicpu(p1).oper[2])) or
  1325. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1326. {both instructions have the same structure:
  1327. "<operator> <operand of type1>, <operand of type 2>"}
  1328. if ((taicpu(p1).opcode = A_MOV) or
  1329. (taicpu(p1).opcode = A_MOVZX) or
  1330. (taicpu(p1).opcode = A_MOVSX) or
  1331. (taicpu(p1).opcode = A_LEA)) and
  1332. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1333. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1334. {the "old" instruction is a load of a register with a new value, not with
  1335. a value based on the contents of this register (so no "mov (reg), reg")}
  1336. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1337. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1338. {the "new" instruction is also a load of a register with a new value, and
  1339. this value is fetched from the same memory location}
  1340. begin
  1341. With taicpu(p2).oper[0]^.ref^ Do
  1342. begin
  1343. if (base <> NR_NO) and
  1344. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1345. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1346. if (index <> NR_NO) and
  1347. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1348. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1349. end;
  1350. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1351. from the reference are the same in the old and in the new instruction
  1352. sequence}
  1353. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1354. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1355. InstructionsEquivalent :=
  1356. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1357. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1358. end
  1359. {the registers are loaded with values from different memory locations. if
  1360. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1361. would be considered equivalent}
  1362. else
  1363. InstructionsEquivalent := False
  1364. else
  1365. {load register with a value based on the current value of this register}
  1366. begin
  1367. With taicpu(p2).oper[0]^.ref^ Do
  1368. begin
  1369. if (base <> NR_NO) and
  1370. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1371. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1372. {it won't do any harm if the register is already in RegsLoadedForRef}
  1373. begin
  1374. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1375. {$ifdef csdebug}
  1376. Writeln(std_regname(base), ' added');
  1377. {$endif csdebug}
  1378. end;
  1379. if (index <> NR_NO) and
  1380. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1381. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1382. begin
  1383. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1384. {$ifdef csdebug}
  1385. Writeln(std_regname(index), ' added');
  1386. {$endif csdebug}
  1387. end;
  1388. end;
  1389. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1390. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1391. begin
  1392. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1393. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1394. {$ifdef csdebug}
  1395. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1396. {$endif csdebug}
  1397. end;
  1398. InstructionsEquivalent :=
  1399. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1400. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1401. end
  1402. else
  1403. {an instruction <> mov, movzx, movsx}
  1404. begin
  1405. {$ifdef csdebug}
  1406. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1407. hp.previous := p2;
  1408. hp.next := p2.next;
  1409. p2.next.previous := hp;
  1410. p2.next := hp;
  1411. {$endif csdebug}
  1412. InstructionsEquivalent :=
  1413. (not(assigned(taicpu(p1).oper[0])) or
  1414. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1415. (not(assigned(taicpu(p1).oper[1])) or
  1416. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1417. (not(assigned(taicpu(p1).oper[2])) or
  1418. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1419. end
  1420. {the instructions haven't even got the same structure, so they're certainly
  1421. not equivalent}
  1422. else
  1423. begin
  1424. {$ifdef csdebug}
  1425. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1426. hp.previous := p2;
  1427. hp.next := p2.next;
  1428. p2.next.previous := hp;
  1429. p2.next := hp;
  1430. {$endif csdebug}
  1431. InstructionsEquivalent := False;
  1432. end;
  1433. {$ifdef csdebug}
  1434. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1435. hp.previous := p2;
  1436. hp.next := p2.next;
  1437. p2.next.previous := hp;
  1438. p2.next := hp;
  1439. {$endif csdebug}
  1440. end;
  1441. (*
  1442. function InstructionsEqual(p1, p2: tai): Boolean;
  1443. begin {checks whether two taicpu instructions are equal}
  1444. InstructionsEqual :=
  1445. assigned(p1) and assigned(p2) and
  1446. ((tai(p1).typ = ait_instruction) and
  1447. (tai(p1).typ = ait_instruction) and
  1448. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1449. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1450. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1451. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1452. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1453. end;
  1454. *)
  1455. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1456. begin
  1457. if supreg in [RS_EAX..RS_EDI] then
  1458. incState(p^.regs[supreg].rstate,1)
  1459. end;
  1460. procedure readref(p: ptaiprop; const ref: preference);
  1461. begin
  1462. if ref^.base <> NR_NO then
  1463. readreg(p, getsupreg(ref^.base));
  1464. if ref^.index <> NR_NO then
  1465. readreg(p, getsupreg(ref^.index));
  1466. end;
  1467. procedure ReadOp(p: ptaiprop;const o:toper);
  1468. begin
  1469. case o.typ Of
  1470. top_reg: readreg(p, getsupreg(o.reg));
  1471. top_ref: readref(p, o.ref);
  1472. end;
  1473. end;
  1474. function RefInInstruction(const ref: TReference; p: tai;
  1475. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1476. {checks whehter ref is used in p}
  1477. var
  1478. mysize: tcgsize;
  1479. TmpResult: Boolean;
  1480. begin
  1481. TmpResult := False;
  1482. if (p.typ = ait_instruction) then
  1483. begin
  1484. mysize := topsize2tcgsize[taicpu(p).opsize];
  1485. if (taicpu(p).ops >= 1) and
  1486. (taicpu(p).oper[0]^.typ = top_ref) then
  1487. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1488. if not(TmpResult) and
  1489. (taicpu(p).ops >= 2) and
  1490. (taicpu(p).oper[1]^.typ = top_ref) then
  1491. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1492. if not(TmpResult) and
  1493. (taicpu(p).ops >= 3) and
  1494. (taicpu(p).oper[2]^.typ = top_ref) then
  1495. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1496. end;
  1497. RefInInstruction := TmpResult;
  1498. end;
  1499. function RefInSequence(const ref: TReference; Content: TContent;
  1500. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1501. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1502. tai objects) to see whether ref is used somewhere}
  1503. var p: tai;
  1504. Counter: Word;
  1505. TmpResult: Boolean;
  1506. begin
  1507. p := Content.StartMod;
  1508. TmpResult := False;
  1509. Counter := 1;
  1510. while not(TmpResult) and
  1511. (Counter <= Content.NrOfMods) Do
  1512. begin
  1513. if (p.typ = ait_instruction) and
  1514. RefInInstruction(ref, p, RefsEq, size)
  1515. then TmpResult := True;
  1516. inc(Counter);
  1517. GetNextInstruction(p,p)
  1518. end;
  1519. RefInSequence := TmpResult
  1520. end;
  1521. {$ifdef q+}
  1522. {$q-}
  1523. {$define overflowon}
  1524. {$endif q+}
  1525. // checks whether a write to r2 of size "size" contains address r1
  1526. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1527. var
  1528. realsize1, realsize2: aint;
  1529. begin
  1530. realsize1 := tcgsize2size[size1];
  1531. realsize2 := tcgsize2size[size2];
  1532. arrayrefsoverlapping :=
  1533. (r2.offset <= r1.offset+realsize1) and
  1534. (r1.offset <= r2.offset+realsize2) and
  1535. (r1.segment = r2.segment) and
  1536. (r1.symbol=r2.symbol) and
  1537. (r1.base = r2.base)
  1538. end;
  1539. {$ifdef overflowon}
  1540. {$q+}
  1541. {$undef overflowon}
  1542. {$endif overflowon}
  1543. function isSimpleRef(const ref: treference): boolean;
  1544. { returns true if ref is reference to a local or global variable, to a }
  1545. { parameter or to an object field (this includes arrays). Returns false }
  1546. { otherwise. }
  1547. begin
  1548. isSimpleRef :=
  1549. assigned(ref.symbol) or
  1550. (ref.base = current_procinfo.framepointer);
  1551. end;
  1552. function containsPointerRef(p: tai): boolean;
  1553. { checks if an instruction contains a reference which is a pointer location }
  1554. var
  1555. hp: taicpu;
  1556. count: longint;
  1557. begin
  1558. containsPointerRef := false;
  1559. if p.typ <> ait_instruction then
  1560. exit;
  1561. hp := taicpu(p);
  1562. for count := 0 to hp.ops-1 do
  1563. begin
  1564. case hp.oper[count]^.typ of
  1565. top_ref:
  1566. if not isSimpleRef(hp.oper[count]^.ref^) then
  1567. begin
  1568. containsPointerRef := true;
  1569. exit;
  1570. end;
  1571. top_none:
  1572. exit;
  1573. end;
  1574. end;
  1575. end;
  1576. function containsPointerLoad(c: tcontent): boolean;
  1577. { checks whether the contents of a register contain a pointer reference }
  1578. var
  1579. p: tai;
  1580. count: longint;
  1581. begin
  1582. containsPointerLoad := false;
  1583. p := c.startmod;
  1584. for count := c.nrOfMods downto 1 do
  1585. begin
  1586. if containsPointerRef(p) then
  1587. begin
  1588. containsPointerLoad := true;
  1589. exit;
  1590. end;
  1591. getnextinstruction(p,p);
  1592. end;
  1593. end;
  1594. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1595. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1596. { returns whether the contents c of reg are invalid after regWritten is }
  1597. { is written to ref }
  1598. var
  1599. refsEq: trefCompare;
  1600. begin
  1601. if isSimpleRef(ref) then
  1602. begin
  1603. if (ref.index <> NR_NO) or
  1604. (assigned(ref.symbol) and
  1605. (ref.base <> NR_NO)) then
  1606. { local/global variable or parameter which is an array }
  1607. refsEq := {$ifdef fpc}@{$endif}arrayRefsOverlapping
  1608. else
  1609. { local/global variable or parameter which is not an array }
  1610. refsEq := {$ifdef fpc}@{$endif}refsOverlapping;
  1611. invalsmemwrite :=
  1612. assigned(c.memwrite) and
  1613. ((not(cs_uncertainOpts in aktglobalswitches) and
  1614. containsPointerRef(c.memwrite)) or
  1615. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1616. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1617. begin
  1618. writeToMemDestroysContents := false;
  1619. exit;
  1620. end;
  1621. { write something to a parameter, a local or global variable, so }
  1622. { * with uncertain optimizations on: }
  1623. { - destroy the contents of registers whose contents have somewhere a }
  1624. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1625. { are being written to memory) is not destroyed if it's StartMod is }
  1626. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1627. { expression based on ref) }
  1628. { * with uncertain optimizations off: }
  1629. { - also destroy registers that contain any pointer }
  1630. with c do
  1631. writeToMemDestroysContents :=
  1632. (typ in [con_ref,con_noRemoveRef]) and
  1633. ((not(cs_uncertainOpts in aktglobalswitches) and
  1634. containsPointerLoad(c)
  1635. ) or
  1636. (refInSequence(ref,c,refsEq,size) and
  1637. ((supreg <> regWritten) or
  1638. not((nrOfMods = 1) and
  1639. {StarMod is always of the type ait_instruction}
  1640. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1641. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1642. )
  1643. )
  1644. )
  1645. );
  1646. end
  1647. else
  1648. { write something to a pointer location, so }
  1649. { * with uncertain optimzations on: }
  1650. { - do not destroy registers which contain a local/global variable or }
  1651. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1652. { * with uncertain optimzations off: }
  1653. { - destroy every register which contains a memory location }
  1654. begin
  1655. invalsmemwrite :=
  1656. assigned(c.memwrite) and
  1657. (not(cs_UncertainOpts in aktglobalswitches) or
  1658. containsPointerRef(c.memwrite));
  1659. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1660. begin
  1661. writeToMemDestroysContents := false;
  1662. exit;
  1663. end;
  1664. with c do
  1665. writeToMemDestroysContents :=
  1666. (typ in [con_ref,con_noRemoveRef]) and
  1667. (not(cs_UncertainOpts in aktglobalswitches) or
  1668. { for movsl }
  1669. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1670. { don't destroy if reg contains a parameter, local or global variable }
  1671. containsPointerLoad(c)
  1672. );
  1673. end;
  1674. end;
  1675. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1676. const c: tcontent): boolean;
  1677. { returns whether the contents c of reg are invalid after destReg is }
  1678. { modified }
  1679. begin
  1680. writeToRegDestroysContents :=
  1681. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1682. sequenceDependsOnReg(c,supreg,destReg);
  1683. end;
  1684. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1685. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1686. { returns whether the contents c of reg are invalid after regWritten is }
  1687. { is written to op }
  1688. begin
  1689. memwritedestroyed := false;
  1690. case op.typ of
  1691. top_reg:
  1692. writeDestroysContents :=
  1693. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1694. top_ref:
  1695. writeDestroysContents :=
  1696. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1697. else
  1698. writeDestroysContents := false;
  1699. end;
  1700. end;
  1701. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1702. { destroys all registers which possibly contain a reference to ref, regWritten }
  1703. { is the register whose contents are being written to memory (if this proc }
  1704. { is called because of a "mov?? %reg, (mem)" instruction) }
  1705. var
  1706. counter: tsuperregister;
  1707. destroymemwrite: boolean;
  1708. begin
  1709. for counter := RS_EAX to RS_EDI Do
  1710. begin
  1711. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1712. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1713. destroyReg(ptaiprop(p.optInfo), counter, false)
  1714. else if destroymemwrite then
  1715. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1716. end;
  1717. end;
  1718. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1719. var Counter: tsuperregister;
  1720. begin {initializes/desrtoys all registers}
  1721. For Counter := RS_EAX To RS_EDI Do
  1722. begin
  1723. if read then
  1724. readreg(p, Counter);
  1725. DestroyReg(p, Counter, written);
  1726. p^.regs[counter].MemWrite := nil;
  1727. end;
  1728. p^.DirFlag := F_Unknown;
  1729. end;
  1730. procedure DestroyOp(taiObj: tai; const o:Toper);
  1731. {$ifdef statedebug}
  1732. var
  1733. hp: tai;
  1734. {$endif statedebug}
  1735. begin
  1736. case o.typ Of
  1737. top_reg:
  1738. begin
  1739. {$ifdef statedebug}
  1740. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1741. hp.next := taiobj.next;
  1742. hp.previous := taiobj;
  1743. taiobj.next := hp;
  1744. if assigned(hp.next) then
  1745. hp.next.previous := hp;
  1746. {$endif statedebug}
  1747. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1748. end;
  1749. top_ref:
  1750. begin
  1751. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1752. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1753. end;
  1754. end;
  1755. end;
  1756. procedure AddInstr2RegContents({$ifdef statedebug} asml: taasmoutput; {$endif}
  1757. p: taicpu; supreg: tsuperregister);
  1758. {$ifdef statedebug}
  1759. var
  1760. hp: tai;
  1761. {$endif statedebug}
  1762. begin
  1763. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1764. if (typ in [con_ref,con_noRemoveRef]) then
  1765. begin
  1766. incState(wstate,1);
  1767. { also store how many instructions are part of the sequence in the first }
  1768. { instructions ptaiprop, so it can be easily accessed from within }
  1769. { CheckSequence}
  1770. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1771. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1772. NrOfInstrSinceLastMod[supreg] := 0;
  1773. invalidateDependingRegs(p.optinfo,supreg);
  1774. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1775. {$ifdef StateDebug}
  1776. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1777. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1778. InsertLLItem(AsmL, p, p.next, hp);
  1779. {$endif StateDebug}
  1780. end
  1781. else
  1782. begin
  1783. {$ifdef statedebug}
  1784. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1785. insertllitem(asml,p,p.next,hp);
  1786. {$endif statedebug}
  1787. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1788. {$ifdef StateDebug}
  1789. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1790. InsertLLItem(AsmL, p, p.next, hp);
  1791. {$endif StateDebug}
  1792. end
  1793. end;
  1794. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAAsmoutput; {$endif}
  1795. p: taicpu; const oper: TOper);
  1796. begin
  1797. if oper.typ = top_reg then
  1798. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1799. else
  1800. begin
  1801. ReadOp(ptaiprop(p.optinfo), oper);
  1802. DestroyOp(p, oper);
  1803. end
  1804. end;
  1805. {*************************************************************************************}
  1806. {************************************** TDFAOBJ **************************************}
  1807. {*************************************************************************************}
  1808. constructor tdfaobj.create(_list: taasmoutput);
  1809. begin
  1810. list := _list;
  1811. blockstart := nil;
  1812. blockend := nil;
  1813. nroftaiobjs := 0;
  1814. taipropblock := nil;
  1815. lolab := 0;
  1816. hilab := 0;
  1817. labdif := 0;
  1818. labeltable := nil;
  1819. end;
  1820. procedure tdfaobj.initlabeltable;
  1821. var
  1822. labelfound: boolean;
  1823. p, prev: tai;
  1824. hp1, hp2: tai;
  1825. {$ifdef i386}
  1826. regcounter,
  1827. supreg : tsuperregister;
  1828. {$endif i386}
  1829. usedregs, nodeallocregs: tregset;
  1830. begin
  1831. labelfound := false;
  1832. lolab := maxlongint;
  1833. hilab := 0;
  1834. p := blockstart;
  1835. prev := p;
  1836. while assigned(p) do
  1837. begin
  1838. if (tai(p).typ = ait_label) then
  1839. if not labelcanbeskipped(tai_label(p)) then
  1840. begin
  1841. labelfound := true;
  1842. if (tai_Label(p).l.labelnr < lolab) then
  1843. lolab := tai_label(p).l.labelnr;
  1844. if (tai_Label(p).l.labelnr > hilab) then
  1845. hilab := tai_label(p).l.labelnr;
  1846. end;
  1847. prev := p;
  1848. getnextinstruction(p, p);
  1849. end;
  1850. if (prev.typ = ait_marker) and
  1851. (tai_marker(prev).kind = asmblockstart) then
  1852. blockend := prev
  1853. else blockend := nil;
  1854. if labelfound then
  1855. labdif := hilab+1-lolab
  1856. else labdif := 0;
  1857. usedregs := [];
  1858. if (labdif <> 0) then
  1859. begin
  1860. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1861. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1862. end;
  1863. p := blockstart;
  1864. prev := p;
  1865. while (p <> blockend) do
  1866. begin
  1867. case p.typ of
  1868. ait_label:
  1869. if not labelcanbeskipped(tai_label(p)) then
  1870. labeltable^[tai_label(p).l.labelnr-lolab].taiobj := p;
  1871. {$ifdef i386}
  1872. ait_regalloc:
  1873. begin
  1874. supreg:=getsupreg(tai_regalloc(p).reg);
  1875. case tai_regalloc(p).ratype of
  1876. ra_alloc :
  1877. begin
  1878. if not(supreg in usedregs) then
  1879. include(usedregs, supreg)
  1880. else
  1881. begin
  1882. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1883. hp1 := tai(p.previous);
  1884. list.remove(p);
  1885. p.free;
  1886. p := hp1;
  1887. end;
  1888. end;
  1889. ra_dealloc :
  1890. begin
  1891. exclude(usedregs, supreg);
  1892. hp1 := p;
  1893. hp2 := nil;
  1894. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1895. getnextinstruction(hp1, hp1) and
  1896. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1897. hp2 := hp1;
  1898. if hp2 <> nil then
  1899. begin
  1900. hp1 := tai(p.previous);
  1901. list.remove(p);
  1902. insertllitem(list, hp2, tai(hp2.next), p);
  1903. p := hp1;
  1904. end
  1905. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1906. and getnextinstruction(p,hp1) then
  1907. begin
  1908. hp1 := tai(p.previous);
  1909. list.remove(p);
  1910. p.free;
  1911. p := hp1;
  1912. // don't include here, since then the allocation will be removed when it's processed
  1913. // include(usedregs,supreg);
  1914. end;
  1915. end;
  1916. end;
  1917. end;
  1918. {$endif i386}
  1919. end;
  1920. repeat
  1921. prev := p;
  1922. p := tai(p.next);
  1923. until not(assigned(p)) or
  1924. (p = blockend) or
  1925. not(p.typ in (skipinstr - [ait_regalloc]));
  1926. end;
  1927. {$ifdef i386}
  1928. { don't add deallocation for function result variable or for regvars}
  1929. getNoDeallocRegs(noDeallocRegs);
  1930. usedRegs := usedRegs - noDeallocRegs;
  1931. for regCounter := RS_EAX to RS_EDI do
  1932. if regCounter in usedRegs then
  1933. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1934. {$endif i386}
  1935. end;
  1936. function tdfaobj.pass_1(_blockstart: tai): tai;
  1937. begin
  1938. blockstart := _blockstart;
  1939. initlabeltable;
  1940. pass_1 := blockend;
  1941. end;
  1942. function tdfaobj.initdfapass2: boolean;
  1943. {reserves memory for the PtaiProps in one big memory block when not using
  1944. TP, returns False if not enough memory is available for the optimizer in all
  1945. cases}
  1946. var
  1947. p: tai;
  1948. count: Longint;
  1949. { TmpStr: String; }
  1950. begin
  1951. p := blockstart;
  1952. skiphead(p);
  1953. nroftaiobjs := 0;
  1954. while (p <> blockend) do
  1955. begin
  1956. {$ifDef JumpAnal}
  1957. case p.typ of
  1958. ait_label:
  1959. begin
  1960. if not labelcanbeskipped(tai_label(p)) then
  1961. labeltable^[tai_label(p).l.labelnr-lolab].instrnr := nroftaiobjs
  1962. end;
  1963. ait_instruction:
  1964. begin
  1965. if taicpu(p).is_jmp then
  1966. begin
  1967. if (tasmlabel(taicpu(p).oper[0]^.sym).labelnr >= lolab) and
  1968. (tasmlabel(taicpu(p).oper[0]^.sym).labelnr <= hilab) then
  1969. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-lolab].refsfound);
  1970. end;
  1971. end;
  1972. { ait_instruction:
  1973. begin
  1974. if (taicpu(p).opcode = A_PUSH) and
  1975. (taicpu(p).oper[0]^.typ = top_symbol) and
  1976. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  1977. begin
  1978. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  1979. if}
  1980. end;
  1981. {$endif JumpAnal}
  1982. inc(NrOftaiObjs);
  1983. getnextinstruction(p,p);
  1984. end;
  1985. if nroftaiobjs <> 0 then
  1986. begin
  1987. initdfapass2 := True;
  1988. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  1989. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  1990. p := blockstart;
  1991. skiphead(p);
  1992. for count := 1 To nroftaiobjs do
  1993. begin
  1994. ptaiprop(p.optinfo) := @taipropblock^[count];
  1995. getnextinstruction(p, p);
  1996. end;
  1997. end
  1998. else
  1999. initdfapass2 := false;
  2000. end;
  2001. procedure tdfaobj.dodfapass2;
  2002. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2003. contents for the instructions starting with p. Returns the last tai which has
  2004. been processed}
  2005. var
  2006. curprop, LastFlagsChangeProp: ptaiprop;
  2007. Cnt, InstrCnt : Longint;
  2008. InstrProp: TInsProp;
  2009. UsedRegs: TRegSet;
  2010. prev,p : tai;
  2011. tmpref: TReference;
  2012. tmpsupreg: tsuperregister;
  2013. {$ifdef statedebug}
  2014. hp : tai;
  2015. {$endif}
  2016. {$ifdef AnalyzeLoops}
  2017. hp : tai;
  2018. TmpState: Byte;
  2019. {$endif AnalyzeLoops}
  2020. begin
  2021. p := BlockStart;
  2022. LastFlagsChangeProp := nil;
  2023. prev := nil;
  2024. UsedRegs := [];
  2025. UpdateUsedregs(UsedRegs, p);
  2026. SkipHead(p);
  2027. BlockStart := p;
  2028. InstrCnt := 1;
  2029. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2030. while (p <> Blockend) Do
  2031. begin
  2032. curprop := @taiPropBlock^[InstrCnt];
  2033. if assigned(prev)
  2034. then
  2035. begin
  2036. {$ifdef JumpAnal}
  2037. if (p.Typ <> ait_label) then
  2038. {$endif JumpAnal}
  2039. begin
  2040. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2041. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2042. curprop^.FlagsUsed := false;
  2043. end
  2044. end
  2045. else
  2046. begin
  2047. fillchar(curprop^, SizeOf(curprop^), 0);
  2048. { For tmpreg := RS_EAX to RS_EDI Do
  2049. curprop^.regs[tmpreg].WState := 1;}
  2050. end;
  2051. curprop^.UsedRegs := UsedRegs;
  2052. curprop^.CanBeRemoved := False;
  2053. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2054. For tmpsupreg := RS_EAX To RS_EDI Do
  2055. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2056. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2057. else
  2058. begin
  2059. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2060. curprop^.regs[tmpsupreg].typ := con_unknown;
  2061. end;
  2062. case p.typ Of
  2063. ait_marker:;
  2064. ait_label:
  2065. {$ifndef JumpAnal}
  2066. if not labelCanBeSkipped(tai_label(p)) then
  2067. DestroyAllRegs(curprop,false,false);
  2068. {$else JumpAnal}
  2069. begin
  2070. if not labelCanBeSkipped(tai_label(p)) then
  2071. With LTable^[tai_Label(p).l^.labelnr-LoLab] Do
  2072. {$ifDef AnalyzeLoops}
  2073. if (RefsFound = tai_Label(p).l^.RefCount)
  2074. {$else AnalyzeLoops}
  2075. if (JmpsProcessed = tai_Label(p).l^.RefCount)
  2076. {$endif AnalyzeLoops}
  2077. then
  2078. {all jumps to this label have been found}
  2079. {$ifDef AnalyzeLoops}
  2080. if (JmpsProcessed > 0)
  2081. then
  2082. {$endif AnalyzeLoops}
  2083. {we've processed at least one jump to this label}
  2084. begin
  2085. if (GetLastInstruction(p, hp) and
  2086. not(((hp.typ = ait_instruction)) and
  2087. (taicpu_labeled(hp).is_jmp))
  2088. then
  2089. {previous instruction not a JMP -> the contents of the registers after the
  2090. previous intruction has been executed have to be taken into account as well}
  2091. For tmpsupreg := RS_EAX to RS_EDI Do
  2092. begin
  2093. if (curprop^.regs[tmpsupreg].WState <>
  2094. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2095. then DestroyReg(curprop, tmpsupreg, true)
  2096. end
  2097. end
  2098. {$ifDef AnalyzeLoops}
  2099. else
  2100. {a label from a backward jump (e.g. a loop), no jump to this label has
  2101. already been processed}
  2102. if GetLastInstruction(p, hp) and
  2103. not(hp.typ = ait_instruction) and
  2104. (taicpu_labeled(hp).opcode = A_JMP))
  2105. then
  2106. {previous instruction not a jmp, so keep all the registers' contents from the
  2107. previous instruction}
  2108. begin
  2109. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2110. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2111. end
  2112. else
  2113. {previous instruction a jmp and no jump to this label processed yet}
  2114. begin
  2115. hp := p;
  2116. Cnt := InstrCnt;
  2117. {continue until we find a jump to the label or a label which has already
  2118. been processed}
  2119. while GetNextInstruction(hp, hp) and
  2120. not((hp.typ = ait_instruction) and
  2121. (taicpu(hp).is_jmp) and
  2122. (tasmlabel(taicpu(hp).oper[0]^.sym).labelnr = tai_Label(p).l^.labelnr)) and
  2123. not((hp.typ = ait_label) and
  2124. (LTable^[tai_Label(hp).l^.labelnr-LoLab].RefsFound
  2125. = tai_Label(hp).l^.RefCount) and
  2126. (LTable^[tai_Label(hp).l^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2127. inc(Cnt);
  2128. if (hp.typ = ait_label)
  2129. then
  2130. {there's a processed label after the current one}
  2131. begin
  2132. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2133. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2134. end
  2135. else
  2136. {there's no label anymore after the current one, or they haven't been
  2137. processed yet}
  2138. begin
  2139. GetLastInstruction(p, hp);
  2140. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2141. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2142. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2143. end
  2144. end
  2145. {$endif AnalyzeLoops}
  2146. else
  2147. {not all references to this label have been found, so destroy all registers}
  2148. begin
  2149. GetLastInstruction(p, hp);
  2150. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2151. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2152. DestroyAllRegs(curprop,true,true)
  2153. end;
  2154. end;
  2155. {$endif JumpAnal}
  2156. {$ifdef GDB}
  2157. ait_stabs, ait_stabn, ait_stab_function_name:;
  2158. {$endif GDB}
  2159. ait_align: ; { may destroy flags !!! }
  2160. ait_instruction:
  2161. begin
  2162. if taicpu(p).is_jmp or
  2163. (taicpu(p).opcode = A_JMP) then
  2164. begin
  2165. {$ifNDef JumpAnal}
  2166. for tmpsupreg := RS_EAX to RS_EDI do
  2167. with curprop^.regs[tmpsupreg] do
  2168. case typ of
  2169. con_ref: typ := con_noRemoveRef;
  2170. con_const: typ := con_noRemoveConst;
  2171. con_invalid: typ := con_unknown;
  2172. end;
  2173. {$else JumpAnal}
  2174. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labelnr-LoLab] Do
  2175. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2176. begin
  2177. if (InstrCnt < InstrNr)
  2178. then
  2179. {forward jump}
  2180. if (JmpsProcessed = 0) then
  2181. {no jump to this label has been processed yet}
  2182. begin
  2183. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2184. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2185. inc(JmpsProcessed);
  2186. end
  2187. else
  2188. begin
  2189. For tmpreg := RS_EAX to RS_EDI Do
  2190. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2191. curprop^.regs[tmpreg].WState) then
  2192. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2193. inc(JmpsProcessed);
  2194. end
  2195. {$ifdef AnalyzeLoops}
  2196. else
  2197. { backward jump, a loop for example}
  2198. { if (JmpsProcessed > 0) or
  2199. not(GetLastInstruction(taiObj, hp) and
  2200. (hp.typ = ait_labeled_instruction) and
  2201. (taicpu_labeled(hp).opcode = A_JMP))
  2202. then}
  2203. {instruction prior to label is not a jmp, or at least one jump to the label
  2204. has yet been processed}
  2205. begin
  2206. inc(JmpsProcessed);
  2207. For tmpreg := RS_EAX to RS_EDI Do
  2208. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2209. curprop^.regs[tmpreg].WState)
  2210. then
  2211. begin
  2212. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2213. Cnt := InstrNr;
  2214. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2215. begin
  2216. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2217. inc(Cnt);
  2218. end;
  2219. while (Cnt <= InstrCnt) Do
  2220. begin
  2221. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2222. inc(Cnt)
  2223. end
  2224. end;
  2225. end
  2226. { else }
  2227. {instruction prior to label is a jmp and no jumps to the label have yet been
  2228. processed}
  2229. { begin
  2230. inc(JmpsProcessed);
  2231. For tmpreg := RS_EAX to RS_EDI Do
  2232. begin
  2233. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2234. Cnt := InstrNr;
  2235. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2236. begin
  2237. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2238. inc(Cnt);
  2239. end;
  2240. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2241. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2242. begin
  2243. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2244. inc(Cnt);
  2245. end;
  2246. while (Cnt <= InstrCnt) Do
  2247. begin
  2248. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2249. inc(Cnt)
  2250. end
  2251. end
  2252. end}
  2253. {$endif AnalyzeLoops}
  2254. end;
  2255. {$endif JumpAnal}
  2256. end
  2257. else
  2258. begin
  2259. InstrProp := InsProp[taicpu(p).opcode];
  2260. case taicpu(p).opcode Of
  2261. A_MOV, A_MOVZX, A_MOVSX:
  2262. begin
  2263. case taicpu(p).oper[0]^.typ Of
  2264. top_ref, top_reg:
  2265. case taicpu(p).oper[1]^.typ Of
  2266. top_reg:
  2267. begin
  2268. {$ifdef statedebug}
  2269. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2270. insertllitem(list,p,p.next,hp);
  2271. {$endif statedebug}
  2272. readOp(curprop, taicpu(p).oper[0]^);
  2273. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2274. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2275. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2276. begin
  2277. with curprop^.regs[tmpsupreg] Do
  2278. begin
  2279. incState(wstate,1);
  2280. { also store how many instructions are part of the sequence in the first }
  2281. { instruction's ptaiprop, so it can be easily accessed from within }
  2282. { CheckSequence }
  2283. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2284. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2285. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2286. { Destroy the contents of the registers }
  2287. { that depended on the previous value of }
  2288. { this register }
  2289. invalidateDependingRegs(curprop,tmpsupreg);
  2290. curprop^.regs[tmpsupreg].memwrite := nil;
  2291. end;
  2292. end
  2293. else
  2294. begin
  2295. {$ifdef statedebug}
  2296. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2297. insertllitem(list,p,p.next,hp);
  2298. {$endif statedebug}
  2299. destroyReg(curprop, tmpsupreg, true);
  2300. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2301. with curprop^.regs[tmpsupreg] Do
  2302. begin
  2303. typ := con_ref;
  2304. startmod := p;
  2305. nrOfMods := 1;
  2306. end
  2307. end;
  2308. {$ifdef StateDebug}
  2309. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2310. insertllitem(list,p,p.next,hp);
  2311. {$endif StateDebug}
  2312. end;
  2313. top_ref:
  2314. begin
  2315. readref(curprop, taicpu(p).oper[1]^.ref);
  2316. if taicpu(p).oper[0]^.typ = top_reg then
  2317. begin
  2318. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2319. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2320. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2321. taicpu(p);
  2322. end
  2323. else
  2324. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2325. end;
  2326. end;
  2327. top_Const:
  2328. begin
  2329. case taicpu(p).oper[1]^.typ Of
  2330. top_reg:
  2331. begin
  2332. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2333. {$ifdef statedebug}
  2334. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2335. insertllitem(list,p,p.next,hp);
  2336. {$endif statedebug}
  2337. With curprop^.regs[tmpsupreg] Do
  2338. begin
  2339. DestroyReg(curprop, tmpsupreg, true);
  2340. typ := Con_Const;
  2341. StartMod := p;
  2342. end
  2343. end;
  2344. top_ref:
  2345. begin
  2346. readref(curprop, taicpu(p).oper[1]^.ref);
  2347. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2348. end;
  2349. end;
  2350. end;
  2351. end;
  2352. end;
  2353. A_DIV, A_IDIV, A_MUL:
  2354. begin
  2355. ReadOp(curprop, taicpu(p).oper[0]^);
  2356. readreg(curprop,RS_EAX);
  2357. if (taicpu(p).OpCode = A_IDIV) or
  2358. (taicpu(p).OpCode = A_DIV) then
  2359. begin
  2360. readreg(curprop,RS_EDX);
  2361. end;
  2362. {$ifdef statedebug}
  2363. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2364. insertllitem(list,p,p.next,hp);
  2365. {$endif statedebug}
  2366. { DestroyReg(curprop, RS_EAX, true);}
  2367. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2368. taicpu(p), RS_EAX);
  2369. DestroyReg(curprop, RS_EDX, true);
  2370. LastFlagsChangeProp := curprop;
  2371. end;
  2372. A_IMUL:
  2373. begin
  2374. ReadOp(curprop,taicpu(p).oper[0]^);
  2375. if (taicpu(p).ops >= 2) then
  2376. ReadOp(curprop,taicpu(p).oper[1]^);
  2377. if (taicpu(p).ops <= 2) then
  2378. if (taicpu(p).oper[1]^.typ = top_none) then
  2379. begin
  2380. readreg(curprop,RS_EAX);
  2381. {$ifdef statedebug}
  2382. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2383. insertllitem(list,p,p.next,hp);
  2384. {$endif statedebug}
  2385. { DestroyReg(curprop, RS_EAX, true); }
  2386. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2387. taicpu(p), RS_EAX);
  2388. DestroyReg(curprop,RS_EDX, true)
  2389. end
  2390. else
  2391. AddInstr2OpContents(
  2392. {$ifdef statedebug}list,{$endif}
  2393. taicpu(p), taicpu(p).oper[1]^)
  2394. else
  2395. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2396. taicpu(p), taicpu(p).oper[2]^);
  2397. LastFlagsChangeProp := curprop;
  2398. end;
  2399. A_LEA:
  2400. begin
  2401. readop(curprop,taicpu(p).oper[0]^);
  2402. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2403. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2404. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2405. else
  2406. begin
  2407. {$ifdef statedebug}
  2408. hp := tai_comment.Create(strpnew('destroying & initing'+
  2409. std_regname(taicpu(p).oper[1]^.reg)));
  2410. insertllitem(list,p,p.next,hp);
  2411. {$endif statedebug}
  2412. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2413. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2414. begin
  2415. typ := con_ref;
  2416. startmod := p;
  2417. nrOfMods := 1;
  2418. end
  2419. end;
  2420. end;
  2421. else
  2422. begin
  2423. Cnt := 1;
  2424. while (Cnt <= maxinschanges) and
  2425. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2426. begin
  2427. case InstrProp.Ch[Cnt] Of
  2428. Ch_REAX..Ch_REDI:
  2429. begin
  2430. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2431. readreg(curprop,tmpsupreg);
  2432. end;
  2433. Ch_WEAX..Ch_RWEDI:
  2434. begin
  2435. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2436. begin
  2437. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2438. readreg(curprop,tmpsupreg);
  2439. end;
  2440. {$ifdef statedebug}
  2441. hp := tai_comment.Create(strpnew('destroying '+
  2442. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2443. insertllitem(list,p,p.next,hp);
  2444. {$endif statedebug}
  2445. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2446. DestroyReg(curprop,tmpsupreg, true);
  2447. end;
  2448. Ch_MEAX..Ch_MEDI:
  2449. begin
  2450. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2451. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2452. taicpu(p),tmpsupreg);
  2453. end;
  2454. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2455. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2456. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2457. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2458. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2459. Ch_Wop1..Ch_RWop1:
  2460. begin
  2461. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2462. ReadOp(curprop, taicpu(p).oper[0]^);
  2463. DestroyOp(p, taicpu(p).oper[0]^);
  2464. end;
  2465. Ch_Mop1:
  2466. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2467. taicpu(p), taicpu(p).oper[0]^);
  2468. Ch_Wop2..Ch_RWop2:
  2469. begin
  2470. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2471. ReadOp(curprop, taicpu(p).oper[1]^);
  2472. DestroyOp(p, taicpu(p).oper[1]^);
  2473. end;
  2474. Ch_Mop2:
  2475. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2476. taicpu(p), taicpu(p).oper[1]^);
  2477. Ch_WOp3..Ch_RWOp3:
  2478. begin
  2479. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2480. ReadOp(curprop, taicpu(p).oper[2]^);
  2481. DestroyOp(p, taicpu(p).oper[2]^);
  2482. end;
  2483. Ch_Mop3:
  2484. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2485. taicpu(p), taicpu(p).oper[2]^);
  2486. Ch_WMemEDI:
  2487. begin
  2488. readreg(curprop, RS_EDI);
  2489. fillchar(tmpref, SizeOf(tmpref), 0);
  2490. tmpref.base := NR_EDI;
  2491. tmpref.index := NR_EDI;
  2492. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2493. end;
  2494. Ch_RFlags:
  2495. if assigned(LastFlagsChangeProp) then
  2496. LastFlagsChangeProp^.FlagsUsed := true;
  2497. Ch_WFlags:
  2498. LastFlagsChangeProp := curprop;
  2499. Ch_RWFlags:
  2500. begin
  2501. if assigned(LastFlagsChangeProp) then
  2502. LastFlagsChangeProp^.FlagsUsed := true;
  2503. LastFlagsChangeProp := curprop;
  2504. end;
  2505. Ch_FPU:;
  2506. else
  2507. begin
  2508. {$ifdef statedebug}
  2509. hp := tai_comment.Create(strpnew(
  2510. 'destroying all regs for prev instruction'));
  2511. insertllitem(list,p, p.next,hp);
  2512. {$endif statedebug}
  2513. DestroyAllRegs(curprop,true,true);
  2514. LastFlagsChangeProp := curprop;
  2515. end;
  2516. end;
  2517. inc(Cnt);
  2518. end
  2519. end;
  2520. end;
  2521. end;
  2522. end
  2523. else
  2524. begin
  2525. {$ifdef statedebug}
  2526. hp := tai_comment.Create(strpnew(
  2527. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2528. insertllitem(list,p, p.next,hp);
  2529. {$endif statedebug}
  2530. DestroyAllRegs(curprop,true,true);
  2531. end;
  2532. end;
  2533. inc(InstrCnt);
  2534. prev := p;
  2535. GetNextInstruction(p, p);
  2536. end;
  2537. end;
  2538. function tdfaobj.pass_2: boolean;
  2539. begin
  2540. if initdfapass2 then
  2541. begin
  2542. dodfapass2;
  2543. pass_2 := true
  2544. end
  2545. else
  2546. pass_2 := false;
  2547. end;
  2548. {$ifopt r+}
  2549. {$define rangewason}
  2550. {$r-}
  2551. {$endif}
  2552. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2553. begin
  2554. if (sym.labelnr >= lolab) and
  2555. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2556. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2557. else
  2558. getlabelwithsym := nil;
  2559. end;
  2560. {$ifdef rangewason}
  2561. {$r+}
  2562. {$undef rangewason}
  2563. {$endif}
  2564. procedure tdfaobj.clear;
  2565. begin
  2566. if labdif <> 0 then
  2567. begin
  2568. freemem(labeltable);
  2569. labeltable := nil;
  2570. end;
  2571. if assigned(taipropblock) then
  2572. begin
  2573. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2574. taipropblock := nil;
  2575. end;
  2576. end;
  2577. end.