cgcpu.pas 63 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815
  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  40. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  41. procedure a_call_ref(list : TAsmList;ref: treference);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);override;
  74. procedure g_stackpointer_alloc(list : TAsmList;size : longint);override;
  75. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  76. procedure a_adjust_sp(list: TAsmList; value: longint);
  77. function GetLoad(const ref : treference) : tasmop;
  78. function GetStore(const ref: treference): tasmop;
  79. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister); override;
  80. protected
  81. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  82. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  83. end;
  84. tcg64favr = class(tcg64f32)
  85. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  86. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  87. end;
  88. procedure create_codegen;
  89. const
  90. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  91. A_NONE,A_MUL,A_MULS,A_NEG,A_COM,A_OR,
  92. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  93. implementation
  94. uses
  95. globals,verbose,systems,cutils,
  96. fmodule,
  97. symconst,symsym,
  98. tgobj,rgobj,
  99. procinfo,cpupi,
  100. paramgr;
  101. procedure tcgavr.init_register_allocators;
  102. begin
  103. inherited init_register_allocators;
  104. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  105. [RS_R8,RS_R9,
  106. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17,RS_R18,RS_R19,
  107. RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  108. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7],first_int_imreg,[]);
  109. { rg[R_ADDRESSREGISTER]:=trgintcpu.create(R_ADDRESSREGISTER,R_SUBWHOLE,
  110. [RS_R26,RS_R30],first_int_imreg,[]); }
  111. end;
  112. procedure tcgavr.done_register_allocators;
  113. begin
  114. rg[R_INTREGISTER].free;
  115. // rg[R_ADDRESSREGISTER].free;
  116. inherited done_register_allocators;
  117. end;
  118. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  119. var
  120. tmp1,tmp2,tmp3 : TRegister;
  121. begin
  122. case size of
  123. OS_8,OS_S8:
  124. Result:=inherited getintregister(list, size);
  125. OS_16,OS_S16:
  126. begin
  127. Result:=inherited getintregister(list, OS_8);
  128. { ensure that the high register can be retrieved by
  129. GetNextReg
  130. }
  131. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  132. internalerror(2011021331);
  133. end;
  134. OS_32,OS_S32:
  135. begin
  136. Result:=inherited getintregister(list, OS_8);
  137. tmp1:=inherited getintregister(list, OS_8);
  138. { ensure that the high register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp1<>GetNextReg(Result) then
  142. internalerror(2011021332);
  143. tmp2:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp2<>GetNextReg(tmp1) then
  148. internalerror(2011021333);
  149. tmp3:=inherited getintregister(list, OS_8);
  150. { ensure that the upper register can be retrieved by
  151. GetNextReg
  152. }
  153. if tmp3<>GetNextReg(tmp2) then
  154. internalerror(2011021334);
  155. end;
  156. else
  157. internalerror(2011021330);
  158. end;
  159. end;
  160. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  161. begin
  162. Result:=getintregister(list,OS_ADDR);
  163. end;
  164. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  165. var
  166. ref: treference;
  167. begin
  168. paraloc.check_simple_location;
  169. paramanager.allocparaloc(list,paraloc.location);
  170. case paraloc.location^.loc of
  171. LOC_REGISTER,LOC_CREGISTER:
  172. a_load_const_reg(list,size,a,paraloc.location^.register);
  173. LOC_REFERENCE:
  174. begin
  175. reference_reset(ref,paraloc.alignment);
  176. ref.base:=paraloc.location^.reference.index;
  177. ref.offset:=paraloc.location^.reference.offset;
  178. a_load_const_ref(list,size,a,ref);
  179. end;
  180. else
  181. internalerror(2002081101);
  182. end;
  183. end;
  184. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  185. var
  186. tmpref, ref: treference;
  187. location: pcgparalocation;
  188. sizeleft: tcgint;
  189. begin
  190. location := paraloc.location;
  191. tmpref := r;
  192. sizeleft := paraloc.intsize;
  193. while assigned(location) do
  194. begin
  195. paramanager.allocparaloc(list,location);
  196. case location^.loc of
  197. LOC_REGISTER,LOC_CREGISTER:
  198. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  199. LOC_REFERENCE:
  200. begin
  201. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  202. { doubles in softemu mode have a strange order of registers and references }
  203. if location^.size=OS_32 then
  204. g_concatcopy(list,tmpref,ref,4)
  205. else
  206. begin
  207. g_concatcopy(list,tmpref,ref,sizeleft);
  208. if assigned(location^.next) then
  209. internalerror(2005010710);
  210. end;
  211. end;
  212. LOC_VOID:
  213. begin
  214. // nothing to do
  215. end;
  216. else
  217. internalerror(2002081103);
  218. end;
  219. inc(tmpref.offset,tcgsize2size[location^.size]);
  220. dec(sizeleft,tcgsize2size[location^.size]);
  221. location := location^.next;
  222. end;
  223. end;
  224. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  225. var
  226. ref: treference;
  227. tmpreg: tregister;
  228. begin
  229. paraloc.check_simple_location;
  230. paramanager.allocparaloc(list,paraloc.location);
  231. case paraloc.location^.loc of
  232. LOC_REGISTER,LOC_CREGISTER:
  233. a_loadaddr_ref_reg(list,r,paraloc.location^.register);
  234. LOC_REFERENCE:
  235. begin
  236. reference_reset(ref,paraloc.alignment);
  237. ref.base := paraloc.location^.reference.index;
  238. ref.offset := paraloc.location^.reference.offset;
  239. tmpreg := getintregister(list,OS_ADDR);
  240. a_loadaddr_ref_reg(list,r,tmpreg);
  241. a_load_reg_ref(list,OS_ADDR,OS_ADDR,tmpreg,ref);
  242. end;
  243. else
  244. internalerror(2002080701);
  245. end;
  246. end;
  247. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  248. begin
  249. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  250. {
  251. the compiler does not properly set this flag anymore in pass 1, and
  252. for now we only need it after pass 2 (I hope) (JM)
  253. if not(pi_do_call in current_procinfo.flags) then
  254. internalerror(2003060703);
  255. }
  256. include(current_procinfo.flags,pi_do_call);
  257. end;
  258. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  259. begin
  260. a_reg_alloc(list,NR_ZLO);
  261. a_reg_alloc(list,NR_ZHI);
  262. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  263. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  264. list.concat(taicpu.op_none(A_ICALL));
  265. a_reg_dealloc(list,NR_ZLO);
  266. a_reg_dealloc(list,NR_ZHI);
  267. include(current_procinfo.flags,pi_do_call);
  268. end;
  269. procedure tcgavr.a_call_ref(list : TAsmList;ref: treference);
  270. begin
  271. a_reg_alloc(list,NR_ZLO);
  272. a_reg_alloc(list,NR_ZHI);
  273. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,NR_ZLO);
  274. list.concat(taicpu.op_none(A_ICALL));
  275. a_reg_dealloc(list,NR_ZLO);
  276. a_reg_dealloc(list,NR_ZHI);
  277. include(current_procinfo.flags,pi_do_call);
  278. end;
  279. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  280. begin
  281. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  282. internalerror(2012102403);
  283. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  284. end;
  285. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  286. begin
  287. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  288. internalerror(2012102401);
  289. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  290. end;
  291. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  292. var
  293. countreg,
  294. tmpreg: tregister;
  295. i : integer;
  296. instr : taicpu;
  297. paraloc1,paraloc2,paraloc3 : TCGPara;
  298. l1,l2 : tasmlabel;
  299. procedure NextSrcDst;
  300. begin
  301. if i=5 then
  302. begin
  303. dst:=dsthi;
  304. src:=srchi;
  305. end
  306. else
  307. begin
  308. dst:=GetNextReg(dst);
  309. src:=GetNextReg(src);
  310. end;
  311. end;
  312. { iterates TmpReg through all registers of dst }
  313. procedure NextTmp;
  314. begin
  315. if i=5 then
  316. tmpreg:=dsthi
  317. else
  318. tmpreg:=GetNextReg(tmpreg);
  319. end;
  320. begin
  321. case op of
  322. OP_ADD:
  323. begin
  324. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  325. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  326. begin
  327. for i:=2 to tcgsize2size[size] do
  328. begin
  329. NextSrcDst;
  330. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  331. end;
  332. end;
  333. end;
  334. OP_SUB:
  335. begin
  336. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  337. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  338. begin
  339. for i:=2 to tcgsize2size[size] do
  340. begin
  341. NextSrcDst;
  342. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  343. end;
  344. end;
  345. end;
  346. OP_NEG:
  347. begin
  348. if src<>dst then
  349. a_load_reg_reg(list,size,size,src,dst);
  350. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  351. begin
  352. tmpreg:=GetNextReg(dst);
  353. for i:=2 to tcgsize2size[size] do
  354. begin
  355. list.concat(taicpu.op_reg(A_COM,tmpreg));
  356. NextTmp;
  357. end;
  358. list.concat(taicpu.op_reg(A_NEG,dst));
  359. tmpreg:=GetNextReg(dst);
  360. for i:=2 to tcgsize2size[size] do
  361. begin
  362. list.concat(taicpu.op_reg_const(A_SBCI,dst,-1));
  363. NextTmp;
  364. end;
  365. end;
  366. end;
  367. OP_NOT:
  368. begin
  369. for i:=1 to tcgsize2size[size] do
  370. begin
  371. if src<>dst then
  372. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  373. list.concat(taicpu.op_reg(A_COM,dst));
  374. NextSrcDst;
  375. end;
  376. end;
  377. OP_MUL,OP_IMUL:
  378. begin
  379. if size in [OS_8,OS_S8] then
  380. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src))
  381. else if size=OS_16 then
  382. begin
  383. paraloc1.init;
  384. paraloc2.init;
  385. paraloc3.init;
  386. paramanager.getintparaloc(pocall_default,1,u16inttype,paraloc1);
  387. paramanager.getintparaloc(pocall_default,2,u16inttype,paraloc2);
  388. paramanager.getintparaloc(pocall_default,3,pasbool8type,paraloc3);
  389. a_load_const_cgpara(list,OS_8,0,paraloc3);
  390. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  391. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  392. paramanager.freecgpara(list,paraloc3);
  393. paramanager.freecgpara(list,paraloc2);
  394. paramanager.freecgpara(list,paraloc1);
  395. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  396. a_call_name(list,'FPC_MUL_WORD',false);
  397. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  398. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  399. cg.a_load_reg_reg(list,OS_16,OS_16,NR_FUNCTION_RESULT_REG,dst);
  400. paraloc3.done;
  401. paraloc2.done;
  402. paraloc1.done;
  403. end
  404. else
  405. internalerror(2011022002);
  406. end;
  407. OP_DIV,OP_IDIV:
  408. { special stuff, needs separate handling inside code }
  409. { generator }
  410. internalerror(2011022001);
  411. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  412. begin
  413. current_asmdata.getjumplabel(l1);
  414. current_asmdata.getjumplabel(l2);
  415. countreg:=getintregister(list,OS_8);
  416. a_load_reg_reg(list,size,OS_8,src,countreg);
  417. list.concat(taicpu.op_reg_const(A_CP,countreg,0));
  418. a_jmp_flags(list,F_EQ,l2);
  419. cg.a_label(list,l1);
  420. case op of
  421. OP_SHR:
  422. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  423. OP_SHL:
  424. list.concat(taicpu.op_reg(A_LSL,dst));
  425. OP_SAR:
  426. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  427. OP_ROR:
  428. begin
  429. { load carry? }
  430. if not(size in [OS_8,OS_S8]) then
  431. begin
  432. list.concat(taicpu.op_none(A_CLC));
  433. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  434. list.concat(taicpu.op_none(A_SEC));
  435. end;
  436. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  437. end;
  438. OP_ROL:
  439. begin
  440. { load carry? }
  441. if not(size in [OS_8,OS_S8]) then
  442. begin
  443. list.concat(taicpu.op_none(A_CLC));
  444. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  445. list.concat(taicpu.op_none(A_SEC));
  446. end;
  447. list.concat(taicpu.op_reg(A_ROL,dst))
  448. end;
  449. else
  450. internalerror(2011030901);
  451. end;
  452. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  453. begin
  454. for i:=2 to tcgsize2size[size] do
  455. begin
  456. case op of
  457. OP_ROR,
  458. OP_SHR:
  459. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  460. OP_ROL,
  461. OP_SHL:
  462. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  463. OP_SAR:
  464. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  465. else
  466. internalerror(2011030902);
  467. end;
  468. end;
  469. end;
  470. a_op_const_reg(list,OP_SUB,OS_8,1,countreg);
  471. a_jmp_flags(list,F_NE,l1);
  472. // keep registers alive
  473. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  474. cg.a_label(list,l2);
  475. end;
  476. OP_AND,OP_OR,OP_XOR:
  477. begin
  478. for i:=1 to tcgsize2size[size] do
  479. begin
  480. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  481. NextSrcDst;
  482. end;
  483. end;
  484. else
  485. internalerror(2011022004);
  486. end;
  487. end;
  488. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  489. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  490. var
  491. mask : qword;
  492. shift : byte;
  493. i : byte;
  494. tmpreg : tregister;
  495. tmpreg64 : tregister64;
  496. procedure NextReg;
  497. begin
  498. if i=5 then
  499. reg:=reghi
  500. else
  501. reg:=GetNextReg(reg);
  502. end;
  503. begin
  504. mask:=$ff;
  505. shift:=0;
  506. case op of
  507. OP_OR:
  508. begin
  509. for i:=1 to tcgsize2size[size] do
  510. begin
  511. list.concat(taicpu.op_reg_const(A_ORI,reg,(a and mask) shr shift));
  512. NextReg;
  513. mask:=mask shl 8;
  514. inc(shift,8);
  515. end;
  516. end;
  517. OP_AND:
  518. begin
  519. for i:=1 to tcgsize2size[size] do
  520. begin
  521. list.concat(taicpu.op_reg_const(A_ANDI,reg,(a and mask) shr shift));
  522. NextReg;
  523. mask:=mask shl 8;
  524. inc(shift,8);
  525. end;
  526. end;
  527. OP_SUB:
  528. begin
  529. list.concat(taicpu.op_reg_const(A_SUBI,reg,a));
  530. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  531. begin
  532. for i:=2 to tcgsize2size[size] do
  533. begin
  534. NextReg;
  535. mask:=mask shl 8;
  536. inc(shift,8);
  537. list.concat(taicpu.op_reg_const(A_SBCI,reg,(a and mask) shr shift));
  538. end;
  539. end;
  540. end;
  541. else
  542. begin
  543. if size in [OS_64,OS_S64] then
  544. begin
  545. tmpreg64.reglo:=getintregister(list,OS_32);
  546. tmpreg64.reghi:=getintregister(list,OS_32);
  547. cg64.a_load64_const_reg(list,a,tmpreg64);
  548. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  549. end
  550. else
  551. begin
  552. tmpreg:=getintregister(list,size);
  553. a_load_const_reg(list,size,a,tmpreg);
  554. a_op_reg_reg(list,op,size,tmpreg,reg);
  555. end;
  556. end;
  557. end;
  558. end;
  559. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  560. var
  561. mask : qword;
  562. shift : byte;
  563. i : byte;
  564. begin
  565. mask:=$ff;
  566. shift:=0;
  567. for i:=1 to tcgsize2size[size] do
  568. begin
  569. if ((qword(a) and mask) shr shift)=0 then
  570. emit_mov(list,reg,NR_R1)
  571. else
  572. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  573. mask:=mask shl 8;
  574. inc(shift,8);
  575. reg:=GetNextReg(reg);
  576. end;
  577. end;
  578. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  579. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  580. begin
  581. { allocate the register only, if a cpu register is passed }
  582. if getsupreg(reg)<first_int_imreg then
  583. getcpuregister(list,reg);
  584. end;
  585. var
  586. tmpref : treference;
  587. l : tasmlabel;
  588. begin
  589. Result:=ref;
  590. if ref.addressmode<>AM_UNCHANGED then
  591. internalerror(2011021701);
  592. { Be sure to have a base register }
  593. if (ref.base=NR_NO) then
  594. begin
  595. { only symbol+offset? }
  596. if ref.index=NR_NO then
  597. exit;
  598. ref.base:=ref.index;
  599. ref.index:=NR_NO;
  600. end;
  601. if assigned(ref.symbol) or (ref.offset<>0) then
  602. begin
  603. reference_reset(tmpref,0);
  604. tmpref.symbol:=ref.symbol;
  605. tmpref.offset:=ref.offset;
  606. tmpref.refaddr:=addr_lo8;
  607. maybegetcpuregister(list,tmpreg);
  608. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  609. tmpref.refaddr:=addr_hi8;
  610. maybegetcpuregister(list,GetNextReg(tmpreg));
  611. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  612. if (ref.base<>NR_NO) then
  613. begin
  614. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  615. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  616. end;
  617. if (ref.index<>NR_NO) then
  618. begin
  619. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  620. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  621. end;
  622. ref.symbol:=nil;
  623. ref.offset:=0;
  624. ref.base:=tmpreg;
  625. ref.index:=NR_NO;
  626. end
  627. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  628. begin
  629. maybegetcpuregister(list,tmpreg);
  630. emit_mov(list,tmpreg,ref.index);
  631. maybegetcpuregister(list,GetNextReg(tmpreg));
  632. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  633. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  634. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  635. ref.base:=tmpreg;
  636. ref.index:=NR_NO;
  637. end
  638. else if (ref.base<>NR_NO) then
  639. begin
  640. maybegetcpuregister(list,tmpreg);
  641. emit_mov(list,tmpreg,ref.base);
  642. maybegetcpuregister(list,GetNextReg(tmpreg));
  643. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  644. ref.base:=tmpreg;
  645. ref.index:=NR_NO;
  646. end
  647. else if (ref.index<>NR_NO) then
  648. begin
  649. maybegetcpuregister(list,tmpreg);
  650. emit_mov(list,tmpreg,ref.index);
  651. maybegetcpuregister(list,GetNextReg(tmpreg));
  652. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  653. ref.base:=tmpreg;
  654. ref.index:=NR_NO;
  655. end;
  656. Result:=ref;
  657. end;
  658. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  659. var
  660. href : treference;
  661. conv_done: boolean;
  662. tmpreg : tregister;
  663. i : integer;
  664. QuickRef : Boolean;
  665. begin
  666. QuickRef:=false;
  667. if not((Ref.addressmode=AM_UNCHANGED) and
  668. (Ref.symbol=nil) and
  669. ((Ref.base=NR_R28) or
  670. (Ref.base=NR_R29)) and
  671. (Ref.Index=NR_No) and
  672. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  673. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  674. href:=normalize_ref(list,Ref,NR_R30)
  675. else
  676. begin
  677. QuickRef:=true;
  678. href:=Ref;
  679. end;
  680. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  681. internalerror(2011021307);
  682. conv_done:=false;
  683. if tosize<>fromsize then
  684. begin
  685. conv_done:=true;
  686. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  687. fromsize:=tosize;
  688. case fromsize of
  689. OS_8:
  690. begin
  691. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  692. href.addressmode:=AM_POSTINCREMENT;
  693. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  694. for i:=2 to tcgsize2size[tosize] do
  695. begin
  696. if QuickRef then
  697. inc(href.offset);
  698. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  699. href.addressmode:=AM_POSTINCREMENT
  700. else
  701. href.addressmode:=AM_UNCHANGED;
  702. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  703. end;
  704. end;
  705. OS_S8:
  706. begin
  707. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  708. href.addressmode:=AM_POSTINCREMENT;
  709. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  710. if tcgsize2size[tosize]>1 then
  711. begin
  712. tmpreg:=getintregister(list,OS_8);
  713. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  714. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  715. list.concat(taicpu.op_reg(A_COM,tmpreg));
  716. for i:=2 to tcgsize2size[tosize] do
  717. begin
  718. if QuickRef then
  719. inc(href.offset);
  720. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  721. href.addressmode:=AM_POSTINCREMENT
  722. else
  723. href.addressmode:=AM_UNCHANGED;
  724. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  725. end;
  726. end;
  727. end;
  728. OS_16:
  729. begin
  730. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  731. href.addressmode:=AM_POSTINCREMENT;
  732. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  733. if QuickRef then
  734. inc(href.offset)
  735. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  736. href.addressmode:=AM_POSTINCREMENT
  737. else
  738. href.addressmode:=AM_UNCHANGED;
  739. reg:=GetNextReg(reg);
  740. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  741. for i:=3 to tcgsize2size[tosize] do
  742. begin
  743. if QuickRef then
  744. inc(href.offset);
  745. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  746. href.addressmode:=AM_POSTINCREMENT
  747. else
  748. href.addressmode:=AM_UNCHANGED;
  749. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  750. end;
  751. end;
  752. OS_S16:
  753. begin
  754. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  755. href.addressmode:=AM_POSTINCREMENT;
  756. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  757. if QuickRef then
  758. inc(href.offset)
  759. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  760. href.addressmode:=AM_POSTINCREMENT
  761. else
  762. href.addressmode:=AM_UNCHANGED;
  763. reg:=GetNextReg(reg);
  764. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  765. if tcgsize2size[tosize]>2 then
  766. begin
  767. tmpreg:=getintregister(list,OS_8);
  768. list.concat(taicpu.op_reg(A_CLR,tmpreg));
  769. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  770. list.concat(taicpu.op_reg(A_COM,tmpreg));
  771. for i:=3 to tcgsize2size[tosize] do
  772. begin
  773. if QuickRef then
  774. inc(href.offset);
  775. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  776. href.addressmode:=AM_POSTINCREMENT
  777. else
  778. href.addressmode:=AM_UNCHANGED;
  779. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  780. end;
  781. end;
  782. end;
  783. else
  784. conv_done:=false;
  785. end;
  786. end;
  787. if not conv_done then
  788. begin
  789. for i:=1 to tcgsize2size[fromsize] do
  790. begin
  791. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  792. href.addressmode:=AM_POSTINCREMENT
  793. else
  794. href.addressmode:=AM_UNCHANGED;
  795. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  796. if QuickRef then
  797. inc(href.offset);
  798. reg:=GetNextReg(reg);
  799. end;
  800. end;
  801. if not(QuickRef) then
  802. begin
  803. ungetcpuregister(list,href.base);
  804. ungetcpuregister(list,GetNextReg(href.base));
  805. end;
  806. end;
  807. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  808. const Ref : treference;reg : tregister);
  809. var
  810. href : treference;
  811. conv_done: boolean;
  812. tmpreg : tregister;
  813. i : integer;
  814. QuickRef : boolean;
  815. begin
  816. QuickRef:=false;
  817. if not((Ref.addressmode=AM_UNCHANGED) and
  818. (Ref.symbol=nil) and
  819. ((Ref.base=NR_R28) or
  820. (Ref.base=NR_R29)) and
  821. (Ref.Index=NR_No) and
  822. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  823. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  824. href:=normalize_ref(list,Ref,NR_R30)
  825. else
  826. begin
  827. QuickRef:=true;
  828. href:=Ref;
  829. end;
  830. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  831. internalerror(2011021307);
  832. conv_done:=false;
  833. if tosize<>fromsize then
  834. begin
  835. conv_done:=true;
  836. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  837. fromsize:=tosize;
  838. case fromsize of
  839. OS_8:
  840. begin
  841. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  842. for i:=2 to tcgsize2size[tosize] do
  843. begin
  844. reg:=GetNextReg(reg);
  845. list.concat(taicpu.op_reg(A_CLR,reg));
  846. end;
  847. end;
  848. OS_S8:
  849. begin
  850. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  851. tmpreg:=reg;
  852. if tcgsize2size[tosize]>1 then
  853. begin
  854. reg:=GetNextReg(reg);
  855. list.concat(taicpu.op_reg(A_CLR,reg));
  856. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  857. list.concat(taicpu.op_reg(A_COM,reg));
  858. tmpreg:=reg;
  859. for i:=3 to tcgsize2size[tosize] do
  860. begin
  861. reg:=GetNextReg(reg);
  862. emit_mov(list,reg,tmpreg);
  863. end;
  864. end;
  865. end;
  866. OS_16:
  867. begin
  868. if not(QuickRef) then
  869. href.addressmode:=AM_POSTINCREMENT;
  870. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  871. if QuickRef then
  872. inc(href.offset);
  873. href.addressmode:=AM_UNCHANGED;
  874. reg:=GetNextReg(reg);
  875. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  876. for i:=3 to tcgsize2size[tosize] do
  877. begin
  878. reg:=GetNextReg(reg);
  879. list.concat(taicpu.op_reg(A_CLR,reg));
  880. end;
  881. end;
  882. OS_S16:
  883. begin
  884. if not(QuickRef) then
  885. href.addressmode:=AM_POSTINCREMENT;
  886. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  887. if QuickRef then
  888. inc(href.offset);
  889. href.addressmode:=AM_UNCHANGED;
  890. reg:=GetNextReg(reg);
  891. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  892. tmpreg:=reg;
  893. reg:=GetNextReg(reg);
  894. list.concat(taicpu.op_reg(A_CLR,reg));
  895. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  896. list.concat(taicpu.op_reg(A_COM,reg));
  897. tmpreg:=reg;
  898. for i:=4 to tcgsize2size[tosize] do
  899. begin
  900. reg:=GetNextReg(reg);
  901. emit_mov(list,reg,tmpreg);
  902. end;
  903. end;
  904. else
  905. conv_done:=false;
  906. end;
  907. end;
  908. if not conv_done then
  909. begin
  910. for i:=1 to tcgsize2size[fromsize] do
  911. begin
  912. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  913. href.addressmode:=AM_POSTINCREMENT
  914. else
  915. href.addressmode:=AM_UNCHANGED;
  916. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  917. if QuickRef then
  918. inc(href.offset);
  919. reg:=GetNextReg(reg);
  920. end;
  921. end;
  922. if not(QuickRef) then
  923. begin
  924. ungetcpuregister(list,href.base);
  925. ungetcpuregister(list,GetNextReg(href.base));
  926. end;
  927. end;
  928. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  929. var
  930. conv_done: boolean;
  931. tmpreg : tregister;
  932. i : integer;
  933. begin
  934. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  935. internalerror(2011021310);
  936. conv_done:=false;
  937. if tosize<>fromsize then
  938. begin
  939. conv_done:=true;
  940. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  941. fromsize:=tosize;
  942. case fromsize of
  943. OS_8:
  944. begin
  945. emit_mov(list,reg2,reg1);
  946. for i:=2 to tcgsize2size[tosize] do
  947. begin
  948. reg2:=GetNextReg(reg2);
  949. list.concat(taicpu.op_reg(A_CLR,reg2));
  950. end;
  951. end;
  952. OS_S8:
  953. begin
  954. emit_mov(list,reg2,reg1);
  955. if tcgsize2size[tosize]>1 then
  956. begin
  957. reg2:=GetNextReg(reg2);
  958. list.concat(taicpu.op_reg(A_CLR,reg2));
  959. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  960. list.concat(taicpu.op_reg(A_COM,reg2));
  961. tmpreg:=reg2;
  962. for i:=3 to tcgsize2size[tosize] do
  963. begin
  964. reg2:=GetNextReg(reg2);
  965. emit_mov(list,reg2,tmpreg);
  966. end;
  967. end;
  968. end;
  969. OS_16:
  970. begin
  971. emit_mov(list,reg2,reg1);
  972. reg1:=GetNextReg(reg1);
  973. reg2:=GetNextReg(reg2);
  974. emit_mov(list,reg2,reg1);
  975. for i:=3 to tcgsize2size[tosize] do
  976. begin
  977. reg2:=GetNextReg(reg2);
  978. list.concat(taicpu.op_reg(A_CLR,reg2));
  979. end;
  980. end;
  981. OS_S16:
  982. begin
  983. emit_mov(list,reg2,reg1);
  984. reg1:=GetNextReg(reg1);
  985. reg2:=GetNextReg(reg2);
  986. emit_mov(list,reg2,reg1);
  987. if tcgsize2size[tosize]>2 then
  988. begin
  989. reg2:=GetNextReg(reg2);
  990. list.concat(taicpu.op_reg(A_CLR,reg2));
  991. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  992. list.concat(taicpu.op_reg(A_COM,reg2));
  993. tmpreg:=reg2;
  994. for i:=4 to tcgsize2size[tosize] do
  995. begin
  996. reg2:=GetNextReg(reg2);
  997. emit_mov(list,reg2,tmpreg);
  998. end;
  999. end;
  1000. end;
  1001. else
  1002. conv_done:=false;
  1003. end;
  1004. end;
  1005. if not conv_done and (reg1<>reg2) then
  1006. begin
  1007. for i:=1 to tcgsize2size[fromsize] do
  1008. begin
  1009. emit_mov(list,reg2,reg1);
  1010. reg1:=GetNextReg(reg1);
  1011. reg2:=GetNextReg(reg2);
  1012. end;
  1013. end;
  1014. end;
  1015. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1016. begin
  1017. internalerror(2012010702);
  1018. end;
  1019. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1020. begin
  1021. internalerror(2012010703);
  1022. end;
  1023. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1024. begin
  1025. internalerror(2012010704);
  1026. end;
  1027. { comparison operations }
  1028. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1029. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1030. var
  1031. swapped : boolean;
  1032. tmpreg : tregister;
  1033. i : byte;
  1034. begin
  1035. if a=0 then
  1036. begin
  1037. { swap parameters? }
  1038. case cmp_op of
  1039. OC_GT:
  1040. begin
  1041. swapped:=true;
  1042. cmp_op:=OC_LT;
  1043. end;
  1044. OC_LTE:
  1045. begin
  1046. swapped:=true;
  1047. cmp_op:=OC_GTE;
  1048. end;
  1049. OC_BE:
  1050. begin
  1051. swapped:=true;
  1052. cmp_op:=OC_AE;
  1053. end;
  1054. OC_A:
  1055. begin
  1056. swapped:=true;
  1057. cmp_op:=OC_A;
  1058. end;
  1059. end;
  1060. if swapped then
  1061. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1062. else
  1063. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1064. for i:=2 to tcgsize2size[size] do
  1065. begin
  1066. reg:=GetNextReg(reg);
  1067. if swapped then
  1068. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1069. else
  1070. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1071. end;
  1072. a_jmp_cond(list,cmp_op,l);
  1073. end
  1074. else
  1075. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1076. end;
  1077. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1078. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1079. var
  1080. swapped : boolean;
  1081. tmpreg : tregister;
  1082. i : byte;
  1083. begin
  1084. { swap parameters? }
  1085. case cmp_op of
  1086. OC_GT:
  1087. begin
  1088. swapped:=true;
  1089. cmp_op:=OC_LT;
  1090. end;
  1091. OC_LTE:
  1092. begin
  1093. swapped:=true;
  1094. cmp_op:=OC_GTE;
  1095. end;
  1096. OC_BE:
  1097. begin
  1098. swapped:=true;
  1099. cmp_op:=OC_AE;
  1100. end;
  1101. OC_A:
  1102. begin
  1103. swapped:=true;
  1104. cmp_op:=OC_A;
  1105. end;
  1106. end;
  1107. if swapped then
  1108. begin
  1109. tmpreg:=reg1;
  1110. reg1:=reg2;
  1111. reg2:=tmpreg;
  1112. end;
  1113. list.concat(taicpu.op_reg_reg(A_CP,reg1,reg2));
  1114. for i:=2 to tcgsize2size[size] do
  1115. begin
  1116. reg1:=GetNextReg(reg1);
  1117. reg2:=GetNextReg(reg2);
  1118. list.concat(taicpu.op_reg_reg(A_CPC,reg1,reg2));
  1119. end;
  1120. a_jmp_cond(list,cmp_op,l);
  1121. end;
  1122. procedure tcgavr.a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: TCGSize; src, dst: TRegister);
  1123. begin
  1124. Comment(V_Error,'tcgarm.a_bit_scan_reg_reg method not implemented');
  1125. end;
  1126. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1127. var
  1128. ai : taicpu;
  1129. begin
  1130. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s));
  1131. ai.is_jmp:=true;
  1132. list.concat(ai);
  1133. end;
  1134. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1135. var
  1136. ai : taicpu;
  1137. begin
  1138. ai:=taicpu.op_sym(A_JMP,l);
  1139. ai.is_jmp:=true;
  1140. list.concat(ai);
  1141. end;
  1142. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1143. var
  1144. ai : taicpu;
  1145. begin
  1146. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1147. ai.is_jmp:=true;
  1148. list.concat(ai);
  1149. end;
  1150. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1151. var
  1152. l : TAsmLabel;
  1153. tmpflags : TResFlags;
  1154. begin
  1155. current_asmdata.getjumplabel(l);
  1156. {
  1157. if flags_to_cond(f) then
  1158. begin
  1159. tmpflags:=f;
  1160. inverse_flags(tmpflags);
  1161. list.concat(taicpu.op_reg(A_CLR,reg));
  1162. a_jmp_flags(list,tmpflags,l);
  1163. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1164. end
  1165. else
  1166. }
  1167. begin
  1168. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1169. a_jmp_flags(list,f,l);
  1170. list.concat(taicpu.op_reg(A_CLR,reg));
  1171. end;
  1172. cg.a_label(list,l);
  1173. end;
  1174. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1175. var
  1176. i : integer;
  1177. begin
  1178. case value of
  1179. 0:
  1180. ;
  1181. -14..-1:
  1182. begin
  1183. if ((-value) mod 2)<>0 then
  1184. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1185. for i:=1 to (-value) div 2 do
  1186. list.concat(taicpu.op_const(A_RCALL,0));
  1187. end;
  1188. 1..7:
  1189. begin
  1190. for i:=1 to value do
  1191. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1192. end;
  1193. else
  1194. begin
  1195. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1196. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1197. // get SREG
  1198. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1199. // block interrupts
  1200. list.concat(taicpu.op_none(A_CLI));
  1201. // write high SP
  1202. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1203. // release interrupts
  1204. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1205. // write low SP
  1206. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1207. end;
  1208. end;
  1209. end;
  1210. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1211. begin
  1212. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1213. result:=A_LDS
  1214. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1215. result:=A_LDD
  1216. else
  1217. result:=A_LD;
  1218. end;
  1219. function tcgavr.GetStore(const ref: treference) : tasmop;
  1220. begin
  1221. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1222. result:=A_STS
  1223. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1224. result:=A_STD
  1225. else
  1226. result:=A_ST;
  1227. end;
  1228. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1229. var
  1230. regs : tcpuregisterset;
  1231. reg : tsuperregister;
  1232. begin
  1233. if not(nostackframe) then
  1234. begin
  1235. { save int registers }
  1236. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1237. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1238. regs:=regs+[RS_R28,RS_R29];
  1239. for reg:=RS_R31 downto RS_R0 do
  1240. if reg in regs then
  1241. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1242. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1243. begin
  1244. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1245. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1246. end
  1247. else
  1248. { the framepointer cannot be omitted on avr because sp
  1249. is not a register but part of the i/o map
  1250. }
  1251. internalerror(2011021901);
  1252. a_adjust_sp(list,-localsize);
  1253. end;
  1254. end;
  1255. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1256. var
  1257. regs : tcpuregisterset;
  1258. reg : TSuperRegister;
  1259. LocalSize : longint;
  1260. begin
  1261. if not(nostackframe) then
  1262. begin
  1263. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1264. begin
  1265. LocalSize:=current_procinfo.calc_stackframe_size;
  1266. a_adjust_sp(list,LocalSize);
  1267. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1268. for reg:=RS_R0 to RS_R31 do
  1269. if reg in regs then
  1270. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1271. end
  1272. else
  1273. { the framepointer cannot be omitted on avr because sp
  1274. is not a register but part of the i/o map
  1275. }
  1276. internalerror(2011021902);
  1277. end;
  1278. list.concat(taicpu.op_none(A_RET));
  1279. end;
  1280. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1281. var
  1282. tmpref : treference;
  1283. begin
  1284. if ref.addressmode<>AM_UNCHANGED then
  1285. internalerror(2011021701);
  1286. if assigned(ref.symbol) or (ref.offset<>0) then
  1287. begin
  1288. reference_reset(tmpref,0);
  1289. tmpref.symbol:=ref.symbol;
  1290. tmpref.offset:=ref.offset;
  1291. tmpref.refaddr:=addr_lo8;
  1292. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1293. tmpref.refaddr:=addr_hi8;
  1294. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1295. if (ref.base<>NR_NO) then
  1296. begin
  1297. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1298. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1299. end;
  1300. if (ref.index<>NR_NO) then
  1301. begin
  1302. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1303. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1304. end;
  1305. end
  1306. else if (ref.base<>NR_NO)then
  1307. begin
  1308. emit_mov(list,r,ref.base);
  1309. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1310. if (ref.index<>NR_NO) then
  1311. begin
  1312. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1313. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1314. end;
  1315. end
  1316. else if (ref.index<>NR_NO) then
  1317. begin
  1318. emit_mov(list,r,ref.index);
  1319. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1320. end;
  1321. end;
  1322. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1323. begin
  1324. internalerror(2011021320);
  1325. end;
  1326. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1327. var
  1328. paraloc1,paraloc2,paraloc3 : TCGPara;
  1329. begin
  1330. paraloc1.init;
  1331. paraloc2.init;
  1332. paraloc3.init;
  1333. paramanager.getintparaloc(pocall_default,1,voidpointertype,paraloc1);
  1334. paramanager.getintparaloc(pocall_default,2,voidpointertype,paraloc2);
  1335. paramanager.getintparaloc(pocall_default,3,ptrsinttype,paraloc3);
  1336. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1337. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1338. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1339. paramanager.freecgpara(list,paraloc3);
  1340. paramanager.freecgpara(list,paraloc2);
  1341. paramanager.freecgpara(list,paraloc1);
  1342. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1343. a_call_name_static(list,'FPC_MOVE');
  1344. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1345. paraloc3.done;
  1346. paraloc2.done;
  1347. paraloc1.done;
  1348. end;
  1349. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1350. var
  1351. countreg,tmpreg : tregister;
  1352. srcref,dstref : treference;
  1353. copysize,countregsize : tcgsize;
  1354. l : TAsmLabel;
  1355. i : longint;
  1356. SrcQuickRef, DestQuickRef : Boolean;
  1357. begin
  1358. if len>16 then
  1359. begin
  1360. current_asmdata.getjumplabel(l);
  1361. reference_reset(srcref,0);
  1362. reference_reset(dstref,0);
  1363. srcref.base:=NR_R30;
  1364. srcref.addressmode:=AM_POSTINCREMENT;
  1365. dstref.base:=NR_R26;
  1366. dstref.addressmode:=AM_POSTINCREMENT;
  1367. copysize:=OS_8;
  1368. if len<256 then
  1369. countregsize:=OS_8
  1370. else if len<65536 then
  1371. countregsize:=OS_16
  1372. else
  1373. internalerror(2011022007);
  1374. countreg:=getintregister(list,countregsize);
  1375. a_load_const_reg(list,countregsize,len,countreg);
  1376. a_loadaddr_ref_reg(list,source,NR_R30);
  1377. tmpreg:=getaddressregister(list);
  1378. a_loadaddr_ref_reg(list,dest,tmpreg);
  1379. { X is used for spilling code so we can load it
  1380. only by a push/pop sequence, this can be
  1381. optimized later on by the peephole optimizer
  1382. }
  1383. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1384. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1385. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1386. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1387. cg.a_label(list,l);
  1388. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1389. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1390. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1391. a_jmp_flags(list,F_NE,l);
  1392. // keep registers alive
  1393. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1394. end
  1395. else
  1396. begin
  1397. SrcQuickRef:=false;
  1398. DestQuickRef:=false;
  1399. if not((source.addressmode=AM_UNCHANGED) and
  1400. (source.symbol=nil) and
  1401. ((source.base=NR_R28) or
  1402. (source.base=NR_R29)) and
  1403. (source.Index=NR_NO) and
  1404. (source.Offset in [0..64-len])) and
  1405. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1406. srcref:=normalize_ref(list,source,NR_R30)
  1407. else
  1408. begin
  1409. SrcQuickRef:=true;
  1410. srcref:=source;
  1411. end;
  1412. if not((dest.addressmode=AM_UNCHANGED) and
  1413. (dest.symbol=nil) and
  1414. ((dest.base=NR_R28) or
  1415. (dest.base=NR_R29)) and
  1416. (dest.Index=NR_No) and
  1417. (dest.Offset in [0..64-len])) and
  1418. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1419. begin
  1420. if not(SrcQuickRef) then
  1421. begin
  1422. tmpreg:=getaddressregister(list);
  1423. dstref:=normalize_ref(list,dest,tmpreg);
  1424. { X is used for spilling code so we can load it
  1425. only by a push/pop sequence, this can be
  1426. optimized later on by the peephole optimizer
  1427. }
  1428. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1429. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1430. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1431. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1432. dstref.base:=NR_R26;
  1433. end
  1434. else
  1435. dstref:=normalize_ref(list,dest,NR_R30);
  1436. end
  1437. else
  1438. begin
  1439. DestQuickRef:=true;
  1440. dstref:=dest;
  1441. end;
  1442. for i:=1 to len do
  1443. begin
  1444. if not(SrcQuickRef) and (i<len) then
  1445. srcref.addressmode:=AM_POSTINCREMENT
  1446. else
  1447. srcref.addressmode:=AM_UNCHANGED;
  1448. if not(DestQuickRef) and (i<len) then
  1449. dstref.addressmode:=AM_POSTINCREMENT
  1450. else
  1451. dstref.addressmode:=AM_UNCHANGED;
  1452. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1453. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1454. if SrcQuickRef then
  1455. inc(srcref.offset);
  1456. if DestQuickRef then
  1457. inc(dstref.offset);
  1458. end;
  1459. if not(SrcQuickRef) then
  1460. begin
  1461. ungetcpuregister(list,srcref.base);
  1462. ungetcpuregister(list,GetNextReg(srcref.base));
  1463. end;
  1464. end;
  1465. end;
  1466. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1467. var
  1468. hl : tasmlabel;
  1469. ai : taicpu;
  1470. cond : TAsmCond;
  1471. begin
  1472. if not(cs_check_overflow in current_settings.localswitches) then
  1473. exit;
  1474. current_asmdata.getjumplabel(hl);
  1475. if not ((def.typ=pointerdef) or
  1476. ((def.typ=orddef) and
  1477. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1478. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1479. cond:=C_VC
  1480. else
  1481. cond:=C_CC;
  1482. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1483. ai.SetCondition(cond);
  1484. ai.is_jmp:=true;
  1485. list.concat(ai);
  1486. a_call_name(list,'FPC_OVERFLOW',false);
  1487. a_label(list,hl);
  1488. end;
  1489. procedure tcgavr.g_save_registers(list: TAsmList);
  1490. begin
  1491. { this is done by the entry code }
  1492. end;
  1493. procedure tcgavr.g_restore_registers(list: TAsmList);
  1494. begin
  1495. { this is done by the exit code }
  1496. end;
  1497. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1498. var
  1499. ai1,ai2 : taicpu;
  1500. hl : TAsmLabel;
  1501. begin
  1502. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1503. ai1.is_jmp:=true;
  1504. hl:=nil;
  1505. case cond of
  1506. OC_EQ:
  1507. ai1.SetCondition(C_EQ);
  1508. OC_GT:
  1509. begin
  1510. { emulate GT }
  1511. current_asmdata.getjumplabel(hl);
  1512. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1513. ai2.SetCondition(C_EQ);
  1514. ai2.is_jmp:=true;
  1515. list.concat(ai2);
  1516. ai1.SetCondition(C_GE);
  1517. end;
  1518. OC_LT:
  1519. ai1.SetCondition(C_LT);
  1520. OC_GTE:
  1521. ai1.SetCondition(C_GE);
  1522. OC_LTE:
  1523. begin
  1524. { emulate LTE }
  1525. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1526. ai2.SetCondition(C_EQ);
  1527. ai2.is_jmp:=true;
  1528. list.concat(ai2);
  1529. ai1.SetCondition(C_LT);
  1530. end;
  1531. OC_NE:
  1532. ai1.SetCondition(C_NE);
  1533. OC_BE:
  1534. begin
  1535. { emulate BE }
  1536. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1537. ai2.SetCondition(C_EQ);
  1538. ai2.is_jmp:=true;
  1539. list.concat(ai2);
  1540. ai1.SetCondition(C_LO);
  1541. end;
  1542. OC_B:
  1543. ai1.SetCondition(C_LO);
  1544. OC_AE:
  1545. ai1.SetCondition(C_SH);
  1546. OC_A:
  1547. begin
  1548. { emulate A (unsigned GT) }
  1549. current_asmdata.getjumplabel(hl);
  1550. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1551. ai2.SetCondition(C_EQ);
  1552. ai2.is_jmp:=true;
  1553. list.concat(ai2);
  1554. ai1.SetCondition(C_SH);
  1555. end;
  1556. else
  1557. internalerror(2011082501);
  1558. end;
  1559. list.concat(ai1);
  1560. if assigned(hl) then
  1561. a_label(list,hl);
  1562. end;
  1563. procedure tcgavr.g_stackpointer_alloc(list: TAsmList; size: longint);
  1564. begin
  1565. internalerror(201201071);
  1566. end;
  1567. procedure tcgavr.g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);
  1568. begin
  1569. internalerror(2011021324);
  1570. end;
  1571. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1572. var
  1573. instr: taicpu;
  1574. begin
  1575. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1576. list.Concat(instr);
  1577. { Notify the register allocator that we have written a move instruction so
  1578. it can try to eliminate it. }
  1579. add_move_instruction(instr);
  1580. end;
  1581. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1582. begin
  1583. if not(size in [OS_S64,OS_64]) then
  1584. internalerror(2012102402);
  1585. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1586. end;
  1587. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1588. begin
  1589. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1590. end;
  1591. procedure create_codegen;
  1592. begin
  1593. cg:=tcgavr.create;
  1594. cg64:=tcg64favr.create;
  1595. end;
  1596. end.