n8086add.pas 40 KB

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  1. {
  2. Copyright (c) 2000-2002 by Florian Klaempfl
  3. Code generation for add nodes on the i8086
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit n8086add;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,cpubase,nx86add;
  22. type
  23. { ti8086addnode }
  24. ti8086addnode = class(tx86addnode)
  25. function simplify(forinline: boolean) : tnode;override;
  26. function use_generic_mul32to64: boolean; override;
  27. function first_addpointer: tnode; override;
  28. function first_addhugepointer: tnode;
  29. function first_cmppointer: tnode; override;
  30. function first_cmphugepointer: tnode;
  31. function first_cmpfarpointer: tnode;
  32. procedure second_addordinal; override;
  33. procedure second_add64bit;override;
  34. procedure second_addfarpointer;
  35. procedure second_cmp64bit;override;
  36. procedure second_cmp32bit;
  37. procedure second_cmpfarpointer;
  38. procedure second_cmpordinal;override;
  39. procedure second_mul(unsigned: boolean);
  40. end;
  41. implementation
  42. uses
  43. globtype,systems,
  44. cutils,verbose,globals,constexp,pass_1,
  45. symconst,symdef,symtype,symcpu,paramgr,defutil,
  46. aasmbase,aasmtai,aasmdata,aasmcpu,
  47. cgbase,procinfo,
  48. ncal,ncon,nset,cgutils,tgobj,
  49. cga,ncgutil,cgobj,cg64f32,cgx86,
  50. hlcgobj;
  51. {*****************************************************************************
  52. simplify
  53. *****************************************************************************}
  54. function ti8086addnode.simplify(forinline: boolean): tnode;
  55. var
  56. t : tnode;
  57. lt,rt: tnodetype;
  58. rd,ld: tdef;
  59. rv,lv,v: tconstexprint;
  60. begin
  61. { load easier access variables }
  62. rd:=right.resultdef;
  63. ld:=left.resultdef;
  64. rt:=right.nodetype;
  65. lt:=left.nodetype;
  66. if (
  67. (lt = pointerconstn) and is_farpointer(ld) and
  68. is_constintnode(right) and
  69. (nodetype in [addn,subn])
  70. ) or
  71. (
  72. (rt = pointerconstn) and is_farpointer(rd) and
  73. is_constintnode(left) and
  74. (nodetype=addn)
  75. ) then
  76. begin
  77. t:=nil;
  78. { load values }
  79. case lt of
  80. ordconstn:
  81. lv:=tordconstnode(left).value;
  82. pointerconstn:
  83. lv:=tpointerconstnode(left).value;
  84. niln:
  85. lv:=0;
  86. else
  87. internalerror(2002080202);
  88. end;
  89. case rt of
  90. ordconstn:
  91. rv:=tordconstnode(right).value;
  92. pointerconstn:
  93. rv:=tpointerconstnode(right).value;
  94. niln:
  95. rv:=0;
  96. else
  97. internalerror(2002080203);
  98. end;
  99. case nodetype of
  100. addn:
  101. begin
  102. v:=lv+rv;
  103. if lt=pointerconstn then
  104. t := cpointerconstnode.create((qword(lv) and $FFFF0000) or word(qword(v)),resultdef)
  105. else if rt=pointerconstn then
  106. t := cpointerconstnode.create((qword(rv) and $FFFF0000) or word(qword(v)),resultdef)
  107. else
  108. internalerror(2014040604);
  109. end;
  110. subn:
  111. begin
  112. v:=lv-rv;
  113. if (lt=pointerconstn) then
  114. { pointer-pointer results in an integer }
  115. if (rt=pointerconstn) then
  116. begin
  117. if not(nf_has_pointerdiv in flags) then
  118. internalerror(2008030101);
  119. { todo: implement pointer-pointer as well }
  120. internalerror(2014040607);
  121. //t := cpointerconstnode.create(qword(v),resultdef);
  122. end
  123. else
  124. t := cpointerconstnode.create((qword(lv) and $FFFF0000) or word(qword(v)),resultdef)
  125. else
  126. internalerror(2014040606);
  127. end;
  128. else
  129. internalerror(2014040605);
  130. end;
  131. result:=t;
  132. exit;
  133. end
  134. else
  135. Result:=inherited simplify(forinline);
  136. end;
  137. {*****************************************************************************
  138. use_generic_mul32to64
  139. *****************************************************************************}
  140. function ti8086addnode.use_generic_mul32to64: boolean;
  141. begin
  142. result := True;
  143. end;
  144. { handles all multiplications }
  145. procedure ti8086addnode.second_addordinal;
  146. var
  147. unsigned: boolean;
  148. begin
  149. unsigned:=not(is_signed(left.resultdef)) or
  150. not(is_signed(right.resultdef));
  151. if nodetype=muln then
  152. second_mul(unsigned)
  153. else if is_farpointer(left.resultdef) xor is_farpointer(right.resultdef) then
  154. second_addfarpointer
  155. else
  156. inherited second_addordinal;
  157. end;
  158. {*****************************************************************************
  159. Add64bit
  160. *****************************************************************************}
  161. procedure ti8086addnode.second_add64bit;
  162. var
  163. op : TOpCG;
  164. op1,op2 : TAsmOp;
  165. hregister,
  166. hregister2 : tregister;
  167. hl4 : tasmlabel;
  168. mboverflow,
  169. unsigned:boolean;
  170. r:Tregister;
  171. begin
  172. pass_left_right;
  173. op1:=A_NONE;
  174. op2:=A_NONE;
  175. mboverflow:=false;
  176. unsigned:=((left.resultdef.typ=orddef) and
  177. (torddef(left.resultdef).ordtype=u64bit)) or
  178. ((right.resultdef.typ=orddef) and
  179. (torddef(right.resultdef).ordtype=u64bit));
  180. case nodetype of
  181. addn :
  182. begin
  183. op:=OP_ADD;
  184. mboverflow:=true;
  185. end;
  186. subn :
  187. begin
  188. op:=OP_SUB;
  189. op1:=A_SUB;
  190. op2:=A_SBB;
  191. mboverflow:=true;
  192. end;
  193. xorn:
  194. op:=OP_XOR;
  195. orn:
  196. op:=OP_OR;
  197. andn:
  198. op:=OP_AND;
  199. else
  200. begin
  201. { everything should be handled in pass_1 (JM) }
  202. internalerror(200109051);
  203. end;
  204. end;
  205. { left and right no register? }
  206. { then one must be demanded }
  207. if (left.location.loc<>LOC_REGISTER) then
  208. begin
  209. if (right.location.loc<>LOC_REGISTER) then
  210. begin
  211. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  212. hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  213. cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
  214. location_reset(left.location,LOC_REGISTER,left.location.size);
  215. left.location.register64.reglo:=hregister;
  216. left.location.register64.reghi:=hregister2;
  217. end
  218. else
  219. begin
  220. location_swap(left.location,right.location);
  221. toggleflag(nf_swapped);
  222. end;
  223. end;
  224. { at this point, left.location.loc should be LOC_REGISTER }
  225. if right.location.loc=LOC_REGISTER then
  226. begin
  227. { when swapped another result register }
  228. if (nodetype=subn) and (nf_swapped in flags) then
  229. begin
  230. cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
  231. left.location.register64,
  232. right.location.register64);
  233. location_swap(left.location,right.location);
  234. toggleflag(nf_swapped);
  235. end
  236. else
  237. begin
  238. cg64.a_op64_reg_reg(current_asmdata.CurrAsmList,op,location.size,
  239. right.location.register64,
  240. left.location.register64);
  241. end;
  242. end
  243. else
  244. begin
  245. { right.location<>LOC_REGISTER }
  246. if (nodetype=subn) and (nf_swapped in flags) then
  247. begin
  248. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  249. cg64.a_load64low_loc_reg(current_asmdata.CurrAsmList,right.location,r);
  250. emit_reg_reg(op1,S_W,left.location.register64.reglo,r);
  251. emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reglo),GetNextReg(r));
  252. emit_reg_reg(A_MOV,S_W,r,left.location.register64.reglo);
  253. emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reglo));
  254. cg64.a_load64high_loc_reg(current_asmdata.CurrAsmList,right.location,r);
  255. { the carry flag is still ok }
  256. emit_reg_reg(op2,S_W,left.location.register64.reghi,r);
  257. emit_reg_reg(op2,S_W,GetNextReg(left.location.register64.reghi),GetNextReg(r));
  258. emit_reg_reg(A_MOV,S_W,r,left.location.register64.reghi);
  259. emit_reg_reg(A_MOV,S_W,GetNextReg(r),GetNextReg(left.location.register64.reghi));
  260. end
  261. else
  262. begin
  263. cg64.a_op64_loc_reg(current_asmdata.CurrAsmList,op,location.size,right.location,
  264. left.location.register64);
  265. end;
  266. location_freetemp(current_asmdata.CurrAsmList,right.location);
  267. end;
  268. { only in case of overflow operations }
  269. { produce overflow code }
  270. { we must put it here directly, because sign of operation }
  271. { is in unsigned VAR!! }
  272. if mboverflow then
  273. begin
  274. if cs_check_overflow in current_settings.localswitches then
  275. begin
  276. current_asmdata.getjumplabel(hl4);
  277. if unsigned then
  278. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4)
  279. else
  280. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NO,hl4);
  281. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
  282. cg.a_label(current_asmdata.CurrAsmList,hl4);
  283. end;
  284. end;
  285. location_copy(location,left.location);
  286. end;
  287. function ti8086addnode.first_addpointer: tnode;
  288. begin
  289. if is_hugepointer(left.resultdef) or is_hugepointer(right.resultdef) then
  290. result:=first_addhugepointer
  291. else
  292. result:=inherited;
  293. end;
  294. function ti8086addnode.first_addhugepointer: tnode;
  295. var
  296. procname:string;
  297. begin
  298. result:=nil;
  299. if (nodetype=subn) and is_hugepointer(left.resultdef) and is_hugepointer(right.resultdef) then
  300. procname:='fpc_hugeptr_sub_hugeptr'
  301. else
  302. begin
  303. case nodetype of
  304. addn:
  305. procname:='fpc_hugeptr_add_longint';
  306. subn:
  307. procname:='fpc_hugeptr_sub_longint';
  308. else
  309. internalerror(2014070301);
  310. end;
  311. if cs_hugeptr_arithmetic_normalization in current_settings.localswitches then
  312. procname:=procname+'_normalized';
  313. end;
  314. if is_hugepointer(left.resultdef) then
  315. result := ccallnode.createintern(procname,
  316. ccallparanode.create(right,
  317. ccallparanode.create(left,nil)))
  318. else
  319. result := ccallnode.createintern(procname,
  320. ccallparanode.create(left,
  321. ccallparanode.create(right,nil)));
  322. left := nil;
  323. right := nil;
  324. firstpass(result);
  325. end;
  326. function ti8086addnode.first_cmppointer: tnode;
  327. begin
  328. if is_hugepointer(left.resultdef) or is_hugepointer(right.resultdef) then
  329. result:=first_cmphugepointer
  330. else if is_farpointer(left.resultdef) or is_farpointer(right.resultdef) then
  331. result:=first_cmpfarpointer
  332. else
  333. result:=inherited;
  334. end;
  335. function ti8086addnode.first_cmphugepointer: tnode;
  336. var
  337. procname:string;
  338. begin
  339. result:=nil;
  340. if not (cs_hugeptr_comparison_normalization in current_settings.localswitches) then
  341. begin
  342. expectloc:=LOC_JUMP;
  343. exit;
  344. end;
  345. case nodetype of
  346. equaln:
  347. procname:='fpc_hugeptr_cmp_normalized_e';
  348. unequaln:
  349. procname:='fpc_hugeptr_cmp_normalized_ne';
  350. ltn:
  351. procname:='fpc_hugeptr_cmp_normalized_b';
  352. lten:
  353. procname:='fpc_hugeptr_cmp_normalized_be';
  354. gtn:
  355. procname:='fpc_hugeptr_cmp_normalized_a';
  356. gten:
  357. procname:='fpc_hugeptr_cmp_normalized_ae';
  358. else
  359. internalerror(2014070401);
  360. end;
  361. result := ccallnode.createintern(procname,
  362. ccallparanode.create(right,
  363. ccallparanode.create(left,nil)));
  364. left := nil;
  365. right := nil;
  366. firstpass(result);
  367. end;
  368. function ti8086addnode.first_cmpfarpointer: tnode;
  369. begin
  370. { = and <> are handled as a 32-bit comparison }
  371. if nodetype in [equaln,unequaln] then
  372. begin
  373. result:=nil;
  374. expectloc:=LOC_JUMP;
  375. end
  376. else
  377. begin
  378. result:=nil;
  379. expectloc:=LOC_FLAGS;
  380. end;
  381. end;
  382. procedure ti8086addnode.second_addfarpointer;
  383. var
  384. tmpreg : tregister;
  385. pointernode: tnode;
  386. begin
  387. pass_left_right;
  388. force_reg_left_right(false,true);
  389. set_result_location_reg;
  390. if (left.resultdef.typ=pointerdef) and (right.resultdef.typ<>pointerdef) then
  391. pointernode:=left
  392. else if (left.resultdef.typ<>pointerdef) and (right.resultdef.typ=pointerdef) then
  393. pointernode:=right
  394. else
  395. internalerror(2014040601);
  396. if not (nodetype in [addn,subn]) then
  397. internalerror(2014040602);
  398. if nodetype=addn then
  399. begin
  400. if (right.location.loc<>LOC_CONSTANT) then
  401. begin
  402. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  403. left.location.register,right.location.register,location.register);
  404. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  405. GetNextReg(pointernode.location.register),GetNextReg(location.register));
  406. end
  407. else
  408. begin
  409. if pointernode=left then
  410. begin
  411. { farptr_reg + int_const }
  412. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  413. right.location.value,left.location.register,location.register);
  414. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  415. GetNextReg(left.location.register),GetNextReg(location.register));
  416. end
  417. else
  418. begin
  419. { int_reg + farptr_const }
  420. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  421. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
  422. right.location.value,tmpreg);
  423. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_16,
  424. left.location.register,tmpreg,location.register);
  425. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  426. GetNextReg(tmpreg),GetNextReg(location.register));
  427. end;
  428. end;
  429. end
  430. else { subtract is a special case since its not commutative }
  431. begin
  432. if (nf_swapped in flags) then
  433. swapleftright;
  434. { left can only be a pointer in this case, since (int-pointer) is not supported }
  435. if pointernode<>left then
  436. internalerror(2014040603);
  437. if left.location.loc<>LOC_CONSTANT then
  438. begin
  439. if right.location.loc<>LOC_CONSTANT then
  440. begin
  441. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  442. right.location.register,left.location.register,location.register);
  443. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  444. GetNextReg(pointernode.location.register),GetNextReg(location.register));
  445. end
  446. else
  447. begin
  448. { farptr_reg - int_const }
  449. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  450. right.location.value,left.location.register,location.register);
  451. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  452. GetNextReg(left.location.register),GetNextReg(location.register));
  453. end;
  454. end
  455. else
  456. begin
  457. { farptr_const - int_reg }
  458. tmpreg:=hlcg.getintregister(current_asmdata.CurrAsmList,resultdef);
  459. hlcg.a_load_const_reg(current_asmdata.CurrAsmList,resultdef,
  460. left.location.value,tmpreg);
  461. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_16,
  462. right.location.register,tmpreg,location.register);
  463. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_16,OS_16,
  464. GetNextReg(tmpreg),GetNextReg(location.register));
  465. end;
  466. end;
  467. end;
  468. procedure ti8086addnode.second_cmp64bit;
  469. var
  470. hregister,
  471. hregister2 : tregister;
  472. href : treference;
  473. unsigned : boolean;
  474. procedure firstjmp64bitcmp;
  475. var
  476. oldnodetype : tnodetype;
  477. begin
  478. {$ifdef OLDREGVARS}
  479. load_all_regvars(current_asmdata.CurrAsmList);
  480. {$endif OLDREGVARS}
  481. { the jump the sequence is a little bit hairy }
  482. case nodetype of
  483. ltn,gtn:
  484. begin
  485. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
  486. { cheat a little bit for the negative test }
  487. toggleflag(nf_swapped);
  488. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
  489. toggleflag(nf_swapped);
  490. end;
  491. lten,gten:
  492. begin
  493. oldnodetype:=nodetype;
  494. if nodetype=lten then
  495. nodetype:=ltn
  496. else
  497. nodetype:=gtn;
  498. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
  499. { cheat for the negative test }
  500. if nodetype=ltn then
  501. nodetype:=gtn
  502. else
  503. nodetype:=ltn;
  504. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
  505. nodetype:=oldnodetype;
  506. end;
  507. equaln:
  508. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
  509. unequaln:
  510. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
  511. end;
  512. end;
  513. procedure middlejmp64bitcmp;
  514. var
  515. oldnodetype : tnodetype;
  516. begin
  517. {$ifdef OLDREGVARS}
  518. load_all_regvars(current_asmdata.CurrAsmList);
  519. {$endif OLDREGVARS}
  520. { the jump the sequence is a little bit hairy }
  521. case nodetype of
  522. ltn,gtn:
  523. begin
  524. { the comparisaion of the low word have to be }
  525. { always unsigned! }
  526. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
  527. { cheat a little bit for the negative test }
  528. toggleflag(nf_swapped);
  529. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrFalseLabel);
  530. toggleflag(nf_swapped);
  531. end;
  532. lten,gten:
  533. begin
  534. oldnodetype:=nodetype;
  535. if nodetype=lten then
  536. nodetype:=ltn
  537. else
  538. nodetype:=gtn;
  539. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
  540. { cheat for the negative test }
  541. if nodetype=ltn then
  542. nodetype:=gtn
  543. else
  544. nodetype:=ltn;
  545. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrFalseLabel);
  546. nodetype:=oldnodetype;
  547. end;
  548. equaln:
  549. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
  550. unequaln:
  551. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
  552. end;
  553. end;
  554. procedure lastjmp64bitcmp;
  555. begin
  556. { the jump the sequence is a little bit hairy }
  557. case nodetype of
  558. ltn,gtn,lten,gten:
  559. begin
  560. { the comparisaion of the low word have to be }
  561. { always unsigned! }
  562. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
  563. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  564. end;
  565. equaln:
  566. begin
  567. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
  568. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  569. end;
  570. unequaln:
  571. begin
  572. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
  573. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  574. end;
  575. end;
  576. end;
  577. begin
  578. pass_left_right;
  579. unsigned:=((left.resultdef.typ=orddef) and
  580. (torddef(left.resultdef).ordtype=u64bit)) or
  581. ((right.resultdef.typ=orddef) and
  582. (torddef(right.resultdef).ordtype=u64bit));
  583. { left and right no register? }
  584. { then one must be demanded }
  585. if (left.location.loc<>LOC_REGISTER) then
  586. begin
  587. if (right.location.loc<>LOC_REGISTER) then
  588. begin
  589. { we can reuse a CREGISTER for comparison }
  590. if (left.location.loc<>LOC_CREGISTER) then
  591. begin
  592. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  593. hregister2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  594. cg64.a_load64_loc_reg(current_asmdata.CurrAsmList,left.location,joinreg64(hregister,hregister2));
  595. location_freetemp(current_asmdata.CurrAsmList,left.location);
  596. location_reset(left.location,LOC_REGISTER,left.location.size);
  597. left.location.register64.reglo:=hregister;
  598. left.location.register64.reghi:=hregister2;
  599. end;
  600. end
  601. else
  602. begin
  603. location_swap(left.location,right.location);
  604. toggleflag(nf_swapped);
  605. end;
  606. end;
  607. { at this point, left.location.loc should be LOC_REGISTER }
  608. if right.location.loc=LOC_REGISTER then
  609. begin
  610. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
  611. firstjmp64bitcmp;
  612. emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
  613. middlejmp64bitcmp;
  614. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
  615. middlejmp64bitcmp;
  616. emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
  617. lastjmp64bitcmp;
  618. end
  619. else
  620. begin
  621. case right.location.loc of
  622. LOC_CREGISTER :
  623. begin
  624. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reghi),GetNextReg(left.location.register64.reghi));
  625. firstjmp64bitcmp;
  626. emit_reg_reg(A_CMP,S_W,right.location.register64.reghi,left.location.register64.reghi);
  627. middlejmp64bitcmp;
  628. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register64.reglo),GetNextReg(left.location.register64.reglo));
  629. middlejmp64bitcmp;
  630. emit_reg_reg(A_CMP,S_W,right.location.register64.reglo,left.location.register64.reglo);
  631. lastjmp64bitcmp;
  632. end;
  633. LOC_CREFERENCE,
  634. LOC_REFERENCE :
  635. begin
  636. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
  637. href:=right.location.reference;
  638. inc(href.offset,6);
  639. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reghi));
  640. firstjmp64bitcmp;
  641. dec(href.offset,2);
  642. emit_ref_reg(A_CMP,S_W,href,left.location.register64.reghi);
  643. middlejmp64bitcmp;
  644. dec(href.offset,2);
  645. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register64.reglo));
  646. middlejmp64bitcmp;
  647. emit_ref_reg(A_CMP,S_W,right.location.reference,left.location.register64.reglo);
  648. lastjmp64bitcmp;
  649. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  650. location_freetemp(current_asmdata.CurrAsmList,right.location);
  651. end;
  652. LOC_CONSTANT :
  653. begin
  654. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 48) and $FFFF),GetNextReg(left.location.register64.reghi)));
  655. firstjmp64bitcmp;
  656. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 32) and $FFFF),left.location.register64.reghi));
  657. middlejmp64bitcmp;
  658. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value64 shr 16) and $FFFF),GetNextReg(left.location.register64.reglo)));
  659. middlejmp64bitcmp;
  660. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value64 and $FFFF),left.location.register64.reglo));
  661. lastjmp64bitcmp;
  662. end;
  663. else
  664. internalerror(200203282);
  665. end;
  666. end;
  667. { we have LOC_JUMP as result }
  668. location_reset(location,LOC_JUMP,OS_NO)
  669. end;
  670. procedure ti8086addnode.second_cmp32bit;
  671. var
  672. hregister : tregister;
  673. href : treference;
  674. unsigned : boolean;
  675. procedure firstjmp32bitcmp;
  676. var
  677. oldnodetype : tnodetype;
  678. begin
  679. {$ifdef OLDREGVARS}
  680. load_all_regvars(current_asmdata.CurrAsmList);
  681. {$endif OLDREGVARS}
  682. { the jump the sequence is a little bit hairy }
  683. case nodetype of
  684. ltn,gtn:
  685. begin
  686. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
  687. { cheat a little bit for the negative test }
  688. toggleflag(nf_swapped);
  689. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
  690. toggleflag(nf_swapped);
  691. end;
  692. lten,gten:
  693. begin
  694. oldnodetype:=nodetype;
  695. if nodetype=lten then
  696. nodetype:=ltn
  697. else
  698. nodetype:=gtn;
  699. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrTrueLabel);
  700. { cheat for the negative test }
  701. if nodetype=ltn then
  702. nodetype:=gtn
  703. else
  704. nodetype:=ltn;
  705. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(unsigned),current_procinfo.CurrFalseLabel);
  706. nodetype:=oldnodetype;
  707. end;
  708. equaln:
  709. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
  710. unequaln:
  711. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
  712. end;
  713. end;
  714. procedure secondjmp32bitcmp;
  715. begin
  716. { the jump the sequence is a little bit hairy }
  717. case nodetype of
  718. ltn,gtn,lten,gten:
  719. begin
  720. { the comparisaion of the low dword have to be }
  721. { always unsigned! }
  722. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags(true),current_procinfo.CurrTrueLabel);
  723. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  724. end;
  725. equaln:
  726. begin
  727. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrFalseLabel);
  728. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  729. end;
  730. unequaln:
  731. begin
  732. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_NE,current_procinfo.CurrTrueLabel);
  733. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  734. end;
  735. end;
  736. end;
  737. begin
  738. pass_left_right;
  739. unsigned:=((left.resultdef.typ=orddef) and
  740. (torddef(left.resultdef).ordtype=u32bit)) or
  741. ((right.resultdef.typ=orddef) and
  742. (torddef(right.resultdef).ordtype=u32bit)) or
  743. is_hugepointer(left.resultdef);
  744. { left and right no register? }
  745. { then one must be demanded }
  746. if (left.location.loc<>LOC_REGISTER) then
  747. begin
  748. if (right.location.loc<>LOC_REGISTER) then
  749. begin
  750. { we can reuse a CREGISTER for comparison }
  751. if (left.location.loc<>LOC_CREGISTER) then
  752. begin
  753. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  754. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
  755. location_freetemp(current_asmdata.CurrAsmList,left.location);
  756. location_reset(left.location,LOC_REGISTER,left.location.size);
  757. left.location.register:=hregister;
  758. end;
  759. end
  760. else
  761. begin
  762. location_swap(left.location,right.location);
  763. toggleflag(nf_swapped);
  764. end;
  765. end;
  766. { at this point, left.location.loc should be LOC_REGISTER }
  767. if right.location.loc=LOC_REGISTER then
  768. begin
  769. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
  770. firstjmp32bitcmp;
  771. emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
  772. secondjmp32bitcmp;
  773. end
  774. else
  775. begin
  776. case right.location.loc of
  777. LOC_CREGISTER :
  778. begin
  779. emit_reg_reg(A_CMP,S_W,GetNextReg(right.location.register),GetNextReg(left.location.register));
  780. firstjmp32bitcmp;
  781. emit_reg_reg(A_CMP,S_W,right.location.register,left.location.register);
  782. secondjmp32bitcmp;
  783. end;
  784. LOC_CREFERENCE,
  785. LOC_REFERENCE :
  786. begin
  787. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,right.location.reference);
  788. href:=right.location.reference;
  789. inc(href.offset,2);
  790. emit_ref_reg(A_CMP,S_W,href,GetNextReg(left.location.register));
  791. firstjmp32bitcmp;
  792. dec(href.offset,2);
  793. emit_ref_reg(A_CMP,S_W,href,left.location.register);
  794. secondjmp32bitcmp;
  795. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  796. location_freetemp(current_asmdata.CurrAsmList,right.location);
  797. end;
  798. LOC_CONSTANT :
  799. begin
  800. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint((right.location.value shr 16) and $FFFF),GetNextReg(left.location.register)));
  801. firstjmp32bitcmp;
  802. current_asmdata.CurrAsmList.concat(taicpu.op_const_reg(A_CMP,S_W,aint(right.location.value and $FFFF),left.location.register));
  803. secondjmp32bitcmp;
  804. end;
  805. else
  806. internalerror(200203282);
  807. end;
  808. end;
  809. { we have LOC_JUMP as result }
  810. location_reset(location,LOC_JUMP,OS_NO)
  811. end;
  812. procedure ti8086addnode.second_cmpfarpointer;
  813. begin
  814. { handle = and <> as a 32-bit comparison }
  815. if nodetype in [equaln,unequaln] then
  816. begin
  817. second_cmp32bit;
  818. exit;
  819. end;
  820. pass_left_right;
  821. { <, >, <= and >= compare the 16-bit offset only }
  822. if (right.location.loc=LOC_CONSTANT) and
  823. (left.location.loc in [LOC_REFERENCE, LOC_CREFERENCE])
  824. then
  825. begin
  826. emit_const_ref(A_CMP, S_W, word(right.location.value), left.location.reference);
  827. location_freetemp(current_asmdata.CurrAsmList,left.location);
  828. end
  829. else
  830. begin
  831. { left location is not a register? }
  832. if left.location.loc<>LOC_REGISTER then
  833. begin
  834. { if right is register then we can swap the locations }
  835. if right.location.loc=LOC_REGISTER then
  836. begin
  837. location_swap(left.location,right.location);
  838. toggleflag(nf_swapped);
  839. end
  840. else
  841. begin
  842. { maybe we can reuse a constant register when the
  843. operation is a comparison that doesn't change the
  844. value of the register }
  845. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u16inttype,true);
  846. end;
  847. end;
  848. emit_generic_code(A_CMP,OS_16,true,false,false);
  849. location_freetemp(current_asmdata.CurrAsmList,right.location);
  850. location_freetemp(current_asmdata.CurrAsmList,left.location);
  851. end;
  852. location_reset(location,LOC_FLAGS,OS_NO);
  853. location.resflags:=getresflags(true);
  854. end;
  855. procedure ti8086addnode.second_cmpordinal;
  856. begin
  857. if is_farpointer(left.resultdef) then
  858. second_cmpfarpointer
  859. else if is_32bit(left.resultdef) or is_hugepointer(left.resultdef) then
  860. second_cmp32bit
  861. else
  862. inherited second_cmpordinal;
  863. end;
  864. {*****************************************************************************
  865. x86 MUL
  866. *****************************************************************************}
  867. procedure ti8086addnode.second_mul(unsigned: boolean);
  868. var reg:Tregister;
  869. ref:Treference;
  870. use_ref:boolean;
  871. hl4 : tasmlabel;
  872. const
  873. asmops: array[boolean] of tasmop = (A_IMUL, A_MUL);
  874. begin
  875. reg:=NR_NO;
  876. reference_reset(ref,sizeof(pint));
  877. pass_left_right;
  878. { MUL is faster than IMUL on the 8086 & 8088 (and equal in speed on 286+),
  879. but it's only safe to use in place of IMUL when overflow checking is off
  880. and we're doing a 16-bit>16-bit multiplication }
  881. if not (cs_check_overflow in current_settings.localswitches) and
  882. (not is_32bitint(resultdef)) then
  883. unsigned:=true;
  884. {The location.register will be filled in later (JM)}
  885. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  886. { Mul supports registers and references, so if not register/reference,
  887. load the location into a register. }
  888. use_ref:=false;
  889. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  890. reg:=left.location.register
  891. else if left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE] then
  892. begin
  893. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList,left.location.reference);
  894. ref:=left.location.reference;
  895. use_ref:=true;
  896. end
  897. else
  898. begin
  899. {LOC_CONSTANT for example.}
  900. reg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  901. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,osuinttype,left.location,reg);
  902. end;
  903. {Allocate AX.}
  904. cg.getcpuregister(current_asmdata.CurrAsmList,NR_AX);
  905. {Load the right value.}
  906. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,NR_AX);
  907. {Also allocate DX, since it is also modified by a mul (JM).}
  908. cg.getcpuregister(current_asmdata.CurrAsmList,NR_DX);
  909. if use_ref then
  910. emit_ref(asmops[unsigned],S_W,ref)
  911. else
  912. emit_reg(asmops[unsigned],S_W,reg);
  913. if (cs_check_overflow in current_settings.localswitches) and
  914. { 16->32 bit cannot overflow }
  915. (not is_32bitint(resultdef)) then
  916. begin
  917. current_asmdata.getjumplabel(hl4);
  918. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_AE,hl4);
  919. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
  920. cg.a_label(current_asmdata.CurrAsmList,hl4);
  921. end;
  922. {Free AX,DX}
  923. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_DX);
  924. if is_32bitint(resultdef) then
  925. begin
  926. {Allocate an imaginary 32-bit register, which consists of a pair of
  927. 16-bit registers and store DX:AX into it}
  928. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  929. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_DX,GetNextReg(location.register));
  930. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
  931. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
  932. end
  933. else
  934. begin
  935. {Allocate a new register and store the result in AX in it.}
  936. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  937. cg.ungetcpuregister(current_asmdata.CurrAsmList,NR_AX);
  938. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,NR_AX,location.register);
  939. end;
  940. location_freetemp(current_asmdata.CurrAsmList,left.location);
  941. location_freetemp(current_asmdata.CurrAsmList,right.location);
  942. end;
  943. begin
  944. caddnode:=ti8086addnode;
  945. end.