popt386.pas 87 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1993-98 by Florian Klaempfl and Jonas Maebe
  4. This unit contains the peephole optimizer.
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit POpt386;
  19. Interface
  20. Uses Aasm;
  21. Procedure PeepHoleOptPass1(AsmL: PAasmOutput; BlockStart, BlockEnd: Pai);
  22. Procedure PeepHoleOptPass2(AsmL: PAasmOutput; BlockStart, BlockEnd: Pai);
  23. Implementation
  24. Uses
  25. globtype,systems,
  26. globals,verbose,hcodegen,
  27. {$ifdef finaldestdebug}
  28. cobjects,
  29. {$endif finaldestdebug}
  30. cpubase,cpuasm,DAOpt386;
  31. Function RegUsedAfterInstruction(Reg: TRegister; p: Pai; Var UsedRegs: TRegSet): Boolean;
  32. Begin
  33. UpdateUsedRegs(UsedRegs, Pai(p^.Next));
  34. RegUsedAfterInstruction := Reg in UsedRegs
  35. End;
  36. Procedure PeepHoleOptPass1(Asml: PAasmOutput; BlockStart, BlockEnd: Pai);
  37. {First pass of peepholeoptimizations}
  38. Var
  39. l : longint;
  40. p ,hp1, hp2 : pai;
  41. {$ifdef foropt}
  42. hp3, hp4: pai;
  43. {$endif foropt}
  44. TmpBool1, TmpBool2: Boolean;
  45. TmpRef: PReference;
  46. UsedRegs, TmpUsedRegs: TRegSet;
  47. Function SkipLabels(hp: Pai; var hp2: pai): boolean;
  48. {skips all labels and returns the next "real" instruction}
  49. Begin
  50. While assigned(hp^.next) and
  51. (pai(hp^.next)^.typ In SkipInstr + [ait_label,ait_align]) Do
  52. hp := pai(hp^.next);
  53. If assigned(hp^.next) Then
  54. Begin
  55. SkipLabels := True;
  56. hp2 := pai(hp^.next)
  57. End
  58. Else
  59. Begin
  60. hp2 := hp;
  61. SkipLabels := False
  62. End;
  63. End;
  64. Procedure GetFinalDestination(AsmL: PAAsmOutput; hp: paicpu);
  65. {traces sucessive jumps to their final destination and sets it, e.g.
  66. je l1 je l3
  67. <code> <code>
  68. l1: becomes l1:
  69. je l2 je l3
  70. <code> <code>
  71. l2: l2:
  72. jmp l3 jmp l3}
  73. Var p1, p2: pai;
  74. l: pasmlabel;
  75. Function FindAnyLabel(hp: pai; var l: pasmlabel): Boolean;
  76. Begin
  77. FindAnyLabel := false;
  78. While assigned(hp^.next) and
  79. (pai(hp^.next)^.typ In (SkipInstr+[ait_align])) Do
  80. hp := pai(hp^.next);
  81. If assigned(hp^.next) and
  82. (pai(hp^.next)^.typ = ait_label) Then
  83. Begin
  84. FindAnyLabel := true;
  85. l := pai_label(hp^.next)^.l;
  86. End
  87. End;
  88. Begin
  89. If (pasmlabel(hp^.oper[0].sym)^.labelnr >= LoLab) and
  90. (pasmlabel(hp^.oper[0].sym)^.labelnr <= HiLab) and {range check, a jump can go past an assembler block!}
  91. Assigned(LTable^[pasmlabel(hp^.oper[0].sym)^.labelnr-LoLab].PaiObj) Then
  92. Begin
  93. p1 := LTable^[pasmlabel(hp^.oper[0].sym)^.labelnr-LoLab].PaiObj; {the jump's destination}
  94. SkipLabels(p1,p1);
  95. If (pai(p1)^.typ = ait_instruction) and
  96. (paicpu(p1)^.is_jmp) Then
  97. If { the next instruction after the label where the jump hp arrives}
  98. { is unconditional or of the same type as hp, so continue }
  99. (paicpu(p1)^.condition in [C_None,hp^.condition]) or
  100. { the next instruction after the label where the jump hp arrives}
  101. { is the opposite of hp (so this one is never taken), but after }
  102. { that one there is a branch that will be taken, so perform a }
  103. { little hack: set p1 equal to this instruction (that's what the}
  104. { last SkipLabels is for, only works with short bool evaluation)}
  105. ((paicpu(p1)^.condition = inverse_cond[hp^.condition]) and
  106. SkipLabels(p1,p2) and
  107. (p2^.typ = ait_instruction) and
  108. (paicpu(p2)^.is_jmp) and
  109. (paicpu(p2)^.condition in [C_None,hp^.condition]) and
  110. SkipLabels(p1,p1)) Then
  111. Begin
  112. GetFinalDestination(asml, paicpu(p1));
  113. Dec(pasmlabel(hp^.oper[0].sym)^.refs);
  114. hp^.oper[0].sym:=paicpu(p1)^.oper[0].sym;
  115. inc(pasmlabel(hp^.oper[0].sym)^.refs);
  116. End
  117. Else
  118. If (paicpu(p1)^.condition = inverse_cond[hp^.condition]) then
  119. if not FindAnyLabel(p1,l) then
  120. begin
  121. {$ifdef finaldestdebug}
  122. insertllitem(asml,p1,p1^.next,new(pai_asm_comment,init(
  123. strpnew('previous label inserted'))));
  124. {$endif finaldestdebug}
  125. getlabel(l);
  126. insertllitem(asml,p1,p1^.next,new(pai_label,init(l)));
  127. dec(pasmlabel(paicpu(hp)^.oper[0].sym)^.refs);
  128. hp^.oper[0].sym := l;
  129. inc(l^.refs);
  130. { this won't work, since the new label isn't in the labeltable }
  131. { so it will fail the rangecheck. Labeltable should become a }
  132. { hashtable to support this: }
  133. { GetFinalDestination(asml, hp); }
  134. end
  135. else
  136. begin
  137. {$ifdef finaldestdebug}
  138. insertllitem(asml,p1,p1^.next,new(pai_asm_comment,init(
  139. strpnew('next label reused'))));
  140. {$endif finaldestdebug}
  141. inc(l^.refs);
  142. hp^.oper[0].sym := l;
  143. GetFinalDestination(asml, hp);
  144. end;
  145. End;
  146. End;
  147. Function DoSubAddOpt(var p: Pai): Boolean;
  148. Begin
  149. DoSubAddOpt := False;
  150. If GetLastInstruction(p, hp1) And
  151. (hp1^.typ = ait_instruction) And
  152. (Paicpu(hp1)^.opsize = Paicpu(p)^.opsize) then
  153. Case Paicpu(hp1)^.opcode Of
  154. A_DEC:
  155. If (Paicpu(hp1)^.oper[0].typ = top_reg) And
  156. (Paicpu(hp1)^.oper[0].reg = Paicpu(p)^.oper[1].reg) Then
  157. Begin
  158. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val+1);
  159. AsmL^.Remove(hp1);
  160. Dispose(hp1, Done)
  161. End;
  162. A_SUB:
  163. If (Paicpu(hp1)^.oper[0].typ = top_const) And
  164. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  165. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg) Then
  166. Begin
  167. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val+Paicpu(hp1)^.oper[0].val);
  168. AsmL^.Remove(hp1);
  169. Dispose(hp1, Done)
  170. End;
  171. A_ADD:
  172. If (Paicpu(hp1)^.oper[0].typ = top_const) And
  173. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  174. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg) Then
  175. Begin
  176. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val-Paicpu(hp1)^.oper[0].val);
  177. AsmL^.Remove(hp1);
  178. Dispose(hp1, Done);
  179. If (Paicpu(p)^.oper[0].val = 0) Then
  180. Begin
  181. hp1 := Pai(p^.next);
  182. AsmL^.Remove(p);
  183. Dispose(p, Done);
  184. If Not GetLastInstruction(hp1, p) Then
  185. p := hp1;
  186. DoSubAddOpt := True;
  187. End
  188. End;
  189. End;
  190. End;
  191. Begin
  192. P := BlockStart;
  193. UsedRegs := [];
  194. While (P <> BlockEnd) Do
  195. Begin
  196. UpDateUsedRegs(UsedRegs, Pai(p^.next));
  197. Case P^.Typ Of
  198. ait_instruction:
  199. Begin
  200. { Handle Jmp Optimizations }
  201. if Paicpu(p)^.is_jmp then
  202. begin
  203. {the following if-block removes all code between a jmp and the next label,
  204. because it can never be executed}
  205. If (paicpu(p)^.opcode = A_JMP) Then
  206. Begin
  207. While GetNextInstruction(p, hp1) and
  208. ((hp1^.typ <> ait_label) or
  209. { skip unused labels, they're not referenced anywhere }
  210. Not(Pai_Label(hp1)^.l^.is_used)) Do
  211. If (hp1^.typ <> ait_label) Then
  212. Begin
  213. AsmL^.Remove(hp1);
  214. Dispose(hp1, done);
  215. End;
  216. End;
  217. If GetNextInstruction(p, hp1) then
  218. Begin
  219. if FindLabel(pasmlabel(paicpu(p)^.oper[0].sym), hp1) then
  220. Begin
  221. hp2:=pai(hp1^.next);
  222. asml^.remove(p);
  223. dispose(p,done);
  224. p:=hp2;
  225. continue;
  226. end
  227. Else
  228. Begin
  229. if hp1^.typ = ait_label then
  230. SkipLabels(hp1,hp1);
  231. If (pai(hp1)^.typ=ait_instruction) and
  232. (paicpu(hp1)^.opcode=A_JMP) and
  233. GetNextInstruction(hp1, hp2) And
  234. FindLabel(PAsmLabel(paicpu(p)^.oper[0].sym), hp2)
  235. Then
  236. Begin
  237. if paicpu(p)^.opcode=A_Jcc then
  238. paicpu(p)^.condition:=inverse_cond[paicpu(p)^.condition]
  239. else
  240. begin
  241. If (LabDif <> 0) Then
  242. GetFinalDestination(asml, paicpu(p));
  243. p:=pai(p^.next);
  244. continue;
  245. end;
  246. Dec(pai_label(hp2)^.l^.refs);
  247. paicpu(p)^.oper[0].sym:=paicpu(hp1)^.oper[0].sym;
  248. Inc(paicpu(p)^.oper[0].sym^.refs);
  249. asml^.remove(hp1);
  250. dispose(hp1,done);
  251. If (LabDif <> 0) Then
  252. GetFinalDestination(asml, paicpu(p));
  253. end
  254. else
  255. If (LabDif <> 0) Then
  256. GetFinalDestination(asml, paicpu(p));
  257. end;
  258. end
  259. end
  260. else
  261. { All other optimizes }
  262. begin
  263. For l := 0 to 2 Do
  264. If (Paicpu(p)^.oper[l].typ = top_ref) Then
  265. With Paicpu(p)^.oper[l].ref^ Do
  266. Begin
  267. If (base = R_NO) And
  268. (index <> R_NO) And
  269. (scalefactor in [0,1])
  270. Then
  271. Begin
  272. base := index;
  273. index := R_NO
  274. End
  275. End;
  276. Case Paicpu(p)^.opcode Of
  277. A_AND:
  278. Begin
  279. If (Paicpu(p)^.oper[0].typ = top_const) And
  280. (Paicpu(p)^.oper[1].typ = top_reg) And
  281. GetNextInstruction(p, hp1) And
  282. (Pai(hp1)^.typ = ait_instruction) And
  283. (Paicpu(hp1)^.opcode = A_AND) And
  284. (Paicpu(hp1)^.oper[0].typ = top_const) And
  285. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  286. (Paicpu(hp1)^.oper[1].reg = Paicpu(hp1)^.oper[1].reg)
  287. Then
  288. {change "and const1, reg; and const2, reg" to "and (const1 and const2), reg"}
  289. Begin
  290. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val And Paicpu(hp1)^.oper[0].val);
  291. AsmL^.Remove(hp1);
  292. Dispose(hp1, Done)
  293. End
  294. Else
  295. {change "and x, reg; jxx" to "test x, reg", if reg is deallocated before the
  296. jump}
  297. If (Paicpu(p)^.oper[1].typ = top_reg) And
  298. GetNextInstruction(p, hp1) And
  299. (hp1^.typ = ait_instruction) And
  300. (Paicpu(hp1)^.is_jmp) and
  301. Not(Paicpu(p)^.oper[1].reg in UsedRegs) Then
  302. Paicpu(p)^.opcode := A_TEST;
  303. End;
  304. A_CMP:
  305. Begin
  306. If (Paicpu(p)^.oper[0].typ = top_const) And
  307. (Paicpu(p)^.oper[1].typ in [top_reg,top_ref]) And
  308. (Paicpu(p)^.oper[0].val = 0) Then
  309. {$ifdef foropt}
  310. If GetNextInstruction(p, hp1) And
  311. (hp1^.typ = ait_instruction) And
  312. (Paicpu(hp1)^.is_jmp) and
  313. (paicpu(hp1)^.opcode=A_Jcc) and
  314. (paicpu(hp1)^.condition in [C_LE,C_BE]) and
  315. GetNextInstruction(hp1,hp2) and
  316. (hp2^.typ = ait_instruction) and
  317. (Paicpu(hp2)^.opcode = A_DEC) And
  318. OpsEqual(Paicpu(hp2)^.oper[0],Paicpu(p)^.oper[1]) And
  319. GetNextInstruction(hp2, hp3) And
  320. (hp3^.typ = ait_instruction) and
  321. (Paicpu(hp3)^.is_jmp) and
  322. (Paicpu(hp3)^.opcode = A_JMP) And
  323. GetNextInstruction(hp3, hp4) And
  324. FindLabel(PAsmLabel(paicpu(hp1)^.oper[0].sym),hp4)
  325. Then
  326. Begin
  327. Paicpu(hp2)^.Opcode := A_SUB;
  328. Paicpu(hp2)^.Loadoper(1,Paicpu(hp2)^.oper[0]);
  329. Paicpu(hp2)^.LoadConst(0,1);
  330. Paicpu(hp2)^.ops:=2;
  331. Paicpu(hp3)^.Opcode := A_Jcc;
  332. Case paicpu(hp1)^.condition of
  333. C_LE: Paicpu(hp3)^.condition := C_GE;
  334. C_BE: Paicpu(hp3)^.condition := C_AE;
  335. End;
  336. AsmL^.Remove(p);
  337. AsmL^.Remove(hp1);
  338. Dispose(p, Done);
  339. Dispose(hp1, Done);
  340. p := hp2;
  341. continue;
  342. End
  343. Else
  344. {$endif foropt}
  345. {change "cmp $0, %reg" to "test %reg, %reg"}
  346. If (Paicpu(p)^.oper[1].typ = top_reg) Then
  347. Begin
  348. Paicpu(p)^.opcode := A_TEST;
  349. Paicpu(p)^.loadreg(0,Paicpu(p)^.oper[1].reg);
  350. End;
  351. End;
  352. A_FLD:
  353. Begin
  354. If (Paicpu(p)^.oper[0].typ = top_reg) And
  355. GetNextInstruction(p, hp1) And
  356. (hp1^.typ = Ait_Instruction) And
  357. (Paicpu(hp1)^.oper[0].typ = top_reg) And
  358. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  359. (Paicpu(hp1)^.oper[0].reg = R_ST) And
  360. (Paicpu(hp1)^.oper[1].reg = R_ST1) Then
  361. { change to
  362. fld reg fxxx reg,st
  363. fxxxp st, st1 (hp1)
  364. Remark: non commutative operations must be reversed!
  365. }
  366. begin
  367. Case Paicpu(hp1)^.opcode Of
  368. A_FMULP,A_FADDP,
  369. A_FSUBP,A_FDIVP,A_FSUBRP,A_FDIVRP:
  370. begin
  371. Case Paicpu(hp1)^.opcode Of
  372. A_FADDP: Paicpu(hp1)^.opcode := A_FADD;
  373. A_FMULP: Paicpu(hp1)^.opcode := A_FMUL;
  374. A_FSUBP: Paicpu(hp1)^.opcode := A_FSUBR;
  375. A_FSUBRP: Paicpu(hp1)^.opcode := A_FSUB;
  376. A_FDIVP: Paicpu(hp1)^.opcode := A_FDIVR;
  377. A_FDIVRP: Paicpu(hp1)^.opcode := A_FDIV;
  378. End;
  379. Paicpu(hp1)^.oper[0].reg := Paicpu(p)^.oper[0].reg;
  380. Paicpu(hp1)^.oper[1].reg := R_ST;
  381. AsmL^.Remove(p);
  382. Dispose(p, Done);
  383. p := hp1;
  384. Continue;
  385. end;
  386. end;
  387. end
  388. else
  389. If (Paicpu(p)^.oper[0].typ = top_ref) And
  390. GetNextInstruction(p, hp2) And
  391. (hp2^.typ = Ait_Instruction) And
  392. (Paicpu(hp2)^.oper[0].typ = top_reg) And
  393. (Paicpu(hp2)^.oper[1].typ = top_reg) And
  394. (Paicpu(p)^.opsize in [S_FS, S_FL]) And
  395. (Paicpu(hp2)^.oper[0].reg = R_ST) And
  396. (Paicpu(hp2)^.oper[1].reg = R_ST1) Then
  397. If GetLastInstruction(p, hp1) And
  398. (hp1^.typ = Ait_Instruction) And
  399. ((Paicpu(hp1)^.opcode = A_FLD) Or
  400. (Paicpu(hp1)^.opcode = A_FST)) And
  401. (Paicpu(hp1)^.opsize = Paicpu(p)^.opsize) And
  402. (Paicpu(hp1)^.oper[0].typ = top_ref) And
  403. RefsEqual(Paicpu(p)^.oper[0].ref^, Paicpu(hp1)^.oper[0].ref^) Then
  404. If ((Paicpu(hp2)^.opcode = A_FMULP) Or
  405. (Paicpu(hp2)^.opcode = A_FADDP)) Then
  406. { change to
  407. fld/fst mem1 (hp1) fld/fst mem1
  408. fld mem1 (p) fadd/
  409. faddp/ fmul st, st
  410. fmulp st, st1 (hp2) }
  411. Begin
  412. AsmL^.Remove(p);
  413. Dispose(p, Done);
  414. p := hp1;
  415. If (Paicpu(hp2)^.opcode = A_FADDP) Then
  416. Paicpu(hp2)^.opcode := A_FADD
  417. Else
  418. Paicpu(hp2)^.opcode := A_FMUL;
  419. Paicpu(hp2)^.oper[1].reg := R_ST;
  420. End
  421. Else
  422. { change to
  423. fld/fst mem1 (hp1) fld/fst mem1
  424. fld mem1 (p) fld st}
  425. Begin
  426. Paicpu(p)^.changeopsize(S_FL);
  427. Paicpu(p)^.loadreg(0,R_ST);
  428. End
  429. Else
  430. Begin
  431. Case Paicpu(hp2)^.opcode Of
  432. A_FMULP,A_FADDP,A_FSUBP,A_FDIVP,A_FSUBRP,A_FDIVRP:
  433. { change to
  434. fld/fst mem1 (hp1) fld/fst mem1
  435. fld mem2 (p) fxxx mem2
  436. fxxxp st, st1 (hp2) }
  437. Begin
  438. Case Paicpu(hp2)^.opcode Of
  439. A_FADDP: Paicpu(p)^.opcode := A_FADD;
  440. A_FMULP: Paicpu(p)^.opcode := A_FMUL;
  441. A_FSUBP: Paicpu(p)^.opcode := A_FSUBR;
  442. A_FSUBRP: Paicpu(p)^.opcode := A_FSUB;
  443. A_FDIVP: Paicpu(p)^.opcode := A_FDIVR;
  444. A_FDIVRP: Paicpu(p)^.opcode := A_FDIV;
  445. End;
  446. AsmL^.Remove(hp2);
  447. Dispose(hp2, Done)
  448. End
  449. End
  450. End
  451. End;
  452. A_FSTP,A_FISTP:
  453. Begin
  454. If (Paicpu(p)^.oper[0].typ = top_ref) And
  455. GetNextInstruction(p, hp1) And
  456. (Pai(hp1)^.typ = ait_instruction) And
  457. (((Paicpu(hp1)^.opcode = A_FLD) And
  458. (Paicpu(p)^.opcode = A_FSTP)) Or
  459. ((Paicpu(p)^.opcode = A_FISTP) And
  460. (Paicpu(hp1)^.opcode = A_FILD))) And
  461. (Paicpu(hp1)^.oper[0].typ = top_ref) And
  462. (Paicpu(hp1)^.opsize = Paicpu(p)^.opsize) And
  463. RefsEqual(Paicpu(p)^.oper[0].ref^, Paicpu(hp1)^.oper[0].ref^)
  464. Then
  465. Begin
  466. If GetNextInstruction(hp1, hp2) And
  467. (hp2^.typ = ait_instruction) And
  468. ((Paicpu(hp2)^.opcode = A_LEAVE) Or
  469. (Paicpu(hp2)^.opcode = A_RET)) And
  470. (Paicpu(p)^.oper[0].ref^.Base = procinfo^.FramePointer) And
  471. (Paicpu(p)^.oper[0].ref^.Offset >= procinfo^.RetOffset) And
  472. (Paicpu(p)^.oper[0].ref^.Index = R_NO)
  473. Then
  474. Begin
  475. AsmL^.Remove(p);
  476. AsmL^.Remove(hp1);
  477. Dispose(p, Done);
  478. Dispose(hp1, Done);
  479. p := hp2;
  480. Continue
  481. End
  482. Else
  483. {fst can't store an extended value!}
  484. If (Paicpu(p)^.opsize <> S_FX) And
  485. (Paicpu(p)^.opsize <> S_IQ) Then
  486. Begin
  487. If (Paicpu(p)^.opcode = A_FSTP) Then
  488. Paicpu(p)^.opcode := A_FST
  489. Else Paicpu(p)^.opcode := A_FIST;
  490. AsmL^.Remove(hp1);
  491. Dispose(hp1, done)
  492. End
  493. End;
  494. End;
  495. A_IMUL:
  496. {changes certain "imul const, %reg"'s to lea sequences}
  497. Begin
  498. If (Paicpu(p)^.oper[0].typ = Top_Const) And
  499. (Paicpu(p)^.oper[1].typ = Top_Reg) And
  500. (Paicpu(p)^.opsize = S_L) Then
  501. If (Paicpu(p)^.oper[0].val = 1) Then
  502. If (Paicpu(p)^.oper[2].typ = Top_None) Then
  503. {remove "imul $1, reg"}
  504. Begin
  505. hp1 := Pai(p^.Next);
  506. AsmL^.Remove(p);
  507. Dispose(p, Done);
  508. p := hp1;
  509. Continue;
  510. End
  511. Else
  512. {change "imul $1, reg1, reg2" to "mov reg1, reg2"}
  513. Begin
  514. hp1 := New(Paicpu, Op_Reg_Reg(A_MOV, S_L, Paicpu(p)^.oper[1].reg,Paicpu(p)^.oper[2].reg));
  515. hp1^.fileinfo := p^.fileinfo;
  516. InsertLLItem(AsmL, p^.previous, p^.next, hp1);
  517. Dispose(p, Done);
  518. p := hp1;
  519. End
  520. Else If
  521. ((Paicpu(p)^.oper[2].typ = Top_Reg) or
  522. (Paicpu(p)^.oper[2].typ = Top_None)) And
  523. (aktoptprocessor < ClassP6) And
  524. (Paicpu(p)^.oper[0].val <= 12) And
  525. Not(CS_LittleSize in aktglobalswitches) And
  526. (Not(GetNextInstruction(p, hp1)) Or
  527. {GetNextInstruction(p, hp1) And}
  528. Not((Pai(hp1)^.typ = ait_instruction) And
  529. ((paicpu(hp1)^.opcode=A_Jcc) and
  530. (paicpu(hp1)^.condition in [C_O,C_NO]))))
  531. Then
  532. Begin
  533. New(TmpRef);
  534. Reset_reference(tmpref^);
  535. Case Paicpu(p)^.oper[0].val Of
  536. 3: Begin
  537. {imul 3, reg1, reg2 to
  538. lea (reg1,reg1,2), reg2
  539. imul 3, reg1 to
  540. lea (reg1,reg1,2), reg1}
  541. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  542. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  543. TmpRef^.ScaleFactor := 2;
  544. If (Paicpu(p)^.oper[2].typ = Top_None) Then
  545. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg))
  546. Else
  547. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg));
  548. hp1^.fileinfo := p^.fileinfo;
  549. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  550. Dispose(p, Done);
  551. p := hp1;
  552. End;
  553. 5: Begin
  554. {imul 5, reg1, reg2 to
  555. lea (reg1,reg1,4), reg2
  556. imul 5, reg1 to
  557. lea (reg1,reg1,4), reg1}
  558. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  559. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  560. TmpRef^.ScaleFactor := 4;
  561. If (Paicpu(p)^.oper[2].typ = Top_None) Then
  562. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg))
  563. Else
  564. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg));
  565. hp1^.fileinfo:= p^.fileinfo;
  566. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  567. Dispose(p, Done);
  568. p := hp1;
  569. End;
  570. 6: Begin
  571. {imul 6, reg1, reg2 to
  572. lea (,reg1,2), reg2
  573. lea (reg2,reg1,4), reg2
  574. imul 6, reg1 to
  575. lea (reg1,reg1,2), reg1
  576. add reg1, reg1}
  577. If (aktoptprocessor <= Class386)
  578. Then
  579. Begin
  580. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  581. If (Paicpu(p)^.oper[2].typ = Top_Reg)
  582. Then
  583. Begin
  584. TmpRef^.base := Paicpu(p)^.oper[2].reg;
  585. TmpRef^.ScaleFactor := 4;
  586. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg));
  587. End
  588. Else
  589. Begin
  590. Dispose(TmpRef);
  591. hp1 := New(Paicpu, op_reg_reg(A_ADD, S_L,
  592. Paicpu(p)^.oper[1].reg,Paicpu(p)^.oper[1].reg));
  593. End;
  594. hp1^.fileinfo := p^.fileinfo;
  595. InsertLLItem(AsmL,p, p^.next, hp1);
  596. New(TmpRef);
  597. Reset_reference(tmpref^);
  598. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  599. TmpRef^.ScaleFactor := 2;
  600. If (Paicpu(p)^.oper[2].typ = Top_Reg)
  601. Then
  602. Begin
  603. TmpRef^.base := R_NO;
  604. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef,
  605. Paicpu(p)^.oper[2].reg));
  606. End
  607. Else
  608. Begin
  609. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  610. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg));
  611. End;
  612. hp1^.fileinfo := p^.fileinfo;
  613. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  614. Dispose(p, Done);
  615. p := Pai(hp1^.next);
  616. End
  617. Else Dispose(TmpRef);
  618. End;
  619. 9: Begin
  620. {imul 9, reg1, reg2 to
  621. lea (reg1,reg1,8), reg2
  622. imul 9, reg1 to
  623. lea (reg1,reg1,8), reg1}
  624. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  625. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  626. TmpRef^.ScaleFactor := 8;
  627. If (Paicpu(p)^.oper[2].typ = Top_None) Then
  628. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg))
  629. Else
  630. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg));
  631. hp1^.fileinfo := p^.fileinfo;
  632. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  633. Dispose(p, Done);
  634. p := hp1;
  635. End;
  636. 10: Begin
  637. {imul 10, reg1, reg2 to
  638. lea (reg1,reg1,4), reg2
  639. add reg2, reg2
  640. imul 10, reg1 to
  641. lea (reg1,reg1,4), reg1
  642. add reg1, reg1}
  643. If (aktoptprocessor <= Class386) Then
  644. Begin
  645. If (Paicpu(p)^.oper[2].typ = Top_Reg) Then
  646. hp1 := New(Paicpu, op_reg_reg(A_ADD, S_L,
  647. Paicpu(p)^.oper[2].reg,Paicpu(p)^.oper[2].reg))
  648. Else
  649. hp1 := New(Paicpu, op_reg_reg(A_ADD, S_L,
  650. Paicpu(p)^.oper[1].reg,Paicpu(p)^.oper[1].reg));
  651. hp1^.fileinfo := p^.fileinfo;
  652. InsertLLItem(AsmL,p, p^.next, hp1);
  653. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  654. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  655. TmpRef^.ScaleFactor := 4;
  656. If (Paicpu(p)^.oper[2].typ = Top_Reg)
  657. Then
  658. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg))
  659. Else
  660. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg));
  661. hp1^.fileinfo := p^.fileinfo;
  662. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  663. Dispose(p, Done);
  664. p := Pai(hp1^.next);
  665. End
  666. Else Dispose(TmpRef);
  667. End;
  668. 12: Begin
  669. {imul 12, reg1, reg2 to
  670. lea (,reg1,4), reg2
  671. lea (,reg1,8) reg2
  672. imul 12, reg1 to
  673. lea (reg1,reg1,2), reg1
  674. lea (,reg1,4), reg1}
  675. If (aktoptprocessor <= Class386)
  676. Then
  677. Begin
  678. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  679. If (Paicpu(p)^.oper[2].typ = Top_Reg) Then
  680. Begin
  681. TmpRef^.base := Paicpu(p)^.oper[2].reg;
  682. TmpRef^.ScaleFactor := 8;
  683. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg));
  684. End
  685. Else
  686. Begin
  687. TmpRef^.base := R_NO;
  688. TmpRef^.ScaleFactor := 4;
  689. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg));
  690. End;
  691. hp1^.fileinfo := p^.fileinfo;
  692. InsertLLItem(AsmL,p, p^.next, hp1);
  693. New(TmpRef);
  694. Reset_reference(tmpref^);
  695. TmpRef^.Index := Paicpu(p)^.oper[1].reg;
  696. If (Paicpu(p)^.oper[2].typ = Top_Reg) Then
  697. Begin
  698. TmpRef^.base := R_NO;
  699. TmpRef^.ScaleFactor := 4;
  700. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[2].reg));
  701. End
  702. Else
  703. Begin
  704. TmpRef^.base := Paicpu(p)^.oper[1].reg;
  705. TmpRef^.ScaleFactor := 2;
  706. hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef, Paicpu(p)^.oper[1].reg));
  707. End;
  708. hp1^.fileinfo := p^.fileinfo;
  709. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  710. Dispose(p, Done);
  711. p := Pai(hp1^.next);
  712. End
  713. Else Dispose(TmpRef);
  714. End
  715. Else Dispose(TmpRef);
  716. End;
  717. End;
  718. End;
  719. A_LEA:
  720. Begin
  721. {removes seg register prefixes from LEA operations, as they
  722. don't do anything}
  723. Paicpu(p)^.oper[0].ref^.Segment := R_NO;
  724. {changes "lea (%reg1), %reg2" into "mov %reg1, %reg2"}
  725. If (Paicpu(p)^.oper[0].ref^.Base In [R_EAX..R_EDI]) And
  726. (Paicpu(p)^.oper[0].ref^.Index = R_NO) And
  727. (Paicpu(p)^.oper[0].ref^.Offset = 0) And
  728. (Not(Assigned(Paicpu(p)^.oper[0].ref^.Symbol))) Then
  729. If (Paicpu(p)^.oper[0].ref^.Base <> Paicpu(p)^.oper[1].reg)
  730. Then
  731. Begin
  732. hp1 := New(Paicpu, op_reg_reg(A_MOV, S_L,Paicpu(p)^.oper[0].ref^.Base,
  733. Paicpu(p)^.oper[1].reg));
  734. hp1^.fileinfo := p^.fileinfo;
  735. InsertLLItem(AsmL,p^.previous,p^.next, hp1);
  736. Dispose(p, Done);
  737. p := hp1;
  738. Continue;
  739. End
  740. Else
  741. Begin
  742. hp1 := Pai(p^.Next);
  743. AsmL^.Remove(p);
  744. Dispose(p, Done);
  745. p := hp1;
  746. Continue;
  747. End;
  748. End;
  749. A_MOV:
  750. Begin
  751. TmpUsedRegs := UsedRegs;
  752. If (Paicpu(p)^.oper[1].typ = top_reg) And
  753. (Paicpu(p)^.oper[1].reg In [R_EAX, R_EBX, R_EDX, R_EDI]) And
  754. GetNextInstruction(p, hp1) And
  755. (Pai(hp1)^.typ = ait_instruction) And
  756. (Paicpu(hp1)^.opcode = A_MOV) And
  757. (Paicpu(hp1)^.oper[0].typ = top_reg) And
  758. (Paicpu(hp1)^.oper[0].reg = Paicpu(p)^.oper[1].reg)
  759. Then
  760. {we have "mov x, %treg; mov %treg, y}
  761. If not(RegUsedAfterInstruction(Paicpu(p)^.oper[1].reg, hp1, TmpUsedRegs)) then
  762. {we've got "mov x, %treg; mov %treg, y; with %treg is not used after }
  763. Case Paicpu(p)^.oper[0].typ Of
  764. top_reg:
  765. Begin
  766. { change "mov %reg, %treg; mov %treg, y"
  767. to "mov %reg, y" }
  768. Paicpu(hp1)^.LoadOper(0,Paicpu(p)^.oper[0]);
  769. AsmL^.Remove(p);
  770. Dispose(p, Done);
  771. p := hp1;
  772. continue;
  773. End;
  774. top_ref:
  775. If (Paicpu(hp1)^.oper[1].typ = top_reg) Then
  776. Begin
  777. { change "mov mem, %treg; mov %treg, %reg"
  778. to "mov mem, %reg" }
  779. Paicpu(p)^.Loadoper(1,Paicpu(hp1)^.oper[1]);
  780. AsmL^.Remove(hp1);
  781. Dispose(hp1, Done);
  782. continue;
  783. End;
  784. End
  785. Else
  786. {remove an instruction which never makes sense: we've got
  787. "mov mem, %reg1; mov %reg1, %edi" and then EDI isn't used anymore!}
  788. { Begin
  789. If (Paicpu(hp1)^.oper[1].reg = R_EDI) And
  790. Not(GetNextInstruction(hp1, hp2) And
  791. (Pai(hp2)^.typ = ait_instruction) And
  792. (Paicpu(hp2)^.oper[1].typ = top_reg) And
  793. (Paicpu(hp2)^.oper[1] = Pointer(R_ESI))) Then
  794. Begin
  795. AsmL^.Remove(hp1);
  796. Dispose(hp1, Done);
  797. Continue;
  798. End
  799. End}
  800. Else
  801. {Change "mov %reg1, %reg2; xxx %reg2, ???" to
  802. "mov %reg1, %reg2; xxx %reg1, ???" to avoid a write/read
  803. penalty}
  804. If (Paicpu(p)^.oper[0].typ = top_reg) And
  805. (Paicpu(p)^.oper[1].typ = top_reg) And
  806. GetNextInstruction(p,hp1) And
  807. (Pai(hp1)^.typ = ait_instruction) And
  808. (Paicpu(hp1)^.oper[0].typ = top_reg) And
  809. (Paicpu(hp1)^.oper[0].reg = Paicpu(p)^.oper[1].reg)
  810. Then
  811. {we have "mov %reg1, %reg2; XXX %reg2, ???"}
  812. Begin
  813. If ((Paicpu(hp1)^.opcode = A_OR) Or
  814. (Paicpu(hp1)^.opcode = A_TEST)) And
  815. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  816. (Paicpu(hp1)^.oper[0].reg = Paicpu(hp1)^.oper[1].reg)
  817. Then
  818. {we have "mov %reg1, %reg2; test/or %reg2, %reg2"}
  819. Begin
  820. TmpUsedRegs := UsedRegs;
  821. If GetNextInstruction(hp1, hp2) And
  822. (hp2^.typ = ait_instruction) And
  823. paicpu(hp2)^.is_jmp and
  824. Not(RegUsedAfterInstruction(Paicpu(hp1)^.oper[0].reg, hp1, TmpUsedRegs))
  825. Then
  826. {change "mov %reg1, %reg2; test/or %reg2, %reg2; jxx" to
  827. "test %reg1, %reg1; jxx"}
  828. Begin
  829. Paicpu(hp1)^.Loadoper(0,Paicpu(p)^.oper[0]);
  830. Paicpu(hp1)^.Loadoper(1,Paicpu(p)^.oper[0]);
  831. AsmL^.Remove(p);
  832. Dispose(p, done);
  833. p := hp1;
  834. continue
  835. End
  836. Else
  837. {change "mov %reg1, %reg2; test/or %reg2, %reg2" to
  838. "mov %reg1, %reg2; test/or %reg1, %reg1"}
  839. Begin
  840. Paicpu(hp1)^.Loadoper(0,Paicpu(p)^.oper[0]);
  841. Paicpu(hp1)^.Loadoper(1,Paicpu(p)^.oper[0]);
  842. End;
  843. End
  844. { Else
  845. If (Paicpu(p^.next)^.opcode
  846. In [A_PUSH, A_OR, A_XOR, A_AND, A_TEST])}
  847. {change "mov %reg1, %reg2; push/or/xor/... %reg2, ???" to
  848. "mov %reg1, %reg2; push/or/xor/... %reg1, ???"}
  849. End
  850. Else
  851. {leave out the mov from "mov reg, x(%frame_pointer); leave/ret" (with
  852. x >= RetOffset) as it doesn't do anything (it writes either to a
  853. parameter or to the temporary storage room for the function
  854. result)}
  855. If GetNextInstruction(p, hp1) And
  856. (Pai(hp1)^.typ = ait_instruction)
  857. Then
  858. If ((Paicpu(hp1)^.opcode = A_LEAVE) Or
  859. (Paicpu(hp1)^.opcode = A_RET)) And
  860. (Paicpu(p)^.oper[1].typ = top_ref) And
  861. (Paicpu(p)^.oper[1].ref^.base = procinfo^.FramePointer) And
  862. (Paicpu(p)^.oper[1].ref^.offset >= procinfo^.RetOffset) And
  863. (Paicpu(p)^.oper[1].ref^.index = R_NO) And
  864. (Paicpu(p)^.oper[0].typ = top_reg)
  865. Then
  866. Begin
  867. AsmL^.Remove(p);
  868. Dispose(p, done);
  869. p := hp1;
  870. End
  871. Else
  872. If (Paicpu(p)^.oper[0].typ = top_reg) And
  873. (Paicpu(p)^.oper[1].typ = top_ref) And
  874. (Paicpu(p)^.opsize = Paicpu(hp1)^.opsize) And
  875. (Paicpu(hp1)^.opcode = A_CMP) And
  876. (Paicpu(hp1)^.oper[1].typ = top_ref) And
  877. RefsEqual(Paicpu(p)^.oper[1].ref^, Paicpu(hp1)^.oper[1].ref^)
  878. Then
  879. {change "mov reg, mem1; cmp x, mem1" to "mov reg, mem1; cmp x, reg1"}
  880. Paicpu(hp1)^.loadreg(1,Paicpu(p)^.oper[0].reg);
  881. { Next instruction is also a MOV ? }
  882. If GetNextInstruction(p, hp1) And
  883. (pai(hp1)^.typ = ait_instruction) and
  884. (Paicpu(hp1)^.opcode = A_MOV) and
  885. (Paicpu(hp1)^.opsize = Paicpu(p)^.opsize)
  886. Then
  887. Begin
  888. If (Paicpu(hp1)^.oper[0].typ = Paicpu(p)^.oper[1].typ) and
  889. (Paicpu(hp1)^.oper[1].typ = Paicpu(p)^.oper[0].typ)
  890. Then
  891. {mov reg1, mem1 or mov mem1, reg1
  892. mov mem2, reg2 mov reg2, mem2}
  893. Begin
  894. If OpsEqual(Paicpu(hp1)^.oper[1],Paicpu(p)^.oper[0]) Then
  895. {mov reg1, mem1 or mov mem1, reg1
  896. mov mem2, reg1 mov reg2, mem1}
  897. Begin
  898. If OpsEqual(Paicpu(hp1)^.oper[0],Paicpu(p)^.oper[1]) Then
  899. { Removes the second statement from
  900. mov reg1, mem1
  901. mov mem1, reg1 }
  902. Begin
  903. AsmL^.remove(hp1);
  904. Dispose(hp1,done);
  905. End
  906. Else
  907. Begin
  908. TmpUsedRegs := UsedRegs;
  909. UpdateUsedRegs(TmpUsedRegs, Pai(hp1^.next));
  910. If (Paicpu(p)^.oper[0].typ = top_reg) And
  911. { mov reg1, mem1
  912. mov mem2, reg1 }
  913. GetNextInstruction(hp1, hp2) And
  914. (hp2^.typ = ait_instruction) And
  915. (Paicpu(hp2)^.opcode = A_CMP) And
  916. (Paicpu(hp2)^.opsize = Paicpu(p)^.opsize) and
  917. (Paicpu(hp2)^.oper[0].typ = TOp_Ref) And
  918. (Paicpu(hp2)^.oper[1].typ = TOp_Reg) And
  919. RefsEqual(Paicpu(hp2)^.oper[0].ref^, Paicpu(p)^.oper[1].ref^) And
  920. (Paicpu(hp2)^.oper[1].reg = Paicpu(p)^.oper[0].reg) And
  921. Not(RegUsedAfterInstruction(Paicpu(p)^.oper[0].reg, hp2, TmpUsedRegs)) Then
  922. { change to
  923. mov reg1, mem1 mov reg1, mem1
  924. mov mem2, reg1 cmp reg1, mem2
  925. cmp mem1, reg1 }
  926. Begin
  927. AsmL^.Remove(hp2);
  928. Dispose(hp2, Done);
  929. Paicpu(hp1)^.opcode := A_CMP;
  930. Paicpu(hp1)^.loadref(1,newreference(Paicpu(hp1)^.oper[0].ref^));
  931. Paicpu(hp1)^.loadreg(0,Paicpu(p)^.oper[0].reg);
  932. End;
  933. End;
  934. End
  935. Else
  936. Begin
  937. If GetNextInstruction(hp1, hp2) And
  938. (Paicpu(p)^.oper[0].typ = top_ref) And
  939. (Paicpu(p)^.oper[1].typ = top_reg) And
  940. (Paicpu(hp1)^.oper[0].typ = top_reg) And
  941. (Paicpu(hp1)^.oper[0].reg = Paicpu(p)^.oper[1].reg) And
  942. (Paicpu(hp1)^.oper[1].typ = top_ref) And
  943. (Pai(hp2)^.typ = ait_instruction) And
  944. (Paicpu(hp2)^.opcode = A_MOV) And
  945. (Paicpu(hp2)^.opsize = Paicpu(p)^.opsize) and
  946. (Paicpu(hp2)^.oper[1].typ = top_reg) And
  947. (Paicpu(hp2)^.oper[0].typ = top_ref) And
  948. RefsEqual(Paicpu(hp2)^.oper[0].ref^, Paicpu(hp1)^.oper[1].ref^)
  949. Then
  950. If (Paicpu(p)^.oper[1].reg in [R_DI,R_EDI])
  951. Then
  952. { mov mem1, %edi
  953. mov %edi, mem2
  954. mov mem2, reg2
  955. to:
  956. mov mem1, reg2
  957. mov reg2, mem2}
  958. Begin
  959. Paicpu(p)^.Loadoper(1,Paicpu(hp2)^.oper[1]);
  960. Paicpu(hp1)^.loadoper(0,Paicpu(hp2)^.oper[1]);
  961. AsmL^.Remove(hp2);
  962. Dispose(hp2,Done);
  963. End
  964. Else
  965. If (Paicpu(p)^.oper[1].reg <> Paicpu(hp2)^.oper[1].reg) And
  966. not(RegInRef(Paicpu(p)^.oper[1].reg,Paicpu(p)^.oper[0].ref^)) And
  967. not(RegInRef(Paicpu(hp2)^.oper[1].reg,Paicpu(hp2)^.oper[0].ref^))
  968. Then
  969. { mov mem1, reg1 mov mem1, reg1
  970. mov reg1, mem2 mov reg1, mem2
  971. mov mem2, reg2 mov mem2, reg1
  972. to: to:
  973. mov mem1, reg1 mov mem1, reg1
  974. mov mem1, reg2 mov reg1, mem2
  975. mov reg1, mem2
  976. or (if mem1 depends on reg1
  977. and/or if mem2 depends on reg2)
  978. to:
  979. mov mem1, reg1
  980. mov reg1, mem2
  981. mov reg1, reg2
  982. }
  983. Begin
  984. Paicpu(hp1)^.LoadRef(0,newreference(Paicpu(p)^.oper[0].ref^));
  985. Paicpu(hp1)^.LoadReg(1,Paicpu(hp2)^.oper[1].reg);
  986. Paicpu(hp2)^.LoadRef(1,newreference(Paicpu(hp2)^.oper[0].ref^));
  987. Paicpu(hp2)^.LoadReg(0,Paicpu(p)^.oper[1].reg);
  988. End
  989. Else
  990. If (Paicpu(hp1)^.Oper[0].reg <> Paicpu(hp2)^.Oper[1].reg) Then
  991. Paicpu(hp2)^.LoadReg(0,Paicpu(hp1)^.Oper[0].reg)
  992. Else
  993. Begin
  994. AsmL^.Remove(hp2);
  995. Dispose(hp2, Done);
  996. End
  997. End;
  998. End
  999. Else
  1000. (* {movl [mem1],reg1
  1001. movl [mem1],reg2
  1002. to:
  1003. movl [mem1],reg1
  1004. movl reg1,reg2 }
  1005. If (Paicpu(p)^.oper[0].typ = top_ref) and
  1006. (Paicpu(p)^.oper[1].typ = top_reg) and
  1007. (Paicpu(hp1)^.oper[0].typ = top_ref) and
  1008. (Paicpu(hp1)^.oper[1].typ = top_reg) and
  1009. (Paicpu(p)^.opsize = Paicpu(hp1)^.opsize) and
  1010. RefsEqual(TReference(Paicpu(p)^.oper[0]^),Paicpu(hp1)^.oper[0]^.ref^) and
  1011. (Paicpu(p)^.oper[1].reg<>Paicpu(hp1)^.oper[0]^.ref^.base) and
  1012. (Paicpu(p)^.oper[1].reg<>Paicpu(hp1)^.oper[0]^.ref^.index) then
  1013. Paicpu(hp1)^.LoadReg(0,Paicpu(p)^.oper[1].reg)
  1014. Else*)
  1015. { movl const1,[mem1]
  1016. movl [mem1],reg1
  1017. to:
  1018. movl const1,reg1
  1019. movl reg1,[mem1] }
  1020. If (Paicpu(p)^.oper[0].typ = top_const) and
  1021. (Paicpu(p)^.oper[1].typ = top_ref) and
  1022. (Paicpu(hp1)^.oper[0].typ = top_ref) and
  1023. (Paicpu(hp1)^.oper[1].typ = top_reg) and
  1024. (Paicpu(p)^.opsize = Paicpu(hp1)^.opsize) and
  1025. RefsEqual(Paicpu(hp1)^.oper[0].ref^,Paicpu(p)^.oper[1].ref^) then
  1026. Begin
  1027. Paicpu(hp1)^.LoadReg(0,Paicpu(hp1)^.oper[1].reg);
  1028. Paicpu(hp1)^.LoadRef(1,newreference(Paicpu(p)^.oper[1].ref^));
  1029. Paicpu(p)^.LoadReg(1,Paicpu(hp1)^.oper[0].reg);
  1030. End
  1031. End;
  1032. {changes "mov $0, %reg" into "xor %reg, %reg"}
  1033. If (Paicpu(p)^.oper[0].typ = Top_Const) And
  1034. (Paicpu(p)^.oper[0].val = 0) And
  1035. (Paicpu(p)^.oper[1].typ = Top_Reg)
  1036. Then
  1037. Begin
  1038. Paicpu(p)^.opcode := A_XOR;
  1039. Paicpu(p)^.LoadReg(0,Paicpu(p)^.oper[1].reg);
  1040. End;
  1041. End;
  1042. A_MOVZX:
  1043. Begin
  1044. {removes superfluous And's after movzx's}
  1045. If (Paicpu(p)^.oper[1].typ = top_reg) And
  1046. GetNextInstruction(p, hp1) And
  1047. (Pai(hp1)^.typ = ait_instruction) And
  1048. (Paicpu(hp1)^.opcode = A_AND) And
  1049. (Paicpu(hp1)^.oper[0].typ = top_const) And
  1050. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  1051. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg)
  1052. Then
  1053. Case Paicpu(p)^.opsize Of
  1054. S_BL, S_BW:
  1055. If (Paicpu(hp1)^.oper[0].val = $ff) Then
  1056. Begin
  1057. AsmL^.Remove(hp1);
  1058. Dispose(hp1, Done);
  1059. End;
  1060. S_WL:
  1061. If (Paicpu(hp1)^.oper[0].val = $ffff) Then
  1062. Begin
  1063. AsmL^.Remove(hp1);
  1064. Dispose(hp1, Done);
  1065. End;
  1066. End;
  1067. {changes some movzx constructs to faster synonims (all examples
  1068. are given with eax/ax, but are also valid for other registers)}
  1069. If (Paicpu(p)^.oper[1].typ = top_reg) Then
  1070. If (Paicpu(p)^.oper[0].typ = top_reg) Then
  1071. Case Paicpu(p)^.opsize of
  1072. S_BW:
  1073. Begin
  1074. If (Paicpu(p)^.oper[0].reg = Reg16ToReg8(Paicpu(p)^.oper[1].reg)) And
  1075. Not(CS_LittleSize In aktglobalswitches)
  1076. Then
  1077. {Change "movzbw %al, %ax" to "andw $0x0ffh, %ax"}
  1078. Begin
  1079. Paicpu(p)^.opcode := A_AND;
  1080. Paicpu(p)^.changeopsize(S_W);
  1081. Paicpu(p)^.LoadConst(0,$ff);
  1082. End
  1083. Else
  1084. If GetNextInstruction(p, hp1) And
  1085. (Pai(hp1)^.typ = ait_instruction) And
  1086. (Paicpu(hp1)^.opcode = A_AND) And
  1087. (Paicpu(hp1)^.oper[0].typ = top_const) And
  1088. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  1089. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg)
  1090. Then
  1091. {Change "movzbw %reg1, %reg2; andw $const, %reg2"
  1092. to "movw %reg1, reg2; andw $(const1 and $ff), %reg2"}
  1093. Begin
  1094. Paicpu(p)^.opcode := A_MOV;
  1095. Paicpu(p)^.changeopsize(S_W);
  1096. Paicpu(p)^.LoadReg(0,Reg8ToReg16(Paicpu(p)^.oper[0].reg));
  1097. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ff);
  1098. End;
  1099. End;
  1100. S_BL:
  1101. Begin
  1102. If (Paicpu(p)^.oper[0].reg = Reg32ToReg8(Paicpu(p)^.oper[1].reg)) And
  1103. Not(CS_LittleSize in aktglobalswitches)
  1104. Then
  1105. {Change "movzbl %al, %eax" to "andl $0x0ffh, %eax"}
  1106. Begin
  1107. Paicpu(p)^.opcode := A_AND;
  1108. Paicpu(p)^.changeopsize(S_L);
  1109. Paicpu(p)^.loadconst(0,$ff)
  1110. End
  1111. Else
  1112. If GetNextInstruction(p, hp1) And
  1113. (Pai(hp1)^.typ = ait_instruction) And
  1114. (Paicpu(hp1)^.opcode = A_AND) And
  1115. (Paicpu(hp1)^.oper[0].typ = top_const) And
  1116. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  1117. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg)
  1118. Then
  1119. {Change "movzbl %reg1, %reg2; andl $const, %reg2"
  1120. to "movl %reg1, reg2; andl $(const1 and $ff), %reg2"}
  1121. Begin
  1122. Paicpu(p)^.opcode := A_MOV;
  1123. Paicpu(p)^.changeopsize(S_L);
  1124. Paicpu(p)^.LoadReg(0,Reg8ToReg32(Paicpu(p)^.oper[0].reg));
  1125. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ff);
  1126. End
  1127. End;
  1128. S_WL:
  1129. Begin
  1130. If (Paicpu(p)^.oper[0].reg = Reg32ToReg16(Paicpu(p)^.oper[1].reg)) And
  1131. Not(CS_LittleSize In aktglobalswitches)
  1132. Then
  1133. {Change "movzwl %ax, %eax" to "andl $0x0ffffh, %eax"}
  1134. Begin
  1135. Paicpu(p)^.opcode := A_AND;
  1136. Paicpu(p)^.changeopsize(S_L);
  1137. Paicpu(p)^.LoadConst(0,$ffff);
  1138. End
  1139. Else
  1140. If GetNextInstruction(p, hp1) And
  1141. (Pai(hp1)^.typ = ait_instruction) And
  1142. (Paicpu(hp1)^.opcode = A_AND) And
  1143. (Paicpu(hp1)^.oper[0].typ = top_const) And
  1144. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  1145. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg)
  1146. Then
  1147. {Change "movzwl %reg1, %reg2; andl $const, %reg2"
  1148. to "movl %reg1, reg2; andl $(const1 and $ffff), %reg2"}
  1149. Begin
  1150. Paicpu(p)^.opcode := A_MOV;
  1151. Paicpu(p)^.changeopsize(S_L);
  1152. Paicpu(p)^.LoadReg(0,Reg16ToReg32(Paicpu(p)^.oper[0].reg));
  1153. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ffff);
  1154. End;
  1155. End;
  1156. End
  1157. Else
  1158. If (Paicpu(p)^.oper[0].typ = top_ref) Then
  1159. Begin
  1160. If GetNextInstruction(p, hp1) And
  1161. (Pai(hp1)^.typ = ait_instruction) And
  1162. (Paicpu(hp1)^.opcode = A_AND) And
  1163. (Paicpu(hp1)^.oper[0].typ = Top_Const) And
  1164. (Paicpu(hp1)^.oper[1].typ = Top_Reg) And
  1165. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg) Then
  1166. Begin
  1167. Paicpu(p)^.opcode := A_MOV;
  1168. Case Paicpu(p)^.opsize Of
  1169. S_BL:
  1170. Begin
  1171. Paicpu(p)^.changeopsize(S_L);
  1172. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ff);
  1173. End;
  1174. S_WL:
  1175. Begin
  1176. Paicpu(p)^.changeopsize(S_L);
  1177. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ffff);
  1178. End;
  1179. S_BW:
  1180. Begin
  1181. Paicpu(p)^.changeopsize(S_W);
  1182. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val And $ff);
  1183. End;
  1184. End;
  1185. End;
  1186. End;
  1187. End;
  1188. A_POP:
  1189. Begin
  1190. if (Paicpu(p)^.oper[0].typ = top_reg) And
  1191. GetNextInstruction(p, hp1) And
  1192. (pai(hp1)^.typ=ait_instruction) and
  1193. (Paicpu(hp1)^.opcode=A_PUSH) and
  1194. (Paicpu(hp1)^.oper[0].typ = top_reg) And
  1195. (Paicpu(hp1)^.oper[0].reg=Paicpu(p)^.oper[0].reg) then
  1196. { This can't be done, because the register which is popped
  1197. can still be used after the push (PFV)
  1198. If (Not(cs_regalloc in aktglobalswitches)) Then
  1199. Begin
  1200. hp2:=pai(hp1^.next);
  1201. asml^.remove(p);
  1202. asml^.remove(hp1);
  1203. dispose(p,done);
  1204. dispose(hp1,done);
  1205. p:=hp2;
  1206. continue
  1207. End
  1208. Else }
  1209. Begin
  1210. { change it to a two op operation }
  1211. Paicpu(p)^.oper[1].typ:=top_none;
  1212. Paicpu(p)^.ops:=2;
  1213. Paicpu(p)^.opcode := A_MOV;
  1214. Paicpu(p)^.Loadoper(1,Paicpu(p)^.oper[0]);
  1215. New(TmpRef);
  1216. Reset_reference(tmpref^);
  1217. TmpRef^.base := R_ESP;
  1218. Paicpu(p)^.LoadRef(0,TmpRef);
  1219. AsmL^.Remove(hp1);
  1220. Dispose(hp1, Done)
  1221. End;
  1222. end;
  1223. A_PUSH:
  1224. Begin
  1225. If (Paicpu(p)^.opsize = S_W) And
  1226. (Paicpu(p)^.oper[0].typ = Top_Const) And
  1227. GetNextInstruction(p, hp1) And
  1228. (Pai(hp1)^.typ = ait_instruction) And
  1229. (Paicpu(hp1)^.opcode = A_PUSH) And
  1230. (Paicpu(hp1)^.oper[0].typ = Top_Const) And
  1231. (Paicpu(hp1)^.opsize = S_W) Then
  1232. Begin
  1233. Paicpu(p)^.changeopsize(S_L);
  1234. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val shl 16 + Paicpu(hp1)^.oper[0].val);
  1235. AsmL^.Remove(hp1);
  1236. Dispose(hp1, Done)
  1237. End;
  1238. End;
  1239. A_SHL, A_SAL:
  1240. Begin
  1241. If (Paicpu(p)^.oper[0].typ = Top_Const) And
  1242. (Paicpu(p)^.oper[1].typ = Top_Reg) And
  1243. (Paicpu(p)^.opsize = S_L) And
  1244. (Paicpu(p)^.oper[0].val <= 3)
  1245. {Changes "shl const, %reg32; add const/reg, %reg32" to one lea statement}
  1246. Then
  1247. Begin
  1248. TmpBool1 := True; {should we check the next instruction?}
  1249. TmpBool2 := False; {have we found an add/sub which could be
  1250. integrated in the lea?}
  1251. New(TmpRef);
  1252. Reset_reference(tmpref^);
  1253. TmpRef^.index := Paicpu(p)^.oper[1].reg;
  1254. TmpRef^.scalefactor := 1 shl Paicpu(p)^.oper[0].val;
  1255. While TmpBool1 And
  1256. GetNextInstruction(p, hp1) And
  1257. (Pai(hp1)^.typ = ait_instruction) And
  1258. ((Paicpu(hp1)^.opcode = A_ADD) Or
  1259. (Paicpu(hp1)^.opcode = A_SUB)) And
  1260. (Paicpu(hp1)^.oper[1].typ = Top_Reg) And
  1261. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg) Do
  1262. Begin
  1263. TmpBool1 := False;
  1264. If (Paicpu(hp1)^.oper[0].typ = Top_Const)
  1265. Then
  1266. Begin
  1267. TmpBool1 := True;
  1268. TmpBool2 := True;
  1269. If Paicpu(hp1)^.opcode = A_ADD Then
  1270. Inc(TmpRef^.offset, Paicpu(hp1)^.oper[0].val)
  1271. Else
  1272. Dec(TmpRef^.offset, Paicpu(hp1)^.oper[0].val);
  1273. AsmL^.Remove(hp1);
  1274. Dispose(hp1, Done);
  1275. End
  1276. Else
  1277. If (Paicpu(hp1)^.oper[0].typ = Top_Reg) And
  1278. (Paicpu(hp1)^.opcode = A_ADD) And
  1279. (TmpRef^.base = R_NO) Then
  1280. Begin
  1281. TmpBool1 := True;
  1282. TmpBool2 := True;
  1283. TmpRef^.base := Paicpu(hp1)^.oper[0].reg;
  1284. AsmL^.Remove(hp1);
  1285. Dispose(hp1, Done);
  1286. End;
  1287. End;
  1288. If TmpBool2 Or
  1289. ((aktoptprocessor < ClassP6) And
  1290. (Paicpu(p)^.oper[0].val <= 3) And
  1291. Not(CS_LittleSize in aktglobalswitches))
  1292. Then
  1293. Begin
  1294. If Not(TmpBool2) And
  1295. (Paicpu(p)^.oper[0].val = 1)
  1296. Then
  1297. Begin
  1298. Dispose(TmpRef);
  1299. hp1 := new(Paicpu,op_reg_reg(A_ADD,Paicpu(p)^.opsize,
  1300. Paicpu(p)^.oper[1].reg, Paicpu(p)^.oper[1].reg))
  1301. End
  1302. Else hp1 := New(Paicpu, op_ref_reg(A_LEA, S_L, TmpRef,
  1303. Paicpu(p)^.oper[1].reg));
  1304. hp1^.fileinfo := p^.fileinfo;
  1305. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  1306. Dispose(p, Done);
  1307. p := hp1;
  1308. End;
  1309. End
  1310. Else
  1311. If (aktoptprocessor < ClassP6) And
  1312. (Paicpu(p)^.oper[0].typ = top_const) And
  1313. (Paicpu(p)^.oper[1].typ = top_reg) Then
  1314. If (Paicpu(p)^.oper[0].val = 1)
  1315. Then
  1316. {changes "shl $1, %reg" to "add %reg, %reg", which is the same on a 386,
  1317. but faster on a 486, and pairable in both U and V pipes on the Pentium
  1318. (unlike shl, which is only pairable in the U pipe)}
  1319. Begin
  1320. hp1 := new(Paicpu,op_reg_reg(A_ADD,Paicpu(p)^.opsize,
  1321. Paicpu(p)^.oper[1].reg, Paicpu(p)^.oper[1].reg));
  1322. hp1^.fileinfo := p^.fileinfo;
  1323. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  1324. Dispose(p, done);
  1325. p := hp1;
  1326. End
  1327. Else If (Paicpu(p)^.opsize = S_L) and
  1328. (Paicpu(p)^.oper[0].val<= 3) Then
  1329. {changes "shl $2, %reg" to "lea (,%reg,4), %reg"
  1330. "shl $3, %reg" to "lea (,%reg,8), %reg}
  1331. Begin
  1332. New(TmpRef);
  1333. Reset_reference(tmpref^);
  1334. TmpRef^.index := Paicpu(p)^.oper[1].reg;
  1335. TmpRef^.scalefactor := 1 shl Paicpu(p)^.oper[0].val;
  1336. hp1 := new(Paicpu,op_ref_reg(A_LEA,S_L,TmpRef, Paicpu(p)^.oper[1].reg));
  1337. hp1^.fileinfo := p^.fileinfo;
  1338. InsertLLItem(AsmL,p^.previous, p^.next, hp1);
  1339. Dispose(p, done);
  1340. p := hp1;
  1341. End
  1342. End;
  1343. A_SAR, A_SHR:
  1344. {changes the code sequence
  1345. shr/sar const1, x
  1346. shl const2, x
  1347. to either "sar/and", "shl/and" or just "and" depending on const1 and const2}
  1348. Begin
  1349. If GetNextInstruction(p, hp1) And
  1350. (pai(hp1)^.typ = ait_instruction) and
  1351. (Paicpu(hp1)^.opcode = A_SHL) and
  1352. (Paicpu(p)^.oper[0].typ = top_const) and
  1353. (Paicpu(hp1)^.oper[0].typ = top_const) and
  1354. (Paicpu(hp1)^.opsize = Paicpu(p)^.opsize) And
  1355. (Paicpu(hp1)^.oper[1].typ = Paicpu(p)^.oper[1].typ) And
  1356. OpsEqual(Paicpu(hp1)^.oper[1], Paicpu(p)^.oper[1])
  1357. Then
  1358. If (Paicpu(p)^.oper[0].val > Paicpu(hp1)^.oper[0].val) And
  1359. Not(CS_LittleSize In aktglobalswitches)
  1360. Then
  1361. { shr/sar const1, %reg
  1362. shl const2, %reg
  1363. with const1 > const2 }
  1364. Begin
  1365. Paicpu(p)^.LoadConst(0,Paicpu(p)^.oper[0].val-Paicpu(hp1)^.oper[0].val);
  1366. Paicpu(hp1)^.opcode := A_AND;
  1367. l := (1 shl (Paicpu(hp1)^.oper[0].val)) - 1;
  1368. Case Paicpu(p)^.opsize Of
  1369. S_L: Paicpu(hp1)^.LoadConst(0,l Xor longint(-1));
  1370. S_B: Paicpu(hp1)^.LoadConst(0,l Xor $ff);
  1371. S_W: Paicpu(hp1)^.LoadConst(0,l Xor $ffff);
  1372. End;
  1373. End
  1374. Else
  1375. If (Paicpu(p)^.oper[0].val<Paicpu(hp1)^.oper[0].val) And
  1376. Not(CS_LittleSize In aktglobalswitches)
  1377. Then
  1378. { shr/sar const1, %reg
  1379. shl const2, %reg
  1380. with const1 < const2 }
  1381. Begin
  1382. Paicpu(hp1)^.LoadConst(0,Paicpu(hp1)^.oper[0].val-Paicpu(p)^.oper[0].val);
  1383. Paicpu(p)^.opcode := A_AND;
  1384. l := (1 shl (Paicpu(p)^.oper[0].val))-1;
  1385. Case Paicpu(p)^.opsize Of
  1386. S_L: Paicpu(p)^.LoadConst(0,l Xor $ffffffff);
  1387. S_B: Paicpu(p)^.LoadConst(0,l Xor $ff);
  1388. S_W: Paicpu(p)^.LoadConst(0,l Xor $ffff);
  1389. End;
  1390. End
  1391. Else
  1392. { shr/sar const1, %reg
  1393. shl const2, %reg
  1394. with const1 = const2 }
  1395. Begin
  1396. Paicpu(p)^.opcode := A_AND;
  1397. l := (1 shl (Paicpu(p)^.oper[0].val))-1;
  1398. Case Paicpu(p)^.opsize Of
  1399. S_B: Paicpu(p)^.LoadConst(0,l Xor $ff);
  1400. S_W: Paicpu(p)^.LoadConst(0,l Xor $ffff);
  1401. S_L: Paicpu(p)^.LoadConst(0,l Xor $ffffffff);
  1402. End;
  1403. AsmL^.remove(hp1);
  1404. dispose(hp1, done);
  1405. End;
  1406. End;
  1407. A_SETcc :
  1408. Begin
  1409. If (Paicpu(p)^.oper[0].typ = top_ref) And
  1410. GetNextInstruction(p, hp1) And
  1411. GetNextInstruction(hp1, hp2) And
  1412. (hp2^.typ = ait_instruction) And
  1413. ((Paicpu(hp2)^.opcode = A_LEAVE) or
  1414. (Paicpu(hp2)^.opcode = A_RET)) And
  1415. (Paicpu(p)^.oper[0].ref^.Base = procinfo^.FramePointer) And
  1416. (Paicpu(p)^.oper[0].ref^.Index = R_NO) And
  1417. (Paicpu(p)^.oper[0].ref^.Offset >= procinfo^.RetOffset) And
  1418. (hp1^.typ = ait_instruction) And
  1419. (Paicpu(hp1)^.opcode = A_MOV) And
  1420. (Paicpu(hp1)^.opsize = S_B) And
  1421. (Paicpu(hp1)^.oper[0].typ = top_ref) And
  1422. RefsEqual(Paicpu(hp1)^.oper[0].ref^, Paicpu(p)^.oper[0].ref^) Then
  1423. Begin
  1424. Paicpu(p)^.LoadReg(0,Paicpu(hp1)^.oper[1].reg);
  1425. AsmL^.Remove(hp1);
  1426. Dispose(hp1, Done)
  1427. End
  1428. End;
  1429. A_SUB:
  1430. { * change "subl $2, %esp; pushw x" to "pushl x"}
  1431. { * change "sub/add const1, reg" or "dec reg" followed by
  1432. "sub const2, reg" to one "sub ..., reg" }
  1433. Begin
  1434. If (Paicpu(p)^.oper[0].typ = top_const) And
  1435. (Paicpu(p)^.oper[1].typ = top_reg) Then
  1436. If (Paicpu(p)^.oper[0].val = 2) And
  1437. (Paicpu(p)^.oper[1].reg = R_ESP) Then
  1438. Begin
  1439. hp1 := Pai(p^.next);
  1440. While Assigned(hp1) And
  1441. (Pai(hp1)^.typ In [ait_instruction]+SkipInstr) And
  1442. Not((Pai(hp1)^.typ = ait_instruction) And
  1443. ((Paicpu(hp1)^.opcode = A_CALL) or
  1444. (Paicpu(hp1)^.opcode = A_PUSH) or
  1445. ((Paicpu(hp1)^.opcode = A_MOV) And
  1446. (Paicpu(hp1)^.oper[1].typ = top_ref) And
  1447. (Paicpu(hp1)^.oper[1].ref^.base = R_ESP)))) do
  1448. hp1 := Pai(hp1^.next);
  1449. If Assigned(hp1) And
  1450. (Pai(hp1)^.typ = ait_instruction) And
  1451. (Paicpu(hp1)^.opcode = A_PUSH) And
  1452. (Paicpu(hp1)^.opsize = S_W)
  1453. Then
  1454. Begin
  1455. Paicpu(hp1)^.changeopsize(S_L);
  1456. if Paicpu(hp1)^.oper[0].typ=top_reg then
  1457. Paicpu(hp1)^.LoadReg(0,Reg16ToReg32(Paicpu(hp1)^.oper[0].reg));
  1458. hp1 := Pai(p^.next);
  1459. AsmL^.Remove(p);
  1460. Dispose(p, Done);
  1461. p := hp1;
  1462. Continue
  1463. End;
  1464. If DoSubAddOpt(p) Then continue;
  1465. End
  1466. Else If DoSubAddOpt(p) Then Continue
  1467. End;
  1468. A_TEST, A_OR:
  1469. {removes the line marked with (x) from the sequence
  1470. And/or/xor/add/sub/... $x, %y
  1471. test/or %y, %y (x)
  1472. j(n)z _Label
  1473. as the first instruction already adjusts the ZF}
  1474. Begin
  1475. If OpsEqual(Paicpu(p)^.oper[0],Paicpu(p)^.oper[1]) Then
  1476. If GetLastInstruction(p, hp1) And
  1477. (pai(hp1)^.typ = ait_instruction) Then
  1478. Case Paicpu(hp1)^.opcode Of
  1479. A_ADD, A_SUB, A_OR, A_XOR, A_AND, A_SHL, A_SHR:
  1480. Begin
  1481. If OpsEqual(Paicpu(hp1)^.oper[1],Paicpu(p)^.oper[0]) Then
  1482. Begin
  1483. hp1 := pai(p^.next);
  1484. asml^.remove(p);
  1485. dispose(p, done);
  1486. p := pai(hp1);
  1487. continue
  1488. End;
  1489. End;
  1490. A_DEC, A_INC, A_NEG:
  1491. Begin
  1492. If OpsEqual(Paicpu(hp1)^.oper[0],Paicpu(p)^.oper[0]) Then
  1493. Begin
  1494. Case Paicpu(hp1)^.opcode Of
  1495. A_DEC, A_INC:
  1496. {replace inc/dec with add/sub 1, because inc/dec doesn't set the carry flag}
  1497. Begin
  1498. Case Paicpu(hp1)^.opcode Of
  1499. A_DEC: Paicpu(hp1)^.opcode := A_SUB;
  1500. A_INC: Paicpu(hp1)^.opcode := A_ADD;
  1501. End;
  1502. Paicpu(hp1)^.Loadoper(1,Paicpu(hp1)^.oper[0]);
  1503. Paicpu(hp1)^.LoadConst(0,1);
  1504. Paicpu(hp1)^.ops:=2;
  1505. End
  1506. End;
  1507. hp1 := pai(p^.next);
  1508. asml^.remove(p);
  1509. dispose(p, done);
  1510. p := pai(hp1);
  1511. continue
  1512. End;
  1513. End
  1514. End
  1515. Else
  1516. End;
  1517. End;
  1518. end; { if is_jmp }
  1519. End;
  1520. { ait_label:
  1521. Begin
  1522. If Not(Pai_Label(p)^.l^.is_used)
  1523. Then
  1524. Begin
  1525. hp1 := Pai(p^.next);
  1526. AsmL^.Remove(p);
  1527. Dispose(p, Done);
  1528. p := hp1;
  1529. Continue
  1530. End;
  1531. End;}
  1532. End;
  1533. p:=pai(p^.next);
  1534. end;
  1535. end;
  1536. Procedure PeepHoleOptPass2(AsmL: PAasmOutput; BlockStart, BlockEnd: Pai);
  1537. var
  1538. p,hp1,hp2: pai;
  1539. Begin
  1540. P := BlockStart;
  1541. While (P <> BlockEnd) Do
  1542. Begin
  1543. Case P^.Typ Of
  1544. Ait_Instruction:
  1545. Begin
  1546. Case Paicpu(p)^.opcode Of
  1547. A_CALL:
  1548. If (AktOptProcessor < ClassP6) And
  1549. GetNextInstruction(p, hp1) And
  1550. (hp1^.typ = ait_instruction) And
  1551. (paicpu(hp1)^.opcode = A_JMP) Then
  1552. Begin
  1553. Inc(paicpu(hp1)^.oper[0].sym^.refs);
  1554. hp2 := New(Paicpu,op_sym(A_PUSH,S_L,paicpu(hp1)^.oper[0].sym));
  1555. hp2^.fileinfo := p^.fileinfo;
  1556. InsertLLItem(AsmL, p^.previous, p, hp2);
  1557. Paicpu(p)^.opcode := A_JMP;
  1558. AsmL^.Remove(hp1);
  1559. Dispose(hp1, Done)
  1560. End;
  1561. A_MOV:
  1562. Begin
  1563. If (Paicpu(p)^.oper[0].typ = top_reg) And
  1564. (Paicpu(p)^.oper[1].typ = top_reg) And
  1565. GetNextInstruction(p, hp1) And
  1566. (hp1^.typ = ait_Instruction) And
  1567. ((Paicpu(hp1)^.opcode = A_MOV) or
  1568. (Paicpu(hp1)^.opcode = A_MOVZX) or
  1569. (Paicpu(hp1)^.opcode = A_MOVSX)) And
  1570. (Paicpu(hp1)^.oper[0].typ = top_ref) And
  1571. (Paicpu(hp1)^.oper[1].typ = top_reg) And
  1572. ((Paicpu(hp1)^.oper[0].ref^.Base = Paicpu(p)^.oper[1].reg) Or
  1573. (Paicpu(hp1)^.oper[0].ref^.Index = Paicpu(p)^.oper[1].reg)) And
  1574. (Paicpu(hp1)^.oper[1].reg = Paicpu(p)^.oper[1].reg) Then
  1575. {mov reg1, reg2
  1576. mov/zx/sx (reg2, ..), reg2 to mov/zx/sx (reg1, ..), reg2}
  1577. Begin
  1578. If (Paicpu(hp1)^.oper[0].ref^.Base = Paicpu(p)^.oper[1].reg) Then
  1579. Paicpu(hp1)^.oper[0].ref^.Base := Paicpu(p)^.oper[0].reg;
  1580. If (Paicpu(hp1)^.oper[0].ref^.Index = Paicpu(p)^.oper[1].reg) Then
  1581. Paicpu(hp1)^.oper[0].ref^.Index := Paicpu(p)^.oper[0].reg;
  1582. AsmL^.Remove(p);
  1583. Dispose(p, Done);
  1584. p := hp1;
  1585. Continue;
  1586. End;
  1587. End;
  1588. A_MOVZX:
  1589. Begin
  1590. If (Paicpu(p)^.oper[1].typ = top_reg) Then
  1591. If (Paicpu(p)^.oper[0].typ = top_reg)
  1592. Then
  1593. Case Paicpu(p)^.opsize of
  1594. S_BL:
  1595. Begin
  1596. If IsGP32Reg(Paicpu(p)^.oper[1].reg) And
  1597. Not(CS_LittleSize in aktglobalswitches) And
  1598. (aktoptprocessor = ClassP5)
  1599. Then
  1600. {Change "movzbl %reg1, %reg2" to
  1601. "xorl %reg2, %reg2; movb %reg1, %reg2" for Pentium and
  1602. PentiumMMX}
  1603. Begin
  1604. hp1 := New(Paicpu, op_reg_reg(A_XOR, S_L,
  1605. Paicpu(p)^.oper[1].reg, Paicpu(p)^.oper[1].reg));
  1606. hp1^.fileinfo := p^.fileinfo;
  1607. InsertLLItem(AsmL,p^.previous, p, hp1);
  1608. Paicpu(p)^.opcode := A_MOV;
  1609. Paicpu(p)^.changeopsize(S_B);
  1610. Paicpu(p)^.LoadReg(1,Reg32ToReg8(Paicpu(p)^.oper[1].reg));
  1611. End;
  1612. End;
  1613. End
  1614. Else
  1615. If (Paicpu(p)^.oper[0].typ = top_ref) And
  1616. (Paicpu(p)^.oper[0].ref^.base <> Paicpu(p)^.oper[1].reg) And
  1617. (Paicpu(p)^.oper[0].ref^.index <> Paicpu(p)^.oper[1].reg) And
  1618. Not(CS_LittleSize in aktglobalswitches) And
  1619. IsGP32Reg(Paicpu(p)^.oper[1].reg) And
  1620. (aktoptprocessor = ClassP5) And
  1621. (Paicpu(p)^.opsize = S_BL)
  1622. Then
  1623. {changes "movzbl mem, %reg" to "xorl %reg, %reg; movb mem, %reg8" for
  1624. Pentium and PentiumMMX}
  1625. Begin
  1626. hp1 := New(Paicpu,op_reg_reg(A_XOR, S_L, Paicpu(p)^.oper[1].reg,
  1627. Paicpu(p)^.oper[1].reg));
  1628. hp1^.fileinfo := p^.fileinfo;
  1629. Paicpu(p)^.opcode := A_MOV;
  1630. Paicpu(p)^.changeopsize(S_B);
  1631. Paicpu(p)^.LoadReg(1,Reg32ToReg8(Paicpu(p)^.oper[1].reg));
  1632. InsertLLItem(AsmL,p^.previous, p, hp1);
  1633. End;
  1634. End;
  1635. End;
  1636. End;
  1637. End;
  1638. p := Pai(p^.next)
  1639. End;
  1640. End;
  1641. End.
  1642. {
  1643. $Log$
  1644. Revision 1.68 1999-11-06 16:24:00 jonas
  1645. * getfinaldestination works completely again (a lot of functionality
  1646. got lost in the conversion resulting from the removal of
  1647. ait_labeled_instruction)
  1648. Revision 1.67 1999/11/06 14:34:23 peter
  1649. * truncated log to 20 revs
  1650. Revision 1.66 1999/09/27 23:44:55 peter
  1651. * procinfo is now a pointer
  1652. * support for result setting in sub procedure
  1653. Revision 1.65 1999/09/05 14:27:19 florian
  1654. + fld reg;fxxx to fxxxr reg optimization
  1655. Revision 1.64 1999/08/25 12:00:02 jonas
  1656. * changed pai386, paippc and paiapha (same for tai*) to paicpu (taicpu)
  1657. Revision 1.63 1999/08/23 10:20:46 jonas
  1658. * fixed pop/push optmization
  1659. Revision 1.62 1999/08/10 12:30:00 pierre
  1660. * avoid unused locals
  1661. Revision 1.61 1999/08/05 15:02:48 jonas
  1662. * "add/sub const,%esp;sub $2,%esp" wasn't always optimized
  1663. Revision 1.60 1999/08/04 00:23:16 florian
  1664. * renamed i386asm and i386base to cpuasm and cpubase
  1665. Revision 1.59 1999/08/03 17:13:28 jonas
  1666. * fix for sar/shr-shl optimization
  1667. Revision 1.58 1999/07/30 18:17:55 jonas
  1668. * fix so (,reg) gets optimized to (reg)
  1669. Revision 1.57 1999/07/01 18:12:16 jonas
  1670. * enabled "mov reg1,reg2;mov (reg2,..), reg2" also if the second mov is
  1671. a movzx or movsx
  1672. Revision 1.56 1999/06/23 12:33:52 jonas
  1673. * merged
  1674. Revision 1.54.2.2 1999/06/23 11:55:08 jonas
  1675. * fixed bug in "mov mem1,reg1;mov reg1,mem2;mov mem2,reg2" optimization
  1676. Revision 1.55 1999/06/18 09:55:31 peter
  1677. * merged
  1678. Revision 1.54.2.1 1999/06/18 09:52:40 peter
  1679. * pop;push -> mov (esp),reg always instead of being removed
  1680. Revision 1.54 1999/05/27 19:44:49 peter
  1681. * removed oldasm
  1682. * plabel -> pasmlabel
  1683. * -a switches to source writing automaticly
  1684. * assembler readers OOPed
  1685. * asmsymbol automaticly external
  1686. * jumptables and other label fixes for asm readers
  1687. Revision 1.53 1999/05/12 00:19:52 peter
  1688. * removed R_DEFAULT_SEG
  1689. * uniform float names
  1690. Revision 1.52 1999/05/05 16:19:04 jonas
  1691. + remove the segment prefixes from LEA instructions
  1692. Revision 1.51 1999/05/05 10:05:54 florian
  1693. * a delphi compiled compiler recompiles ppc
  1694. Revision 1.50 1999/05/02 21:33:55 florian
  1695. * several bugs regarding -Or fixed
  1696. Revision 1.49 1999/05/02 14:26:31 peter
  1697. * fixed dec -> sub $1 opt which didn't set ops=2
  1698. }