cgobj.pas 119 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. {# @abstract(Abstract code generator)
  38. This class implements an abstract instruction generator. Some of
  39. the methods of this class are generic, while others must
  40. be overridden for all new processors which will be supported
  41. by Free Pascal. For 32-bit processors, the base class
  42. should be @link(tcg64f32) and not @var(tcg).
  43. }
  44. tcg = class
  45. public
  46. { how many times is this current code executed }
  47. executionweight : longint;
  48. alignment : talignment;
  49. rg : array[tregistertype] of trgobj;
  50. {$ifdef flowgraph}
  51. aktflownode:word;
  52. {$endif}
  53. {************************************************}
  54. { basic routines }
  55. constructor create;
  56. {# Initialize the register allocators needed for the codegenerator.}
  57. procedure init_register_allocators;virtual;
  58. {# Clean up the register allocators needed for the codegenerator.}
  59. procedure done_register_allocators;virtual;
  60. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  61. procedure set_regalloc_live_range_direction(dir: TRADirection);
  62. {$ifdef flowgraph}
  63. procedure init_flowgraph;
  64. procedure done_flowgraph;
  65. {$endif}
  66. {# Gets a register suitable to do integer operations on.}
  67. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  68. {# Gets a register suitable to do integer operations on.}
  69. function getaddressregister(list:TAsmList):Tregister;virtual;
  70. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  71. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  74. the cpu specific child cg object have such a method?}
  75. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  76. procedure add_move_instruction(instr:Taicpu);virtual;
  77. function uses_registers(rt:Tregistertype):boolean;virtual;
  78. {# Get a specific register.}
  79. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  80. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  81. {# Get multiple registers specified.}
  82. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  83. {# Free multiple registers specified.}
  84. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  85. procedure allocallcpuregisters(list:TAsmList);virtual;
  86. procedure deallocallcpuregisters(list:TAsmList);virtual;
  87. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  88. procedure translate_register(var reg : tregister);
  89. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  90. {# Emit a label to the instruction stream. }
  91. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  92. {# Allocates register r by inserting a pai_realloc record }
  93. procedure a_reg_alloc(list : TAsmList;r : tregister);
  94. {# Deallocates register r by inserting a pa_regdealloc record}
  95. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  96. { Synchronize register, make sure it is still valid }
  97. procedure a_reg_sync(list : TAsmList;r : tregister);
  98. {# Pass a parameter, which is located in a register, to a routine.
  99. This routine should push/send the parameter to the routine, as
  100. required by the specific processor ABI and routine modifiers.
  101. It must generate register allocation information for the cgpara in
  102. case it consists of cpuregisters.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overridden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. It must generate register allocation information for the cgpara in
  113. case it consists of cpuregisters.
  114. @param(size size of the operand in constant)
  115. @param(a value of constant to send)
  116. @param(cgpara where the parameter will be stored)
  117. }
  118. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);virtual;
  119. {# Pass the value of a parameter, which is located in memory, to a routine.
  120. A generic version is provided. This routine should
  121. be overridden for optimization purposes if the cpu
  122. permits directly sending this type of parameter.
  123. It must generate register allocation information for the cgpara in
  124. case it consists of cpuregisters.
  125. @param(size size of the operand in constant)
  126. @param(r Memory reference of value to send)
  127. @param(cgpara where the parameter will be stored)
  128. }
  129. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  130. {# Pass the value of a parameter, which can be located either in a register or memory location,
  131. to a routine.
  132. A generic version is provided.
  133. @param(l location of the operand to send)
  134. @param(nr parameter number (starting from one) of routine (from left to right))
  135. @param(cgpara where the parameter will be stored)
  136. }
  137. procedure a_load_loc_cgpara(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  138. {# Pass the address of a reference to a routine. This routine
  139. will calculate the address of the reference, and pass this
  140. calculated address as a parameter.
  141. It must generate register allocation information for the cgpara in
  142. case it consists of cpuregisters.
  143. A generic version is provided. This routine should
  144. be overridden for optimization purposes if the cpu
  145. permits directly sending this type of parameter.
  146. @param(r reference to get address from)
  147. @param(nr parameter number (starting from one) of routine (from left to right))
  148. }
  149. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  150. {# Load a cgparaloc into a memory reference.
  151. It must generate register allocation information for the cgpara in
  152. case it consists of cpuregisters.
  153. @param(paraloc the source parameter sublocation)
  154. @param(ref the destination reference)
  155. @param(sizeleft indicates the total number of bytes left in all of
  156. the remaining sublocations of this parameter (the current
  157. sublocation and all of the sublocations coming after it).
  158. In case this location is also a reference, it is assumed
  159. to be the final part sublocation of the parameter and that it
  160. contains all of the "sizeleft" bytes).)
  161. @param(align the alignment of the paraloc in case it's a reference)
  162. }
  163. procedure a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  164. {# Load a cgparaloc into any kind of register (int, fp, mm).
  165. @param(regsize the size of the destination register)
  166. @param(paraloc the source parameter sublocation)
  167. @param(reg the destination register)
  168. @param(align the alignment of the paraloc in case it's a reference)
  169. }
  170. procedure a_load_cgparaloc_anyreg(list : TAsmList;regsize : tcgsize;const paraloc : TCGParaLocation;reg : tregister;align : longint);
  171. { Remarks:
  172. * If a method specifies a size you have only to take care
  173. of that number of bits, i.e. load_const_reg with OP_8 must
  174. only load the lower 8 bit of the specified register
  175. the rest of the register can be undefined
  176. if necessary the compiler will call a method
  177. to zero or sign extend the register
  178. * The a_load_XX_XX with OP_64 needn't to be
  179. implemented for 32 bit
  180. processors, the code generator takes care of that
  181. * the addr size is for work with the natural pointer
  182. size
  183. * the procedures without fpu/mm are only for integer usage
  184. * normally the first location is the source and the
  185. second the destination
  186. }
  187. {# Emits instruction to call the method specified by symbol name.
  188. This routine must be overridden for each new target cpu.
  189. }
  190. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  191. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  192. procedure a_call_ref(list : TAsmList;ref : treference);virtual;
  193. { same as a_call_name, might be overridden on certain architectures to emit
  194. static calls without usage of a got trampoline }
  195. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  196. { move instructions }
  197. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : tcgint;register : tregister);virtual; abstract;
  198. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);virtual;
  199. procedure a_load_const_loc(list : TAsmList;a : tcgint;const loc : tlocation);
  200. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  201. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  202. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  203. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  204. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  205. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  206. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  207. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  208. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  209. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  210. { bit scan instructions }
  211. procedure a_bit_scan_reg_reg(list: TAsmList; reverse: boolean; size: tcgsize; src, dst: TRegister); virtual; abstract;
  212. { fpu move instructions }
  213. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  214. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  215. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  216. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  217. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  218. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  219. procedure a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  220. procedure a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  221. { vector register move instructions }
  222. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  223. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  224. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  225. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  226. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  227. procedure a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  228. procedure a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  229. procedure a_loadmm_loc_cgpara(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  230. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  233. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  234. procedure a_loadmm_intreg_reg(list: TAsmList; fromsize, tosize : tcgsize; intreg, mmreg: tregister; shuffle: pmmshuffle); virtual;
  235. procedure a_loadmm_reg_intreg(list: TAsmList; fromsize, tosize : tcgsize; mmreg, intreg: tregister; shuffle : pmmshuffle); virtual;
  236. { basic arithmetic operations }
  237. { note: for operators which require only one argument (not, neg), use }
  238. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  239. { that in this case the *second* operand is used as both source and }
  240. { destination (JM) }
  241. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); virtual; abstract;
  242. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference); virtual;
  243. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  244. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  245. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  246. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  247. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  248. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  249. { trinary operations for processors that support them, 'emulated' }
  250. { on others. None with "ref" arguments since I don't think there }
  251. { are any processors that support it (JM) }
  252. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister); virtual;
  253. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  254. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  255. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  256. { comparison operations }
  257. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  258. l : tasmlabel); virtual;
  259. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  260. l : tasmlabel); virtual;
  261. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: tcgint; const loc: tlocation;
  262. l : tasmlabel);
  263. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  264. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  265. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  266. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  267. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  268. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  269. l : tasmlabel);
  270. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  271. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  272. {$ifdef cpuflags}
  273. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  274. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  275. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  276. }
  277. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  278. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  279. {$endif cpuflags}
  280. {
  281. This routine tries to optimize the op_const_reg/ref opcode, and should be
  282. called at the start of a_op_const_reg/ref. It returns the actual opcode
  283. to emit, and the constant value to emit. This function can opcode OP_NONE to
  284. remove the opcode and OP_MOVE to replace it with a simple load
  285. @param(op The opcode to emit, returns the opcode which must be emitted)
  286. @param(a The constant which should be emitted, returns the constant which must
  287. be emitted)
  288. }
  289. procedure optimize_op_const(var op: topcg; var a : tcgint);virtual;
  290. {#
  291. This routine is used in exception management nodes. It should
  292. save the exception reason currently in the FUNCTION_RETURN_REG. The
  293. save should be done either to a temp (pointed to by href).
  294. or on the stack (pushing the value on the stack).
  295. The size of the value to save is OS_S32. The default version
  296. saves the exception reason to a temp. memory area.
  297. }
  298. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  299. {#
  300. This routine is used in exception management nodes. It should
  301. save the exception reason constant. The
  302. save should be done either to a temp (pointed to by href).
  303. or on the stack (pushing the value on the stack).
  304. The size of the value to save is OS_S32. The default version
  305. saves the exception reason to a temp. memory area.
  306. }
  307. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);virtual;
  308. {#
  309. This routine is used in exception management nodes. It should
  310. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  311. should either be in the temp. area (pointed to by href , href should
  312. *NOT* be freed) or on the stack (the value should be popped).
  313. The size of the value to save is OS_S32. The default version
  314. saves the exception reason to a temp. memory area.
  315. }
  316. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  317. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  318. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  319. {# This should emit the opcode to copy len bytes from the source
  320. to destination.
  321. It must be overridden for each new target processor.
  322. @param(source Source reference of copy)
  323. @param(dest Destination reference of copy)
  324. }
  325. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);virtual; abstract;
  326. {# This should emit the opcode to copy len bytes from the an unaligned source
  327. to destination.
  328. It must be overridden for each new target processor.
  329. @param(source Source reference of copy)
  330. @param(dest Destination reference of copy)
  331. }
  332. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);virtual;
  333. {# This should emit the opcode to a shortrstring from the source
  334. to destination.
  335. @param(source Source reference of copy)
  336. @param(dest Destination reference of copy)
  337. }
  338. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  339. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  340. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  341. procedure g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation;
  342. const name: string);
  343. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  344. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  345. {# Generates overflow checking code for a node }
  346. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  347. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  348. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);virtual;
  349. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  350. {# Emits instructions when compilation is done in profile
  351. mode (this is set as a command line option). The default
  352. behavior does nothing, should be overridden as required.
  353. }
  354. procedure g_profilecode(list : TAsmList);virtual;
  355. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  356. @param(size Number of bytes to allocate)
  357. }
  358. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  359. {# Emits instruction for allocating the locals in entry
  360. code of a routine. This is one of the first
  361. routine called in @var(genentrycode).
  362. @param(localsize Number of bytes to allocate as locals)
  363. }
  364. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  365. {# Emits instructions for returning from a subroutine.
  366. Should also restore the framepointer and stack.
  367. @param(parasize Number of bytes of parameters to deallocate from stack)
  368. }
  369. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  370. {# This routine is called when generating the code for the entry point
  371. of a routine. It should save all registers which are not used in this
  372. routine, and which should be declared as saved in the std_saved_registers
  373. set.
  374. This routine is mainly used when linking to code which is generated
  375. by ABI-compliant compilers (like GCC), to make sure that the reserved
  376. registers of that ABI are not clobbered.
  377. @param(usedinproc Registers which are used in the code of this routine)
  378. }
  379. procedure g_save_registers(list:TAsmList);virtual;
  380. {# This routine is called when generating the code for the exit point
  381. of a routine. It should restore all registers which were previously
  382. saved in @var(g_save_standard_registers).
  383. @param(usedinproc Registers which are used in the code of this routine)
  384. }
  385. procedure g_restore_registers(list:TAsmList);virtual;
  386. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  387. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);virtual;
  388. { generate a stub which only purpose is to pass control the given external method,
  389. setting up any additional environment before doing so (if required).
  390. The default implementation issues a jump instruction to the external name. }
  391. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  392. { initialize the pic/got register }
  393. procedure g_maybe_got_init(list: TAsmList); virtual;
  394. { allocallcpuregisters, a_call_name, deallocallcpuregisters sequence }
  395. procedure g_call(list: TAsmList; const s: string);
  396. { Generate code to exit an unwind-protected region. The default implementation
  397. produces a simple jump to destination label. }
  398. procedure g_local_unwind(list: TAsmList; l: TAsmLabel);virtual;
  399. protected
  400. function g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;virtual;
  401. end;
  402. {$ifndef cpu64bitalu}
  403. {# @abstract(Abstract code generator for 64 Bit operations)
  404. This class implements an abstract code generator class
  405. for 64 Bit operations.
  406. }
  407. tcg64 = class
  408. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  409. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  410. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  411. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  412. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  413. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  414. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  415. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  416. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  417. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  418. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  419. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  420. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  421. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  422. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  423. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  424. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  425. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  426. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  427. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  428. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  429. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  430. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  431. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  432. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  433. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  434. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  435. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  436. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  437. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  438. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  439. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  440. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  441. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  442. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  443. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  444. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  445. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  446. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  447. procedure a_load64_reg_cgpara(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  448. procedure a_load64_const_cgpara(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  449. procedure a_load64_ref_cgpara(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  450. procedure a_load64_loc_cgpara(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  451. procedure a_loadmm_intreg64_reg(list: TAsmList; mmsize: tcgsize; intreg: tregister64; mmreg: tregister); virtual;abstract;
  452. procedure a_loadmm_reg_intreg64(list: TAsmList; mmsize: tcgsize; mmreg: tregister; intreg: tregister64); virtual;abstract;
  453. {
  454. This routine tries to optimize the const_reg opcode, and should be
  455. called at the start of a_op64_const_reg. It returns the actual opcode
  456. to emit, and the constant value to emit. If this routine returns
  457. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  458. @param(op The opcode to emit, returns the opcode which must be emitted)
  459. @param(a The constant which should be emitted, returns the constant which must
  460. be emitted)
  461. @param(reg The register to emit the opcode with, returns the register with
  462. which the opcode will be emitted)
  463. }
  464. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  465. { override to catch 64bit rangechecks }
  466. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  467. end;
  468. {$endif cpu64bitalu}
  469. var
  470. {# Main code generator class }
  471. cg : tcg;
  472. {$ifndef cpu64bitalu}
  473. {# Code generator class for all operations working with 64-Bit operands }
  474. cg64 : tcg64;
  475. {$endif cpu64bitalu}
  476. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  477. procedure destroy_codegen;
  478. implementation
  479. uses
  480. globals,options,systems,
  481. verbose,defutil,paramgr,symsym,
  482. tgobj,cutils,procinfo,
  483. ncgrtti;
  484. {*****************************************************************************
  485. basic functionallity
  486. ******************************************************************************}
  487. constructor tcg.create;
  488. begin
  489. end;
  490. {*****************************************************************************
  491. register allocation
  492. ******************************************************************************}
  493. procedure tcg.init_register_allocators;
  494. begin
  495. fillchar(rg,sizeof(rg),0);
  496. add_reg_instruction_hook:=@add_reg_instruction;
  497. executionweight:=1;
  498. end;
  499. procedure tcg.done_register_allocators;
  500. begin
  501. { Safety }
  502. fillchar(rg,sizeof(rg),0);
  503. add_reg_instruction_hook:=nil;
  504. end;
  505. {$ifdef flowgraph}
  506. procedure Tcg.init_flowgraph;
  507. begin
  508. aktflownode:=0;
  509. end;
  510. procedure Tcg.done_flowgraph;
  511. begin
  512. end;
  513. {$endif}
  514. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  515. begin
  516. if not assigned(rg[R_INTREGISTER]) then
  517. internalerror(200312122);
  518. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  519. end;
  520. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  521. begin
  522. if not assigned(rg[R_FPUREGISTER]) then
  523. internalerror(200312123);
  524. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  525. end;
  526. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  527. begin
  528. if not assigned(rg[R_MMREGISTER]) then
  529. internalerror(2003121214);
  530. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  531. end;
  532. function tcg.getaddressregister(list:TAsmList):Tregister;
  533. begin
  534. if assigned(rg[R_ADDRESSREGISTER]) then
  535. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  536. else
  537. begin
  538. if not assigned(rg[R_INTREGISTER]) then
  539. internalerror(200312121);
  540. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  541. end;
  542. end;
  543. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  544. var
  545. subreg:Tsubregister;
  546. begin
  547. subreg:=cgsize2subreg(getregtype(reg),size);
  548. result:=reg;
  549. setsubreg(result,subreg);
  550. { notify RA }
  551. if result<>reg then
  552. list.concat(tai_regalloc.resize(result));
  553. end;
  554. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  555. begin
  556. if not assigned(rg[getregtype(r)]) then
  557. internalerror(200312125);
  558. rg[getregtype(r)].getcpuregister(list,r);
  559. end;
  560. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  561. begin
  562. if not assigned(rg[getregtype(r)]) then
  563. internalerror(200312126);
  564. rg[getregtype(r)].ungetcpuregister(list,r);
  565. end;
  566. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  567. begin
  568. if assigned(rg[rt]) then
  569. rg[rt].alloccpuregisters(list,r)
  570. else
  571. internalerror(200310092);
  572. end;
  573. procedure tcg.allocallcpuregisters(list:TAsmList);
  574. begin
  575. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  576. {$if not(defined(i386)) and not(defined(avr))}
  577. if uses_registers(R_FPUREGISTER) then
  578. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  579. {$ifdef cpumm}
  580. if uses_registers(R_MMREGISTER) then
  581. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  582. {$endif cpumm}
  583. {$endif not(defined(i386)) and not(defined(avr))}
  584. end;
  585. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  586. begin
  587. if assigned(rg[rt]) then
  588. rg[rt].dealloccpuregisters(list,r)
  589. else
  590. internalerror(200310093);
  591. end;
  592. procedure tcg.deallocallcpuregisters(list:TAsmList);
  593. begin
  594. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  595. {$if not(defined(i386)) and not(defined(avr))}
  596. if uses_registers(R_FPUREGISTER) then
  597. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  598. {$ifdef cpumm}
  599. if uses_registers(R_MMREGISTER) then
  600. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  601. {$endif cpumm}
  602. {$endif not(defined(i386)) and not(defined(avr))}
  603. end;
  604. function tcg.uses_registers(rt:Tregistertype):boolean;
  605. begin
  606. if assigned(rg[rt]) then
  607. result:=rg[rt].uses_registers
  608. else
  609. result:=false;
  610. end;
  611. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  612. var
  613. rt : tregistertype;
  614. begin
  615. rt:=getregtype(r);
  616. { Only add it when a register allocator is configured.
  617. No IE can be generated, because the VMT is written
  618. without a valid rg[] }
  619. if assigned(rg[rt]) then
  620. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  621. end;
  622. procedure tcg.add_move_instruction(instr:Taicpu);
  623. var
  624. rt : tregistertype;
  625. begin
  626. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  627. if assigned(rg[rt]) then
  628. rg[rt].add_move_instruction(instr)
  629. else
  630. internalerror(200310095);
  631. end;
  632. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  633. var
  634. rt : tregistertype;
  635. begin
  636. for rt:=low(rg) to high(rg) do
  637. begin
  638. if assigned(rg[rt]) then
  639. rg[rt].live_range_direction:=dir;
  640. end;
  641. end;
  642. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  643. var
  644. rt : tregistertype;
  645. begin
  646. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  647. begin
  648. if assigned(rg[rt]) then
  649. rg[rt].do_register_allocation(list,headertai);
  650. end;
  651. { running the other register allocator passes could require addition int/addr. registers
  652. when spilling so run int/addr register allocation at the end }
  653. if assigned(rg[R_INTREGISTER]) then
  654. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  655. if assigned(rg[R_ADDRESSREGISTER]) then
  656. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  657. end;
  658. procedure tcg.translate_register(var reg : tregister);
  659. begin
  660. rg[getregtype(reg)].translate_register(reg);
  661. end;
  662. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  663. begin
  664. list.concat(tai_regalloc.alloc(r,nil));
  665. end;
  666. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  667. begin
  668. list.concat(tai_regalloc.dealloc(r,nil));
  669. end;
  670. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  671. var
  672. instr : tai;
  673. begin
  674. instr:=tai_regalloc.sync(r);
  675. list.concat(instr);
  676. add_reg_instruction(instr,r);
  677. end;
  678. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  679. begin
  680. list.concat(tai_label.create(l));
  681. end;
  682. {*****************************************************************************
  683. for better code generation these methods should be overridden
  684. ******************************************************************************}
  685. procedure tcg.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  686. var
  687. ref : treference;
  688. tmpreg : tregister;
  689. begin
  690. cgpara.check_simple_location;
  691. paramanager.alloccgpara(list,cgpara);
  692. if cgpara.location^.shiftval<0 then
  693. begin
  694. tmpreg:=getintregister(list,cgpara.location^.size);
  695. a_op_const_reg_reg(list,OP_SHL,cgpara.location^.size,-cgpara.location^.shiftval,r,tmpreg);
  696. r:=tmpreg;
  697. end;
  698. case cgpara.location^.loc of
  699. LOC_REGISTER,LOC_CREGISTER:
  700. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  701. LOC_REFERENCE,LOC_CREFERENCE:
  702. begin
  703. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  704. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  705. end;
  706. LOC_MMREGISTER,LOC_CMMREGISTER:
  707. a_loadmm_intreg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register,mms_movescalar);
  708. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  709. begin
  710. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  711. a_load_reg_ref(list,size,size,r,ref);
  712. a_loadfpu_ref_cgpara(list,cgpara.location^.size,ref,cgpara);
  713. tg.Ungettemp(list,ref);
  714. end
  715. else
  716. internalerror(2002071004);
  717. end;
  718. end;
  719. procedure tcg.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const cgpara : TCGPara);
  720. var
  721. ref : treference;
  722. begin
  723. cgpara.check_simple_location;
  724. paramanager.alloccgpara(list,cgpara);
  725. if cgpara.location^.shiftval<0 then
  726. a:=a shl -cgpara.location^.shiftval;
  727. case cgpara.location^.loc of
  728. LOC_REGISTER,LOC_CREGISTER:
  729. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  730. LOC_REFERENCE,LOC_CREFERENCE:
  731. begin
  732. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  733. a_load_const_ref(list,cgpara.location^.size,a,ref);
  734. end
  735. else
  736. internalerror(2010053109);
  737. end;
  738. end;
  739. procedure tcg.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  740. var
  741. tmpref, ref: treference;
  742. tmpreg: tregister;
  743. location: pcgparalocation;
  744. orgsizeleft,
  745. sizeleft: tcgint;
  746. reghasvalue: boolean;
  747. begin
  748. location:=cgpara.location;
  749. tmpref:=r;
  750. sizeleft:=cgpara.intsize;
  751. while assigned(location) do
  752. begin
  753. paramanager.allocparaloc(list,location);
  754. case location^.loc of
  755. LOC_REGISTER,LOC_CREGISTER:
  756. begin
  757. { Parameter locations are often allocated in multiples of
  758. entire registers. If a parameter only occupies a part of
  759. such a register (e.g. a 16 bit int on a 32 bit
  760. architecture), the size of this parameter can only be
  761. determined by looking at the "size" parameter of this
  762. method -> if the size parameter is <= sizeof(aint), then
  763. we check that there is only one parameter location and
  764. then use this "size" to load the value into the parameter
  765. location }
  766. if (size<>OS_NO) and
  767. (tcgsize2size[size]<=sizeof(aint)) then
  768. begin
  769. cgpara.check_simple_location;
  770. a_load_ref_reg(list,size,location^.size,tmpref,location^.register);
  771. if location^.shiftval<0 then
  772. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  773. end
  774. { there's a lot more data left, and the current paraloc's
  775. register is entirely filled with part of that data }
  776. else if (sizeleft>sizeof(aint)) then
  777. begin
  778. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  779. end
  780. { we're at the end of the data, and it can be loaded into
  781. the current location's register with a single regular
  782. load }
  783. else if (sizeleft in [1,2{$ifndef cpu16bitalu},4{$endif}{$ifdef cpu64bitalu},8{$endif}]) then
  784. begin
  785. a_load_ref_reg(list,int_cgsize(sizeleft),location^.size,tmpref,location^.register);
  786. if location^.shiftval<0 then
  787. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  788. end
  789. { we're at the end of the data, and we need multiple loads
  790. to get it in the register because it's an irregular size }
  791. else
  792. begin
  793. { should be the last part }
  794. if assigned(location^.next) then
  795. internalerror(2010052907);
  796. { load the value piecewise to get it into the register }
  797. orgsizeleft:=sizeleft;
  798. reghasvalue:=false;
  799. {$ifdef cpu64bitalu}
  800. if sizeleft>=4 then
  801. begin
  802. a_load_ref_reg(list,OS_32,location^.size,tmpref,location^.register);
  803. dec(sizeleft,4);
  804. if target_info.endian=endian_big then
  805. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,location^.register);
  806. inc(tmpref.offset,4);
  807. reghasvalue:=true;
  808. end;
  809. {$endif cpu64bitalu}
  810. if sizeleft>=2 then
  811. begin
  812. tmpreg:=getintregister(list,location^.size);
  813. a_load_ref_reg(list,OS_16,location^.size,tmpref,tmpreg);
  814. dec(sizeleft,2);
  815. if reghasvalue then
  816. begin
  817. if target_info.endian=endian_big then
  818. a_op_const_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg)
  819. else
  820. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+2))*8,tmpreg);
  821. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register);
  822. end
  823. else
  824. begin
  825. if target_info.endian=endian_big then
  826. a_op_const_reg_reg(list,OP_SHL,location^.size,sizeleft*8,tmpreg,location^.register)
  827. else
  828. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  829. end;
  830. inc(tmpref.offset,2);
  831. reghasvalue:=true;
  832. end;
  833. if sizeleft=1 then
  834. begin
  835. tmpreg:=getintregister(list,location^.size);
  836. a_load_ref_reg(list,OS_8,location^.size,tmpref,tmpreg);
  837. dec(sizeleft,1);
  838. if reghasvalue then
  839. begin
  840. if target_info.endian=endian_little then
  841. a_op_const_reg(list,OP_SHL,location^.size,(orgsizeleft-(sizeleft+1))*8,tmpreg);
  842. a_op_reg_reg(list,OP_OR,location^.size,tmpreg,location^.register)
  843. end
  844. else
  845. a_load_reg_reg(list,location^.size,location^.size,tmpreg,location^.register);
  846. inc(tmpref.offset);
  847. end;
  848. if location^.shiftval<0 then
  849. a_op_const_reg(list,OP_SHL,location^.size,-location^.shiftval,location^.register);
  850. { the loop will already adjust the offset and sizeleft }
  851. dec(tmpref.offset,orgsizeleft);
  852. sizeleft:=orgsizeleft;
  853. end;
  854. end;
  855. LOC_REFERENCE,LOC_CREFERENCE:
  856. begin
  857. if assigned(location^.next) then
  858. internalerror(2010052906);
  859. reference_reset_base(ref,location^.reference.index,location^.reference.offset,newalignment(cgpara.alignment,cgpara.intsize-sizeleft));
  860. if (size <> OS_NO) and
  861. (tcgsize2size[size] <= sizeof(aint)) then
  862. a_load_ref_ref(list,size,location^.size,tmpref,ref)
  863. else
  864. { use concatcopy, because the parameter can be larger than }
  865. { what the OS_* constants can handle }
  866. g_concatcopy(list,tmpref,ref,sizeleft);
  867. end;
  868. LOC_MMREGISTER,LOC_CMMREGISTER:
  869. begin
  870. case location^.size of
  871. OS_F32,
  872. OS_F64,
  873. OS_F128:
  874. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,mms_movescalar);
  875. OS_M8..OS_M128,
  876. OS_MS8..OS_MS128:
  877. a_loadmm_ref_reg(list,location^.size,location^.size,tmpref,location^.register,nil);
  878. else
  879. internalerror(2010053101);
  880. end;
  881. end
  882. else
  883. internalerror(2010053111);
  884. end;
  885. inc(tmpref.offset,tcgsize2size[location^.size]);
  886. dec(sizeleft,tcgsize2size[location^.size]);
  887. location:=location^.next;
  888. end;
  889. end;
  890. procedure tcg.a_load_loc_cgpara(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  891. begin
  892. case l.loc of
  893. LOC_REGISTER,
  894. LOC_CREGISTER :
  895. a_load_reg_cgpara(list,l.size,l.register,cgpara);
  896. LOC_CONSTANT :
  897. a_load_const_cgpara(list,l.size,l.value,cgpara);
  898. LOC_CREFERENCE,
  899. LOC_REFERENCE :
  900. a_load_ref_cgpara(list,l.size,l.reference,cgpara);
  901. else
  902. internalerror(2002032211);
  903. end;
  904. end;
  905. procedure tcg.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const cgpara : TCGPara);
  906. var
  907. hr : tregister;
  908. begin
  909. cgpara.check_simple_location;
  910. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  911. begin
  912. paramanager.allocparaloc(list,cgpara.location);
  913. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  914. end
  915. else
  916. begin
  917. hr:=getaddressregister(list);
  918. a_loadaddr_ref_reg(list,r,hr);
  919. a_load_reg_cgpara(list,OS_ADDR,hr,cgpara);
  920. end;
  921. end;
  922. procedure tcg.a_load_cgparaloc_ref(list : TAsmList;const paraloc : TCGParaLocation;const ref : treference;sizeleft : tcgint;align : longint);
  923. var
  924. href : treference;
  925. hreg : tregister;
  926. cgsize: tcgsize;
  927. begin
  928. case paraloc.loc of
  929. LOC_REGISTER :
  930. begin
  931. hreg:=paraloc.register;
  932. cgsize:=paraloc.size;
  933. if paraloc.shiftval>0 then
  934. a_op_const_reg_reg(list,OP_SHL,OS_INT,paraloc.shiftval,paraloc.register,paraloc.register)
  935. else if (paraloc.shiftval<0) and
  936. (sizeleft in [1,2,4]) then
  937. begin
  938. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  939. { convert to a register of 1/2/4 bytes in size, since the
  940. original register had to be made larger to be able to hold
  941. the shifted value }
  942. cgsize:=int_cgsize(tcgsize2size[OS_INT]-(-paraloc.shiftval div 8));
  943. hreg:=getintregister(list,cgsize);
  944. a_load_reg_reg(list,OS_INT,cgsize,paraloc.register,hreg);
  945. end;
  946. a_load_reg_ref(list,paraloc.size,cgsize,hreg,ref);
  947. end;
  948. LOC_MMREGISTER :
  949. begin
  950. case paraloc.size of
  951. OS_F32,
  952. OS_F64,
  953. OS_F128:
  954. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,mms_movescalar);
  955. OS_M8..OS_M128,
  956. OS_MS8..OS_MS128:
  957. a_loadmm_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref,nil);
  958. else
  959. internalerror(2010053102);
  960. end;
  961. end;
  962. LOC_FPUREGISTER :
  963. cg.a_loadfpu_reg_ref(list,paraloc.size,paraloc.size,paraloc.register,ref);
  964. LOC_REFERENCE :
  965. begin
  966. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  967. { use concatcopy, because it can also be a float which fails when
  968. load_ref_ref is used. Don't copy data when the references are equal }
  969. if not((href.base=ref.base) and (href.offset=ref.offset)) then
  970. g_concatcopy(list,href,ref,sizeleft);
  971. end;
  972. else
  973. internalerror(2002081302);
  974. end;
  975. end;
  976. procedure tcg.a_load_cgparaloc_anyreg(list: TAsmList;regsize: tcgsize;const paraloc: TCGParaLocation;reg: tregister;align: longint);
  977. var
  978. href : treference;
  979. begin
  980. case paraloc.loc of
  981. LOC_REGISTER :
  982. begin
  983. if paraloc.shiftval<0 then
  984. a_op_const_reg_reg(list,OP_SHR,OS_INT,-paraloc.shiftval,paraloc.register,paraloc.register);
  985. case getregtype(reg) of
  986. R_INTREGISTER:
  987. a_load_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  988. R_MMREGISTER:
  989. a_loadmm_intreg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  990. else
  991. internalerror(2009112422);
  992. end;
  993. end;
  994. LOC_MMREGISTER :
  995. begin
  996. case getregtype(reg) of
  997. R_INTREGISTER:
  998. a_loadmm_reg_intreg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  999. R_MMREGISTER:
  1000. begin
  1001. case paraloc.size of
  1002. OS_F32,
  1003. OS_F64,
  1004. OS_F128:
  1005. a_loadmm_reg_reg(list,paraloc.size,regsize,paraloc.register,reg,mms_movescalar);
  1006. OS_M8..OS_M128,
  1007. OS_MS8..OS_MS128:
  1008. a_loadmm_reg_reg(list,paraloc.size,paraloc.size,paraloc.register,reg,nil);
  1009. else
  1010. internalerror(2010053102);
  1011. end;
  1012. end;
  1013. else
  1014. internalerror(2010053104);
  1015. end;
  1016. end;
  1017. LOC_FPUREGISTER :
  1018. a_loadfpu_reg_reg(list,paraloc.size,regsize,paraloc.register,reg);
  1019. LOC_REFERENCE :
  1020. begin
  1021. reference_reset_base(href,paraloc.reference.index,paraloc.reference.offset,align);
  1022. case getregtype(reg) of
  1023. R_INTREGISTER :
  1024. a_load_ref_reg(list,paraloc.size,regsize,href,reg);
  1025. R_FPUREGISTER :
  1026. a_loadfpu_ref_reg(list,paraloc.size,regsize,href,reg);
  1027. R_MMREGISTER :
  1028. { not paraloc.size, because it may be OS_64 instead of
  1029. OS_F64 in case the parameter is passed using integer
  1030. conventions (e.g., on ARM) }
  1031. a_loadmm_ref_reg(list,regsize,regsize,href,reg,mms_movescalar);
  1032. else
  1033. internalerror(2004101012);
  1034. end;
  1035. end;
  1036. else
  1037. internalerror(2002081302);
  1038. end;
  1039. end;
  1040. {****************************************************************************
  1041. some generic implementations
  1042. ****************************************************************************}
  1043. { memory/register loading }
  1044. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1045. var
  1046. tmpref : treference;
  1047. tmpreg : tregister;
  1048. i : longint;
  1049. begin
  1050. if ref.alignment<tcgsize2size[fromsize] then
  1051. begin
  1052. tmpref:=ref;
  1053. { we take care of the alignment now }
  1054. tmpref.alignment:=0;
  1055. case FromSize of
  1056. OS_16,OS_S16:
  1057. begin
  1058. tmpreg:=getintregister(list,OS_16);
  1059. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1060. if target_info.endian=endian_big then
  1061. inc(tmpref.offset);
  1062. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1063. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1064. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1065. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1066. if target_info.endian=endian_big then
  1067. dec(tmpref.offset)
  1068. else
  1069. inc(tmpref.offset);
  1070. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1071. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1072. end;
  1073. OS_32,OS_S32:
  1074. begin
  1075. { could add an optimised case for ref.alignment=2 }
  1076. tmpreg:=getintregister(list,OS_32);
  1077. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1078. if target_info.endian=endian_big then
  1079. inc(tmpref.offset,3);
  1080. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1081. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1082. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1083. for i:=1 to 3 do
  1084. begin
  1085. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1086. if target_info.endian=endian_big then
  1087. dec(tmpref.offset)
  1088. else
  1089. inc(tmpref.offset);
  1090. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1091. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1092. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1093. end;
  1094. end
  1095. else
  1096. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1097. end;
  1098. end
  1099. else
  1100. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1101. end;
  1102. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1103. var
  1104. tmpref : treference;
  1105. tmpreg,
  1106. tmpreg2 : tregister;
  1107. i : longint;
  1108. begin
  1109. if ref.alignment in [1,2] then
  1110. begin
  1111. tmpref:=ref;
  1112. { we take care of the alignment now }
  1113. tmpref.alignment:=0;
  1114. case FromSize of
  1115. OS_16,OS_S16:
  1116. if ref.alignment=2 then
  1117. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1118. else
  1119. begin
  1120. { first load in tmpreg, because the target register }
  1121. { may be used in ref as well }
  1122. if target_info.endian=endian_little then
  1123. inc(tmpref.offset);
  1124. tmpreg:=getintregister(list,OS_8);
  1125. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1126. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1127. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1128. if target_info.endian=endian_little then
  1129. dec(tmpref.offset)
  1130. else
  1131. inc(tmpref.offset);
  1132. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1133. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1134. end;
  1135. OS_32,OS_S32:
  1136. if ref.alignment=2 then
  1137. begin
  1138. if target_info.endian=endian_little then
  1139. inc(tmpref.offset,2);
  1140. tmpreg:=getintregister(list,OS_32);
  1141. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1142. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1143. if target_info.endian=endian_little then
  1144. dec(tmpref.offset,2)
  1145. else
  1146. inc(tmpref.offset,2);
  1147. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1148. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1149. end
  1150. else
  1151. begin
  1152. if target_info.endian=endian_little then
  1153. inc(tmpref.offset,3);
  1154. tmpreg:=getintregister(list,OS_32);
  1155. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1156. tmpreg2:=getintregister(list,OS_32);
  1157. for i:=1 to 3 do
  1158. begin
  1159. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1160. if target_info.endian=endian_little then
  1161. dec(tmpref.offset)
  1162. else
  1163. inc(tmpref.offset);
  1164. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1165. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1166. end;
  1167. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1168. end
  1169. else
  1170. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1171. end;
  1172. end
  1173. else
  1174. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1175. end;
  1176. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1177. var
  1178. tmpreg: tregister;
  1179. begin
  1180. { verify if we have the same reference }
  1181. if references_equal(sref,dref) then
  1182. exit;
  1183. tmpreg:=getintregister(list,tosize);
  1184. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1185. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1186. end;
  1187. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : tcgint;const ref : treference);
  1188. var
  1189. tmpreg: tregister;
  1190. begin
  1191. tmpreg:=getintregister(list,size);
  1192. a_load_const_reg(list,size,a,tmpreg);
  1193. a_load_reg_ref(list,size,size,tmpreg,ref);
  1194. end;
  1195. procedure tcg.a_load_const_loc(list : TAsmList;a : tcgint;const loc: tlocation);
  1196. begin
  1197. case loc.loc of
  1198. LOC_REFERENCE,LOC_CREFERENCE:
  1199. a_load_const_ref(list,loc.size,a,loc.reference);
  1200. LOC_REGISTER,LOC_CREGISTER:
  1201. a_load_const_reg(list,loc.size,a,loc.register);
  1202. else
  1203. internalerror(200203272);
  1204. end;
  1205. end;
  1206. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1207. begin
  1208. case loc.loc of
  1209. LOC_REFERENCE,LOC_CREFERENCE:
  1210. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1211. LOC_REGISTER,LOC_CREGISTER:
  1212. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1213. LOC_MMREGISTER,LOC_CMMREGISTER:
  1214. a_loadmm_intreg_reg(list,fromsize,loc.size,reg,loc.register,mms_movescalar);
  1215. else
  1216. internalerror(200203271);
  1217. end;
  1218. end;
  1219. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  1220. begin
  1221. case loc.loc of
  1222. LOC_REFERENCE,LOC_CREFERENCE:
  1223. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1224. LOC_REGISTER,LOC_CREGISTER:
  1225. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  1226. LOC_CONSTANT:
  1227. a_load_const_reg(list,tosize,loc.value,reg);
  1228. else
  1229. internalerror(200109092);
  1230. end;
  1231. end;
  1232. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  1233. begin
  1234. case loc.loc of
  1235. LOC_REFERENCE,LOC_CREFERENCE:
  1236. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  1237. LOC_REGISTER,LOC_CREGISTER:
  1238. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  1239. LOC_CONSTANT:
  1240. a_load_const_ref(list,tosize,loc.value,ref);
  1241. else
  1242. internalerror(200109302);
  1243. end;
  1244. end;
  1245. procedure tcg.optimize_op_const(var op: topcg; var a : tcgint);
  1246. var
  1247. powerval : longint;
  1248. begin
  1249. case op of
  1250. OP_OR :
  1251. begin
  1252. { or with zero returns same result }
  1253. if a = 0 then
  1254. op:=OP_NONE
  1255. else
  1256. { or with max returns max }
  1257. if a = -1 then
  1258. op:=OP_MOVE;
  1259. end;
  1260. OP_AND :
  1261. begin
  1262. { and with max returns same result }
  1263. if (a = -1) then
  1264. op:=OP_NONE
  1265. else
  1266. { and with 0 returns 0 }
  1267. if a=0 then
  1268. op:=OP_MOVE;
  1269. end;
  1270. OP_DIV :
  1271. begin
  1272. { division by 1 returns result }
  1273. if a = 1 then
  1274. op:=OP_NONE
  1275. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1276. begin
  1277. a := powerval;
  1278. op:= OP_SHR;
  1279. end;
  1280. end;
  1281. OP_IDIV:
  1282. begin
  1283. if a = 1 then
  1284. op:=OP_NONE;
  1285. end;
  1286. OP_MUL,OP_IMUL:
  1287. begin
  1288. if a = 1 then
  1289. op:=OP_NONE
  1290. else
  1291. if a=0 then
  1292. op:=OP_MOVE
  1293. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  1294. begin
  1295. a := powerval;
  1296. op:= OP_SHL;
  1297. end;
  1298. end;
  1299. OP_ADD,OP_SUB:
  1300. begin
  1301. if a = 0 then
  1302. op:=OP_NONE;
  1303. end;
  1304. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  1305. begin
  1306. if a = 0 then
  1307. op:=OP_NONE;
  1308. end;
  1309. end;
  1310. end;
  1311. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  1312. begin
  1313. case loc.loc of
  1314. LOC_REFERENCE, LOC_CREFERENCE:
  1315. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  1316. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1317. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  1318. else
  1319. internalerror(200203301);
  1320. end;
  1321. end;
  1322. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  1323. begin
  1324. case loc.loc of
  1325. LOC_REFERENCE, LOC_CREFERENCE:
  1326. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1327. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  1328. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1329. else
  1330. internalerror(48991);
  1331. end;
  1332. end;
  1333. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  1334. var
  1335. reg: tregister;
  1336. regsize: tcgsize;
  1337. begin
  1338. if (fromsize>=tosize) then
  1339. regsize:=fromsize
  1340. else
  1341. regsize:=tosize;
  1342. reg:=getfpuregister(list,regsize);
  1343. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  1344. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  1345. end;
  1346. procedure tcg.a_loadfpu_reg_cgpara(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  1347. var
  1348. ref : treference;
  1349. begin
  1350. paramanager.alloccgpara(list,cgpara);
  1351. case cgpara.location^.loc of
  1352. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1353. begin
  1354. cgpara.check_simple_location;
  1355. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  1356. end;
  1357. LOC_REFERENCE,LOC_CREFERENCE:
  1358. begin
  1359. cgpara.check_simple_location;
  1360. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1361. a_loadfpu_reg_ref(list,size,size,r,ref);
  1362. end;
  1363. LOC_REGISTER,LOC_CREGISTER:
  1364. begin
  1365. { paramfpu_ref does the check_simpe_location check here if necessary }
  1366. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  1367. a_loadfpu_reg_ref(list,size,size,r,ref);
  1368. a_loadfpu_ref_cgpara(list,size,ref,cgpara);
  1369. tg.Ungettemp(list,ref);
  1370. end;
  1371. else
  1372. internalerror(2010053112);
  1373. end;
  1374. end;
  1375. procedure tcg.a_loadfpu_ref_cgpara(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  1376. var
  1377. href : treference;
  1378. hsize: tcgsize;
  1379. begin
  1380. case cgpara.location^.loc of
  1381. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  1382. begin
  1383. cgpara.check_simple_location;
  1384. paramanager.alloccgpara(list,cgpara);
  1385. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  1386. end;
  1387. LOC_REFERENCE,LOC_CREFERENCE:
  1388. begin
  1389. cgpara.check_simple_location;
  1390. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1391. { concatcopy should choose the best way to copy the data }
  1392. g_concatcopy(list,ref,href,tcgsize2size[size]);
  1393. end;
  1394. LOC_REGISTER,LOC_CREGISTER:
  1395. begin
  1396. { force integer size }
  1397. hsize:=int_cgsize(tcgsize2size[size]);
  1398. {$ifndef cpu64bitalu}
  1399. if (hsize in [OS_S64,OS_64]) then
  1400. cg64.a_load64_ref_cgpara(list,ref,cgpara)
  1401. else
  1402. {$endif not cpu64bitalu}
  1403. begin
  1404. cgpara.check_simple_location;
  1405. a_load_ref_cgpara(list,hsize,ref,cgpara)
  1406. end;
  1407. end
  1408. else
  1409. internalerror(200402201);
  1410. end;
  1411. end;
  1412. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; const ref: TReference);
  1413. var
  1414. tmpreg : tregister;
  1415. begin
  1416. tmpreg:=getintregister(list,size);
  1417. a_load_ref_reg(list,size,size,ref,tmpreg);
  1418. a_op_const_reg(list,op,size,a,tmpreg);
  1419. a_load_reg_ref(list,size,size,tmpreg,ref);
  1420. end;
  1421. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: tcgint; const loc: tlocation);
  1422. begin
  1423. case loc.loc of
  1424. LOC_REGISTER, LOC_CREGISTER:
  1425. a_op_const_reg(list,op,loc.size,a,loc.register);
  1426. LOC_REFERENCE, LOC_CREFERENCE:
  1427. a_op_const_ref(list,op,loc.size,a,loc.reference);
  1428. else
  1429. internalerror(200109061);
  1430. end;
  1431. end;
  1432. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  1433. var
  1434. tmpreg : tregister;
  1435. begin
  1436. tmpreg:=getintregister(list,size);
  1437. a_load_ref_reg(list,size,size,ref,tmpreg);
  1438. a_op_reg_reg(list,op,size,reg,tmpreg);
  1439. a_load_reg_ref(list,size,size,tmpreg,ref);
  1440. end;
  1441. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  1442. var
  1443. tmpreg: tregister;
  1444. begin
  1445. case op of
  1446. OP_NOT,OP_NEG:
  1447. { handle it as "load ref,reg; op reg" }
  1448. begin
  1449. a_load_ref_reg(list,size,size,ref,reg);
  1450. a_op_reg_reg(list,op,size,reg,reg);
  1451. end;
  1452. else
  1453. begin
  1454. tmpreg:=getintregister(list,size);
  1455. a_load_ref_reg(list,size,size,ref,tmpreg);
  1456. a_op_reg_reg(list,op,size,tmpreg,reg);
  1457. end;
  1458. end;
  1459. end;
  1460. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  1461. begin
  1462. case loc.loc of
  1463. LOC_REGISTER, LOC_CREGISTER:
  1464. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  1465. LOC_REFERENCE, LOC_CREFERENCE:
  1466. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  1467. else
  1468. internalerror(200109061);
  1469. end;
  1470. end;
  1471. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  1472. var
  1473. tmpreg: tregister;
  1474. begin
  1475. case loc.loc of
  1476. LOC_REGISTER,LOC_CREGISTER:
  1477. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  1478. LOC_REFERENCE,LOC_CREFERENCE:
  1479. begin
  1480. tmpreg:=getintregister(list,loc.size);
  1481. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  1482. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  1483. end;
  1484. else
  1485. internalerror(200109061);
  1486. end;
  1487. end;
  1488. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  1489. a:tcgint;src,dst:Tregister);
  1490. begin
  1491. a_load_reg_reg(list,size,size,src,dst);
  1492. a_op_const_reg(list,op,size,a,dst);
  1493. end;
  1494. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  1495. size: tcgsize; src1, src2, dst: tregister);
  1496. var
  1497. tmpreg: tregister;
  1498. begin
  1499. if (dst<>src1) then
  1500. begin
  1501. a_load_reg_reg(list,size,size,src2,dst);
  1502. a_op_reg_reg(list,op,size,src1,dst);
  1503. end
  1504. else
  1505. begin
  1506. { can we do a direct operation on the target register ? }
  1507. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  1508. a_op_reg_reg(list,op,size,src2,dst)
  1509. else
  1510. begin
  1511. tmpreg:=getintregister(list,size);
  1512. a_load_reg_reg(list,size,size,src2,tmpreg);
  1513. a_op_reg_reg(list,op,size,src1,tmpreg);
  1514. a_load_reg_reg(list,size,size,tmpreg,dst);
  1515. end;
  1516. end;
  1517. end;
  1518. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: tcgint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1519. begin
  1520. a_op_const_reg_reg(list,op,size,a,src,dst);
  1521. ovloc.loc:=LOC_VOID;
  1522. end;
  1523. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  1524. begin
  1525. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  1526. ovloc.loc:=LOC_VOID;
  1527. end;
  1528. procedure tcg.a_cmp_const_reg_label(list: TAsmList; size: tcgsize;
  1529. cmp_op: topcmp; a: tcgint; reg: tregister; l: tasmlabel);
  1530. var
  1531. tmpreg: tregister;
  1532. begin
  1533. tmpreg:=getintregister(list,size);
  1534. a_load_const_reg(list,size,a,tmpreg);
  1535. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1536. end;
  1537. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const ref : treference;
  1538. l : tasmlabel);
  1539. var
  1540. tmpreg: tregister;
  1541. begin
  1542. tmpreg:=getintregister(list,size);
  1543. a_load_ref_reg(list,size,size,ref,tmpreg);
  1544. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  1545. end;
  1546. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;const loc : tlocation;
  1547. l : tasmlabel);
  1548. begin
  1549. case loc.loc of
  1550. LOC_REGISTER,LOC_CREGISTER:
  1551. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  1552. LOC_REFERENCE,LOC_CREFERENCE:
  1553. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  1554. else
  1555. internalerror(200109061);
  1556. end;
  1557. end;
  1558. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  1559. var
  1560. tmpreg: tregister;
  1561. begin
  1562. tmpreg:=getintregister(list,size);
  1563. a_load_ref_reg(list,size,size,ref,tmpreg);
  1564. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  1565. end;
  1566. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  1567. var
  1568. tmpreg: tregister;
  1569. begin
  1570. tmpreg:=getintregister(list,size);
  1571. a_load_ref_reg(list,size,size,ref,tmpreg);
  1572. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  1573. end;
  1574. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  1575. begin
  1576. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  1577. end;
  1578. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  1579. begin
  1580. case loc.loc of
  1581. LOC_REGISTER,
  1582. LOC_CREGISTER:
  1583. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  1584. LOC_REFERENCE,
  1585. LOC_CREFERENCE :
  1586. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  1587. LOC_CONSTANT:
  1588. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  1589. else
  1590. internalerror(200203231);
  1591. end;
  1592. end;
  1593. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  1594. l : tasmlabel);
  1595. var
  1596. tmpreg: tregister;
  1597. begin
  1598. case loc.loc of
  1599. LOC_REGISTER,LOC_CREGISTER:
  1600. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  1601. LOC_REFERENCE,LOC_CREFERENCE:
  1602. begin
  1603. tmpreg:=getintregister(list,size);
  1604. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  1605. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  1606. end;
  1607. else
  1608. internalerror(200109061);
  1609. end;
  1610. end;
  1611. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  1612. var
  1613. tmpreg: tregister;
  1614. begin
  1615. case loc.loc of
  1616. LOC_MMREGISTER,LOC_CMMREGISTER:
  1617. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1618. LOC_REFERENCE,LOC_CREFERENCE:
  1619. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  1620. LOC_REGISTER,LOC_CREGISTER:
  1621. a_loadmm_intreg_reg(list,loc.size,size,loc.register,reg,shuffle);
  1622. else
  1623. internalerror(200310121);
  1624. end;
  1625. end;
  1626. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  1627. begin
  1628. case loc.loc of
  1629. LOC_MMREGISTER,LOC_CMMREGISTER:
  1630. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  1631. LOC_REFERENCE,LOC_CREFERENCE:
  1632. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  1633. else
  1634. internalerror(200310122);
  1635. end;
  1636. end;
  1637. procedure tcg.a_loadmm_reg_cgpara(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  1638. var
  1639. href : treference;
  1640. {$ifndef cpu64bitalu}
  1641. tmpreg : tregister;
  1642. reg64 : tregister64;
  1643. {$endif not cpu64bitalu}
  1644. begin
  1645. {$ifndef cpu64bitalu}
  1646. if not(cgpara.location^.loc in [LOC_REGISTER,LOC_CREGISTER]) or
  1647. (size<>OS_F64) then
  1648. {$endif not cpu64bitalu}
  1649. cgpara.check_simple_location;
  1650. paramanager.alloccgpara(list,cgpara);
  1651. case cgpara.location^.loc of
  1652. LOC_MMREGISTER,LOC_CMMREGISTER:
  1653. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  1654. LOC_REFERENCE,LOC_CREFERENCE:
  1655. begin
  1656. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  1657. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  1658. end;
  1659. LOC_REGISTER,LOC_CREGISTER:
  1660. begin
  1661. if assigned(shuffle) and
  1662. not shufflescalar(shuffle) then
  1663. internalerror(2009112510);
  1664. {$ifndef cpu64bitalu}
  1665. if (size=OS_F64) then
  1666. begin
  1667. if not assigned(cgpara.location^.next) or
  1668. assigned(cgpara.location^.next^.next) then
  1669. internalerror(2009112512);
  1670. case cgpara.location^.next^.loc of
  1671. LOC_REGISTER,LOC_CREGISTER:
  1672. tmpreg:=cgpara.location^.next^.register;
  1673. LOC_REFERENCE,LOC_CREFERENCE:
  1674. tmpreg:=getintregister(list,OS_32);
  1675. else
  1676. internalerror(2009112910);
  1677. end;
  1678. if (target_info.endian=ENDIAN_BIG) then
  1679. begin
  1680. { paraloc^ -> high
  1681. paraloc^.next -> low }
  1682. reg64.reghi:=cgpara.location^.register;
  1683. reg64.reglo:=tmpreg;
  1684. end
  1685. else
  1686. begin
  1687. { paraloc^ -> low
  1688. paraloc^.next -> high }
  1689. reg64.reglo:=cgpara.location^.register;
  1690. reg64.reghi:=tmpreg;
  1691. end;
  1692. cg64.a_loadmm_reg_intreg64(list,size,reg,reg64);
  1693. if (cgpara.location^.next^.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  1694. begin
  1695. if not(cgpara.location^.next^.size in [OS_32,OS_S32]) then
  1696. internalerror(2009112911);
  1697. reference_reset_base(href,cgpara.location^.next^.reference.index,cgpara.location^.next^.reference.offset,cgpara.alignment);
  1698. a_load_reg_ref(list,OS_32,cgpara.location^.next^.size,tmpreg,href);
  1699. end;
  1700. end
  1701. else
  1702. {$endif not cpu64bitalu}
  1703. a_loadmm_reg_intreg(list,size,cgpara.location^.size,reg,cgpara.location^.register,mms_movescalar);
  1704. end
  1705. else
  1706. internalerror(200310123);
  1707. end;
  1708. end;
  1709. procedure tcg.a_loadmm_ref_cgpara(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  1710. var
  1711. hr : tregister;
  1712. hs : tmmshuffle;
  1713. begin
  1714. cgpara.check_simple_location;
  1715. hr:=getmmregister(list,cgpara.location^.size);
  1716. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  1717. if realshuffle(shuffle) then
  1718. begin
  1719. hs:=shuffle^;
  1720. removeshuffles(hs);
  1721. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,@hs);
  1722. end
  1723. else
  1724. a_loadmm_reg_cgpara(list,cgpara.location^.size,hr,cgpara,shuffle);
  1725. end;
  1726. procedure tcg.a_loadmm_loc_cgpara(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  1727. begin
  1728. case loc.loc of
  1729. LOC_MMREGISTER,LOC_CMMREGISTER:
  1730. a_loadmm_reg_cgpara(list,loc.size,loc.register,cgpara,shuffle);
  1731. LOC_REFERENCE,LOC_CREFERENCE:
  1732. a_loadmm_ref_cgpara(list,loc.size,loc.reference,cgpara,shuffle);
  1733. else
  1734. internalerror(200310123);
  1735. end;
  1736. end;
  1737. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  1738. var
  1739. hr : tregister;
  1740. hs : tmmshuffle;
  1741. begin
  1742. hr:=getmmregister(list,size);
  1743. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1744. if realshuffle(shuffle) then
  1745. begin
  1746. hs:=shuffle^;
  1747. removeshuffles(hs);
  1748. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  1749. end
  1750. else
  1751. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  1752. end;
  1753. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  1754. var
  1755. hr : tregister;
  1756. hs : tmmshuffle;
  1757. begin
  1758. hr:=getmmregister(list,size);
  1759. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  1760. if realshuffle(shuffle) then
  1761. begin
  1762. hs:=shuffle^;
  1763. removeshuffles(hs);
  1764. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  1765. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  1766. end
  1767. else
  1768. begin
  1769. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  1770. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  1771. end;
  1772. end;
  1773. procedure tcg.a_loadmm_intreg_reg(list: tasmlist; fromsize,tosize: tcgsize; intreg,mmreg: tregister; shuffle: pmmshuffle);
  1774. var
  1775. tmpref: treference;
  1776. begin
  1777. if (tcgsize2size[fromsize]<>4) or
  1778. (tcgsize2size[tosize]<>4) then
  1779. internalerror(2009112503);
  1780. tg.gettemp(list,4,4,tt_normal,tmpref);
  1781. a_load_reg_ref(list,fromsize,fromsize,intreg,tmpref);
  1782. a_loadmm_ref_reg(list,tosize,tosize,tmpref,mmreg,shuffle);
  1783. tg.ungettemp(list,tmpref);
  1784. end;
  1785. procedure tcg.a_loadmm_reg_intreg(list: tasmlist; fromsize,tosize: tcgsize; mmreg,intreg: tregister; shuffle: pmmshuffle);
  1786. var
  1787. tmpref: treference;
  1788. begin
  1789. if (tcgsize2size[fromsize]<>4) or
  1790. (tcgsize2size[tosize]<>4) then
  1791. internalerror(2009112504);
  1792. tg.gettemp(list,8,8,tt_normal,tmpref);
  1793. cg.a_loadmm_reg_ref(list,fromsize,fromsize,mmreg,tmpref,shuffle);
  1794. a_load_ref_reg(list,tosize,tosize,tmpref,intreg);
  1795. tg.ungettemp(list,tmpref);
  1796. end;
  1797. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  1798. begin
  1799. case loc.loc of
  1800. LOC_CMMREGISTER,LOC_MMREGISTER:
  1801. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  1802. LOC_CREFERENCE,LOC_REFERENCE:
  1803. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  1804. else
  1805. internalerror(200312232);
  1806. end;
  1807. end;
  1808. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : tcgint);
  1809. begin
  1810. g_concatcopy(list,source,dest,len);
  1811. end;
  1812. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  1813. var
  1814. cgpara1,cgpara2,cgpara3 : TCGPara;
  1815. begin
  1816. cgpara1.init;
  1817. cgpara2.init;
  1818. cgpara3.init;
  1819. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1820. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1821. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1822. a_loadaddr_ref_cgpara(list,dest,cgpara3);
  1823. a_loadaddr_ref_cgpara(list,source,cgpara2);
  1824. a_load_const_cgpara(list,OS_INT,len,cgpara1);
  1825. paramanager.freecgpara(list,cgpara3);
  1826. paramanager.freecgpara(list,cgpara2);
  1827. paramanager.freecgpara(list,cgpara1);
  1828. allocallcpuregisters(list);
  1829. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  1830. deallocallcpuregisters(list);
  1831. cgpara3.done;
  1832. cgpara2.done;
  1833. cgpara1.done;
  1834. end;
  1835. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  1836. var
  1837. cgpara1,cgpara2 : TCGPara;
  1838. begin
  1839. cgpara1.init;
  1840. cgpara2.init;
  1841. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1842. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1843. a_loadaddr_ref_cgpara(list,dest,cgpara2);
  1844. a_loadaddr_ref_cgpara(list,source,cgpara1);
  1845. paramanager.freecgpara(list,cgpara2);
  1846. paramanager.freecgpara(list,cgpara1);
  1847. allocallcpuregisters(list);
  1848. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  1849. deallocallcpuregisters(list);
  1850. cgpara2.done;
  1851. cgpara1.done;
  1852. end;
  1853. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  1854. var
  1855. href : treference;
  1856. incrfunc : string;
  1857. cgpara1,cgpara2 : TCGPara;
  1858. begin
  1859. cgpara1.init;
  1860. cgpara2.init;
  1861. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1862. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1863. if is_interfacecom_or_dispinterface(t) then
  1864. incrfunc:='FPC_INTF_INCR_REF'
  1865. else if is_ansistring(t) then
  1866. incrfunc:='FPC_ANSISTR_INCR_REF'
  1867. else if is_widestring(t) then
  1868. incrfunc:='FPC_WIDESTR_INCR_REF'
  1869. else if is_unicodestring(t) then
  1870. incrfunc:='FPC_UNICODESTR_INCR_REF'
  1871. else if is_dynamic_array(t) then
  1872. incrfunc:='FPC_DYNARRAY_INCR_REF'
  1873. else
  1874. incrfunc:='';
  1875. { call the special incr function or the generic addref }
  1876. if incrfunc<>'' then
  1877. begin
  1878. { widestrings aren't ref. counted on all platforms so we need the address
  1879. to create a real copy }
  1880. if is_widestring(t) then
  1881. a_loadaddr_ref_cgpara(list,ref,cgpara1)
  1882. else
  1883. { these functions get the pointer by value }
  1884. a_load_ref_cgpara(list,OS_ADDR,ref,cgpara1);
  1885. paramanager.freecgpara(list,cgpara1);
  1886. allocallcpuregisters(list);
  1887. a_call_name(list,incrfunc,false);
  1888. deallocallcpuregisters(list);
  1889. end
  1890. else
  1891. begin
  1892. if is_open_array(t) then
  1893. InternalError(201103054);
  1894. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1895. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1896. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1897. paramanager.freecgpara(list,cgpara1);
  1898. paramanager.freecgpara(list,cgpara2);
  1899. allocallcpuregisters(list);
  1900. a_call_name(list,'FPC_ADDREF',false);
  1901. deallocallcpuregisters(list);
  1902. end;
  1903. cgpara2.done;
  1904. cgpara1.done;
  1905. end;
  1906. procedure tcg.g_array_rtti_helper(list: TAsmList; t: tdef; const ref: treference; const highloc: tlocation; const name: string);
  1907. var
  1908. cgpara1,cgpara2,cgpara3: TCGPara;
  1909. href: TReference;
  1910. hreg, lenreg: TRegister;
  1911. begin
  1912. cgpara1.init;
  1913. cgpara2.init;
  1914. cgpara3.init;
  1915. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1916. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1917. paramanager.getintparaloc(pocall_default,3,cgpara3);
  1918. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1919. if highloc.loc=LOC_CONSTANT then
  1920. a_load_const_cgpara(list,OS_INT,highloc.value+1,cgpara3)
  1921. else
  1922. begin
  1923. if highloc.loc in [LOC_REGISTER,LOC_CREGISTER] then
  1924. hreg:=highloc.register
  1925. else
  1926. begin
  1927. hreg:=getintregister(list,OS_INT);
  1928. a_load_loc_reg(list,OS_INT,highloc,hreg);
  1929. end;
  1930. { increment, converts high(x) to length(x) }
  1931. lenreg:=getintregister(list,OS_INT);
  1932. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,hreg,lenreg);
  1933. a_load_reg_cgpara(list,OS_INT,lenreg,cgpara3);
  1934. end;
  1935. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1936. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1937. paramanager.freecgpara(list,cgpara1);
  1938. paramanager.freecgpara(list,cgpara2);
  1939. paramanager.freecgpara(list,cgpara3);
  1940. allocallcpuregisters(list);
  1941. a_call_name(list,name,false);
  1942. deallocallcpuregisters(list);
  1943. cgpara3.done;
  1944. cgpara2.done;
  1945. cgpara1.done;
  1946. end;
  1947. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  1948. var
  1949. href : treference;
  1950. cgpara1,cgpara2 : TCGPara;
  1951. begin
  1952. cgpara1.init;
  1953. cgpara2.init;
  1954. if is_ansistring(t) or
  1955. is_widestring(t) or
  1956. is_unicodestring(t) or
  1957. is_interfacecom_or_dispinterface(t) or
  1958. is_dynamic_array(t) then
  1959. a_load_const_ref(list,OS_ADDR,0,ref)
  1960. else if t.typ=variantdef then
  1961. begin
  1962. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1963. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1964. paramanager.freecgpara(list,cgpara1);
  1965. allocallcpuregisters(list);
  1966. a_call_name(list,'FPC_VARIANT_INIT',false);
  1967. deallocallcpuregisters(list);
  1968. end
  1969. else
  1970. begin
  1971. if is_open_array(t) then
  1972. InternalError(201103052);
  1973. paramanager.getintparaloc(pocall_default,1,cgpara1);
  1974. paramanager.getintparaloc(pocall_default,2,cgpara2);
  1975. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  1976. a_loadaddr_ref_cgpara(list,href,cgpara2);
  1977. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  1978. paramanager.freecgpara(list,cgpara1);
  1979. paramanager.freecgpara(list,cgpara2);
  1980. allocallcpuregisters(list);
  1981. a_call_name(list,'FPC_INITIALIZE',false);
  1982. deallocallcpuregisters(list);
  1983. end;
  1984. cgpara1.done;
  1985. cgpara2.done;
  1986. end;
  1987. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  1988. var
  1989. href : treference;
  1990. cgpara1,cgpara2 : TCGPara;
  1991. decrfunc : string;
  1992. begin
  1993. if is_interfacecom_or_dispinterface(t) then
  1994. decrfunc:='FPC_INTF_DECR_REF'
  1995. else if is_ansistring(t) then
  1996. decrfunc:='FPC_ANSISTR_DECR_REF'
  1997. else if is_widestring(t) then
  1998. decrfunc:='FPC_WIDESTR_DECR_REF'
  1999. else if is_unicodestring(t) then
  2000. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2001. else if t.typ=variantdef then
  2002. decrfunc:='FPC_VARIANT_CLEAR'
  2003. else
  2004. begin
  2005. cgpara1.init;
  2006. cgpara2.init;
  2007. if is_open_array(t) then
  2008. InternalError(201103051);
  2009. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2010. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2011. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2012. a_loadaddr_ref_cgpara(list,href,cgpara2);
  2013. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2014. paramanager.freecgpara(list,cgpara1);
  2015. paramanager.freecgpara(list,cgpara2);
  2016. if is_dynamic_array(t) then
  2017. g_call(list,'FPC_DYNARRAY_CLEAR')
  2018. else
  2019. g_call(list,'FPC_FINALIZE');
  2020. cgpara1.done;
  2021. cgpara2.done;
  2022. exit;
  2023. end;
  2024. cgpara1.init;
  2025. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2026. a_loadaddr_ref_cgpara(list,ref,cgpara1);
  2027. paramanager.freecgpara(list,cgpara1);
  2028. g_call(list,decrfunc);
  2029. cgpara1.done;
  2030. end;
  2031. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  2032. begin
  2033. g_overflowCheck(list,loc,def);
  2034. end;
  2035. {$ifdef cpuflags}
  2036. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  2037. var
  2038. tmpreg : tregister;
  2039. begin
  2040. tmpreg:=getintregister(list,size);
  2041. g_flags2reg(list,size,f,tmpreg);
  2042. a_load_reg_ref(list,size,size,tmpreg,ref);
  2043. end;
  2044. {$endif cpuflags}
  2045. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  2046. var
  2047. OKLabel : tasmlabel;
  2048. cgpara1 : TCGPara;
  2049. begin
  2050. if (cs_check_object in current_settings.localswitches) or
  2051. (cs_check_range in current_settings.localswitches) then
  2052. begin
  2053. current_asmdata.getjumplabel(oklabel);
  2054. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  2055. cgpara1.init;
  2056. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2057. a_load_const_cgpara(list,OS_INT,tcgint(210),cgpara1);
  2058. paramanager.freecgpara(list,cgpara1);
  2059. a_call_name(list,'FPC_HANDLEERROR',false);
  2060. a_label(list,oklabel);
  2061. cgpara1.done;
  2062. end;
  2063. end;
  2064. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  2065. var
  2066. hrefvmt : treference;
  2067. cgpara1,cgpara2 : TCGPara;
  2068. begin
  2069. cgpara1.init;
  2070. cgpara2.init;
  2071. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2072. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2073. if (cs_check_object in current_settings.localswitches) then
  2074. begin
  2075. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  2076. a_loadaddr_ref_cgpara(list,hrefvmt,cgpara2);
  2077. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  2078. paramanager.freecgpara(list,cgpara1);
  2079. paramanager.freecgpara(list,cgpara2);
  2080. allocallcpuregisters(list);
  2081. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  2082. deallocallcpuregisters(list);
  2083. end
  2084. else
  2085. if (cs_check_range in current_settings.localswitches) then
  2086. begin
  2087. a_load_reg_cgpara(list,OS_ADDR,reg,cgpara1);
  2088. paramanager.freecgpara(list,cgpara1);
  2089. allocallcpuregisters(list);
  2090. a_call_name(list,'FPC_CHECK_OBJECT',false);
  2091. deallocallcpuregisters(list);
  2092. end;
  2093. cgpara1.done;
  2094. cgpara2.done;
  2095. end;
  2096. {*****************************************************************************
  2097. Entry/Exit Code Functions
  2098. *****************************************************************************}
  2099. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:tcgint;destreg:tregister);
  2100. var
  2101. sizereg,sourcereg,lenreg : tregister;
  2102. cgpara1,cgpara2,cgpara3 : TCGPara;
  2103. begin
  2104. { because some abis don't support dynamic stack allocation properly
  2105. open array value parameters are copied onto the heap
  2106. }
  2107. { calculate necessary memory }
  2108. { read/write operations on one register make the life of the register allocator hard }
  2109. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  2110. begin
  2111. lenreg:=getintregister(list,OS_INT);
  2112. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  2113. end
  2114. else
  2115. lenreg:=lenloc.register;
  2116. sizereg:=getintregister(list,OS_INT);
  2117. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  2118. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  2119. { load source }
  2120. sourcereg:=getaddressregister(list);
  2121. a_loadaddr_ref_reg(list,ref,sourcereg);
  2122. { do getmem call }
  2123. cgpara1.init;
  2124. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2125. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara1);
  2126. paramanager.freecgpara(list,cgpara1);
  2127. allocallcpuregisters(list);
  2128. a_call_name(list,'FPC_GETMEM',false);
  2129. deallocallcpuregisters(list);
  2130. cgpara1.done;
  2131. { return the new address }
  2132. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  2133. { do move call }
  2134. cgpara1.init;
  2135. cgpara2.init;
  2136. cgpara3.init;
  2137. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2138. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2139. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2140. { load size }
  2141. a_load_reg_cgpara(list,OS_INT,sizereg,cgpara3);
  2142. { load destination }
  2143. a_load_reg_cgpara(list,OS_ADDR,destreg,cgpara2);
  2144. { load source }
  2145. a_load_reg_cgpara(list,OS_ADDR,sourcereg,cgpara1);
  2146. paramanager.freecgpara(list,cgpara3);
  2147. paramanager.freecgpara(list,cgpara2);
  2148. paramanager.freecgpara(list,cgpara1);
  2149. allocallcpuregisters(list);
  2150. a_call_name(list,'FPC_MOVE',false);
  2151. deallocallcpuregisters(list);
  2152. cgpara3.done;
  2153. cgpara2.done;
  2154. cgpara1.done;
  2155. end;
  2156. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  2157. var
  2158. cgpara1 : TCGPara;
  2159. begin
  2160. { do move call }
  2161. cgpara1.init;
  2162. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2163. { load source }
  2164. a_load_loc_cgpara(list,l,cgpara1);
  2165. paramanager.freecgpara(list,cgpara1);
  2166. allocallcpuregisters(list);
  2167. a_call_name(list,'FPC_FREEMEM',false);
  2168. deallocallcpuregisters(list);
  2169. cgpara1.done;
  2170. end;
  2171. procedure tcg.g_save_registers(list:TAsmList);
  2172. var
  2173. href : treference;
  2174. size : longint;
  2175. r : integer;
  2176. begin
  2177. { calculate temp. size }
  2178. size:=0;
  2179. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2180. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2181. inc(size,sizeof(aint));
  2182. { mm registers }
  2183. if uses_registers(R_MMREGISTER) then
  2184. begin
  2185. { Make sure we reserve enough space to do the alignment based on the offset
  2186. later on. We can't use the size for this, because the alignment of the start
  2187. of the temp is smaller than needed for an OS_VECTOR }
  2188. inc(size,tcgsize2size[OS_VECTOR]);
  2189. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2190. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2191. inc(size,tcgsize2size[OS_VECTOR]);
  2192. end;
  2193. if size>0 then
  2194. begin
  2195. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  2196. include(current_procinfo.flags,pi_has_saved_regs);
  2197. { Copy registers to temp }
  2198. href:=current_procinfo.save_regs_ref;
  2199. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2200. begin
  2201. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2202. begin
  2203. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  2204. inc(href.offset,sizeof(aint));
  2205. end;
  2206. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  2207. end;
  2208. if uses_registers(R_MMREGISTER) then
  2209. begin
  2210. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  2211. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  2212. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2213. begin
  2214. { the array has to be declared even if no MM registers are saved
  2215. (such as with SSE on i386), and since 0-element arrays don't
  2216. exist, they contain a single RS_INVALID element in that case
  2217. }
  2218. if saved_mm_registers[r]<>RS_INVALID then
  2219. begin
  2220. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2221. begin
  2222. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  2223. inc(href.offset,tcgsize2size[OS_VECTOR]);
  2224. end;
  2225. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  2226. end;
  2227. end;
  2228. end;
  2229. end;
  2230. end;
  2231. procedure tcg.g_restore_registers(list:TAsmList);
  2232. var
  2233. href : treference;
  2234. r : integer;
  2235. hreg : tregister;
  2236. begin
  2237. if not(pi_has_saved_regs in current_procinfo.flags) then
  2238. exit;
  2239. { Copy registers from temp }
  2240. href:=current_procinfo.save_regs_ref;
  2241. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  2242. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  2243. begin
  2244. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  2245. { Allocate register so the optimizer does not remove the load }
  2246. a_reg_alloc(list,hreg);
  2247. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  2248. inc(href.offset,sizeof(aint));
  2249. end;
  2250. if uses_registers(R_MMREGISTER) then
  2251. begin
  2252. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  2253. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  2254. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  2255. begin
  2256. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  2257. begin
  2258. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  2259. { Allocate register so the optimizer does not remove the load }
  2260. a_reg_alloc(list,hreg);
  2261. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  2262. inc(href.offset,tcgsize2size[OS_VECTOR]);
  2263. end;
  2264. end;
  2265. end;
  2266. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  2267. end;
  2268. procedure tcg.g_profilecode(list : TAsmList);
  2269. begin
  2270. end;
  2271. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  2272. begin
  2273. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  2274. end;
  2275. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: tcgint);
  2276. begin
  2277. a_load_const_ref(list, OS_INT, a, href);
  2278. end;
  2279. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  2280. begin
  2281. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  2282. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  2283. end;
  2284. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: tcgint);
  2285. var
  2286. hsym : tsym;
  2287. href : treference;
  2288. paraloc : Pcgparalocation;
  2289. begin
  2290. { calculate the parameter info for the procdef }
  2291. procdef.init_paraloc_info(callerside);
  2292. hsym:=tsym(procdef.parast.Find('self'));
  2293. if not(assigned(hsym) and
  2294. (hsym.typ=paravarsym)) then
  2295. internalerror(200305251);
  2296. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  2297. while paraloc<>nil do
  2298. with paraloc^ do
  2299. begin
  2300. case loc of
  2301. LOC_REGISTER:
  2302. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  2303. LOC_REFERENCE:
  2304. begin
  2305. { offset in the wrapper needs to be adjusted for the stored
  2306. return address }
  2307. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  2308. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  2309. end
  2310. else
  2311. internalerror(200309189);
  2312. end;
  2313. paraloc:=next;
  2314. end;
  2315. end;
  2316. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  2317. begin
  2318. a_jmp_name(list,externalname);
  2319. end;
  2320. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  2321. begin
  2322. a_call_name(list,s,false);
  2323. end;
  2324. procedure tcg.a_call_ref(list : TAsmList;ref: treference);
  2325. var
  2326. tempreg : TRegister;
  2327. begin
  2328. tempreg := getintregister(list, OS_ADDR);
  2329. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,tempreg);
  2330. a_call_reg(list,tempreg);
  2331. end;
  2332. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; const flags: tindsymflags): tregister;
  2333. var
  2334. l: tasmsymbol;
  2335. ref: treference;
  2336. nlsymname: string;
  2337. begin
  2338. result := NR_NO;
  2339. case target_info.system of
  2340. system_powerpc_darwin,
  2341. system_i386_darwin,
  2342. system_i386_iphonesim,
  2343. system_powerpc64_darwin,
  2344. system_arm_darwin:
  2345. begin
  2346. nlsymname:='L'+symname+'$non_lazy_ptr';
  2347. l:=current_asmdata.getasmsymbol(nlsymname);
  2348. if not(assigned(l)) then
  2349. begin
  2350. new_section(current_asmdata.asmlists[al_picdata],sec_data_nonlazy,'',sizeof(pint));
  2351. l:=current_asmdata.DefineAsmSymbol(nlsymname,AB_LOCAL,AT_DATA);
  2352. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  2353. if not(is_weak in flags) then
  2354. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.RefAsmSymbol(symname).Name))
  2355. else
  2356. current_asmdata.asmlists[al_picdata].concat(tai_directive.Create(asd_indirect_symbol,current_asmdata.WeakRefAsmSymbol(symname).Name));
  2357. {$ifdef cpu64bitaddr}
  2358. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  2359. {$else cpu64bitaddr}
  2360. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  2361. {$endif cpu64bitaddr}
  2362. end;
  2363. result := getaddressregister(list);
  2364. reference_reset_symbol(ref,l,0,sizeof(pint));
  2365. { a_load_ref_reg will turn this into a pic-load if needed }
  2366. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  2367. end;
  2368. end;
  2369. end;
  2370. procedure tcg.g_maybe_got_init(list: TAsmList);
  2371. begin
  2372. end;
  2373. procedure tcg.g_call(list: TAsmList;const s: string);
  2374. begin
  2375. allocallcpuregisters(list);
  2376. a_call_name(list,s,false);
  2377. deallocallcpuregisters(list);
  2378. end;
  2379. procedure tcg.g_local_unwind(list: TAsmList; l: TAsmLabel);
  2380. begin
  2381. a_jmp_always(list,l);
  2382. end;
  2383. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  2384. begin
  2385. internalerror(200807231);
  2386. end;
  2387. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  2388. begin
  2389. internalerror(200807232);
  2390. end;
  2391. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  2392. begin
  2393. internalerror(200807233);
  2394. end;
  2395. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  2396. begin
  2397. internalerror(200807234);
  2398. end;
  2399. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  2400. begin
  2401. Result:=TRegister(0);
  2402. internalerror(200807238);
  2403. end;
  2404. {*****************************************************************************
  2405. TCG64
  2406. *****************************************************************************}
  2407. {$ifndef cpu64bitalu}
  2408. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  2409. begin
  2410. a_load64_reg_reg(list,regsrc,regdst);
  2411. a_op64_const_reg(list,op,size,value,regdst);
  2412. end;
  2413. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  2414. var
  2415. tmpreg64 : tregister64;
  2416. begin
  2417. { when src1=dst then we need to first create a temp to prevent
  2418. overwriting src1 with src2 }
  2419. if (regsrc1.reghi=regdst.reghi) or
  2420. (regsrc1.reglo=regdst.reghi) or
  2421. (regsrc1.reghi=regdst.reglo) or
  2422. (regsrc1.reglo=regdst.reglo) then
  2423. begin
  2424. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2425. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2426. a_load64_reg_reg(list,regsrc2,tmpreg64);
  2427. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  2428. a_load64_reg_reg(list,tmpreg64,regdst);
  2429. end
  2430. else
  2431. begin
  2432. a_load64_reg_reg(list,regsrc2,regdst);
  2433. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  2434. end;
  2435. end;
  2436. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  2437. var
  2438. tmpreg64 : tregister64;
  2439. begin
  2440. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2441. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2442. a_load64_subsetref_reg(list,sref,tmpreg64);
  2443. a_op64_const_reg(list,op,size,a,tmpreg64);
  2444. a_load64_reg_subsetref(list,tmpreg64,sref);
  2445. end;
  2446. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  2447. var
  2448. tmpreg64 : tregister64;
  2449. begin
  2450. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2451. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2452. a_load64_subsetref_reg(list,sref,tmpreg64);
  2453. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  2454. a_load64_reg_subsetref(list,tmpreg64,sref);
  2455. end;
  2456. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  2457. var
  2458. tmpreg64 : tregister64;
  2459. begin
  2460. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2461. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2462. a_load64_subsetref_reg(list,sref,tmpreg64);
  2463. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  2464. a_load64_reg_subsetref(list,tmpreg64,sref);
  2465. end;
  2466. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  2467. var
  2468. tmpreg64 : tregister64;
  2469. begin
  2470. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  2471. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  2472. a_load64_subsetref_reg(list,ssref,tmpreg64);
  2473. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  2474. end;
  2475. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2476. begin
  2477. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  2478. ovloc.loc:=LOC_VOID;
  2479. end;
  2480. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  2481. begin
  2482. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  2483. ovloc.loc:=LOC_VOID;
  2484. end;
  2485. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  2486. begin
  2487. case l.loc of
  2488. LOC_REFERENCE, LOC_CREFERENCE:
  2489. a_load64_ref_subsetref(list,l.reference,sref);
  2490. LOC_REGISTER,LOC_CREGISTER:
  2491. a_load64_reg_subsetref(list,l.register64,sref);
  2492. LOC_CONSTANT :
  2493. a_load64_const_subsetref(list,l.value64,sref);
  2494. LOC_SUBSETREF,LOC_CSUBSETREF:
  2495. a_load64_subsetref_subsetref(list,l.sref,sref);
  2496. else
  2497. internalerror(2006082210);
  2498. end;
  2499. end;
  2500. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  2501. begin
  2502. case l.loc of
  2503. LOC_REFERENCE, LOC_CREFERENCE:
  2504. a_load64_subsetref_ref(list,sref,l.reference);
  2505. LOC_REGISTER,LOC_CREGISTER:
  2506. a_load64_subsetref_reg(list,sref,l.register64);
  2507. LOC_SUBSETREF,LOC_CSUBSETREF:
  2508. a_load64_subsetref_subsetref(list,sref,l.sref);
  2509. else
  2510. internalerror(2006082211);
  2511. end;
  2512. end;
  2513. {$endif cpu64bitalu}
  2514. function asmsym2indsymflags(sym: TAsmSymbol): tindsymflags;
  2515. begin
  2516. result:=[];
  2517. if sym.typ<>AT_FUNCTION then
  2518. include(result,is_data);
  2519. if sym.bind=AB_WEAK_EXTERNAL then
  2520. include(result,is_weak);
  2521. end;
  2522. procedure destroy_codegen;
  2523. begin
  2524. cg.free;
  2525. cg:=nil;
  2526. {$ifndef cpu64bitalu}
  2527. cg64.free;
  2528. cg64:=nil;
  2529. {$endif cpu64bitalu}
  2530. end;
  2531. end.