cpubase.inc 8.0 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2000 by Florian Klaempfl and Peter Vreman
  4. Contains the basic declarations for the i386 architecture
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. { This include file contains the basic declarations for the i386 architecture.
  19. }
  20. {*****************************************************************************
  21. Operand Sizes
  22. *****************************************************************************}
  23. type
  24. topsize = (S_NO,
  25. S_B,S_W,S_L,S_Q,S_BW,S_BL,S_WL,
  26. S_IS,S_IL,S_IQ,
  27. S_FS,S_FL,S_FX,S_FV,S_FXX,
  28. S_MD,
  29. S_NEAR,S_FAR,S_SHORT
  30. );
  31. {*****************************************************************************
  32. Registers
  33. *****************************************************************************}
  34. const
  35. {# Standard opcode string table (for each tasmop enumeration). The
  36. opcode strings should conform to the names as defined by the
  37. processor manufacturer.
  38. }
  39. std_op2str:op2strtable={$i i386int.inc}
  40. {*****************************************************************************
  41. Constants
  42. *****************************************************************************}
  43. c_countusableregsint = 4;
  44. {
  45. firstsaveintreg = RS_EAX;
  46. lastsaveintreg = RS_EDX;
  47. firstsavefpureg = RS_INVALID;
  48. lastsavefpureg = RS_INVALID;
  49. firstsavemmreg = RS_MM0;
  50. lastsavemmreg = RS_MM7;
  51. general_superregisters = [RS_EAX,RS_EBX,RS_ECX,RS_EDX];
  52. maxvarregs = 4;
  53. varregs : array[1..maxvarregs] of tsuperregister =
  54. (RS_EBX,RS_EDX,RS_ECX,RS_EAX);
  55. maxfpuvarregs = 8;
  56. maxmmvarregs = 8;
  57. }
  58. {*****************************************************************************
  59. GDB Information
  60. *****************************************************************************}
  61. {# Register indexes for stabs information, when some
  62. parameters or variables are stored in registers.
  63. Taken from i386.c (dbx_register_map) and i386.h
  64. (FIXED_REGISTERS) from GCC 3.x source code
  65. }
  66. reg_stab_table : array[tregisterindex] of shortint = (
  67. {$i r386stab.inc}
  68. );
  69. {*****************************************************************************
  70. Default generic sizes
  71. *****************************************************************************}
  72. {# Defines the default address size for a processor, }
  73. OS_ADDR = OS_32;
  74. {# the natural int size for a processor, }
  75. OS_INT = OS_32;
  76. {# the maximum float size for a processor, }
  77. OS_FLOAT = OS_F80;
  78. {# the size of a vector register for a processor }
  79. OS_VECTOR = OS_M64;
  80. {*****************************************************************************
  81. Generic Register names
  82. *****************************************************************************}
  83. {# Stack pointer register }
  84. NR_STACK_POINTER_REG = NR_ESP;
  85. RS_STACK_POINTER_REG = RS_ESP;
  86. {# Frame pointer register }
  87. RS_FRAME_POINTER_REG = RS_EBP;
  88. NR_FRAME_POINTER_REG = NR_EBP;
  89. {# Register for addressing absolute data in a position independant way,
  90. such as in PIC code. The exact meaning is ABI specific. For
  91. further information look at GCC source : PIC_OFFSET_TABLE_REGNUM
  92. }
  93. NR_PIC_OFFSET_REG = NR_EBX;
  94. { Results are returned in this register (32-bit values) }
  95. NR_FUNCTION_RETURN_REG = NR_EAX;
  96. RS_FUNCTION_RETURN_REG = RS_EAX;
  97. { Low part of 64bit return value }
  98. NR_FUNCTION_RETURN64_LOW_REG = NR_EAX;
  99. RS_FUNCTION_RETURN64_LOW_REG = RS_EAX;
  100. { High part of 64bit return value }
  101. NR_FUNCTION_RETURN64_HIGH_REG = NR_EDX;
  102. RS_FUNCTION_RETURN64_HIGH_REG = RS_EDX;
  103. { The value returned from a function is available in this register }
  104. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  105. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  106. { The lowh part of 64bit value returned from a function }
  107. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  108. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  109. { The high part of 64bit value returned from a function }
  110. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  111. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  112. { WARNING: don't change to R_ST0!! See comments above implementation of }
  113. { a_loadfpu* methods in rgcpu (JM) }
  114. NR_fpu_result_reg = NR_ST;
  115. NR_mm_result_reg = NR_MM0;
  116. { Offset where the parent framepointer is pushed }
  117. PARENT_FRAMEPOINTER_OFFSET = 8;
  118. {*****************************************************************************
  119. GCC /ABI linking information
  120. *****************************************************************************}
  121. const
  122. {# Registers which must be saved when calling a routine declared as
  123. cppdecl, cdecl, stdcall, safecall, palmossyscall. The registers
  124. saved should be the ones as defined in the target ABI and / or GCC.
  125. This value can be deduced from the CALLED_USED_REGISTERS array in the
  126. GCC source.
  127. }
  128. saved_standard_registers : array[0..2] of tsuperregister = (RS_EBX,RS_ESI,RS_EDI);
  129. {# Required parameter alignment when calling a routine declared as
  130. stdcall and cdecl. The alignment value should be the one defined
  131. by GCC or the target ABI.
  132. The value of this constant is equal to the constant
  133. PARM_BOUNDARY / BITS_PER_UNIT in the GCC source.
  134. }
  135. std_param_align = 4;
  136. {
  137. $Log$
  138. Revision 1.12 2004-02-05 18:28:37 peter
  139. * x86_64 fixes for opsize
  140. Revision 1.11 2004/01/14 23:39:05 florian
  141. * another bunch of x86-64 fixes mainly calling convention and
  142. assembler reader related
  143. Revision 1.10 2003/10/17 14:38:32 peter
  144. * 64k registers supported
  145. * fixed some memory leaks
  146. Revision 1.9 2003/09/03 15:55:01 peter
  147. * NEWRA branch merged
  148. Revision 1.8 2003/09/03 11:18:37 florian
  149. * fixed arm concatcopy
  150. + arm support in the common compiler sources added
  151. * moved some generic cg code around
  152. + tfputype added
  153. * ...
  154. Revision 1.7.2.3 2003/08/29 17:29:00 peter
  155. * next batch of updates
  156. Revision 1.7.2.2 2003/08/28 18:35:08 peter
  157. * tregister changed to cardinal
  158. Revision 1.7.2.1 2003/08/27 20:05:04 peter
  159. * forgotten
  160. Revision 1.7 2003/07/06 17:58:22 peter
  161. * framepointer fixes for sparc
  162. * parent framepointer code more generic
  163. Revision 1.6 2003/06/03 13:01:59 daniel
  164. * Register allocator finished
  165. Revision 1.5 2003/05/31 15:05:28 peter
  166. * FUNCTION_RESULT64_LOW/HIGH_REG added for int64 results
  167. Revision 1.4 2003/05/30 23:57:08 peter
  168. * more sparc cleanup
  169. * accumulator removed, splitted in function_return_reg (called) and
  170. function_result_reg (caller)
  171. Revision 1.3 2003/05/16 14:33:31 peter
  172. * regvar fixes
  173. Revision 1.2 2002/04/25 16:12:09 florian
  174. * fixed more problems with cpubase and x86-64
  175. Revision 1.1 2003/04/25 11:12:09 florian
  176. * merged i386/cpubase and x86_64/cpubase to x86/cpubase;
  177. different stuff went to cpubase.inc
  178. }