n386add.pas 23 KB

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  1. {
  2. $Id$
  3. Copyright (c) 2000-2002 by Florian Klaempfl
  4. Code generation for add nodes on the i386
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit n386add;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. node,nadd,cpubase,nx86add;
  23. type
  24. ti386addnode = class(tx86addnode)
  25. {$ifdef SUPPORT_MMX}
  26. procedure second_addmmxset;override;
  27. procedure second_addmmx;override;
  28. {$endif SUPPORT_MMX}
  29. procedure second_add64bit;override;
  30. procedure second_cmp64bit;override;
  31. procedure second_mul;override;
  32. end;
  33. implementation
  34. uses
  35. globtype,systems,
  36. cutils,verbose,globals,
  37. symconst,symdef,paramgr,
  38. aasmbase,aasmtai,aasmcpu,
  39. cgbase,
  40. ncon,nset,
  41. cga,ncgutil,cgobj,cg64f32;
  42. {*****************************************************************************
  43. addmmxset
  44. *****************************************************************************}
  45. {$ifdef SUPPORT_MMX}
  46. procedure ti386addnode.second_addmmxset;
  47. var opsize : TCGSize;
  48. op : TAsmOp;
  49. cmpop,
  50. pushedfpu,
  51. noswap : boolean;
  52. begin
  53. pass_left_and_right(pushedfpu);
  54. cmpop:=false;
  55. noswap:=false;
  56. opsize:=OS_32;
  57. case nodetype of
  58. addn:
  59. begin
  60. { are we adding set elements ? }
  61. if right.nodetype=setelementn then
  62. begin
  63. { adding elements is not commutative }
  64. { if nf_swaped in flags then
  65. swapleftright;}
  66. { bts requires both elements to be registers }
  67. { location_force_reg(exprasmlist,left.location,opsize_2_cgsize[opsize],false);
  68. location_force_reg(exprasmlist,right.location,opsize_2_cgsize[opsize],true);
  69. op:=A_BTS;
  70. noswap:=true;}
  71. end
  72. else
  73. op:=A_POR;
  74. end;
  75. symdifn :
  76. op:=A_PXOR;
  77. muln:
  78. op:=A_PAND;
  79. subn:
  80. op:=A_PANDN;
  81. equaln,
  82. unequaln :
  83. begin
  84. op:=A_PCMPEQD;
  85. cmpop:=true;
  86. end;
  87. lten,gten:
  88. begin
  89. if (not(nf_swaped in flags) and (nodetype = lten)) or
  90. ((nf_swaped in flags) and (nodetype = gten)) then
  91. swapleftright;
  92. location_force_reg(exprasmlist,left.location,opsize,true);
  93. emit_op_right_left(A_AND,TCGSize2Opsize[opsize]);
  94. op:=A_PCMPEQD;
  95. cmpop:=true;
  96. { warning: ugly hack, we need a JE so change the node to equaln }
  97. nodetype:=equaln;
  98. end;
  99. xorn :
  100. op:=A_PXOR;
  101. orn :
  102. op:=A_POR;
  103. andn :
  104. op:=A_PAND;
  105. else
  106. internalerror(2003042215);
  107. end;
  108. { left must be a register }
  109. left_must_be_reg(opsize,noswap);
  110. { emit_generic_code(op,opsize,true,extra_not,false);}
  111. location_freetemp(exprasmlist,right.location);
  112. location_release(exprasmlist,right.location);
  113. if cmpop then
  114. begin
  115. location_freetemp(exprasmlist,left.location);
  116. location_release(exprasmlist,left.location);
  117. end;
  118. set_result_location(cmpop,true);
  119. end;
  120. {$endif SUPPORT_MMX}
  121. {*****************************************************************************
  122. Add64bit
  123. *****************************************************************************}
  124. procedure ti386addnode.second_add64bit;
  125. var
  126. op : TOpCG;
  127. op1,op2 : TAsmOp;
  128. opsize : TOpSize;
  129. hregister,
  130. hregister2 : tregister;
  131. hl4 : tasmlabel;
  132. mboverflow,
  133. unsigned:boolean;
  134. r:Tregister;
  135. begin
  136. firstcomplex(self);
  137. pass_left_right;
  138. op1:=A_NONE;
  139. op2:=A_NONE;
  140. mboverflow:=false;
  141. opsize:=S_L;
  142. unsigned:=((left.resulttype.def.deftype=orddef) and
  143. (torddef(left.resulttype.def).typ=u64bit)) or
  144. ((right.resulttype.def.deftype=orddef) and
  145. (torddef(right.resulttype.def).typ=u64bit));
  146. case nodetype of
  147. addn :
  148. begin
  149. op:=OP_ADD;
  150. mboverflow:=true;
  151. end;
  152. subn :
  153. begin
  154. op:=OP_SUB;
  155. op1:=A_SUB;
  156. op2:=A_SBB;
  157. mboverflow:=true;
  158. end;
  159. xorn:
  160. op:=OP_XOR;
  161. orn:
  162. op:=OP_OR;
  163. andn:
  164. op:=OP_AND;
  165. else
  166. begin
  167. { everything should be handled in pass_1 (JM) }
  168. internalerror(200109051);
  169. end;
  170. end;
  171. { left and right no register? }
  172. { then one must be demanded }
  173. if (left.location.loc<>LOC_REGISTER) then
  174. begin
  175. if (right.location.loc<>LOC_REGISTER) then
  176. begin
  177. hregister:=cg.getintregister(exprasmlist,OS_INT);
  178. hregister2:=cg.getintregister(exprasmlist,OS_INT);
  179. cg64.a_load64_loc_reg(exprasmlist,left.location,joinreg64(hregister,hregister2));
  180. location_reset(left.location,LOC_REGISTER,OS_64);
  181. left.location.registerlow:=hregister;
  182. left.location.registerhigh:=hregister2;
  183. end
  184. else
  185. begin
  186. location_swap(left.location,right.location);
  187. toggleflag(nf_swaped);
  188. end;
  189. end;
  190. { at this point, left.location.loc should be LOC_REGISTER }
  191. if right.location.loc=LOC_REGISTER then
  192. begin
  193. { when swapped another result register }
  194. if (nodetype=subn) and (nf_swaped in flags) then
  195. begin
  196. cg64.a_op64_reg_reg(exprasmlist,op,
  197. left.location.register64,
  198. right.location.register64);
  199. location_swap(left.location,right.location);
  200. toggleflag(nf_swaped);
  201. end
  202. else
  203. begin
  204. cg64.a_op64_reg_reg(exprasmlist,op,
  205. right.location.register64,
  206. left.location.register64);
  207. end;
  208. location_release(exprasmlist,right.location);
  209. end
  210. else
  211. begin
  212. { right.location<>LOC_REGISTER }
  213. if (nodetype=subn) and (nf_swaped in flags) then
  214. begin
  215. r:=cg.getintregister(exprasmlist,OS_INT);
  216. cg64.a_load64low_loc_reg(exprasmlist,right.location,r);
  217. emit_reg_reg(op1,opsize,left.location.registerlow,r);
  218. emit_reg_reg(A_MOV,opsize,r,left.location.registerlow);
  219. cg64.a_load64high_loc_reg(exprasmlist,right.location,r);
  220. { the carry flag is still ok }
  221. emit_reg_reg(op2,opsize,left.location.registerhigh,r);
  222. emit_reg_reg(A_MOV,opsize,r,left.location.registerhigh);
  223. cg.ungetregister(exprasmlist,r);
  224. if right.location.loc<>LOC_CREGISTER then
  225. begin
  226. location_freetemp(exprasmlist,right.location);
  227. location_release(exprasmlist,right.location);
  228. end;
  229. end
  230. else
  231. begin
  232. cg64.a_op64_loc_reg(exprasmlist,op,right.location,
  233. left.location.register64);
  234. if (right.location.loc<>LOC_CREGISTER) then
  235. begin
  236. location_freetemp(exprasmlist,right.location);
  237. location_release(exprasmlist,right.location);
  238. end;
  239. end;
  240. end;
  241. { only in case of overflow operations }
  242. { produce overflow code }
  243. { we must put it here directly, because sign of operation }
  244. { is in unsigned VAR!! }
  245. if mboverflow then
  246. begin
  247. if cs_check_overflow in aktlocalswitches then
  248. begin
  249. objectlibrary.getlabel(hl4);
  250. if unsigned then
  251. cg.a_jmp_flags(exprasmlist,F_AE,hl4)
  252. else
  253. cg.a_jmp_flags(exprasmlist,F_NO,hl4);
  254. cg.a_call_name(exprasmlist,'FPC_OVERFLOW');
  255. cg.a_label(exprasmlist,hl4);
  256. end;
  257. end;
  258. location_copy(location,left.location);
  259. end;
  260. procedure ti386addnode.second_cmp64bit;
  261. var
  262. hregister,
  263. hregister2 : tregister;
  264. href : treference;
  265. unsigned : boolean;
  266. procedure firstjmp64bitcmp;
  267. var
  268. oldnodetype : tnodetype;
  269. begin
  270. {$ifdef OLDREGVARS}
  271. load_all_regvars(exprasmlist);
  272. {$endif OLDREGVARS}
  273. { the jump the sequence is a little bit hairy }
  274. case nodetype of
  275. ltn,gtn:
  276. begin
  277. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),truelabel);
  278. { cheat a little bit for the negative test }
  279. toggleflag(nf_swaped);
  280. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),falselabel);
  281. toggleflag(nf_swaped);
  282. end;
  283. lten,gten:
  284. begin
  285. oldnodetype:=nodetype;
  286. if nodetype=lten then
  287. nodetype:=ltn
  288. else
  289. nodetype:=gtn;
  290. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),truelabel);
  291. { cheat for the negative test }
  292. if nodetype=ltn then
  293. nodetype:=gtn
  294. else
  295. nodetype:=ltn;
  296. cg.a_jmp_flags(exprasmlist,getresflags(unsigned),falselabel);
  297. nodetype:=oldnodetype;
  298. end;
  299. equaln:
  300. cg.a_jmp_flags(exprasmlist,F_NE,falselabel);
  301. unequaln:
  302. cg.a_jmp_flags(exprasmlist,F_NE,truelabel);
  303. end;
  304. end;
  305. procedure secondjmp64bitcmp;
  306. begin
  307. { the jump the sequence is a little bit hairy }
  308. case nodetype of
  309. ltn,gtn,lten,gten:
  310. begin
  311. { the comparisaion of the low dword have to be }
  312. { always unsigned! }
  313. cg.a_jmp_flags(exprasmlist,getresflags(true),truelabel);
  314. cg.a_jmp_always(exprasmlist,falselabel);
  315. end;
  316. equaln:
  317. begin
  318. cg.a_jmp_flags(exprasmlist,F_NE,falselabel);
  319. cg.a_jmp_always(exprasmlist,truelabel);
  320. end;
  321. unequaln:
  322. begin
  323. cg.a_jmp_flags(exprasmlist,F_NE,truelabel);
  324. cg.a_jmp_always(exprasmlist,falselabel);
  325. end;
  326. end;
  327. end;
  328. begin
  329. firstcomplex(self);
  330. pass_left_right;
  331. unsigned:=((left.resulttype.def.deftype=orddef) and
  332. (torddef(left.resulttype.def).typ=u64bit)) or
  333. ((right.resulttype.def.deftype=orddef) and
  334. (torddef(right.resulttype.def).typ=u64bit));
  335. { left and right no register? }
  336. { then one must be demanded }
  337. if (left.location.loc<>LOC_REGISTER) then
  338. begin
  339. if (right.location.loc<>LOC_REGISTER) then
  340. begin
  341. { we can reuse a CREGISTER for comparison }
  342. if (left.location.loc<>LOC_CREGISTER) then
  343. begin
  344. hregister:=cg.getintregister(exprasmlist,OS_INT);
  345. hregister2:=cg.getintregister(exprasmlist,OS_INT);
  346. cg64.a_load64_loc_reg(exprasmlist,left.location,joinreg64(hregister,hregister2));
  347. location_reset(left.location,LOC_REGISTER,OS_64);
  348. left.location.registerlow:=hregister;
  349. left.location.registerhigh:=hregister2;
  350. end;
  351. end
  352. else
  353. begin
  354. location_swap(left.location,right.location);
  355. toggleflag(nf_swaped);
  356. end;
  357. end;
  358. { at this point, left.location.loc should be LOC_REGISTER }
  359. if right.location.loc=LOC_REGISTER then
  360. begin
  361. emit_reg_reg(A_CMP,S_L,right.location.registerhigh,left.location.registerhigh);
  362. firstjmp64bitcmp;
  363. emit_reg_reg(A_CMP,S_L,right.location.registerlow,left.location.registerlow);
  364. secondjmp64bitcmp;
  365. location_release(exprasmlist,right.location);
  366. end
  367. else
  368. begin
  369. case right.location.loc of
  370. LOC_CREGISTER :
  371. begin
  372. emit_reg_reg(A_CMP,S_L,right.location.registerhigh,left.location.registerhigh);
  373. firstjmp64bitcmp;
  374. emit_reg_reg(A_CMP,S_L,right.location.registerlow,left.location.registerlow);
  375. secondjmp64bitcmp;
  376. end;
  377. LOC_CREFERENCE,
  378. LOC_REFERENCE :
  379. begin
  380. href:=right.location.reference;
  381. inc(href.offset,4);
  382. emit_ref_reg(A_CMP,S_L,href,left.location.registerhigh);
  383. firstjmp64bitcmp;
  384. emit_ref_reg(A_CMP,S_L,right.location.reference,left.location.registerlow);
  385. secondjmp64bitcmp;
  386. cg.a_jmp_always(exprasmlist,falselabel);
  387. location_freetemp(exprasmlist,right.location);
  388. location_release(exprasmlist,right.location);
  389. end;
  390. LOC_CONSTANT :
  391. begin
  392. exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,hi(right.location.valueqword),left.location.registerhigh));
  393. firstjmp64bitcmp;
  394. exprasmlist.concat(taicpu.op_const_reg(A_CMP,S_L,lo(right.location.valueqword),left.location.registerlow));
  395. secondjmp64bitcmp;
  396. end;
  397. else
  398. internalerror(200203282);
  399. end;
  400. end;
  401. if (left.location.loc<>LOC_CREGISTER) then
  402. begin
  403. location_freetemp(exprasmlist,left.location);
  404. location_release(exprasmlist,left.location);
  405. end;
  406. { we have LOC_JUMP as result }
  407. location_reset(location,LOC_JUMP,OS_NO)
  408. end;
  409. {*****************************************************************************
  410. AddMMX
  411. *****************************************************************************}
  412. {$ifdef SUPPORT_MMX}
  413. procedure ti386addnode.second_addmmx;
  414. var
  415. op : TAsmOp;
  416. pushedfpu,
  417. cmpop : boolean;
  418. mmxbase : tmmxtype;
  419. hreg,
  420. hregister : tregister;
  421. begin
  422. pass_left_and_right(pushedfpu);
  423. cmpop:=false;
  424. mmxbase:=mmx_type(left.resulttype.def);
  425. case nodetype of
  426. addn :
  427. begin
  428. if (cs_mmx_saturation in aktlocalswitches) then
  429. begin
  430. case mmxbase of
  431. mmxs8bit:
  432. op:=A_PADDSB;
  433. mmxu8bit:
  434. op:=A_PADDUSB;
  435. mmxs16bit,mmxfixed16:
  436. op:=A_PADDSB;
  437. mmxu16bit:
  438. op:=A_PADDUSW;
  439. end;
  440. end
  441. else
  442. begin
  443. case mmxbase of
  444. mmxs8bit,mmxu8bit:
  445. op:=A_PADDB;
  446. mmxs16bit,mmxu16bit,mmxfixed16:
  447. op:=A_PADDW;
  448. mmxs32bit,mmxu32bit:
  449. op:=A_PADDD;
  450. end;
  451. end;
  452. end;
  453. muln :
  454. begin
  455. case mmxbase of
  456. mmxs16bit,mmxu16bit:
  457. op:=A_PMULLW;
  458. mmxfixed16:
  459. op:=A_PMULHW;
  460. end;
  461. end;
  462. subn :
  463. begin
  464. if (cs_mmx_saturation in aktlocalswitches) then
  465. begin
  466. case mmxbase of
  467. mmxs8bit:
  468. op:=A_PSUBSB;
  469. mmxu8bit:
  470. op:=A_PSUBUSB;
  471. mmxs16bit,mmxfixed16:
  472. op:=A_PSUBSB;
  473. mmxu16bit:
  474. op:=A_PSUBUSW;
  475. end;
  476. end
  477. else
  478. begin
  479. case mmxbase of
  480. mmxs8bit,mmxu8bit:
  481. op:=A_PSUBB;
  482. mmxs16bit,mmxu16bit,mmxfixed16:
  483. op:=A_PSUBW;
  484. mmxs32bit,mmxu32bit:
  485. op:=A_PSUBD;
  486. end;
  487. end;
  488. end;
  489. xorn:
  490. op:=A_PXOR;
  491. orn:
  492. op:=A_POR;
  493. andn:
  494. op:=A_PAND;
  495. else
  496. internalerror(2003042214);
  497. end;
  498. { left and right no register? }
  499. { then one must be demanded }
  500. if (left.location.loc<>LOC_MMXREGISTER) then
  501. begin
  502. if (right.location.loc=LOC_MMXREGISTER) then
  503. begin
  504. location_swap(left.location,right.location);
  505. toggleflag(nf_swaped);
  506. end
  507. else
  508. begin
  509. { register variable ? }
  510. if (left.location.loc=LOC_CMMXREGISTER) then
  511. begin
  512. hregister:=cg.getmmxregister(exprasmlist,OS_M64);
  513. emit_reg_reg(A_MOVQ,S_NO,left.location.register,hregister);
  514. end
  515. else
  516. begin
  517. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  518. internalerror(200203245);
  519. location_release(exprasmlist,left.location);
  520. hregister:=cg.getmmxregister(exprasmlist,OS_M64);
  521. emit_ref_reg(A_MOVQ,S_NO,left.location.reference,hregister);
  522. end;
  523. location_reset(left.location,LOC_MMXREGISTER,OS_NO);
  524. left.location.register:=hregister;
  525. end;
  526. end;
  527. { at this point, left.location.loc should be LOC_MMXREGISTER }
  528. if right.location.loc<>LOC_MMXREGISTER then
  529. begin
  530. if (nodetype=subn) and (nf_swaped in flags) then
  531. begin
  532. if right.location.loc=LOC_CMMXREGISTER then
  533. begin
  534. hreg:=cg.getmmxregister(exprasmlist,OS_M64);
  535. emit_reg_reg(A_MOVQ,S_NO,right.location.register,hreg);
  536. emit_reg_reg(op,S_NO,left.location.register,hreg);
  537. cg.ungetregister(exprasmlist,hreg);
  538. emit_reg_reg(A_MOVQ,S_NO,hreg,left.location.register);
  539. end
  540. else
  541. begin
  542. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  543. internalerror(200203247);
  544. location_release(exprasmlist,right.location);
  545. hreg:=cg.getmmxregister(exprasmlist,OS_M64);
  546. emit_ref_reg(A_MOVQ,S_NO,right.location.reference,hreg);
  547. emit_reg_reg(op,S_NO,left.location.register,hreg);
  548. cg.ungetregister(exprasmlist,hreg);
  549. emit_reg_reg(A_MOVQ,S_NO,hreg,left.location.register);
  550. end;
  551. end
  552. else
  553. begin
  554. if (right.location.loc=LOC_CMMXREGISTER) then
  555. emit_reg_reg(op,S_NO,right.location.register,left.location.register)
  556. else
  557. begin
  558. if not(right.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  559. internalerror(200203246);
  560. emit_ref_reg(op,S_NO,right.location.reference,left.location.register);
  561. location_release(exprasmlist,right.location);
  562. end;
  563. end;
  564. end
  565. else
  566. begin
  567. { right.location=LOC_MMXREGISTER }
  568. if (nodetype=subn) and (nf_swaped in flags) then
  569. begin
  570. emit_reg_reg(op,S_NO,left.location.register,right.location.register);
  571. location_swap(left.location,right.location);
  572. toggleflag(nf_swaped);
  573. end
  574. else
  575. begin
  576. emit_reg_reg(op,S_NO,right.location.register,left.location.register);
  577. end;
  578. end;
  579. location_freetemp(exprasmlist,right.location);
  580. location_release(exprasmlist,right.location);
  581. if cmpop then
  582. begin
  583. location_freetemp(exprasmlist,left.location);
  584. location_release(exprasmlist,left.location);
  585. end;
  586. set_result_location(cmpop,true);
  587. end;
  588. {$endif SUPPORT_MMX}
  589. {*****************************************************************************
  590. x86 MUL
  591. *****************************************************************************}
  592. procedure ti386addnode.second_mul;
  593. var r:Tregister;
  594. hl4 : tasmlabel;
  595. begin
  596. {The location.register will be filled in later (JM)}
  597. location_reset(location,LOC_REGISTER,OS_INT);
  598. {Get a temp register and load the left value into it
  599. and free the location.}
  600. r:=cg.getintregister(exprasmlist,OS_INT);
  601. cg.a_load_loc_reg(exprasmlist,OS_INT,left.location,r);
  602. location_release(exprasmlist,left.location);
  603. {Allocate EAX.}
  604. cg.getexplicitregister(exprasmlist,NR_EAX);
  605. {Load the right value.}
  606. cg.a_load_loc_reg(exprasmlist,OS_INT,right.location,NR_EAX);
  607. location_release(exprasmlist,right.location);
  608. {The mul instruction frees register r.}
  609. cg.ungetregister(exprasmlist,r);
  610. {Also allocate EDX, since it is also modified by a mul (JM).}
  611. cg.getexplicitregister(exprasmlist,NR_EDX);
  612. emit_reg(A_MUL,S_L,r);
  613. if cs_check_overflow in aktlocalswitches then
  614. begin
  615. objectlibrary.getlabel(hl4);
  616. cg.a_jmp_flags(exprasmlist,F_AE,hl4);
  617. cg.a_call_name(exprasmlist,'FPC_OVERFLOW');
  618. cg.a_label(exprasmlist,hl4);
  619. end;
  620. {Free EDX}
  621. cg.ungetregister(exprasmlist,NR_EDX);
  622. {Free EAX}
  623. cg.ungetregister(exprasmlist,NR_EAX);
  624. {Allocate a new register and store the result in EAX in it.}
  625. location.register:=cg.getintregister(exprasmlist,OS_INT);
  626. emit_reg_reg(A_MOV,S_L,NR_EAX,location.register);
  627. location_freetemp(exprasmlist,left.location);
  628. location_freetemp(exprasmlist,right.location);
  629. end;
  630. begin
  631. caddnode:=ti386addnode;
  632. end.
  633. {
  634. $Log$
  635. Revision 1.95 2004-02-04 19:22:27 peter
  636. *** empty log message ***
  637. Revision 1.94 2004/01/20 12:59:37 florian
  638. * common addnode code for x86-64 and i386
  639. Revision 1.93 2004/01/14 17:19:04 peter
  640. * disable addmmxset
  641. }