aoptcpu.pas 43 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. { $define DEBUG_AOPTCPU}
  21. Interface
  22. uses cpubase,cgbase,aasmtai,aopt,AoptObj,aoptcpub;
  23. Type
  24. TCpuAsmOptimizer = class(TAsmOptimizer)
  25. { outputs a debug message into the assembler file }
  26. procedure DebugMsg(const s: string; p: tai);
  27. Function GetNextInstructionUsingReg(Current: tai; Var Next: tai;reg : TRegister): Boolean;
  28. function RegInInstruction(Reg: TRegister; p1: tai): Boolean; override;
  29. function RegLoadedWithNewValue(reg : tregister; hp : tai) : boolean; override;
  30. function InstructionLoadsFromReg(const reg : TRegister; const hp : tai) : boolean; override;
  31. { uses the same constructor as TAopObj }
  32. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  33. procedure PeepHoleOptPass2;override;
  34. End;
  35. Implementation
  36. uses
  37. cutils,
  38. verbose,
  39. cpuinfo,
  40. aasmbase,aasmcpu,aasmdata,
  41. aoptutils,
  42. globals,globtype,
  43. cgutils;
  44. type
  45. TAsmOpSet = set of TAsmOp;
  46. function CanBeCond(p : tai) : boolean;
  47. begin
  48. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  49. end;
  50. function RefsEqual(const r1, r2: treference): boolean;
  51. begin
  52. refsequal :=
  53. (r1.offset = r2.offset) and
  54. (r1.base = r2.base) and
  55. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  56. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  57. (r1.relsymbol = r2.relsymbol) and
  58. (r1.addressmode = r2.addressmode);
  59. end;
  60. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean; inline;
  61. begin
  62. result:=oper1.typ=oper2.typ;
  63. if result then
  64. case oper1.typ of
  65. top_const:
  66. Result:=oper1.val = oper2.val;
  67. top_reg:
  68. Result:=oper1.reg = oper2.reg;
  69. top_ref:
  70. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  71. else Result:=false;
  72. end
  73. end;
  74. function MatchOperand(const oper: TOper; const reg: TRegister): boolean; inline;
  75. begin
  76. result := (oper.typ = top_reg) and (oper.reg = reg);
  77. end;
  78. function MatchInstruction(const instr: tai; const op: TAsmOp): boolean;
  79. begin
  80. result :=
  81. (instr.typ = ait_instruction) and
  82. (taicpu(instr).opcode = op);
  83. end;
  84. function MatchInstruction(const instr: tai; const ops: TAsmOpSet): boolean;
  85. begin
  86. result :=
  87. (instr.typ = ait_instruction) and
  88. (taicpu(instr).opcode in ops);
  89. end;
  90. function MatchInstruction(const instr: tai; const ops: TAsmOpSet;opcount : byte): boolean;
  91. begin
  92. result :=
  93. (instr.typ = ait_instruction) and
  94. (taicpu(instr).opcode in ops) and
  95. (taicpu(instr).ops=opcount);
  96. end;
  97. {$ifdef DEBUG_AOPTCPU}
  98. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);
  99. begin
  100. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  101. end;
  102. {$else DEBUG_AOPTCPU}
  103. procedure TCpuAsmOptimizer.DebugMsg(const s: string;p : tai);inline;
  104. begin
  105. end;
  106. {$endif DEBUG_AOPTCPU}
  107. function TCpuAsmOptimizer.RegInInstruction(Reg: TRegister; p1: tai): Boolean;
  108. begin
  109. If (p1.typ = ait_instruction) and (taicpu(p1).opcode in [A_MUL,A_MULS,A_FMUL,A_FMULS,A_FMULSU]) and
  110. ((getsupreg(reg)=RS_R0) or (getsupreg(reg)=RS_R1)) then
  111. Result:=true
  112. else
  113. Result:=inherited RegInInstruction(Reg, p1);
  114. end;
  115. function TCpuAsmOptimizer.GetNextInstructionUsingReg(Current: tai;
  116. var Next: tai; reg: TRegister): Boolean;
  117. begin
  118. Next:=Current;
  119. repeat
  120. Result:=GetNextInstruction(Next,Next);
  121. until not(cs_opt_level3 in current_settings.optimizerswitches) or not(Result) or (Next.typ<>ait_instruction) or (RegInInstruction(reg,Next)) or
  122. (is_calljmp(taicpu(Next).opcode));
  123. end;
  124. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  125. var
  126. p: taicpu;
  127. begin
  128. if not assigned(hp) or
  129. (hp.typ <> ait_instruction) then
  130. begin
  131. Result := false;
  132. exit;
  133. end;
  134. p := taicpu(hp);
  135. Result := ((p.opcode in [A_LDI,A_MOV,A_LDS]) and (reg=p.oper[0]^.reg) and ((p.oper[1]^.typ<>top_reg) or (reg<>p.oper[0]^.reg))) or
  136. ((p.opcode in [A_LD,A_LDD,A_LPM]) and (reg=p.oper[0]^.reg) and not(RegInRef(reg,p.oper[1]^.ref^))) or
  137. ((p.opcode in [A_MOVW]) and ((reg=p.oper[0]^.reg) or (TRegister(ord(reg)+1)=p.oper[0]^.reg)) and not(reg=p.oper[1]^.reg) and not(TRegister(ord(reg)+1)=p.oper[1]^.reg)) or
  138. ((p.opcode in [A_POP]) and (reg=p.oper[0]^.reg));
  139. end;
  140. function TCpuAsmOptimizer.InstructionLoadsFromReg(const reg: TRegister; const hp: tai): boolean;
  141. var
  142. p: taicpu;
  143. i: longint;
  144. begin
  145. Result := false;
  146. if not (assigned(hp) and (hp.typ = ait_instruction)) then
  147. exit;
  148. p:=taicpu(hp);
  149. i:=0;
  150. { we do not care about the stack pointer }
  151. if p.opcode in [A_POP] then
  152. exit;
  153. { first operand only written?
  154. then skip it }
  155. if p.opcode in [A_MOV,A_LD,A_LDD,A_LDS,A_LPM,A_LDI,A_MOVW] then
  156. i:=1;
  157. while i<p.ops do
  158. begin
  159. case p.oper[i]^.typ of
  160. top_reg:
  161. Result := (p.oper[i]^.reg = reg) or
  162. { MOVW }
  163. ((i=1) and (p.opcode=A_MOVW) and (getsupreg(p.oper[0]^.reg)+1=getsupreg(reg)));
  164. top_ref:
  165. Result :=
  166. (p.oper[i]^.ref^.base = reg) or
  167. (p.oper[i]^.ref^.index = reg);
  168. end;
  169. { Bailout if we found something }
  170. if Result then
  171. exit;
  172. Inc(i);
  173. end;
  174. end;
  175. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  176. var
  177. hp1,hp2,hp3,hp4,hp5: tai;
  178. alloc, dealloc: tai_regalloc;
  179. i: integer;
  180. l: TAsmLabel;
  181. TmpUsedRegs : TAllUsedRegs;
  182. begin
  183. result := false;
  184. case p.typ of
  185. ait_instruction:
  186. begin
  187. {
  188. change
  189. <op> reg,x,y
  190. cp reg,r1
  191. into
  192. <op>s reg,x,y
  193. }
  194. { this optimization can applied only to the currently enabled operations because
  195. the other operations do not update all flags and FPC does not track flag usage }
  196. if MatchInstruction(p, [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_DEC,A_EOR,
  197. A_INC,A_LSL,A_LSR,
  198. A_OR,A_ORI,A_ROL,A_ROR,A_SBC,A_SBCI,A_SUB,A_SUBI]) and
  199. GetNextInstruction(p, hp1) and
  200. ((MatchInstruction(hp1, A_CP) and
  201. (((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  202. (taicpu(hp1).oper[1]^.reg = NR_R1)) or
  203. ((taicpu(p).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  204. (taicpu(hp1).oper[0]^.reg = NR_R1) and
  205. (taicpu(p).opcode in [A_ADC,A_ADD,A_AND,A_ANDI,A_ASR,A_COM,A_EOR,
  206. A_LSL,A_LSR,
  207. A_OR,A_ORI,A_ROL,A_ROR,A_SUB,A_SBI])))) or
  208. (MatchInstruction(hp1, A_CPI) and
  209. (taicpu(p).opcode = A_ANDI) and
  210. (taicpu(p).oper[1]^.typ=top_const) and
  211. (taicpu(hp1).oper[1]^.typ=top_const) and
  212. (taicpu(p).oper[1]^.val=taicpu(hp1).oper[1]^.val))) and
  213. GetNextInstruction(hp1, hp2) and
  214. { be careful here, following instructions could use other flags
  215. however after a jump fpc never depends on the value of flags }
  216. { All above instructions set Z and N according to the following
  217. Z := result = 0;
  218. N := result[31];
  219. EQ = Z=1; NE = Z=0;
  220. MI = N=1; PL = N=0; }
  221. MatchInstruction(hp2, A_BRxx) and
  222. ((taicpu(hp2).condition in [C_EQ,C_NE,C_MI,C_PL]) or
  223. { sub/sbc set all flags }
  224. (taicpu(p).opcode in [A_SUB,A_SBI])){ and
  225. no flag allocation tracking implemented yet on avr
  226. assigned(FindRegDealloc(NR_DEFAULTFLAGS,tai(hp2.Next)))} then
  227. begin
  228. { move flag allocation if possible }
  229. { no flag allocation tracking implemented yet on avr
  230. GetLastInstruction(hp1, hp2);
  231. hp2:=FindRegAlloc(NR_DEFAULTFLAGS,tai(hp2.Next));
  232. if assigned(hp2) then
  233. begin
  234. asml.Remove(hp2);
  235. asml.insertbefore(hp2, p);
  236. end;
  237. }
  238. // If we compare to the same value we are masking then invert the comparison
  239. if (taicpu(hp1).opcode=A_CPI) or
  240. { sub/sbc with reverted? }
  241. ((taicpu(hp1).oper[0]^.reg = NR_R1) and (taicpu(p).opcode in [A_SUB,A_SBI])) then
  242. taicpu(hp2).condition:=inverse_cond(taicpu(hp2).condition);
  243. asml.InsertBefore(tai_regalloc.alloc(NR_DEFAULTFLAGS,p), p);
  244. asml.InsertAfter(tai_regalloc.dealloc(NR_DEFAULTFLAGS,hp2), hp2);
  245. IncludeRegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs);
  246. DebugMsg('Peephole OpCp2Op performed', p);
  247. asml.remove(hp1);
  248. hp1.free;
  249. Result:=true;
  250. end
  251. else
  252. case taicpu(p).opcode of
  253. A_LDI:
  254. begin
  255. { turn
  256. ldi reg0, imm
  257. cp/mov reg1, reg0
  258. dealloc reg0
  259. into
  260. cpi/ldi reg1, imm
  261. }
  262. if MatchOpType(taicpu(p),top_reg,top_const) and
  263. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  264. MatchInstruction(hp1,[A_CP,A_MOV],2) and
  265. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  266. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  267. (getsupreg(taicpu(hp1).oper[0]^.reg) in [16..31]) and
  268. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  269. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) then
  270. begin
  271. CopyUsedRegs(TmpUsedRegs);
  272. if not(RegUsedAfterInstruction(taicpu(hp1).oper[1]^.reg, hp1, TmpUsedRegs)) then
  273. begin
  274. case taicpu(hp1).opcode of
  275. A_CP:
  276. taicpu(hp1).opcode:=A_CPI;
  277. A_MOV:
  278. taicpu(hp1).opcode:=A_LDI;
  279. else
  280. internalerror(2016111901);
  281. end;
  282. taicpu(hp1).loadconst(1, taicpu(p).oper[1]^.val);
  283. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  284. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  285. if assigned(alloc) and assigned(dealloc) then
  286. begin
  287. asml.Remove(alloc);
  288. alloc.Free;
  289. asml.Remove(dealloc);
  290. dealloc.Free;
  291. end;
  292. DebugMsg('Peephole LdiMov/Cp2Ldi/Cpi performed', p);
  293. RemoveCurrentP(taicpu(p));
  294. end;
  295. ReleaseUsedRegs(TmpUsedRegs);
  296. end;
  297. end;
  298. A_STS:
  299. if (taicpu(p).oper[0]^.ref^.symbol=nil) and
  300. (taicpu(p).oper[0]^.ref^.relsymbol=nil) and
  301. (getsupreg(taicpu(p).oper[0]^.ref^.base)=RS_NO) and
  302. (getsupreg(taicpu(p).oper[0]^.ref^.index)=RS_NO) and
  303. (taicpu(p).oper[0]^.ref^.addressmode=AM_UNCHANGED) and
  304. (taicpu(p).oper[0]^.ref^.offset>=32) and
  305. (taicpu(p).oper[0]^.ref^.offset<=95) then
  306. begin
  307. DebugMsg('Peephole Sts2Out performed', p);
  308. taicpu(p).opcode:=A_OUT;
  309. taicpu(p).loadconst(0,taicpu(p).oper[0]^.ref^.offset-32);
  310. end;
  311. A_LDS:
  312. if (taicpu(p).oper[1]^.ref^.symbol=nil) and
  313. (taicpu(p).oper[1]^.ref^.relsymbol=nil) and
  314. (getsupreg(taicpu(p).oper[1]^.ref^.base)=RS_NO) and
  315. (getsupreg(taicpu(p).oper[1]^.ref^.index)=RS_NO) and
  316. (taicpu(p).oper[1]^.ref^.addressmode=AM_UNCHANGED) and
  317. (taicpu(p).oper[1]^.ref^.offset>=32) and
  318. (taicpu(p).oper[1]^.ref^.offset<=95) then
  319. begin
  320. DebugMsg('Peephole Lds2In performed', p);
  321. taicpu(p).opcode:=A_IN;
  322. taicpu(p).loadconst(1,taicpu(p).oper[1]^.ref^.offset-32);
  323. end;
  324. A_IN:
  325. if GetNextInstruction(p,hp1) then
  326. begin
  327. {
  328. in rX,Y
  329. ori rX,n
  330. out Y,rX
  331. into
  332. sbi rX,lg(n)
  333. }
  334. if (taicpu(p).oper[1]^.val<=31) and
  335. MatchInstruction(hp1,A_ORI) and
  336. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  337. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  338. GetNextInstruction(hp1,hp2) and
  339. MatchInstruction(hp2,A_OUT) and
  340. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  341. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  342. begin
  343. DebugMsg('Peephole InOriOut2Sbi performed', p);
  344. taicpu(p).opcode:=A_SBI;
  345. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  346. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  347. asml.Remove(hp1);
  348. hp1.Free;
  349. asml.Remove(hp2);
  350. hp2.Free;
  351. result:=true;
  352. end
  353. {
  354. in rX,Y
  355. andi rX,not(n)
  356. out Y,rX
  357. into
  358. cbi rX,lg(n)
  359. }
  360. else if (taicpu(p).oper[1]^.val<=31) and
  361. MatchInstruction(hp1,A_ANDI) and
  362. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  363. (PopCnt(byte(not(taicpu(hp1).oper[1]^.val)))=1) and
  364. GetNextInstruction(hp1,hp2) and
  365. MatchInstruction(hp2,A_OUT) and
  366. MatchOperand(taicpu(hp2).oper[1]^,taicpu(p).oper[0]^) and
  367. MatchOperand(taicpu(hp2).oper[0]^,taicpu(p).oper[1]^) then
  368. begin
  369. DebugMsg('Peephole InAndiOut2Cbi performed', p);
  370. taicpu(p).opcode:=A_CBI;
  371. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  372. taicpu(p).loadconst(1,BsrByte(not(taicpu(hp1).oper[1]^.val)));
  373. asml.Remove(hp1);
  374. hp1.Free;
  375. asml.Remove(hp2);
  376. hp2.Free;
  377. result:=true;
  378. end
  379. {
  380. in rX,Y
  381. andi rX,n
  382. breq/brne L1
  383. into
  384. sbis/sbic Y,lg(n)
  385. jmp L1
  386. .Ltemp:
  387. }
  388. else if (taicpu(p).oper[1]^.val<=31) and
  389. MatchInstruction(hp1,A_ANDI) and
  390. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and
  391. (PopCnt(byte(taicpu(hp1).oper[1]^.val))=1) and
  392. GetNextInstruction(hp1,hp2) and
  393. MatchInstruction(hp2,A_BRxx) and
  394. (taicpu(hp2).condition in [C_EQ,C_NE]) then
  395. begin
  396. if taicpu(hp2).condition=C_EQ then
  397. taicpu(p).opcode:=A_SBIS
  398. else
  399. taicpu(p).opcode:=A_SBIC;
  400. DebugMsg('Peephole InAndiBrx2SbixJmp performed', p);
  401. taicpu(p).loadconst(0,taicpu(p).oper[1]^.val);
  402. taicpu(p).loadconst(1,BsrByte(taicpu(hp1).oper[1]^.val));
  403. asml.Remove(hp1);
  404. hp1.Free;
  405. taicpu(hp2).condition:=C_None;
  406. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  407. taicpu(hp2).opcode:=A_JMP
  408. else
  409. taicpu(hp2).opcode:=A_RJMP;
  410. current_asmdata.getjumplabel(l);
  411. l.increfs;
  412. asml.InsertAfter(tai_label.create(l), hp2);
  413. result:=true;
  414. end;
  415. end;
  416. A_ANDI:
  417. begin
  418. {
  419. Turn
  420. andi rx, #pow2
  421. brne l
  422. <op>
  423. l:
  424. Into
  425. sbrs rx, #(1 shl imm)
  426. <op>
  427. l:
  428. }
  429. if (taicpu(p).ops=2) and
  430. (taicpu(p).oper[1]^.typ=top_const) and
  431. ispowerof2(taicpu(p).oper[1]^.val,i) and
  432. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  433. GetNextInstruction(p,hp1) and
  434. (hp1.typ=ait_instruction) and
  435. (taicpu(hp1).opcode=A_BRxx) and
  436. (taicpu(hp1).condition in [C_EQ,C_NE]) and
  437. (taicpu(hp1).ops>0) and
  438. (taicpu(hp1).oper[0]^.typ = top_ref) and
  439. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  440. GetNextInstruction(hp1,hp2) and
  441. (hp2.typ=ait_instruction) and
  442. GetNextInstruction(hp2,hp3) and
  443. (hp3.typ=ait_label) and
  444. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  445. begin
  446. DebugMsg('Peephole AndiBr2Sbr performed', p);
  447. taicpu(p).oper[1]^.val:=i;
  448. if taicpu(hp1).condition=C_NE then
  449. taicpu(p).opcode:=A_SBRS
  450. else
  451. taicpu(p).opcode:=A_SBRC;
  452. asml.Remove(hp1);
  453. hp1.free;
  454. result:=true;
  455. end
  456. {
  457. Remove
  458. andi rx, #y
  459. dealloc rx
  460. }
  461. else if (taicpu(p).ops=2) and
  462. (taicpu(p).oper[0]^.typ=top_reg) and
  463. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(p.next))) and
  464. (assigned(FindRegDeAlloc(NR_DEFAULTFLAGS,tai(p.Next))) or
  465. (not RegInUsedRegs(NR_DEFAULTFLAGS,UsedRegs))) then
  466. begin
  467. DebugMsg('Redundant Andi removed', p);
  468. result:=RemoveCurrentP(taicpu(p));
  469. end;
  470. end;
  471. A_ADD:
  472. begin
  473. if (taicpu(p).oper[1]^.reg=NR_R1) and
  474. GetNextInstruction(p, hp1) and
  475. MatchInstruction(hp1,A_ADC) then
  476. begin
  477. DebugMsg('Peephole AddAdc2Add performed', p);
  478. result:=RemoveCurrentP(taicpu(p));
  479. end;
  480. end;
  481. A_SUB:
  482. begin
  483. if (taicpu(p).oper[1]^.reg=NR_R1) and
  484. GetNextInstruction(p, hp1) and
  485. MatchInstruction(hp1,A_SBC) then
  486. begin
  487. DebugMsg('Peephole SubSbc2Sub performed', p);
  488. taicpu(hp1).opcode:=A_SUB;
  489. result:=RemoveCurrentP(taicpu(p));
  490. end;
  491. end;
  492. A_CLR:
  493. begin
  494. { turn the common
  495. clr rX
  496. mov/ld rX, rY
  497. into
  498. mov/ld rX, rY
  499. }
  500. if (taicpu(p).ops=1) and
  501. (taicpu(p).oper[0]^.typ=top_reg) and
  502. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  503. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  504. (hp1.typ=ait_instruction) and
  505. (taicpu(hp1).opcode in [A_MOV,A_LD]) and
  506. (taicpu(hp1).ops>0) and
  507. (taicpu(hp1).oper[0]^.typ=top_reg) and
  508. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) then
  509. begin
  510. DebugMsg('Peephole ClrMov2Mov performed', p);
  511. result:=RemoveCurrentP(taicpu(p));
  512. end
  513. { turn
  514. clr rX
  515. ...
  516. adc rY, rX
  517. into
  518. ...
  519. adc rY, r1
  520. }
  521. else if (taicpu(p).ops=1) and
  522. (taicpu(p).oper[0]^.typ=top_reg) and
  523. GetNextInstructionUsingReg(p, hp1, taicpu(p).oper[0]^.reg) and
  524. (not RegModifiedBetween(taicpu(p).oper[0]^.reg, p, hp1)) and
  525. (hp1.typ=ait_instruction) and
  526. (taicpu(hp1).opcode in [A_ADC,A_SBC]) and
  527. (taicpu(hp1).ops=2) and
  528. (taicpu(hp1).oper[1]^.typ=top_reg) and
  529. (taicpu(hp1).oper[1]^.reg=taicpu(p).oper[0]^.reg) and
  530. (taicpu(hp1).oper[0]^.reg<>taicpu(p).oper[0]^.reg) and
  531. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  532. begin
  533. DebugMsg('Peephole ClrAdc2Adc performed', p);
  534. taicpu(hp1).oper[1]^.reg:=NR_R1;
  535. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  536. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  537. if assigned(alloc) and assigned(dealloc) then
  538. begin
  539. asml.Remove(alloc);
  540. alloc.Free;
  541. asml.Remove(dealloc);
  542. dealloc.Free;
  543. end;
  544. result:=RemoveCurrentP(taicpu(p));
  545. end;
  546. end;
  547. A_PUSH:
  548. begin
  549. { turn
  550. push reg0
  551. push reg1
  552. pop reg3
  553. pop reg2
  554. into
  555. movw reg2,reg0
  556. or
  557. mov reg3,reg1
  558. mov reg2,reg0
  559. }
  560. if GetNextInstruction(p,hp1) and
  561. MatchInstruction(hp1,A_PUSH) and
  562. GetNextInstruction(hp1,hp2) and
  563. MatchInstruction(hp2,A_POP) and
  564. GetNextInstruction(hp2,hp3) and
  565. MatchInstruction(hp3,A_POP) then
  566. begin
  567. if (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  568. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  569. (getsupreg(taicpu(hp2).oper[0]^.reg)=getsupreg(taicpu(hp3).oper[0]^.reg)+1) and
  570. ((getsupreg(taicpu(hp3).oper[0]^.reg) mod 2)=0) then
  571. begin
  572. DebugMsg('Peephole PushPushPopPop2Movw performed', p);
  573. taicpu(p).ops:=2;
  574. taicpu(p).opcode:=A_MOVW;
  575. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  576. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  577. asml.Remove(hp1);
  578. hp1.Free;
  579. asml.Remove(hp2);
  580. hp2.Free;
  581. asml.Remove(hp3);
  582. hp3.Free;
  583. result:=true;
  584. end
  585. else
  586. begin
  587. DebugMsg('Peephole PushPushPopPop2MovMov performed', p);
  588. taicpu(p).ops:=2;
  589. taicpu(p).opcode:=A_MOV;
  590. taicpu(hp1).ops:=2;
  591. taicpu(hp1).opcode:=A_MOV;
  592. taicpu(p).loadreg(1, taicpu(p).oper[0]^.reg);
  593. taicpu(p).loadreg(0, taicpu(hp3).oper[0]^.reg);
  594. taicpu(hp1).loadreg(1, taicpu(hp1).oper[0]^.reg);
  595. taicpu(hp1).loadreg(0, taicpu(hp2).oper[0]^.reg);
  596. asml.Remove(hp2);
  597. hp2.Free;
  598. asml.Remove(hp3);
  599. hp3.Free;
  600. result:=true;
  601. end
  602. end;
  603. end;
  604. A_CALL:
  605. if (cs_opt_level4 in current_settings.optimizerswitches) and
  606. GetNextInstruction(p,hp1) and
  607. MatchInstruction(hp1,A_RET) then
  608. begin
  609. DebugMsg('Peephole CallReg2Jmp performed', p);
  610. taicpu(p).opcode:=A_JMP;
  611. asml.Remove(hp1);
  612. hp1.Free;
  613. result:=true;
  614. end;
  615. A_RCALL:
  616. if (cs_opt_level4 in current_settings.optimizerswitches) and
  617. GetNextInstruction(p,hp1) and
  618. MatchInstruction(hp1,A_RET) then
  619. begin
  620. DebugMsg('Peephole RCallReg2RJmp performed', p);
  621. taicpu(p).opcode:=A_RJMP;
  622. asml.Remove(hp1);
  623. hp1.Free;
  624. result:=true;
  625. end;
  626. A_MOV:
  627. begin
  628. { change
  629. mov reg0, reg1
  630. dealloc reg0
  631. into
  632. dealloc reg0
  633. }
  634. if MatchOpType(taicpu(p),top_reg,top_reg) then
  635. begin
  636. CopyUsedRegs(TmpUsedRegs);
  637. UpdateUsedRegs(TmpUsedRegs,tai(p.Next));
  638. if not(RegInUsedRegs(taicpu(p).oper[0]^.reg,TmpUsedRegs)) and
  639. { reg. allocation information before calls is not perfect, so don't do this before
  640. calls/icalls }
  641. GetNextInstruction(p,hp1) and
  642. not(MatchInstruction(hp1,[A_CALL,A_RCALL])) then
  643. begin
  644. DebugMsg('Peephole Mov2Nop performed', p);
  645. result:=RemoveCurrentP(taicpu(p));
  646. ReleaseUsedRegs(TmpUsedRegs);
  647. exit;
  648. end;
  649. ReleaseUsedRegs(TmpUsedRegs);
  650. end;
  651. { turn
  652. mov reg0, reg1
  653. <op> reg2,reg0
  654. dealloc reg0
  655. into
  656. <op> reg2,reg1
  657. }
  658. if MatchOpType(taicpu(p),top_reg,top_reg) and
  659. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  660. (not RegModifiedBetween(taicpu(p).oper[1]^.reg, p, hp1)) and
  661. MatchInstruction(hp1,[A_PUSH,A_MOV,A_CP,A_CPC,A_ADD,A_SUB,A_ADC,A_SBC,A_EOR,A_AND,A_OR,
  662. A_STD,A_ST,
  663. A_OUT,A_IN]) and
  664. (not RegModifiedByInstruction(taicpu(p).oper[0]^.reg, hp1)) and
  665. {(taicpu(hp1).ops=1) and
  666. (taicpu(hp1).oper[0]^.typ = top_reg) and
  667. (taicpu(hp1).oper[0]^.reg=taicpu(p).oper[0]^.reg) and }
  668. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next))) then
  669. begin
  670. DebugMsg('Peephole MovOp2Op performed', p);
  671. for i := 0 to taicpu(hp1).ops-1 do
  672. if taicpu(hp1).oper[i]^.typ=top_reg then
  673. if taicpu(hp1).oper[i]^.reg=taicpu(p).oper[0]^.reg then
  674. taicpu(hp1).oper[i]^.reg:=taicpu(p).oper[1]^.reg;
  675. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  676. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp1.Next));
  677. if assigned(alloc) and assigned(dealloc) then
  678. begin
  679. asml.Remove(alloc);
  680. alloc.Free;
  681. asml.Remove(dealloc);
  682. dealloc.Free;
  683. end;
  684. result:=RemoveCurrentP(taicpu(p));
  685. end
  686. { remove
  687. mov reg0,reg0
  688. }
  689. else if (taicpu(p).ops=2) and
  690. (taicpu(p).oper[0]^.typ = top_reg) and
  691. (taicpu(p).oper[1]^.typ = top_reg) and
  692. (taicpu(p).oper[0]^.reg = taicpu(p).oper[1]^.reg) then
  693. begin
  694. DebugMsg('Peephole RedundantMov performed', p);
  695. result:=RemoveCurrentP(taicpu(p));
  696. end
  697. {
  698. Turn
  699. mov rx,ry
  700. op rx,rz
  701. mov ry, rx
  702. Into
  703. op ry,rz
  704. }
  705. else if (taicpu(p).ops=2) and
  706. MatchOpType(taicpu(p),top_reg,top_reg) and
  707. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  708. (hp1.typ=ait_instruction) and
  709. (taicpu(hp1).ops >= 1) and
  710. (taicpu(hp1).oper[0]^.typ = top_reg) and
  711. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  712. MatchInstruction(hp2,A_MOV) and
  713. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  714. (taicpu(hp2).oper[0]^.reg = taicpu(p).oper[1]^.reg) and
  715. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  716. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  717. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp2)) and
  718. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_SUB,A_SBC,A_AND,A_OR,A_EOR,
  719. A_INC,A_DEC,
  720. A_LSL,A_LSR,A_ASR,A_ROR,A_ROL]) and
  721. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  722. begin
  723. DebugMsg('Peephole MovOpMov2Op performed', p);
  724. if (taicpu(hp1).ops=2) and
  725. (taicpu(hp1).oper[1]^.typ=top_reg) and
  726. (taicpu(hp1).oper[1]^.reg = taicpu(p).oper[1]^.reg) then
  727. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  728. taicpu(hp1).oper[0]^.reg:=taicpu(p).oper[1]^.reg;
  729. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  730. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  731. if assigned(alloc) and assigned(dealloc) then
  732. begin
  733. asml.Remove(alloc);
  734. alloc.Free;
  735. asml.Remove(dealloc);
  736. dealloc.Free;
  737. end;
  738. asml.remove(hp2);
  739. hp2.free;
  740. result:=RemoveCurrentP(taicpu(p));
  741. end
  742. {
  743. Turn
  744. mov rx,ry
  745. op rx,rw
  746. mov rw,rx
  747. Into
  748. op rw,ry
  749. }
  750. else if (taicpu(p).ops=2) and
  751. MatchOpType(taicpu(p),top_reg,top_reg) and
  752. GetNextInstructionUsingReg(p,hp1,taicpu(p).oper[0]^.reg) and
  753. (hp1.typ=ait_instruction) and
  754. (taicpu(hp1).ops = 2) and
  755. MatchOpType(taicpu(hp1),top_reg,top_reg) and
  756. GetNextInstructionUsingReg(hp1,hp2,taicpu(hp1).oper[0]^.reg) and
  757. (hp2.typ=ait_instruction) and
  758. (taicpu(hp2).opcode=A_MOV) and
  759. MatchOpType(taicpu(hp2),top_reg,top_reg) and
  760. (taicpu(hp2).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) and
  761. (taicpu(hp2).oper[1]^.reg = taicpu(hp1).oper[0]^.reg) and
  762. (taicpu(hp2).oper[1]^.reg = taicpu(p).oper[0]^.reg) and
  763. (not RegModifiedBetween(taicpu(p).oper[1]^.reg,p,hp1)) and
  764. (taicpu(hp1).opcode in [A_ADD,A_ADC,A_AND,A_OR,A_EOR]) and
  765. assigned(FindRegDeAlloc(taicpu(p).oper[0]^.reg, tai(hp2.Next))) then
  766. begin
  767. DebugMsg('Peephole MovOpMov2Op2 performed', p);
  768. taicpu(hp1).oper[0]^.reg:=taicpu(hp2).oper[0]^.reg;
  769. taicpu(hp1).oper[1]^.reg:=taicpu(p).oper[1]^.reg;
  770. alloc:=FindRegAllocBackward(taicpu(p).oper[0]^.reg,tai(p.Previous));
  771. dealloc:=FindRegDeAlloc(taicpu(p).oper[0]^.reg,tai(hp2.Next));
  772. if assigned(alloc) and assigned(dealloc) then
  773. begin
  774. asml.Remove(alloc);
  775. alloc.Free;
  776. asml.Remove(dealloc);
  777. dealloc.Free;
  778. end;
  779. result:=RemoveCurrentP(taicpu(p));
  780. asml.remove(hp2);
  781. hp2.free;
  782. end
  783. { fold
  784. mov reg2,reg0
  785. mov reg3,reg1
  786. to
  787. movw reg2,reg0
  788. }
  789. else if (CPUAVR_HAS_MOVW in cpu_capabilities[current_settings.cputype]) and
  790. (taicpu(p).ops=2) and
  791. (taicpu(p).oper[0]^.typ = top_reg) and
  792. (taicpu(p).oper[1]^.typ = top_reg) and
  793. getnextinstruction(p,hp1) and
  794. (hp1.typ = ait_instruction) and
  795. (taicpu(hp1).opcode = A_MOV) and
  796. (taicpu(hp1).ops=2) and
  797. (taicpu(hp1).oper[0]^.typ = top_reg) and
  798. (taicpu(hp1).oper[1]^.typ = top_reg) and
  799. (getsupreg(taicpu(hp1).oper[0]^.reg)=getsupreg(taicpu(p).oper[0]^.reg)+1) and
  800. ((getsupreg(taicpu(p).oper[0]^.reg) mod 2)=0) and
  801. ((getsupreg(taicpu(p).oper[1]^.reg) mod 2)=0) and
  802. (getsupreg(taicpu(hp1).oper[1]^.reg)=getsupreg(taicpu(p).oper[1]^.reg)+1) then
  803. begin
  804. DebugMsg('Peephole MovMov2Movw performed', p);
  805. alloc:=FindRegAllocBackward(taicpu(hp1).oper[0]^.reg,tai(hp1.Previous));
  806. if assigned(alloc) then
  807. begin
  808. asml.Remove(alloc);
  809. asml.InsertBefore(alloc,p);
  810. end;
  811. taicpu(p).opcode:=A_MOVW;
  812. asml.remove(hp1);
  813. hp1.free;
  814. result:=true;
  815. end
  816. {
  817. This removes the first mov from
  818. mov rX,...
  819. mov rX,...
  820. }
  821. else if GetNextInstruction(p,hp1) and MatchInstruction(hp1,A_MOV) then
  822. while MatchInstruction(hp1,A_MOV) and
  823. MatchOperand(taicpu(p).oper[0]^, taicpu(hp1).oper[0]^) and
  824. { don't remove the first mov if the second is a mov rX,rX }
  825. not(MatchOperand(taicpu(hp1).oper[0]^,taicpu(hp1).oper[1]^)) do
  826. begin
  827. DebugMsg('Peephole MovMov2Mov performed', p);
  828. result:=RemoveCurrentP(taicpu(p));
  829. GetNextInstruction(hp1,hp1);
  830. if not assigned(hp1) then
  831. break;
  832. end;
  833. end;
  834. A_SBIC,
  835. A_SBIS:
  836. begin
  837. {
  838. Turn
  839. sbic/sbis X, y
  840. jmp .L1
  841. op
  842. .L1:
  843. into
  844. sbis/sbic X,y
  845. op
  846. .L1:
  847. }
  848. if GetNextInstruction(p, hp1) and
  849. (hp1.typ=ait_instruction) and
  850. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  851. (taicpu(hp1).ops>0) and
  852. (taicpu(hp1).oper[0]^.typ = top_ref) and
  853. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  854. GetNextInstruction(hp1, hp2) and
  855. (hp2.typ=ait_instruction) and
  856. (not taicpu(hp2).is_jmp) and
  857. GetNextInstruction(hp2, hp3) and
  858. (hp3.typ=ait_label) and
  859. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) then
  860. begin
  861. DebugMsg('Peephole SbiJmp2Sbi performed',p);
  862. if taicpu(p).opcode=A_SBIC then
  863. taicpu(p).opcode:=A_SBIS
  864. else
  865. taicpu(p).opcode:=A_SBIC;
  866. tai_label(hp3).labsym.decrefs;
  867. AsmL.remove(hp1);
  868. taicpu(hp1).Free;
  869. result:=true;
  870. end
  871. {
  872. Turn
  873. sbiX X, y
  874. jmp .L1
  875. jmp .L2
  876. .L1:
  877. op
  878. .L2:
  879. into
  880. sbiX X,y
  881. .L1:
  882. op
  883. .L2:
  884. }
  885. else if GetNextInstruction(p, hp1) and
  886. (hp1.typ=ait_instruction) and
  887. (taicpu(hp1).opcode in [A_JMP,A_RJMP]) and
  888. (taicpu(hp1).ops>0) and
  889. (taicpu(hp1).oper[0]^.typ = top_ref) and
  890. (taicpu(hp1).oper[0]^.ref^.symbol is TAsmLabel) and
  891. GetNextInstruction(hp1, hp2) and
  892. (hp2.typ=ait_instruction) and
  893. (taicpu(hp2).opcode in [A_JMP,A_RJMP]) and
  894. (taicpu(hp2).ops>0) and
  895. (taicpu(hp2).oper[0]^.typ = top_ref) and
  896. (taicpu(hp2).oper[0]^.ref^.symbol is TAsmLabel) and
  897. GetNextInstruction(hp2, hp3) and
  898. (hp3.typ=ait_label) and
  899. (taicpu(hp1).oper[0]^.ref^.symbol=tai_label(hp3).labsym) and
  900. GetNextInstruction(hp3, hp4) and
  901. (hp4.typ=ait_instruction) and
  902. GetNextInstruction(hp4, hp5) and
  903. (hp3.typ=ait_label) and
  904. (taicpu(hp2).oper[0]^.ref^.symbol=tai_label(hp5).labsym) then
  905. begin
  906. DebugMsg('Peephole SbiJmpJmp2Sbi performed',p);
  907. tai_label(hp3).labsym.decrefs;
  908. tai_label(hp5).labsym.decrefs;
  909. AsmL.remove(hp1);
  910. taicpu(hp1).Free;
  911. AsmL.remove(hp2);
  912. taicpu(hp2).Free;
  913. result:=true;
  914. end;
  915. end;
  916. end;
  917. end;
  918. end;
  919. end;
  920. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  921. begin
  922. end;
  923. begin
  924. casmoptimizer:=TCpuAsmOptimizer;
  925. End.