ncgutil.pas 87 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Helper routines for all code generators
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit ncgutil;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,cpuinfo,
  22. globtype,
  23. cpubase,cgbase,parabase,cgutils,
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. symconst,symbase,symdef,symsym,symtype,symtable
  26. {$ifndef cpu64bitalu}
  27. ,cg64f32
  28. {$endif not cpu64bitalu}
  29. ;
  30. type
  31. tloadregvars = (lr_dont_load_regvars, lr_load_regvars);
  32. pusedregvars = ^tusedregvars;
  33. tusedregvars = record
  34. intregvars, fpuregvars, mmregvars: Tsuperregisterworklist;
  35. end;
  36. {
  37. Not used currently, implemented because I thought we had to
  38. synchronise around if/then/else as well, but not needed. May
  39. still be useful for SSA once we get around to implementing
  40. that (JM)
  41. pusedregvarscommon = ^tusedregvarscommon;
  42. tusedregvarscommon = record
  43. allregvars, commonregvars, myregvars: tusedregvars;
  44. end;
  45. }
  46. procedure firstcomplex(p : tbinarynode);
  47. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  48. // procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  49. procedure location_force_fpureg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  50. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  51. procedure location_allocate_register(list:TAsmList;out l: tlocation;def: tdef;constant: boolean);
  52. { loads a cgpara into a tlocation; assumes that loc.loc is already
  53. initialised }
  54. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  55. { allocate registers for a tlocation; assumes that loc.loc is already
  56. set to LOC_CREGISTER/LOC_CFPUREGISTER/... }
  57. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  58. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  59. function has_alias_name(pd:tprocdef;const s:string):boolean;
  60. procedure alloc_proc_symbol(pd: tprocdef);
  61. procedure gen_proc_entry_code(list:TAsmList);
  62. procedure gen_proc_exit_code(list:TAsmList);
  63. procedure gen_stack_check_size_para(list:TAsmList);
  64. procedure gen_stack_check_call(list:TAsmList);
  65. procedure gen_save_used_regs(list:TAsmList);
  66. procedure gen_restore_used_regs(list:TAsmList);
  67. procedure gen_load_para_value(list:TAsmList);
  68. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  69. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  70. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  71. { adds the regvars used in n and its children to rv.allregvars,
  72. those which were already in rv.allregvars to rv.commonregvars and
  73. uses rv.myregvars as scratch (so that two uses of the same regvar
  74. in a single tree to make it appear in commonregvars). Useful to
  75. find out which regvars are used in two different node trees
  76. (e.g. in the "else" and "then" path, or in various case blocks }
  77. // procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  78. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  79. { if the result of n is a LOC_C(..)REGISTER, try to find the corresponding
  80. loadn and change its location to a new register (= SSA). In case reload
  81. is true, transfer the old to the new register }
  82. procedure maybechangeloadnodereg(list: TAsmList; var n: tnode; reload: boolean);
  83. { Allocate the buffers for exception management and setjmp environment.
  84. Return a pointer to these buffers, send them to the utility routine
  85. so they are registered, and then call setjmp.
  86. Then compare the result of setjmp with 0, and if not equal
  87. to zero, then jump to exceptlabel.
  88. Also store the result of setjmp to a temporary space by calling g_save_exception_reason
  89. It is to note that this routine may be called *after* the stackframe of a
  90. routine has been called, therefore on machines where the stack cannot
  91. be modified, all temps should be allocated on the heap instead of the
  92. stack. }
  93. const
  94. EXCEPT_BUF_SIZE = 3*sizeof(pint);
  95. type
  96. texceptiontemps=record
  97. jmpbuf,
  98. envbuf,
  99. reasonbuf : treference;
  100. end;
  101. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  102. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  103. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  104. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  105. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  106. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  107. procedure location_free(list: TAsmList; const location : TLocation);
  108. function getprocalign : shortint;
  109. procedure gen_fpc_dummy(list : TAsmList);
  110. implementation
  111. uses
  112. version,
  113. cutils,cclasses,
  114. globals,systems,verbose,export,
  115. ppu,defutil,
  116. procinfo,paramgr,fmodule,
  117. regvars,dbgbase,
  118. pass_1,pass_2,
  119. nbas,ncon,nld,nmem,nutils,ngenutil,
  120. tgobj,cgobj,cgcpu,hlcgobj,hlcgcpu
  121. {$ifdef powerpc}
  122. , cpupi
  123. {$endif}
  124. {$ifdef powerpc64}
  125. , cpupi
  126. {$endif}
  127. {$ifdef SUPPORT_MMX}
  128. , cgx86
  129. {$endif SUPPORT_MMX}
  130. ;
  131. {*****************************************************************************
  132. Misc Helpers
  133. *****************************************************************************}
  134. {$if first_mm_imreg = 0}
  135. {$WARN 4044 OFF} { Comparison might be always false ... }
  136. {$endif}
  137. procedure location_free(list: TAsmList; const location : TLocation);
  138. begin
  139. case location.loc of
  140. LOC_VOID:
  141. ;
  142. LOC_REGISTER,
  143. LOC_CREGISTER:
  144. begin
  145. {$ifdef cpu64bitalu}
  146. { x86-64 system v abi:
  147. structs with up to 16 bytes are returned in registers }
  148. if location.size in [OS_128,OS_S128] then
  149. begin
  150. if getsupreg(location.register)<first_int_imreg then
  151. cg.ungetcpuregister(list,location.register);
  152. if getsupreg(location.registerhi)<first_int_imreg then
  153. cg.ungetcpuregister(list,location.registerhi);
  154. end
  155. {$else cpu64bitalu}
  156. if location.size in [OS_64,OS_S64] then
  157. begin
  158. if getsupreg(location.register64.reglo)<first_int_imreg then
  159. cg.ungetcpuregister(list,location.register64.reglo);
  160. if getsupreg(location.register64.reghi)<first_int_imreg then
  161. cg.ungetcpuregister(list,location.register64.reghi);
  162. end
  163. {$endif cpu64bitalu}
  164. else
  165. if getsupreg(location.register)<first_int_imreg then
  166. cg.ungetcpuregister(list,location.register);
  167. end;
  168. LOC_FPUREGISTER,
  169. LOC_CFPUREGISTER:
  170. begin
  171. if getsupreg(location.register)<first_fpu_imreg then
  172. cg.ungetcpuregister(list,location.register);
  173. end;
  174. LOC_MMREGISTER,
  175. LOC_CMMREGISTER :
  176. begin
  177. if getsupreg(location.register)<first_mm_imreg then
  178. cg.ungetcpuregister(list,location.register);
  179. end;
  180. LOC_REFERENCE,
  181. LOC_CREFERENCE :
  182. begin
  183. if paramanager.use_fixed_stack then
  184. location_freetemp(list,location);
  185. end;
  186. else
  187. internalerror(2004110211);
  188. end;
  189. end;
  190. procedure firstcomplex(p : tbinarynode);
  191. var
  192. fcl, fcr: longint;
  193. ncl, ncr: longint;
  194. begin
  195. { always calculate boolean AND and OR from left to right }
  196. if (p.nodetype in [orn,andn]) and
  197. is_boolean(p.left.resultdef) then
  198. begin
  199. if nf_swapped in p.flags then
  200. internalerror(200709253);
  201. end
  202. else
  203. begin
  204. fcl:=node_resources_fpu(p.left);
  205. fcr:=node_resources_fpu(p.right);
  206. ncl:=node_complexity(p.left);
  207. ncr:=node_complexity(p.right);
  208. { We swap left and right if
  209. a) right needs more floating point registers than left, and
  210. left needs more than 0 floating point registers (if it
  211. doesn't need any, swapping won't change the floating
  212. point register pressure)
  213. b) both left and right need an equal amount of floating
  214. point registers or right needs no floating point registers,
  215. and in addition right has a higher complexity than left
  216. (+- needs more integer registers, but not necessarily)
  217. }
  218. if ((fcr>fcl) and
  219. (fcl>0)) or
  220. (((fcr=fcl) or
  221. (fcr=0)) and
  222. (ncr>ncl)) then
  223. p.swapleftright
  224. end;
  225. end;
  226. procedure maketojumpbool(list:TAsmList; p : tnode; loadregvars: tloadregvars);
  227. {
  228. produces jumps to true respectively false labels using boolean expressions
  229. depending on whether the loading of regvars is currently being
  230. synchronized manually (such as in an if-node) or automatically (most of
  231. the other cases where this procedure is called), loadregvars can be
  232. "lr_load_regvars" or "lr_dont_load_regvars"
  233. }
  234. var
  235. opsize : tcgsize;
  236. storepos : tfileposinfo;
  237. tmpreg : tregister;
  238. begin
  239. if nf_error in p.flags then
  240. exit;
  241. storepos:=current_filepos;
  242. current_filepos:=p.fileinfo;
  243. if is_boolean(p.resultdef) then
  244. begin
  245. {$ifdef OLDREGVARS}
  246. if loadregvars = lr_load_regvars then
  247. load_all_regvars(list);
  248. {$endif OLDREGVARS}
  249. if is_constboolnode(p) then
  250. begin
  251. if Tordconstnode(p).value.uvalue<>0 then
  252. cg.a_jmp_always(list,current_procinfo.CurrTrueLabel)
  253. else
  254. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel)
  255. end
  256. else
  257. begin
  258. opsize:=def_cgsize(p.resultdef);
  259. case p.location.loc of
  260. LOC_SUBSETREG,LOC_CSUBSETREG,
  261. LOC_SUBSETREF,LOC_CSUBSETREF:
  262. begin
  263. tmpreg := cg.getintregister(list,OS_INT);
  264. hlcg.a_load_loc_reg(list,p.resultdef,osuinttype,p.location,tmpreg);
  265. cg.a_cmp_const_reg_label(list,OS_INT,OC_NE,0,tmpreg,current_procinfo.CurrTrueLabel);
  266. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  267. end;
  268. LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE :
  269. begin
  270. {$ifdef cpu64bitalu}
  271. if opsize in [OS_128,OS_S128] then
  272. begin
  273. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  274. tmpreg:=cg.getintregister(list,OS_64);
  275. cg.a_op_reg_reg_reg(list,OP_OR,OS_64,p.location.register128.reglo,p.location.register128.reghi,tmpreg);
  276. location_reset(p.location,LOC_REGISTER,OS_64);
  277. p.location.register:=tmpreg;
  278. opsize:=OS_64;
  279. end;
  280. {$else cpu64bitalu}
  281. if opsize in [OS_64,OS_S64] then
  282. begin
  283. hlcg.location_force_reg(list,p.location,p.resultdef,cgsize_orddef(opsize),true);
  284. tmpreg:=cg.getintregister(list,OS_32);
  285. cg.a_op_reg_reg_reg(list,OP_OR,OS_32,p.location.register64.reglo,p.location.register64.reghi,tmpreg);
  286. location_reset(p.location,LOC_REGISTER,OS_32);
  287. p.location.register:=tmpreg;
  288. opsize:=OS_32;
  289. end;
  290. {$endif cpu64bitalu}
  291. cg.a_cmp_const_loc_label(list,opsize,OC_NE,0,p.location,current_procinfo.CurrTrueLabel);
  292. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  293. end;
  294. LOC_JUMP:
  295. ;
  296. {$ifdef cpuflags}
  297. LOC_FLAGS :
  298. begin
  299. cg.a_jmp_flags(list,p.location.resflags,current_procinfo.CurrTrueLabel);
  300. cg.a_reg_dealloc(list,NR_DEFAULTFLAGS);
  301. cg.a_jmp_always(list,current_procinfo.CurrFalseLabel);
  302. end;
  303. {$endif cpuflags}
  304. else
  305. begin
  306. printnode(output,p);
  307. internalerror(200308241);
  308. end;
  309. end;
  310. end;
  311. end
  312. else
  313. internalerror(200112305);
  314. current_filepos:=storepos;
  315. end;
  316. (*
  317. This code needs fixing. It is not safe to use rgint; on the m68000 it
  318. would be rgaddr.
  319. procedure remove_non_regvars_from_loc(const t: tlocation; var regs:Tsuperregisterset);
  320. begin
  321. case t.loc of
  322. LOC_REGISTER:
  323. begin
  324. { can't be a regvar, since it would be LOC_CREGISTER then }
  325. exclude(regs,getsupreg(t.register));
  326. if t.register64.reghi<>NR_NO then
  327. exclude(regs,getsupreg(t.register64.reghi));
  328. end;
  329. LOC_CREFERENCE,LOC_REFERENCE:
  330. begin
  331. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  332. (getsupreg(t.reference.base) in cg.rgint.usableregs) then
  333. exclude(regs,getsupreg(t.reference.base));
  334. if not(cs_opt_regvar in current_settings.optimizerswitches) or
  335. (getsupreg(t.reference.index) in cg.rgint.usableregs) then
  336. exclude(regs,getsupreg(t.reference.index));
  337. end;
  338. end;
  339. end;
  340. *)
  341. {*****************************************************************************
  342. EXCEPTION MANAGEMENT
  343. *****************************************************************************}
  344. procedure get_exception_temps(list:TAsmList;var t:texceptiontemps);
  345. begin
  346. get_jumpbuf_size;
  347. tg.GetTemp(list,EXCEPT_BUF_SIZE,sizeof(pint),tt_persistent,t.envbuf);
  348. tg.GetTemp(list,jmp_buf_size,jmp_buf_align,tt_persistent,t.jmpbuf);
  349. tg.GetTemp(list,sizeof(pint),sizeof(pint),tt_persistent,t.reasonbuf);
  350. end;
  351. procedure unget_exception_temps(list:TAsmList;const t:texceptiontemps);
  352. begin
  353. tg.Ungettemp(list,t.jmpbuf);
  354. tg.ungettemp(list,t.envbuf);
  355. tg.ungettemp(list,t.reasonbuf);
  356. end;
  357. procedure new_exception(list:TAsmList;const t:texceptiontemps;exceptlabel:tasmlabel);
  358. const
  359. {$ifdef cpu16bitaddr}
  360. pushexceptaddr_frametype_cgsize = OS_S16;
  361. setjmp_result_cgsize = OS_S16;
  362. {$else cpu16bitaddr}
  363. pushexceptaddr_frametype_cgsize = OS_S32;
  364. setjmp_result_cgsize = OS_S32;
  365. {$endif cpu16bitaddr}
  366. var
  367. paraloc1,paraloc2,paraloc3 : tcgpara;
  368. pd: tprocdef;
  369. begin
  370. pd:=search_system_proc('fpc_pushexceptaddr');
  371. paraloc1.init;
  372. paraloc2.init;
  373. paraloc3.init;
  374. paramanager.getintparaloc(pd,1,paraloc1);
  375. paramanager.getintparaloc(pd,2,paraloc2);
  376. paramanager.getintparaloc(pd,3,paraloc3);
  377. if pd.is_pushleftright then
  378. begin
  379. { push type of exceptionframe }
  380. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  381. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  382. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  383. end
  384. else
  385. begin
  386. cg.a_loadaddr_ref_cgpara(list,t.envbuf,paraloc3);
  387. cg.a_loadaddr_ref_cgpara(list,t.jmpbuf,paraloc2);
  388. { push type of exceptionframe }
  389. cg.a_load_const_cgpara(list,pushexceptaddr_frametype_cgsize,1,paraloc1);
  390. end;
  391. paramanager.freecgpara(list,paraloc3);
  392. paramanager.freecgpara(list,paraloc2);
  393. paramanager.freecgpara(list,paraloc1);
  394. cg.allocallcpuregisters(list);
  395. cg.a_call_name(list,'FPC_PUSHEXCEPTADDR',false);
  396. cg.deallocallcpuregisters(list);
  397. pd:=search_system_proc('fpc_setjmp');
  398. paramanager.getintparaloc(pd,1,paraloc1);
  399. cg.a_load_reg_cgpara(list,OS_ADDR,NR_FUNCTION_RESULT_REG,paraloc1);
  400. paramanager.freecgpara(list,paraloc1);
  401. cg.allocallcpuregisters(list);
  402. cg.a_call_name(list,'FPC_SETJMP',false);
  403. cg.deallocallcpuregisters(list);
  404. cg.alloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  405. cg.g_exception_reason_save(list, t.reasonbuf);
  406. cg.a_cmp_const_reg_label(list,setjmp_result_cgsize,OC_NE,0,cg.makeregsize(list,NR_FUNCTION_RESULT_REG,setjmp_result_cgsize),exceptlabel);
  407. cg.dealloccpuregisters(list,R_INTREGISTER,[RS_FUNCTION_RESULT_REG]);
  408. paraloc1.done;
  409. paraloc2.done;
  410. paraloc3.done;
  411. end;
  412. procedure free_exception(list:TAsmList;const t:texceptiontemps;a:aint;endexceptlabel:tasmlabel;onlyfree:boolean);
  413. begin
  414. cg.allocallcpuregisters(list);
  415. cg.a_call_name(list,'FPC_POPADDRSTACK',false);
  416. cg.deallocallcpuregisters(list);
  417. if not onlyfree then
  418. begin
  419. { g_exception_reason_load already allocates NR_FUNCTION_RESULT_REG }
  420. cg.g_exception_reason_load(list, t.reasonbuf);
  421. cg.a_cmp_const_reg_label(list,OS_INT,OC_EQ,a,NR_FUNCTION_RESULT_REG,endexceptlabel);
  422. cg.a_reg_dealloc(list,NR_FUNCTION_RESULT_REG);
  423. end;
  424. end;
  425. {*****************************************************************************
  426. TLocation
  427. *****************************************************************************}
  428. procedure location_force_fpureg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  429. var
  430. reg : tregister;
  431. href : treference;
  432. begin
  433. if (l.loc<>LOC_FPUREGISTER) and
  434. ((l.loc<>LOC_CFPUREGISTER) or (not maybeconst)) then
  435. begin
  436. { if it's in an mm register, store to memory first }
  437. if (l.loc in [LOC_MMREGISTER,LOC_CMMREGISTER]) then
  438. begin
  439. tg.GetTemp(list,tcgsize2size[l.size],tcgsize2size[l.size],tt_normal,href);
  440. cg.a_loadmm_reg_ref(list,l.size,l.size,l.register,href,mms_movescalar);
  441. location_reset_ref(l,LOC_REFERENCE,l.size,0);
  442. l.reference:=href;
  443. end;
  444. reg:=cg.getfpuregister(list,l.size);
  445. cg.a_loadfpu_loc_reg(list,l.size,l,reg);
  446. location_freetemp(list,l);
  447. location_reset(l,LOC_FPUREGISTER,l.size);
  448. l.register:=reg;
  449. end;
  450. end;
  451. procedure register_maybe_adjust_setbase(list: TAsmList; var l: tlocation; setbase: aint);
  452. var
  453. tmpreg: tregister;
  454. begin
  455. if (setbase<>0) then
  456. begin
  457. if not(l.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  458. internalerror(2007091502);
  459. { subtract the setbase }
  460. case l.loc of
  461. LOC_CREGISTER:
  462. begin
  463. tmpreg := cg.getintregister(list,l.size);
  464. cg.a_op_const_reg_reg(list,OP_SUB,l.size,setbase,l.register,tmpreg);
  465. l.loc:=LOC_REGISTER;
  466. l.register:=tmpreg;
  467. end;
  468. LOC_REGISTER:
  469. begin
  470. cg.a_op_const_reg(list,OP_SUB,l.size,setbase,l.register);
  471. end;
  472. end;
  473. end;
  474. end;
  475. procedure location_force_mmreg(list:TAsmList;var l: tlocation;maybeconst:boolean);
  476. var
  477. reg : tregister;
  478. begin
  479. if (l.loc<>LOC_MMREGISTER) and
  480. ((l.loc<>LOC_CMMREGISTER) or (not maybeconst)) then
  481. begin
  482. reg:=cg.getmmregister(list,OS_VECTOR);
  483. cg.a_loadmm_loc_reg(list,OS_VECTOR,l,reg,nil);
  484. location_freetemp(list,l);
  485. location_reset(l,LOC_MMREGISTER,OS_VECTOR);
  486. l.register:=reg;
  487. end;
  488. end;
  489. procedure location_allocate_register(list: TAsmList;out l: tlocation;def: tdef;constant: boolean);
  490. begin
  491. l.size:=def_cgsize(def);
  492. if (def.typ=floatdef) and
  493. not(cs_fp_emulation in current_settings.moduleswitches) then
  494. begin
  495. if use_vectorfpu(def) then
  496. begin
  497. if constant then
  498. location_reset(l,LOC_CMMREGISTER,l.size)
  499. else
  500. location_reset(l,LOC_MMREGISTER,l.size);
  501. l.register:=cg.getmmregister(list,l.size);
  502. end
  503. else
  504. begin
  505. if constant then
  506. location_reset(l,LOC_CFPUREGISTER,l.size)
  507. else
  508. location_reset(l,LOC_FPUREGISTER,l.size);
  509. l.register:=cg.getfpuregister(list,l.size);
  510. end;
  511. end
  512. else
  513. begin
  514. if constant then
  515. location_reset(l,LOC_CREGISTER,l.size)
  516. else
  517. location_reset(l,LOC_REGISTER,l.size);
  518. {$ifdef cpu64bitalu}
  519. if l.size in [OS_128,OS_S128,OS_F128] then
  520. begin
  521. l.register128.reglo:=cg.getintregister(list,OS_64);
  522. l.register128.reghi:=cg.getintregister(list,OS_64);
  523. end
  524. else
  525. {$else cpu64bitalu}
  526. if l.size in [OS_64,OS_S64,OS_F64] then
  527. begin
  528. l.register64.reglo:=cg.getintregister(list,OS_32);
  529. l.register64.reghi:=cg.getintregister(list,OS_32);
  530. end
  531. else
  532. {$endif cpu64bitalu}
  533. { Note: for withs of records (and maybe objects, classes, etc.) an
  534. address register could be set here, but that is later
  535. changed to an intregister neverthless when in the
  536. tcgassignmentnode maybechangeloadnodereg is called for the
  537. temporary node; so the workaround for now is to fix the
  538. symptoms... }
  539. l.register:=cg.getintregister(list,l.size);
  540. end;
  541. end;
  542. {****************************************************************************
  543. Init/Finalize Code
  544. ****************************************************************************}
  545. procedure copyvalueparas(p:TObject;arg:pointer);
  546. var
  547. href : treference;
  548. hreg : tregister;
  549. list : TAsmList;
  550. hsym : tparavarsym;
  551. l : longint;
  552. localcopyloc : tlocation;
  553. sizedef : tdef;
  554. begin
  555. list:=TAsmList(arg);
  556. if (tsym(p).typ=paravarsym) and
  557. (tparavarsym(p).varspez=vs_value) and
  558. (paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  559. begin
  560. { we have no idea about the alignment at the caller side }
  561. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  562. if is_open_array(tparavarsym(p).vardef) or
  563. is_array_of_const(tparavarsym(p).vardef) then
  564. begin
  565. { cdecl functions don't have a high pointer so it is not possible to generate
  566. a local copy }
  567. if not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  568. begin
  569. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  570. if not assigned(hsym) then
  571. internalerror(200306061);
  572. hreg:=cg.getaddressregister(list);
  573. if not is_packed_array(tparavarsym(p).vardef) then
  574. hlcg.g_copyvaluepara_openarray(list,href,hsym.initialloc,tarraydef(tparavarsym(p).vardef),hreg)
  575. else
  576. internalerror(2006080401);
  577. // cg.g_copyvaluepara_packedopenarray(list,href,hsym.intialloc,tarraydef(tparavarsym(p).vardef).elepackedbitsize,hreg);
  578. sizedef:=getpointerdef(tparavarsym(p).vardef);
  579. hlcg.a_load_reg_loc(list,sizedef,sizedef,hreg,tparavarsym(p).initialloc);
  580. end;
  581. end
  582. else
  583. begin
  584. { Allocate space for the local copy }
  585. l:=tparavarsym(p).getsize;
  586. localcopyloc.loc:=LOC_REFERENCE;
  587. localcopyloc.size:=int_cgsize(l);
  588. tg.GetLocal(list,l,tparavarsym(p).vardef,localcopyloc.reference);
  589. { Copy data }
  590. if is_shortstring(tparavarsym(p).vardef) then
  591. begin
  592. { this code is only executed before the code for the body and the entry/exit code is generated
  593. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  594. }
  595. include(current_procinfo.flags,pi_do_call);
  596. hlcg.g_copyshortstring(list,href,localcopyloc.reference,tstringdef(tparavarsym(p).vardef));
  597. end
  598. else if tparavarsym(p).vardef.typ = variantdef then
  599. begin
  600. { this code is only executed before the code for the body and the entry/exit code is generated
  601. so we're allowed to include pi_do_call here; after pass1 is run, this isn't allowed anymore
  602. }
  603. include(current_procinfo.flags,pi_do_call);
  604. hlcg.g_copyvariant(list,href,localcopyloc.reference,tvariantdef(tparavarsym(p).vardef))
  605. end
  606. else
  607. begin
  608. { pass proper alignment info }
  609. localcopyloc.reference.alignment:=tparavarsym(p).vardef.alignment;
  610. cg.g_concatcopy(list,href,localcopyloc.reference,tparavarsym(p).vardef.size);
  611. end;
  612. { update localloc of varsym }
  613. tg.Ungetlocal(list,tparavarsym(p).localloc.reference);
  614. tparavarsym(p).localloc:=localcopyloc;
  615. tparavarsym(p).initialloc:=localcopyloc;
  616. end;
  617. end;
  618. end;
  619. { generates the code for incrementing the reference count of parameters and
  620. initialize out parameters }
  621. procedure init_paras(p:TObject;arg:pointer);
  622. var
  623. href : treference;
  624. hsym : tparavarsym;
  625. eldef : tdef;
  626. list : TAsmList;
  627. needs_inittable : boolean;
  628. begin
  629. list:=TAsmList(arg);
  630. if (tsym(p).typ=paravarsym) then
  631. begin
  632. needs_inittable:=is_managed_type(tparavarsym(p).vardef);
  633. if not needs_inittable then
  634. exit;
  635. case tparavarsym(p).varspez of
  636. vs_value :
  637. begin
  638. { variants are already handled by the call to fpc_variant_copy_overwrite if
  639. they are passed by reference }
  640. if not((tparavarsym(p).vardef.typ=variantdef) and
  641. paramanager.push_addr_param(tparavarsym(p).varspez,tparavarsym(p).vardef,current_procinfo.procdef.proccalloption)) then
  642. begin
  643. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,is_open_array(tparavarsym(p).vardef),sizeof(pint));
  644. if is_open_array(tparavarsym(p).vardef) then
  645. begin
  646. { open arrays do not contain correct element count in their rtti,
  647. the actual count must be passed separately. }
  648. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  649. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  650. if not assigned(hsym) then
  651. internalerror(201003031);
  652. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_addref_array');
  653. end
  654. else
  655. hlcg.g_incrrefcount(list,tparavarsym(p).vardef,href);
  656. end;
  657. end;
  658. vs_out :
  659. begin
  660. { we have no idea about the alignment at the callee side,
  661. and the user also cannot specify "unaligned" here, so
  662. assume worst case }
  663. hlcg.location_get_data_ref(list,tparavarsym(p).vardef,tparavarsym(p).initialloc,href,true,1);
  664. if is_open_array(tparavarsym(p).vardef) then
  665. begin
  666. hsym:=tparavarsym(get_high_value_sym(tparavarsym(p)));
  667. eldef:=tarraydef(tparavarsym(p).vardef).elementdef;
  668. if not assigned(hsym) then
  669. internalerror(201103033);
  670. hlcg.g_array_rtti_helper(list,eldef,href,hsym.initialloc,'fpc_initialize_array');
  671. end
  672. else
  673. hlcg.g_initialize(list,tparavarsym(p).vardef,href);
  674. end;
  675. end;
  676. end;
  677. end;
  678. procedure gen_alloc_regloc(list:TAsmList;var loc: tlocation);
  679. begin
  680. case loc.loc of
  681. LOC_CREGISTER:
  682. begin
  683. {$ifdef cpu64bitalu}
  684. if loc.size in [OS_128,OS_S128] then
  685. begin
  686. loc.register128.reglo:=cg.getintregister(list,OS_64);
  687. loc.register128.reghi:=cg.getintregister(list,OS_64);
  688. end
  689. else
  690. {$else cpu64bitalu}
  691. if loc.size in [OS_64,OS_S64] then
  692. begin
  693. loc.register64.reglo:=cg.getintregister(list,OS_32);
  694. loc.register64.reghi:=cg.getintregister(list,OS_32);
  695. end
  696. else
  697. {$endif cpu64bitalu}
  698. loc.register:=cg.getintregister(list,loc.size);
  699. end;
  700. LOC_CFPUREGISTER:
  701. begin
  702. loc.register:=cg.getfpuregister(list,loc.size);
  703. end;
  704. LOC_CMMREGISTER:
  705. begin
  706. loc.register:=cg.getmmregister(list,loc.size);
  707. end;
  708. end;
  709. end;
  710. procedure gen_alloc_regvar(list:TAsmList;sym: tabstractnormalvarsym; allocreg: boolean);
  711. begin
  712. if allocreg then
  713. gen_alloc_regloc(list,sym.initialloc);
  714. if (pi_has_label in current_procinfo.flags) then
  715. begin
  716. { Allocate register already, to prevent first allocation to be
  717. inside a loop }
  718. {$ifdef cpu64bitalu}
  719. if sym.initialloc.size in [OS_128,OS_S128] then
  720. begin
  721. cg.a_reg_sync(list,sym.initialloc.register128.reglo);
  722. cg.a_reg_sync(list,sym.initialloc.register128.reghi);
  723. end
  724. else
  725. {$else cpu64bitalu}
  726. if sym.initialloc.size in [OS_64,OS_S64] then
  727. begin
  728. cg.a_reg_sync(list,sym.initialloc.register64.reglo);
  729. cg.a_reg_sync(list,sym.initialloc.register64.reghi);
  730. end
  731. else
  732. {$endif cpu64bitalu}
  733. cg.a_reg_sync(list,sym.initialloc.register);
  734. end;
  735. sym.localloc:=sym.initialloc;
  736. end;
  737. procedure gen_load_cgpara_loc(list: TAsmList; vardef: tdef; const para: TCGPara; var destloc: tlocation; reusepara: boolean);
  738. procedure unget_para(const paraloc:TCGParaLocation);
  739. begin
  740. case paraloc.loc of
  741. LOC_REGISTER :
  742. begin
  743. if getsupreg(paraloc.register)<first_int_imreg then
  744. cg.ungetcpuregister(list,paraloc.register);
  745. end;
  746. LOC_MMREGISTER :
  747. begin
  748. if getsupreg(paraloc.register)<first_mm_imreg then
  749. cg.ungetcpuregister(list,paraloc.register);
  750. end;
  751. LOC_FPUREGISTER :
  752. begin
  753. if getsupreg(paraloc.register)<first_fpu_imreg then
  754. cg.ungetcpuregister(list,paraloc.register);
  755. end;
  756. end;
  757. end;
  758. var
  759. paraloc : pcgparalocation;
  760. href : treference;
  761. sizeleft : aint;
  762. {$if defined(sparc) or defined(arm) or defined(mips)}
  763. tempref : treference;
  764. {$endif defined(sparc) or defined(arm) or defined(mips)}
  765. {$ifdef mips}
  766. tmpreg : tregister;
  767. {$endif mips}
  768. {$ifndef cpu64bitalu}
  769. tempreg : tregister;
  770. reg64 : tregister64;
  771. {$endif not cpu64bitalu}
  772. begin
  773. paraloc:=para.location;
  774. if not assigned(paraloc) then
  775. internalerror(200408203);
  776. { skip e.g. empty records }
  777. if (paraloc^.loc = LOC_VOID) then
  778. exit;
  779. case destloc.loc of
  780. LOC_REFERENCE :
  781. begin
  782. { If the parameter location is reused we don't need to copy
  783. anything }
  784. if not reusepara then
  785. begin
  786. href:=destloc.reference;
  787. sizeleft:=para.intsize;
  788. while assigned(paraloc) do
  789. begin
  790. if (paraloc^.size=OS_NO) then
  791. begin
  792. { Can only be a reference that contains the rest
  793. of the parameter }
  794. if (paraloc^.loc<>LOC_REFERENCE) or
  795. assigned(paraloc^.next) then
  796. internalerror(2005013010);
  797. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  798. inc(href.offset,sizeleft);
  799. sizeleft:=0;
  800. end
  801. else
  802. begin
  803. cg.a_load_cgparaloc_ref(list,paraloc^,href,tcgsize2size[paraloc^.size],destloc.reference.alignment);
  804. inc(href.offset,TCGSize2Size[paraloc^.size]);
  805. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  806. end;
  807. unget_para(paraloc^);
  808. paraloc:=paraloc^.next;
  809. end;
  810. end;
  811. end;
  812. LOC_REGISTER,
  813. LOC_CREGISTER :
  814. begin
  815. {$ifdef cpu64bitalu}
  816. if (para.size in [OS_128,OS_S128,OS_F128]) and
  817. ({ in case of fpu emulation, or abi's that pass fpu values
  818. via integer registers }
  819. (vardef.typ=floatdef) or
  820. is_methodpointer(vardef) or
  821. is_record(vardef)) then
  822. begin
  823. case paraloc^.loc of
  824. LOC_REGISTER:
  825. begin
  826. if not assigned(paraloc^.next) then
  827. internalerror(200410104);
  828. if (target_info.endian=ENDIAN_BIG) then
  829. begin
  830. { paraloc^ -> high
  831. paraloc^.next -> low }
  832. unget_para(paraloc^);
  833. gen_alloc_regloc(list,destloc);
  834. { reg->reg, alignment is irrelevant }
  835. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reghi,8);
  836. unget_para(paraloc^.next^);
  837. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reglo,8);
  838. end
  839. else
  840. begin
  841. { paraloc^ -> low
  842. paraloc^.next -> high }
  843. unget_para(paraloc^);
  844. gen_alloc_regloc(list,destloc);
  845. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^,destloc.register128.reglo,8);
  846. unget_para(paraloc^.next^);
  847. cg.a_load_cgparaloc_anyreg(list,OS_64,paraloc^.next^,destloc.register128.reghi,8);
  848. end;
  849. end;
  850. LOC_REFERENCE:
  851. begin
  852. gen_alloc_regloc(list,destloc);
  853. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  854. cg128.a_load128_ref_reg(list,href,destloc.register128);
  855. unget_para(paraloc^);
  856. end;
  857. else
  858. internalerror(2012090607);
  859. end
  860. end
  861. else
  862. {$else cpu64bitalu}
  863. if (para.size in [OS_64,OS_S64,OS_F64]) and
  864. (is_64bit(vardef) or
  865. { in case of fpu emulation, or abi's that pass fpu values
  866. via integer registers }
  867. (vardef.typ=floatdef) or
  868. is_methodpointer(vardef) or
  869. is_record(vardef)) then
  870. begin
  871. case paraloc^.loc of
  872. LOC_REGISTER:
  873. begin
  874. case para.locations_count of
  875. {$ifdef cpu16bitalu}
  876. { 4 paralocs? }
  877. 4:
  878. if (target_info.endian=ENDIAN_BIG) then
  879. begin
  880. { paraloc^ -> high
  881. paraloc^.next^.next -> low }
  882. unget_para(paraloc^);
  883. gen_alloc_regloc(list,destloc);
  884. { reg->reg, alignment is irrelevant }
  885. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,GetNextReg(destloc.register64.reghi),2);
  886. unget_para(paraloc^.next^);
  887. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,destloc.register64.reghi,2);
  888. unget_para(paraloc^.next^.next^);
  889. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,GetNextReg(destloc.register64.reglo),2);
  890. unget_para(paraloc^.next^.next^.next^);
  891. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,destloc.register64.reglo,2);
  892. end
  893. else
  894. begin
  895. { paraloc^ -> low
  896. paraloc^.next^.next -> high }
  897. unget_para(paraloc^);
  898. gen_alloc_regloc(list,destloc);
  899. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^,destloc.register64.reglo,2);
  900. unget_para(paraloc^.next^);
  901. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^,GetNextReg(destloc.register64.reglo),2);
  902. unget_para(paraloc^.next^.next^);
  903. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^,destloc.register64.reghi,2);
  904. unget_para(paraloc^.next^.next^.next^);
  905. cg.a_load_cgparaloc_anyreg(list,OS_16,paraloc^.next^.next^.next^,GetNextReg(destloc.register64.reghi),2);
  906. end;
  907. {$endif cpu16bitalu}
  908. 2:
  909. if (target_info.endian=ENDIAN_BIG) then
  910. begin
  911. { paraloc^ -> high
  912. paraloc^.next -> low }
  913. unget_para(paraloc^);
  914. gen_alloc_regloc(list,destloc);
  915. { reg->reg, alignment is irrelevant }
  916. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reghi,4);
  917. unget_para(paraloc^.next^);
  918. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reglo,4);
  919. end
  920. else
  921. begin
  922. { paraloc^ -> low
  923. paraloc^.next -> high }
  924. unget_para(paraloc^);
  925. gen_alloc_regloc(list,destloc);
  926. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^,destloc.register64.reglo,4);
  927. unget_para(paraloc^.next^);
  928. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,destloc.register64.reghi,4);
  929. end;
  930. else
  931. { unexpected number of paralocs }
  932. internalerror(200410104);
  933. end;
  934. end;
  935. LOC_REFERENCE:
  936. begin
  937. gen_alloc_regloc(list,destloc);
  938. reference_reset_base(href,paraloc^.reference.index,paraloc^.reference.offset,para.alignment);
  939. cg64.a_load64_ref_reg(list,href,destloc.register64);
  940. unget_para(paraloc^);
  941. end;
  942. else
  943. internalerror(2005101501);
  944. end
  945. end
  946. else
  947. {$endif cpu64bitalu}
  948. begin
  949. if assigned(paraloc^.next) then
  950. begin
  951. if (destloc.size in [OS_PAIR,OS_SPAIR]) and
  952. (para.Size in [OS_PAIR,OS_SPAIR]) then
  953. begin
  954. unget_para(paraloc^);
  955. gen_alloc_regloc(list,destloc);
  956. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^,destloc.register,sizeof(aint));
  957. unget_para(paraloc^.Next^);
  958. gen_alloc_regloc(list,destloc);
  959. {$if defined(cpu16bitalu) or defined(cpu8bitalu)}
  960. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,GetNextReg(destloc.register),sizeof(aint));
  961. {$else}
  962. cg.a_load_cgparaloc_anyreg(list,OS_INT,paraloc^.Next^,destloc.registerhi,sizeof(aint));
  963. {$endif}
  964. end
  965. else
  966. internalerror(200410105);
  967. end
  968. else
  969. begin
  970. unget_para(paraloc^);
  971. gen_alloc_regloc(list,destloc);
  972. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,sizeof(aint));
  973. end;
  974. end;
  975. end;
  976. LOC_FPUREGISTER,
  977. LOC_CFPUREGISTER :
  978. begin
  979. {$ifdef mips}
  980. if (destloc.size = paraloc^.Size) and
  981. (paraloc^.Loc in [LOC_FPUREGISTER,LOC_CFPUREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) then
  982. begin
  983. unget_para(paraloc^);
  984. gen_alloc_regloc(list,destloc);
  985. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,para.alignment);
  986. end
  987. else if (destloc.size = OS_F32) and
  988. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  989. begin
  990. gen_alloc_regloc(list,destloc);
  991. unget_para(paraloc^);
  992. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,destloc.register));
  993. end
  994. { TODO: Produces invalid code, needs fixing together with regalloc setup. }
  995. {
  996. else if (destloc.size = OS_F64) and
  997. (paraloc^.Loc in [LOC_REGISTER,LOC_CREGISTER]) and
  998. (paraloc^.next^.Loc in [LOC_REGISTER,LOC_CREGISTER]) then
  999. begin
  1000. gen_alloc_regloc(list,destloc);
  1001. tmpreg:=destloc.register;
  1002. unget_para(paraloc^);
  1003. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.register,tmpreg));
  1004. setsupreg(tmpreg,getsupreg(tmpreg)+1);
  1005. unget_para(paraloc^.next^);
  1006. list.Concat(taicpu.op_reg_reg(A_MTC1,paraloc^.Next^.register,tmpreg));
  1007. end
  1008. }
  1009. else
  1010. begin
  1011. sizeleft := TCGSize2Size[destloc.size];
  1012. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1013. href:=tempref;
  1014. while assigned(paraloc) do
  1015. begin
  1016. unget_para(paraloc^);
  1017. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1018. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1019. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1020. paraloc:=paraloc^.next;
  1021. end;
  1022. gen_alloc_regloc(list,destloc);
  1023. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1024. tg.UnGetTemp(list,tempref);
  1025. end;
  1026. {$else mips}
  1027. {$if defined(sparc) or defined(arm)}
  1028. { Arm and Sparc passes floats in int registers, when loading to fpu register
  1029. we need a temp }
  1030. sizeleft := TCGSize2Size[destloc.size];
  1031. tg.GetTemp(list,sizeleft,sizeleft,tt_normal,tempref);
  1032. href:=tempref;
  1033. while assigned(paraloc) do
  1034. begin
  1035. unget_para(paraloc^);
  1036. cg.a_load_cgparaloc_ref(list,paraloc^,href,sizeleft,destloc.reference.alignment);
  1037. inc(href.offset,TCGSize2Size[paraloc^.size]);
  1038. dec(sizeleft,TCGSize2Size[paraloc^.size]);
  1039. paraloc:=paraloc^.next;
  1040. end;
  1041. gen_alloc_regloc(list,destloc);
  1042. cg.a_loadfpu_ref_reg(list,destloc.size,destloc.size,tempref,destloc.register);
  1043. tg.UnGetTemp(list,tempref);
  1044. {$else defined(sparc) or defined(arm)}
  1045. unget_para(paraloc^);
  1046. gen_alloc_regloc(list,destloc);
  1047. { from register to register -> alignment is irrelevant }
  1048. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1049. if assigned(paraloc^.next) then
  1050. internalerror(200410109);
  1051. {$endif defined(sparc) or defined(arm)}
  1052. {$endif mips}
  1053. end;
  1054. LOC_MMREGISTER,
  1055. LOC_CMMREGISTER :
  1056. begin
  1057. {$ifndef cpu64bitalu}
  1058. { ARM vfp floats are passed in integer registers }
  1059. if (para.size=OS_F64) and
  1060. (paraloc^.size in [OS_32,OS_S32]) and
  1061. use_vectorfpu(vardef) then
  1062. begin
  1063. { we need 2x32bit reg }
  1064. if not assigned(paraloc^.next) or
  1065. assigned(paraloc^.next^.next) then
  1066. internalerror(2009112421);
  1067. unget_para(paraloc^.next^);
  1068. case paraloc^.next^.loc of
  1069. LOC_REGISTER:
  1070. tempreg:=paraloc^.next^.register;
  1071. LOC_REFERENCE:
  1072. begin
  1073. tempreg:=cg.getintregister(list,OS_32);
  1074. cg.a_load_cgparaloc_anyreg(list,OS_32,paraloc^.next^,tempreg,4);
  1075. end;
  1076. else
  1077. internalerror(2012051301);
  1078. end;
  1079. { don't free before the above, because then the getintregister
  1080. could reallocate this register and overwrite it }
  1081. unget_para(paraloc^);
  1082. gen_alloc_regloc(list,destloc);
  1083. if (target_info.endian=endian_big) then
  1084. { paraloc^ -> high
  1085. paraloc^.next -> low }
  1086. reg64:=joinreg64(tempreg,paraloc^.register)
  1087. else
  1088. reg64:=joinreg64(paraloc^.register,tempreg);
  1089. cg64.a_loadmm_intreg64_reg(list,OS_F64,reg64,destloc.register);
  1090. end
  1091. else
  1092. {$endif not cpu64bitalu}
  1093. begin
  1094. unget_para(paraloc^);
  1095. gen_alloc_regloc(list,destloc);
  1096. { from register to register -> alignment is irrelevant }
  1097. cg.a_load_cgparaloc_anyreg(list,destloc.size,paraloc^,destloc.register,0);
  1098. { data could come in two memory locations, for now
  1099. we simply ignore the sanity check (FK)
  1100. if assigned(paraloc^.next) then
  1101. internalerror(200410108);
  1102. }
  1103. end;
  1104. end;
  1105. else
  1106. internalerror(2010052903);
  1107. end;
  1108. end;
  1109. procedure gen_load_para_value(list:TAsmList);
  1110. procedure get_para(const paraloc:TCGParaLocation);
  1111. begin
  1112. case paraloc.loc of
  1113. LOC_REGISTER :
  1114. begin
  1115. if getsupreg(paraloc.register)<first_int_imreg then
  1116. cg.getcpuregister(list,paraloc.register);
  1117. end;
  1118. LOC_MMREGISTER :
  1119. begin
  1120. if getsupreg(paraloc.register)<first_mm_imreg then
  1121. cg.getcpuregister(list,paraloc.register);
  1122. end;
  1123. LOC_FPUREGISTER :
  1124. begin
  1125. if getsupreg(paraloc.register)<first_fpu_imreg then
  1126. cg.getcpuregister(list,paraloc.register);
  1127. end;
  1128. end;
  1129. end;
  1130. var
  1131. i : longint;
  1132. currpara : tparavarsym;
  1133. paraloc : pcgparalocation;
  1134. begin
  1135. if (po_assembler in current_procinfo.procdef.procoptions) or
  1136. { exceptfilters have a single hidden 'parentfp' parameter, which
  1137. is handled by tcg.g_proc_entry. }
  1138. (current_procinfo.procdef.proctypeoption=potype_exceptfilter) then
  1139. exit;
  1140. { Allocate registers used by parameters }
  1141. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1142. begin
  1143. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1144. paraloc:=currpara.paraloc[calleeside].location;
  1145. while assigned(paraloc) do
  1146. begin
  1147. if paraloc^.loc in [LOC_REGISTER,LOC_FPUREGISTER,LOC_MMREGISTER] then
  1148. get_para(paraloc^);
  1149. paraloc:=paraloc^.next;
  1150. end;
  1151. end;
  1152. { Copy parameters to local references/registers }
  1153. for i:=0 to current_procinfo.procdef.paras.count-1 do
  1154. begin
  1155. currpara:=tparavarsym(current_procinfo.procdef.paras[i]);
  1156. gen_load_cgpara_loc(list,currpara.vardef,currpara.paraloc[calleeside],currpara.initialloc,paramanager.param_use_paraloc(currpara.paraloc[calleeside]));
  1157. { gen_load_cgpara_loc() already allocated the initialloc
  1158. -> don't allocate again }
  1159. if currpara.initialloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER] then
  1160. gen_alloc_regvar(list,currpara,false);
  1161. end;
  1162. { generate copies of call by value parameters, must be done before
  1163. the initialization and body is parsed because the refcounts are
  1164. incremented using the local copies }
  1165. current_procinfo.procdef.parast.SymList.ForEachCall(@copyvalueparas,list);
  1166. {$ifdef powerpc}
  1167. { unget the register that contains the stack pointer before the procedure entry, }
  1168. { which is used to access the parameters in their original callee-side location }
  1169. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1170. cg.a_reg_dealloc(list,NR_R12);
  1171. {$endif powerpc}
  1172. {$ifdef powerpc64}
  1173. { unget the register that contains the stack pointer before the procedure entry, }
  1174. { which is used to access the parameters in their original callee-side location }
  1175. if (tppcprocinfo(current_procinfo).needs_frame_pointer) then
  1176. cg.a_reg_dealloc(list, NR_OLD_STACK_POINTER_REG);
  1177. {$endif powerpc64}
  1178. if not(po_assembler in current_procinfo.procdef.procoptions) then
  1179. begin
  1180. { initialize refcounted paras, and trash others. Needed here
  1181. instead of in gen_initialize_code, because when a reference is
  1182. intialised or trashed while the pointer to that reference is kept
  1183. in a regvar, we add a register move and that one again has to
  1184. come after the parameter loading code as far as the register
  1185. allocator is concerned }
  1186. current_procinfo.procdef.parast.SymList.ForEachCall(@init_paras,list);
  1187. end;
  1188. end;
  1189. {****************************************************************************
  1190. Entry/Exit
  1191. ****************************************************************************}
  1192. function has_alias_name(pd:tprocdef;const s:string):boolean;
  1193. var
  1194. item : TCmdStrListItem;
  1195. begin
  1196. result:=true;
  1197. if pd.mangledname=s then
  1198. exit;
  1199. item := TCmdStrListItem(pd.aliasnames.first);
  1200. while assigned(item) do
  1201. begin
  1202. if item.str=s then
  1203. exit;
  1204. item := TCmdStrListItem(item.next);
  1205. end;
  1206. result:=false;
  1207. end;
  1208. procedure alloc_proc_symbol(pd: tprocdef);
  1209. var
  1210. item : TCmdStrListItem;
  1211. begin
  1212. item := TCmdStrListItem(pd.aliasnames.first);
  1213. while assigned(item) do
  1214. begin
  1215. current_asmdata.DefineAsmSymbol(item.str,AB_GLOBAL,AT_FUNCTION);
  1216. item := TCmdStrListItem(item.next);
  1217. end;
  1218. end;
  1219. procedure gen_proc_entry_code(list:TAsmList);
  1220. var
  1221. hitemp,
  1222. lotemp, stack_frame_size : longint;
  1223. begin
  1224. { generate call frame marker for dwarf call frame info }
  1225. current_asmdata.asmcfi.start_frame(list);
  1226. { All temps are know, write offsets used for information }
  1227. if (cs_asm_source in current_settings.globalswitches) then
  1228. begin
  1229. if tg.direction>0 then
  1230. begin
  1231. lotemp:=current_procinfo.tempstart;
  1232. hitemp:=tg.lasttemp;
  1233. end
  1234. else
  1235. begin
  1236. lotemp:=tg.lasttemp;
  1237. hitemp:=current_procinfo.tempstart;
  1238. end;
  1239. list.concat(Tai_comment.Create(strpnew('Temps allocated between '+std_regname(current_procinfo.framepointer)+
  1240. tostr_with_plus(lotemp)+' and '+std_regname(current_procinfo.framepointer)+tostr_with_plus(hitemp))));
  1241. end;
  1242. { generate target specific proc entry code }
  1243. stack_frame_size := current_procinfo.calc_stackframe_size;
  1244. if (stack_frame_size <> 0) and
  1245. (po_nostackframe in current_procinfo.procdef.procoptions) then
  1246. message1(parser_e_nostackframe_with_locals,tostr(stack_frame_size));
  1247. hlcg.g_proc_entry(list,stack_frame_size,(po_nostackframe in current_procinfo.procdef.procoptions));
  1248. end;
  1249. procedure gen_proc_exit_code(list:TAsmList);
  1250. var
  1251. parasize : longint;
  1252. begin
  1253. { c style clearstack does not need to remove parameters from the stack, only the
  1254. return value when it was pushed by arguments }
  1255. if current_procinfo.procdef.proccalloption in clearstack_pocalls then
  1256. begin
  1257. parasize:=0;
  1258. if paramanager.ret_in_param(current_procinfo.procdef.returndef,current_procinfo.procdef) then
  1259. inc(parasize,sizeof(pint));
  1260. end
  1261. else
  1262. begin
  1263. parasize:=current_procinfo.para_stack_size;
  1264. { the parent frame pointer para has to be removed by the caller in
  1265. case of Delphi-style parent frame pointer passing }
  1266. if not paramanager.use_fixed_stack and
  1267. (po_delphi_nested_cc in current_procinfo.procdef.procoptions) then
  1268. dec(parasize,sizeof(pint));
  1269. end;
  1270. { generate target specific proc exit code }
  1271. hlcg.g_proc_exit(list,parasize,(po_nostackframe in current_procinfo.procdef.procoptions));
  1272. { release return registers, needed for optimizer }
  1273. if not is_void(current_procinfo.procdef.returndef) then
  1274. paramanager.freecgpara(list,current_procinfo.procdef.funcretloc[calleeside]);
  1275. { end of frame marker for call frame info }
  1276. current_asmdata.asmcfi.end_frame(list);
  1277. end;
  1278. procedure gen_stack_check_size_para(list:TAsmList);
  1279. var
  1280. paraloc1 : tcgpara;
  1281. pd : tprocdef;
  1282. begin
  1283. pd:=search_system_proc('fpc_stackcheck');
  1284. paraloc1.init;
  1285. paramanager.getintparaloc(pd,1,paraloc1);
  1286. cg.a_load_const_cgpara(list,OS_INT,current_procinfo.calc_stackframe_size,paraloc1);
  1287. paramanager.freecgpara(list,paraloc1);
  1288. paraloc1.done;
  1289. end;
  1290. procedure gen_stack_check_call(list:TAsmList);
  1291. var
  1292. paraloc1 : tcgpara;
  1293. pd : tprocdef;
  1294. begin
  1295. pd:=search_system_proc('fpc_stackcheck');
  1296. paraloc1.init;
  1297. { Also alloc the register needed for the parameter }
  1298. paramanager.getintparaloc(pd,1,paraloc1);
  1299. paramanager.freecgpara(list,paraloc1);
  1300. { Call the helper }
  1301. cg.allocallcpuregisters(list);
  1302. cg.a_call_name(list,'FPC_STACKCHECK',false);
  1303. cg.deallocallcpuregisters(list);
  1304. paraloc1.done;
  1305. end;
  1306. procedure gen_save_used_regs(list:TAsmList);
  1307. begin
  1308. { Pure assembler routines need to save the registers themselves }
  1309. if (po_assembler in current_procinfo.procdef.procoptions) then
  1310. exit;
  1311. { oldfpccall expects all registers to be destroyed }
  1312. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1313. cg.g_save_registers(list);
  1314. end;
  1315. procedure gen_restore_used_regs(list:TAsmList);
  1316. begin
  1317. { Pure assembler routines need to save the registers themselves }
  1318. if (po_assembler in current_procinfo.procdef.procoptions) then
  1319. exit;
  1320. { oldfpccall expects all registers to be destroyed }
  1321. if current_procinfo.procdef.proccalloption<>pocall_oldfpccall then
  1322. cg.g_restore_registers(list);
  1323. end;
  1324. {****************************************************************************
  1325. External handling
  1326. ****************************************************************************}
  1327. procedure gen_external_stub(list:TAsmList;pd:tprocdef;const externalname:string);
  1328. begin
  1329. create_hlcodegen;
  1330. { add the procedure to the al_procedures }
  1331. maybe_new_object_file(list);
  1332. new_section(list,sec_code,lower(pd.mangledname),current_settings.alignment.procalign);
  1333. list.concat(Tai_align.create(current_settings.alignment.procalign));
  1334. if (po_global in pd.procoptions) then
  1335. list.concat(Tai_symbol.createname_global(pd.mangledname,AT_FUNCTION,0))
  1336. else
  1337. list.concat(Tai_symbol.createname(pd.mangledname,AT_FUNCTION,0));
  1338. cg.g_external_wrapper(list,pd,externalname);
  1339. destroy_hlcodegen;
  1340. end;
  1341. {****************************************************************************
  1342. Const Data
  1343. ****************************************************************************}
  1344. procedure gen_alloc_symtable(list:TAsmList;pd:tprocdef;st:TSymtable);
  1345. procedure setlocalloc(vs:tabstractnormalvarsym);
  1346. begin
  1347. if cs_asm_source in current_settings.globalswitches then
  1348. begin
  1349. case vs.initialloc.loc of
  1350. LOC_REFERENCE :
  1351. begin
  1352. if not assigned(vs.initialloc.reference.symbol) then
  1353. list.concat(Tai_comment.Create(strpnew('Var '+vs.realname+' located at '+
  1354. std_regname(vs.initialloc.reference.base)+tostr_with_plus(vs.initialloc.reference.offset))));
  1355. end;
  1356. end;
  1357. end;
  1358. vs.localloc:=vs.initialloc;
  1359. FillChar(vs.currentregloc,sizeof(vs.currentregloc),0);
  1360. end;
  1361. var
  1362. i : longint;
  1363. sym : tsym;
  1364. vs : tabstractnormalvarsym;
  1365. isaddr : boolean;
  1366. begin
  1367. for i:=0 to st.SymList.Count-1 do
  1368. begin
  1369. sym:=tsym(st.SymList[i]);
  1370. case sym.typ of
  1371. staticvarsym :
  1372. begin
  1373. vs:=tabstractnormalvarsym(sym);
  1374. { The code in loadnode.pass_generatecode will create the
  1375. LOC_REFERENCE instead for all none register variables. This is
  1376. required because we can't store an asmsymbol in the localloc because
  1377. the asmsymbol is invalid after an unit is compiled. This gives
  1378. problems when this procedure is inlined in another unit (PFV) }
  1379. if vs.is_regvar(false) then
  1380. begin
  1381. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1382. vs.initialloc.size:=def_cgsize(vs.vardef);
  1383. gen_alloc_regvar(list,vs,true);
  1384. setlocalloc(vs);
  1385. end;
  1386. end;
  1387. paravarsym :
  1388. begin
  1389. vs:=tabstractnormalvarsym(sym);
  1390. { Parameters passed to assembler procedures need to be kept
  1391. in the original location }
  1392. if (po_assembler in current_procinfo.procdef.procoptions) then
  1393. tparavarsym(vs).paraloc[calleeside].get_location(vs.initialloc)
  1394. { exception filters receive their frame pointer as a parameter }
  1395. else if (current_procinfo.procdef.proctypeoption=potype_exceptfilter) and
  1396. (vo_is_parentfp in vs.varoptions) then
  1397. begin
  1398. location_reset(vs.initialloc,LOC_REGISTER,OS_ADDR);
  1399. vs.initialloc.register:=NR_FRAME_POINTER_REG;
  1400. end
  1401. else
  1402. begin
  1403. isaddr:=paramanager.push_addr_param(vs.varspez,vs.vardef,current_procinfo.procdef.proccalloption);
  1404. if isaddr then
  1405. vs.initialloc.size:=OS_ADDR
  1406. else
  1407. vs.initialloc.size:=def_cgsize(vs.vardef);
  1408. if vs.is_regvar(isaddr) then
  1409. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable]
  1410. else
  1411. begin
  1412. vs.initialloc.loc:=LOC_REFERENCE;
  1413. { Reuse the parameter location for values to are at a single location on the stack }
  1414. if paramanager.param_use_paraloc(tparavarsym(sym).paraloc[calleeside]) then
  1415. begin
  1416. reference_reset_base(vs.initialloc.reference,tparavarsym(sym).paraloc[calleeside].location^.reference.index,
  1417. tparavarsym(sym).paraloc[calleeside].location^.reference.offset,tparavarsym(sym).paraloc[calleeside].alignment);
  1418. end
  1419. else
  1420. begin
  1421. if isaddr then
  1422. tg.GetLocal(list,sizeof(pint),voidpointertype,vs.initialloc.reference)
  1423. else
  1424. tg.GetLocal(list,vs.getsize,tparavarsym(sym).paraloc[calleeside].alignment,vs.vardef,vs.initialloc.reference);
  1425. end;
  1426. end;
  1427. end;
  1428. setlocalloc(vs);
  1429. end;
  1430. localvarsym :
  1431. begin
  1432. vs:=tabstractnormalvarsym(sym);
  1433. vs.initialloc.size:=def_cgsize(vs.vardef);
  1434. if ([po_assembler,po_nostackframe] * current_procinfo.procdef.procoptions = [po_assembler,po_nostackframe]) and
  1435. (vo_is_funcret in vs.varoptions) then
  1436. begin
  1437. paramanager.create_funcretloc_info(pd,calleeside);
  1438. if assigned(pd.funcretloc[calleeside].location^.next) then
  1439. begin
  1440. { can't replace references to "result" with a complex
  1441. location expression inside assembler code }
  1442. location_reset(vs.initialloc,LOC_INVALID,OS_NO);
  1443. end
  1444. else
  1445. pd.funcretloc[calleeside].get_location(vs.initialloc);
  1446. end
  1447. else if (m_delphi in current_settings.modeswitches) and
  1448. (po_assembler in current_procinfo.procdef.procoptions) and
  1449. (vo_is_funcret in vs.varoptions) and
  1450. (vs.refs=0) then
  1451. begin
  1452. { not referenced, so don't allocate. Use dummy to }
  1453. { avoid ie's later on because of LOC_INVALID }
  1454. vs.initialloc.loc:=LOC_REGISTER;
  1455. vs.initialloc.size:=OS_INT;
  1456. vs.initialloc.register:=NR_FUNCTION_RESULT_REG;
  1457. end
  1458. else if vs.is_regvar(false) then
  1459. begin
  1460. vs.initialloc.loc:=tvarregable2tcgloc[vs.varregable];
  1461. gen_alloc_regvar(list,vs,true);
  1462. end
  1463. else
  1464. begin
  1465. vs.initialloc.loc:=LOC_REFERENCE;
  1466. tg.GetLocal(list,vs.getsize,vs.vardef,vs.initialloc.reference);
  1467. end;
  1468. setlocalloc(vs);
  1469. end;
  1470. end;
  1471. end;
  1472. end;
  1473. procedure add_regvars(var rv: tusedregvars; const location: tlocation);
  1474. begin
  1475. case location.loc of
  1476. LOC_CREGISTER:
  1477. {$ifdef cpu64bitalu}
  1478. if location.size in [OS_128,OS_S128] then
  1479. begin
  1480. rv.intregvars.addnodup(getsupreg(location.register128.reglo));
  1481. rv.intregvars.addnodup(getsupreg(location.register128.reghi));
  1482. end
  1483. else
  1484. {$else cpu64bitalu}
  1485. if location.size in [OS_64,OS_S64] then
  1486. begin
  1487. rv.intregvars.addnodup(getsupreg(location.register64.reglo));
  1488. rv.intregvars.addnodup(getsupreg(location.register64.reghi));
  1489. end
  1490. else
  1491. {$endif cpu64bitalu}
  1492. rv.intregvars.addnodup(getsupreg(location.register));
  1493. LOC_CFPUREGISTER:
  1494. rv.fpuregvars.addnodup(getsupreg(location.register));
  1495. LOC_CMMREGISTER:
  1496. rv.mmregvars.addnodup(getsupreg(location.register));
  1497. end;
  1498. end;
  1499. function do_get_used_regvars(var n: tnode; arg: pointer): foreachnoderesult;
  1500. var
  1501. rv: pusedregvars absolute arg;
  1502. begin
  1503. case (n.nodetype) of
  1504. temprefn:
  1505. { We only have to synchronise a tempnode before a loop if it is }
  1506. { not created inside the loop, and only synchronise after the }
  1507. { loop if it's not destroyed inside the loop. If it's created }
  1508. { before the loop and not yet destroyed, then before the loop }
  1509. { is secondpassed tempinfo^.valid will be true, and we get the }
  1510. { correct registers. If it's not destroyed inside the loop, }
  1511. { then after the loop has been secondpassed tempinfo^.valid }
  1512. { be true and we also get the right registers. In other cases, }
  1513. { tempinfo^.valid will be false and so we do not add }
  1514. { unnecessary registers. This way, we don't have to look at }
  1515. { tempcreate and tempdestroy nodes to get this info (JM) }
  1516. if (ti_valid in ttemprefnode(n).tempinfo^.flags) then
  1517. add_regvars(rv^,ttemprefnode(n).tempinfo^.location);
  1518. loadn:
  1519. if (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1520. add_regvars(rv^,tabstractnormalvarsym(tloadnode(n).symtableentry).localloc);
  1521. vecn:
  1522. { range checks sometimes need the high parameter }
  1523. if (cs_check_range in current_settings.localswitches) and
  1524. (is_open_array(tvecnode(n).left.resultdef) or
  1525. is_array_of_const(tvecnode(n).left.resultdef)) and
  1526. not(current_procinfo.procdef.proccalloption in cdecl_pocalls) then
  1527. add_regvars(rv^,tabstractnormalvarsym(get_high_value_sym(tparavarsym(tloadnode(tvecnode(n).left).symtableentry))).localloc)
  1528. end;
  1529. result := fen_true;
  1530. end;
  1531. procedure get_used_regvars(n: tnode; var rv: tusedregvars);
  1532. begin
  1533. foreachnodestatic(n,@do_get_used_regvars,@rv);
  1534. end;
  1535. (*
  1536. See comments at declaration of pusedregvarscommon
  1537. function do_get_used_regvars_common(var n: tnode; arg: pointer): foreachnoderesult;
  1538. var
  1539. rv: pusedregvarscommon absolute arg;
  1540. begin
  1541. if (n.nodetype = loadn) and
  1542. (tloadnode(n).symtableentry.typ in [staticvarsym,localvarsym,paravarsym]) then
  1543. with tabstractnormalvarsym(tloadnode(n).symtableentry).localloc do
  1544. case loc of
  1545. LOC_CREGISTER:
  1546. { if not yet encountered in this node tree }
  1547. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1548. { but nevertheless already encountered somewhere }
  1549. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1550. { then it's a regvar used in two or more node trees }
  1551. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1552. LOC_CFPUREGISTER:
  1553. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1554. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1555. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1556. LOC_CMMREGISTER:
  1557. if (rv^.myregvars.intregvars.addnodup(getsupreg(register))) and
  1558. not(rv^.allregvars.intregvars.addnodup(getsupreg(register))) then
  1559. rv^.commonregvars.intregvars.addnodup(getsupreg(register));
  1560. end;
  1561. result := fen_true;
  1562. end;
  1563. procedure get_used_regvars_common(n: tnode; var rv: tusedregvarscommon);
  1564. begin
  1565. rv.myregvars.intregvars.clear;
  1566. rv.myregvars.fpuregvars.clear;
  1567. rv.myregvars.mmregvars.clear;
  1568. foreachnodestatic(n,@do_get_used_regvars_common,@rv);
  1569. end;
  1570. *)
  1571. procedure gen_sync_regvars(list:TAsmList; var rv: tusedregvars);
  1572. var
  1573. count: longint;
  1574. begin
  1575. for count := 1 to rv.intregvars.length do
  1576. cg.a_reg_sync(list,newreg(R_INTREGISTER,rv.intregvars.readidx(count-1),R_SUBWHOLE));
  1577. for count := 1 to rv.fpuregvars.length do
  1578. cg.a_reg_sync(list,newreg(R_FPUREGISTER,rv.fpuregvars.readidx(count-1),R_SUBWHOLE));
  1579. for count := 1 to rv.mmregvars.length do
  1580. cg.a_reg_sync(list,newreg(R_MMREGISTER,rv.mmregvars.readidx(count-1),R_SUBWHOLE));
  1581. end;
  1582. {*****************************************************************************
  1583. SSA support
  1584. *****************************************************************************}
  1585. type
  1586. preplaceregrec = ^treplaceregrec;
  1587. treplaceregrec = record
  1588. old, new: tregister;
  1589. oldhi, newhi: tregister;
  1590. ressym: tsym;
  1591. { moved sym }
  1592. sym : tabstractnormalvarsym;
  1593. end;
  1594. function doreplace(var n: tnode; para: pointer): foreachnoderesult;
  1595. var
  1596. rr: preplaceregrec absolute para;
  1597. begin
  1598. result := fen_false;
  1599. if (nf_is_funcret in n.flags) and (fc_exit in flowcontrol) then
  1600. exit;
  1601. case n.nodetype of
  1602. loadn:
  1603. begin
  1604. if (tloadnode(n).symtableentry.typ in [localvarsym,paravarsym,staticvarsym]) and
  1605. (tabstractvarsym(tloadnode(n).symtableentry).varoptions * [vo_is_dll_var, vo_is_thread_var] = []) and
  1606. not assigned(tloadnode(n).left) and
  1607. ((tloadnode(n).symtableentry <> rr^.ressym) or
  1608. not(fc_exit in flowcontrol)
  1609. ) and
  1610. (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) and
  1611. (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register = rr^.old) then
  1612. begin
  1613. {$ifdef cpu64bitalu}
  1614. { it's possible a 128 bit location was shifted and/xor typecasted }
  1615. { in a 64 bit value, so only 1 register was left in the location }
  1616. if (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.size in [OS_128,OS_S128]) then
  1617. if (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register128.reghi = rr^.oldhi) then
  1618. tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register128.reghi := rr^.newhi
  1619. else
  1620. exit;
  1621. {$else cpu64bitalu}
  1622. { it's possible a 64 bit location was shifted and/xor typecasted }
  1623. { in a 32 bit value, so only 1 register was left in the location }
  1624. if (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.size in [OS_64,OS_S64]) then
  1625. if (tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register64.reghi = rr^.oldhi) then
  1626. tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register64.reghi := rr^.newhi
  1627. else
  1628. exit;
  1629. {$endif cpu64bitalu}
  1630. tabstractnormalvarsym(tloadnode(n).symtableentry).localloc.register := rr^.new;
  1631. rr^.sym := tabstractnormalvarsym(tloadnode(n).symtableentry);
  1632. result := fen_norecurse_true;
  1633. end;
  1634. end;
  1635. temprefn:
  1636. begin
  1637. if (ti_valid in ttemprefnode(n).tempinfo^.flags) and
  1638. (ttemprefnode(n).tempinfo^.location.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) and
  1639. (ttemprefnode(n).tempinfo^.location.register = rr^.old) then
  1640. begin
  1641. {$ifdef cpu64bitalu}
  1642. { it's possible a 128 bit location was shifted and/xor typecasted }
  1643. { in a 64 bit value, so only 1 register was left in the location }
  1644. if (ttemprefnode(n).tempinfo^.location.size in [OS_128,OS_S128]) then
  1645. if (ttemprefnode(n).tempinfo^.location.register128.reghi = rr^.oldhi) then
  1646. ttemprefnode(n).tempinfo^.location.register128.reghi := rr^.newhi
  1647. else
  1648. exit;
  1649. {$else cpu64bitalu}
  1650. { it's possible a 64 bit location was shifted and/xor typecasted }
  1651. { in a 32 bit value, so only 1 register was left in the location }
  1652. if (ttemprefnode(n).tempinfo^.location.size in [OS_64,OS_S64]) then
  1653. if (ttemprefnode(n).tempinfo^.location.register64.reghi = rr^.oldhi) then
  1654. ttemprefnode(n).tempinfo^.location.register64.reghi := rr^.newhi
  1655. else
  1656. exit;
  1657. {$endif cpu64bitalu}
  1658. ttemprefnode(n).tempinfo^.location.register := rr^.new;
  1659. result := fen_norecurse_true;
  1660. end;
  1661. end;
  1662. { optimize the searching a bit }
  1663. derefn,addrn,
  1664. calln,inlinen,casen,
  1665. addn,subn,muln,
  1666. andn,orn,xorn,
  1667. ltn,lten,gtn,gten,equaln,unequaln,
  1668. slashn,divn,shrn,shln,notn,
  1669. inn,
  1670. asn,isn:
  1671. result := fen_norecurse_false;
  1672. end;
  1673. end;
  1674. procedure maybechangeloadnodereg(list: TAsmList; var n: tnode; reload: boolean);
  1675. var
  1676. rr: treplaceregrec;
  1677. varloc : tai_varloc;
  1678. begin
  1679. {$ifdef jvm}
  1680. exit;
  1681. {$endif}
  1682. if not (n.location.loc in [LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMXREGISTER,LOC_CMMREGISTER]) or
  1683. ([fc_inflowcontrol,fc_gotolabel,fc_lefthandled] * flowcontrol <> []) then
  1684. exit;
  1685. rr.old := n.location.register;
  1686. rr.ressym := nil;
  1687. rr.sym := nil;
  1688. rr.oldhi := NR_NO;
  1689. case n.location.loc of
  1690. LOC_CREGISTER:
  1691. begin
  1692. {$ifdef cpu64bitalu}
  1693. if (n.location.size in [OS_128,OS_S128]) then
  1694. begin
  1695. rr.oldhi := n.location.register128.reghi;
  1696. rr.new := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  1697. rr.newhi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  1698. end
  1699. else
  1700. {$else cpu64bitalu}
  1701. if (n.location.size in [OS_64,OS_S64]) then
  1702. begin
  1703. rr.oldhi := n.location.register64.reghi;
  1704. rr.new := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  1705. rr.newhi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  1706. end
  1707. else
  1708. {$endif cpu64bitalu}
  1709. rr.new := cg.getintregister(current_asmdata.CurrAsmList,n.location.size);
  1710. end;
  1711. LOC_CFPUREGISTER:
  1712. rr.new := cg.getfpuregister(current_asmdata.CurrAsmList,n.location.size);
  1713. {$ifdef SUPPORT_MMX}
  1714. LOC_CMMXREGISTER:
  1715. rr.new := tcgx86(cg).getmmxregister(current_asmdata.CurrAsmList);
  1716. {$endif SUPPORT_MMX}
  1717. LOC_CMMREGISTER:
  1718. rr.new := cg.getmmregister(current_asmdata.CurrAsmList,n.location.size);
  1719. else
  1720. exit;
  1721. end;
  1722. if not is_void(current_procinfo.procdef.returndef) and
  1723. assigned(current_procinfo.procdef.funcretsym) and
  1724. (tabstractvarsym(current_procinfo.procdef.funcretsym).refs <> 0) then
  1725. if (current_procinfo.procdef.proctypeoption=potype_constructor) then
  1726. rr.ressym:=tsym(current_procinfo.procdef.parast.Find('self'))
  1727. else
  1728. rr.ressym:=current_procinfo.procdef.funcretsym;
  1729. if not foreachnodestatic(n,@doreplace,@rr) then
  1730. exit;
  1731. if reload then
  1732. case n.location.loc of
  1733. LOC_CREGISTER:
  1734. begin
  1735. {$ifdef cpu64bitalu}
  1736. if (n.location.size in [OS_128,OS_S128]) then
  1737. cg128.a_load128_reg_reg(list,n.location.register128,joinreg128(rr.new,rr.newhi))
  1738. else
  1739. {$else cpu64bitalu}
  1740. if (n.location.size in [OS_64,OS_S64]) then
  1741. cg64.a_load64_reg_reg(list,n.location.register64,joinreg64(rr.new,rr.newhi))
  1742. else
  1743. {$endif cpu64bitalu}
  1744. cg.a_load_reg_reg(list,n.location.size,n.location.size,n.location.register,rr.new);
  1745. end;
  1746. LOC_CFPUREGISTER:
  1747. cg.a_loadfpu_reg_reg(list,n.location.size,n.location.size,n.location.register,rr.new);
  1748. {$ifdef SUPPORT_MMX}
  1749. LOC_CMMXREGISTER:
  1750. cg.a_loadmm_reg_reg(list,OS_M64,OS_M64,n.location.register,rr.new,nil);
  1751. {$endif SUPPORT_MMX}
  1752. LOC_CMMREGISTER:
  1753. cg.a_loadmm_reg_reg(list,n.location.size,n.location.size,n.location.register,rr.new,nil);
  1754. else
  1755. internalerror(2006090920);
  1756. end;
  1757. { now that we've change the loadn/temp, also change the node result location }
  1758. {$ifdef cpu64bitalu}
  1759. if (n.location.size in [OS_128,OS_S128]) then
  1760. begin
  1761. n.location.register128.reglo := rr.new;
  1762. n.location.register128.reghi := rr.newhi;
  1763. if assigned(rr.sym) and
  1764. ((rr.sym.currentregloc.register<>rr.new) or
  1765. (rr.sym.currentregloc.registerhi<>rr.newhi)) then
  1766. begin
  1767. varloc:=tai_varloc.create128(rr.sym,rr.new,rr.newhi);
  1768. varloc.oldlocation:=rr.sym.currentregloc.register;
  1769. varloc.oldlocationhi:=rr.sym.currentregloc.registerhi;
  1770. rr.sym.currentregloc.register:=rr.new;
  1771. rr.sym.currentregloc.registerHI:=rr.newhi;
  1772. list.concat(varloc);
  1773. end;
  1774. end
  1775. else
  1776. {$else cpu64bitalu}
  1777. if (n.location.size in [OS_64,OS_S64]) then
  1778. begin
  1779. n.location.register64.reglo := rr.new;
  1780. n.location.register64.reghi := rr.newhi;
  1781. if assigned(rr.sym) and
  1782. ((rr.sym.currentregloc.register<>rr.new) or
  1783. (rr.sym.currentregloc.registerhi<>rr.newhi)) then
  1784. begin
  1785. varloc:=tai_varloc.create64(rr.sym,rr.new,rr.newhi);
  1786. varloc.oldlocation:=rr.sym.currentregloc.register;
  1787. varloc.oldlocationhi:=rr.sym.currentregloc.registerhi;
  1788. rr.sym.currentregloc.register:=rr.new;
  1789. rr.sym.currentregloc.registerHI:=rr.newhi;
  1790. list.concat(varloc);
  1791. end;
  1792. end
  1793. else
  1794. {$endif cpu64bitalu}
  1795. begin
  1796. n.location.register := rr.new;
  1797. if assigned(rr.sym) and (rr.sym.currentregloc.register<>rr.new) then
  1798. begin
  1799. varloc:=tai_varloc.create(rr.sym,rr.new);
  1800. varloc.oldlocation:=rr.sym.currentregloc.register;
  1801. rr.sym.currentregloc.register:=rr.new;
  1802. list.concat(varloc);
  1803. end;
  1804. end;
  1805. end;
  1806. procedure gen_free_symtable(list:TAsmList;st:TSymtable);
  1807. var
  1808. i : longint;
  1809. sym : tsym;
  1810. begin
  1811. for i:=0 to st.SymList.Count-1 do
  1812. begin
  1813. sym:=tsym(st.SymList[i]);
  1814. if (sym.typ in [staticvarsym,localvarsym,paravarsym]) then
  1815. begin
  1816. with tabstractnormalvarsym(sym) do
  1817. begin
  1818. { Note: We need to keep the data available in memory
  1819. for the sub procedures that can access local data
  1820. in the parent procedures }
  1821. case localloc.loc of
  1822. LOC_CREGISTER :
  1823. if (pi_has_label in current_procinfo.flags) then
  1824. {$ifdef cpu64bitalu}
  1825. if def_cgsize(vardef) in [OS_128,OS_S128] then
  1826. begin
  1827. cg.a_reg_sync(list,localloc.register128.reglo);
  1828. cg.a_reg_sync(list,localloc.register128.reghi);
  1829. end
  1830. else
  1831. {$else cpu64bitalu}
  1832. if def_cgsize(vardef) in [OS_64,OS_S64] then
  1833. begin
  1834. cg.a_reg_sync(list,localloc.register64.reglo);
  1835. cg.a_reg_sync(list,localloc.register64.reghi);
  1836. end
  1837. else
  1838. {$endif cpu64bitalu}
  1839. cg.a_reg_sync(list,localloc.register);
  1840. LOC_CFPUREGISTER,
  1841. LOC_CMMREGISTER:
  1842. if (pi_has_label in current_procinfo.flags) then
  1843. cg.a_reg_sync(list,localloc.register);
  1844. LOC_REFERENCE :
  1845. begin
  1846. if typ in [localvarsym,paravarsym] then
  1847. tg.Ungetlocal(list,localloc.reference);
  1848. end;
  1849. end;
  1850. end;
  1851. end;
  1852. end;
  1853. end;
  1854. procedure gen_load_vmt_register(list:TAsmList;objdef:tobjectdef;selfloc:tlocation;var vmtreg:tregister);
  1855. var
  1856. href : treference;
  1857. selfdef: tdef;
  1858. begin
  1859. if is_object(objdef) then
  1860. begin
  1861. case selfloc.loc of
  1862. LOC_CREFERENCE,
  1863. LOC_REFERENCE:
  1864. begin
  1865. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1866. cg.a_loadaddr_ref_reg(list,selfloc.reference,href.base);
  1867. selfdef:=getpointerdef(objdef);
  1868. end;
  1869. else
  1870. internalerror(200305056);
  1871. end;
  1872. end
  1873. else
  1874. { This is also valid for Objective-C classes: vmt_offset is 0 there,
  1875. and the first "field" of an Objective-C class instance is a pointer
  1876. to its "meta-class". }
  1877. begin
  1878. selfdef:=objdef;
  1879. case selfloc.loc of
  1880. LOC_REGISTER:
  1881. begin
  1882. {$ifdef cpu_uses_separate_address_registers}
  1883. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  1884. begin
  1885. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1886. cg.a_load_reg_reg(list,OS_ADDR,OS_ADDR,selfloc.register,href.base);
  1887. end
  1888. else
  1889. {$endif cpu_uses_separate_address_registers}
  1890. reference_reset_base(href,selfloc.register,objdef.vmt_offset,sizeof(pint));
  1891. end;
  1892. LOC_CONSTANT,
  1893. LOC_CREGISTER,
  1894. LOC_CREFERENCE,
  1895. LOC_REFERENCE,
  1896. LOC_CSUBSETREG,
  1897. LOC_SUBSETREG,
  1898. LOC_CSUBSETREF,
  1899. LOC_SUBSETREF:
  1900. begin
  1901. reference_reset_base(href,cg.getaddressregister(list),objdef.vmt_offset,sizeof(pint));
  1902. { todo: pass actual vmt pointer type to hlcg }
  1903. hlcg.a_load_loc_reg(list,voidpointertype,voidpointertype,selfloc,href.base);
  1904. end;
  1905. else
  1906. internalerror(200305057);
  1907. end;
  1908. end;
  1909. vmtreg:=cg.getaddressregister(list);
  1910. hlcg.g_maybe_testself(list,selfdef,href.base);
  1911. cg.a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,vmtreg);
  1912. { test validity of VMT }
  1913. if not(is_interface(objdef)) and
  1914. not(is_cppclass(objdef)) and
  1915. not(is_objc_class_or_protocol(objdef)) then
  1916. cg.g_maybe_testvmt(list,vmtreg,objdef);
  1917. end;
  1918. function getprocalign : shortint;
  1919. begin
  1920. { gprof uses 16 byte granularity }
  1921. if (cs_profile in current_settings.moduleswitches) then
  1922. result:=16
  1923. else
  1924. result:=current_settings.alignment.procalign;
  1925. end;
  1926. procedure gen_fpc_dummy(list : TAsmList);
  1927. begin
  1928. {$ifdef i386}
  1929. { fix me! }
  1930. list.concat(Taicpu.Op_const_reg(A_MOV,S_L,1,NR_EAX));
  1931. list.concat(Taicpu.Op_const(A_RET,S_W,12));
  1932. {$endif i386}
  1933. end;
  1934. end.