cgbase.pas 24 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Some basic types and constants for the code generation
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {# This unit exports some types which are used across the code generator }
  18. unit cgbase;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,
  23. symconst;
  24. type
  25. { Location types where value can be stored }
  26. TCGLoc=(
  27. LOC_INVALID, { added for tracking problems}
  28. LOC_VOID, { no value is available }
  29. LOC_CONSTANT, { constant value }
  30. LOC_JUMP, { boolean results only, jump to false or true label }
  31. LOC_FLAGS, { boolean results only, flags are set }
  32. LOC_REGISTER, { in a processor register }
  33. LOC_CREGISTER, { Constant register which shouldn't be modified }
  34. LOC_FPUREGISTER, { FPU stack }
  35. LOC_CFPUREGISTER, { if it is a FPU register variable on the fpu stack }
  36. LOC_MMXREGISTER, { MMX register }
  37. { MMX register variable }
  38. LOC_CMMXREGISTER,
  39. { multimedia register }
  40. LOC_MMREGISTER,
  41. { Constant multimedia reg which shouldn't be modified }
  42. LOC_CMMREGISTER,
  43. { contiguous subset of bits of an integer register }
  44. LOC_SUBSETREG,
  45. LOC_CSUBSETREG,
  46. { contiguous subset of bits in memory }
  47. LOC_SUBSETREF,
  48. LOC_CSUBSETREF,
  49. { keep these last for range checking purposes }
  50. LOC_CREFERENCE, { in memory constant value reference (cannot change) }
  51. LOC_REFERENCE { in memory value }
  52. );
  53. TCGNonRefLoc=low(TCGLoc)..pred(LOC_CREFERENCE);
  54. TCGRefLoc=LOC_CREFERENCE..LOC_REFERENCE;
  55. { since we have only 16bit offsets, we need to be able to specify the high
  56. and lower 16 bits of the address of a symbol of up to 64 bit }
  57. trefaddr = (
  58. addr_no,
  59. addr_full,
  60. addr_pic,
  61. addr_pic_no_got
  62. {$IF defined(POWERPC) or defined(POWERPC64) or defined(SPARC) or defined(MIPS)}
  63. ,
  64. addr_low, // bits 48-63
  65. addr_high, // bits 32-47
  66. {$IF defined(POWERPC64)}
  67. addr_higher, // bits 16-31
  68. addr_highest, // bits 00-15
  69. {$ENDIF}
  70. addr_higha // bits 16-31, adjusted
  71. {$IF defined(POWERPC64)}
  72. ,
  73. addr_highera, // bits 32-47, adjusted
  74. addr_highesta // bits 48-63, adjusted
  75. {$ENDIF}
  76. {$ENDIF POWERPC or POWERPC64 or SPARC or MIPS}
  77. {$IFDEF MIPS}
  78. ,
  79. addr_pic_call16, // like addr_pic, but generates call16 reloc instead of got16
  80. addr_low_pic, // for large GOT model, generate got_hi16 and got_lo16 relocs
  81. addr_high_pic,
  82. addr_low_call, // counterpart of two above, generate call_hi16 and call_lo16 relocs
  83. addr_high_call
  84. {$ENDIF}
  85. {$IFDEF AVR}
  86. ,addr_lo8
  87. ,addr_lo8_gs
  88. ,addr_hi8
  89. ,addr_hi8_gs
  90. {$ENDIF}
  91. {$IFDEF i8086}
  92. ,addr_dgroup // the data segment group
  93. ,addr_seg // used for getting the segment of an object, e.g. 'mov ax, SEG symbol'
  94. {$ENDIF}
  95. {$IFDEF AARCH64}
  96. ,addr_page
  97. ,addr_pageoffset
  98. ,addr_gotpage
  99. ,addr_gotpageoffset
  100. {$ENDIF AARCH64}
  101. );
  102. {# Generic opcodes, which must be supported by all processors
  103. }
  104. topcg =
  105. (
  106. OP_NONE,
  107. OP_MOVE, { replaced operation with direct load }
  108. OP_ADD, { simple addition }
  109. OP_AND, { simple logical and }
  110. OP_DIV, { simple unsigned division }
  111. OP_IDIV, { simple signed division }
  112. OP_IMUL, { simple signed multiply }
  113. OP_MUL, { simple unsigned multiply }
  114. OP_NEG, { simple negate }
  115. OP_NOT, { simple logical not }
  116. OP_OR, { simple logical or }
  117. OP_SAR, { arithmetic shift-right }
  118. OP_SHL, { logical shift left }
  119. OP_SHR, { logical shift right }
  120. OP_SUB, { simple subtraction }
  121. OP_XOR, { simple exclusive or }
  122. OP_ROL, { rotate left }
  123. OP_ROR { rotate right }
  124. );
  125. {# Generic flag values - used for jump locations }
  126. TOpCmp =
  127. (
  128. OC_NONE,
  129. OC_EQ, { equality comparison }
  130. OC_GT, { greater than (signed) }
  131. OC_LT, { less than (signed) }
  132. OC_GTE, { greater or equal than (signed) }
  133. OC_LTE, { less or equal than (signed) }
  134. OC_NE, { not equal }
  135. OC_BE, { less or equal than (unsigned) }
  136. OC_B, { less than (unsigned) }
  137. OC_AE, { greater or equal than (unsigned) }
  138. OC_A { greater than (unsigned) }
  139. );
  140. { indirect symbol flags }
  141. tindsymflag = (is_data,is_weak);
  142. tindsymflags = set of tindsymflag;
  143. { OS_NO is also used memory references with large data that can
  144. not be loaded in a register directly }
  145. TCgSize = (OS_NO,
  146. { integer registers }
  147. OS_8,OS_16,OS_32,OS_64,OS_128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  148. { single,double,extended,comp,float128 }
  149. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  150. { multi-media sizes: split in byte, word, dword, ... }
  151. { entities, then the signed counterparts }
  152. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,
  153. OS_MS8,OS_MS16,OS_MS32,OS_MS64,OS_MS128,OS_MS256 );
  154. { Register types }
  155. TRegisterType = (
  156. R_INVALIDREGISTER, { = 0 }
  157. R_INTREGISTER, { = 1 }
  158. R_FPUREGISTER, { = 2 }
  159. { used by Intel only }
  160. R_MMXREGISTER, { = 3 }
  161. R_MMREGISTER, { = 4 }
  162. R_SPECIALREGISTER, { = 5 }
  163. R_ADDRESSREGISTER, { = 6 }
  164. { used on llvm, every temp gets its own "base register" }
  165. R_TEMPREGISTER { = 7 }
  166. );
  167. { Sub registers }
  168. TSubRegister = (
  169. R_SUBNONE, { = 0; no sub register possible }
  170. R_SUBL, { = 1; 8 bits, Like AL }
  171. R_SUBH, { = 2; 8 bits, Like AH }
  172. R_SUBW, { = 3; 16 bits, Like AX }
  173. R_SUBD, { = 4; 32 bits, Like EAX }
  174. R_SUBQ, { = 5; 64 bits, Like RAX }
  175. { For Sparc floats that use F0:F1 to store doubles }
  176. R_SUBFS, { = 6; Float that allocates 1 FPU register }
  177. R_SUBFD, { = 7; Float that allocates 2 FPU registers }
  178. R_SUBFQ, { = 8; Float that allocates 4 FPU registers }
  179. R_SUBMMS, { = 9; single scalar in multi media register }
  180. R_SUBMMD, { = 10; double scalar in multi media register }
  181. R_SUBMMWHOLE, { = 11; complete MM register, size depends on CPU }
  182. { For Intel X86 AVX-Register }
  183. R_SUBMMX, { = 12; 128 BITS }
  184. R_SUBMMY { = 13; 256 BITS }
  185. );
  186. TSubRegisterSet = set of TSubRegister;
  187. TSuperRegister = type word;
  188. {
  189. The new register coding:
  190. SuperRegister (bits 0..15)
  191. Subregister (bits 16..23)
  192. Register type (bits 24..31)
  193. TRegister is defined as an enum to make it incompatible
  194. with TSuperRegister to avoid mixing them
  195. }
  196. TRegister = (
  197. TRegisterLowEnum := Low(longint),
  198. TRegisterHighEnum := High(longint)
  199. );
  200. TRegisterRec=packed record
  201. {$ifdef FPC_BIG_ENDIAN}
  202. regtype : Tregistertype;
  203. subreg : Tsubregister;
  204. supreg : Tsuperregister;
  205. {$else FPC_BIG_ENDIAN}
  206. supreg : Tsuperregister;
  207. subreg : Tsubregister;
  208. regtype : Tregistertype;
  209. {$endif FPC_BIG_ENDIAN}
  210. end;
  211. { A type to store register locations for 64 Bit values. }
  212. {$ifdef cpu64bitalu}
  213. tregister64 = tregister;
  214. tregister128 = record
  215. reglo,reghi : tregister;
  216. end;
  217. {$else cpu64bitalu}
  218. tregister64 = record
  219. reglo,reghi : tregister;
  220. end;
  221. {$endif cpu64bitalu}
  222. Tregistermmxset = record
  223. reg0,reg1,reg2,reg3:Tregister
  224. end;
  225. { Set type definition for registers }
  226. tsuperregisterset = array[byte] of set of byte;
  227. pmmshuffle = ^tmmshuffle;
  228. { this record describes shuffle operations for mm operations; if a pointer a shuffle record
  229. passed to an mm operation is nil, it means that the whole location is moved }
  230. tmmshuffle = record
  231. { describes how many shuffles are actually described, if len=0 then
  232. moving the scalar with index 0 to the scalar with index 0 is meant }
  233. len : byte;
  234. { lower nibble of each entry of this array describes index of the source data index while
  235. the upper nibble describes the destination index }
  236. shuffles : array[1..1] of byte;
  237. end;
  238. Tsuperregisterarray=array[0..$ffff] of Tsuperregister;
  239. Psuperregisterarray=^Tsuperregisterarray;
  240. Tsuperregisterworklist=object
  241. buflength,
  242. buflengthinc,
  243. length:word;
  244. buf:Psuperregisterarray;
  245. constructor init;
  246. constructor copyfrom(const x:Tsuperregisterworklist);
  247. destructor done;
  248. procedure clear;
  249. procedure add(s:tsuperregister);
  250. function addnodup(s:tsuperregister): boolean;
  251. function get:tsuperregister;
  252. function readidx(i:word):tsuperregister;
  253. procedure deleteidx(i:word);
  254. function delete(s:tsuperregister):boolean;
  255. end;
  256. psuperregisterworklist=^tsuperregisterworklist;
  257. const
  258. { alias for easier understanding }
  259. R_SSEREGISTER = R_MMREGISTER;
  260. { Invalid register number }
  261. RS_INVALID = high(tsuperregister);
  262. NR_INVALID = tregister($fffffffff);
  263. tcgsize2size : Array[tcgsize] of integer =
  264. { integer values }
  265. (0,1,2,4,8,16,1,2,4,8,16,
  266. { floating point values }
  267. 4,8,10,8,16,
  268. { multimedia values }
  269. 1,2,4,8,16,32,1,2,4,8,16,32);
  270. tfloat2tcgsize: array[tfloattype] of tcgsize =
  271. (OS_F32,OS_F64,OS_F80,OS_F80,OS_C64,OS_C64,OS_F128);
  272. tcgsize2tfloat: array[OS_F32..OS_C64] of tfloattype =
  273. (s32real,s64real,s80real,s64comp);
  274. tvarregable2tcgloc : array[tvarregable] of tcgloc = (LOC_VOID,
  275. LOC_CREGISTER,LOC_CFPUREGISTER,LOC_CMMREGISTER,LOC_CREGISTER);
  276. {$if defined(cpu64bitalu)}
  277. { operand size describing an unsigned value in a pair of int registers }
  278. OS_PAIR = OS_128;
  279. { operand size describing an signed value in a pair of int registers }
  280. OS_SPAIR = OS_S128;
  281. {$elseif defined(cpu32bitalu)}
  282. { operand size describing an unsigned value in a pair of int registers }
  283. OS_PAIR = OS_64;
  284. { operand size describing an signed value in a pair of int registers }
  285. OS_SPAIR = OS_S64;
  286. {$elseif defined(cpu16bitalu)}
  287. { operand size describing an unsigned value in a pair of int registers }
  288. OS_PAIR = OS_32;
  289. { operand size describing an signed value in a pair of int registers }
  290. OS_SPAIR = OS_S32;
  291. {$elseif defined(cpu8bitalu)}
  292. { operand size describing an unsigned value in a pair of int registers }
  293. OS_PAIR = OS_16;
  294. { operand size describing an signed value in a pair of int registers }
  295. OS_SPAIR = OS_S16;
  296. {$endif}
  297. { Table to convert tcgsize variables to the correspondending
  298. unsigned types }
  299. tcgsize2unsigned : array[tcgsize] of tcgsize = (OS_NO,
  300. OS_8,OS_16,OS_32,OS_64,OS_128,OS_8,OS_16,OS_32,OS_64,OS_128,
  301. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  302. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  303. OS_M64,OS_M128,OS_M256);
  304. tcgsize2signed : array[tcgsize] of tcgsize = (OS_NO,
  305. OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,OS_S8,OS_S16,OS_S32,OS_S64,OS_S128,
  306. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  307. OS_M8,OS_M16,OS_M32,OS_M64,OS_M128,OS_M256,OS_M8,OS_M16,OS_M32,
  308. OS_M64,OS_M128,OS_M256);
  309. tcgloc2str : array[TCGLoc] of string[12] = (
  310. 'LOC_INVALID',
  311. 'LOC_VOID',
  312. 'LOC_CONST',
  313. 'LOC_JUMP',
  314. 'LOC_FLAGS',
  315. 'LOC_REG',
  316. 'LOC_CREG',
  317. 'LOC_FPUREG',
  318. 'LOC_CFPUREG',
  319. 'LOC_MMXREG',
  320. 'LOC_CMMXREG',
  321. 'LOC_MMREG',
  322. 'LOC_CMMREG',
  323. 'LOC_SSETREG',
  324. 'LOC_CSSETREG',
  325. 'LOC_SSETREF',
  326. 'LOC_CSSETREF',
  327. 'LOC_CREF',
  328. 'LOC_REF'
  329. );
  330. var
  331. mms_movescalar : pmmshuffle;
  332. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  333. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  334. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  335. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  336. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  337. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  338. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  339. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  340. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  341. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  342. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  343. function generic_regname(r:tregister):string;
  344. {# From a constant numeric value, return the abstract code generator
  345. size.
  346. }
  347. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  348. function int_float_cgsize(const a: tcgint): tcgsize;
  349. function tcgsize2str(cgsize: tcgsize):string;
  350. { return the inverse condition of opcmp }
  351. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  352. { return the opcmp needed when swapping the operands }
  353. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  354. { return whether op is commutative }
  355. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  356. { returns true, if shuffle describes a real shuffle operation and not only a move }
  357. function realshuffle(shuffle : pmmshuffle) : boolean;
  358. { returns true, if the shuffle describes only a move of the scalar at index 0 }
  359. function shufflescalar(shuffle : pmmshuffle) : boolean;
  360. { removes shuffling from shuffle, this means that the destenation index of each shuffle is copied to
  361. the source }
  362. procedure removeshuffles(var shuffle : tmmshuffle);
  363. implementation
  364. uses
  365. verbose;
  366. {******************************************************************************
  367. tsuperregisterworklist
  368. ******************************************************************************}
  369. constructor tsuperregisterworklist.init;
  370. begin
  371. length:=0;
  372. buflength:=0;
  373. buflengthinc:=16;
  374. buf:=nil;
  375. end;
  376. constructor Tsuperregisterworklist.copyfrom(const x:Tsuperregisterworklist);
  377. begin
  378. self:=x;
  379. if x.buf<>nil then
  380. begin
  381. getmem(buf,buflength*sizeof(Tsuperregister));
  382. move(x.buf^,buf^,length*sizeof(Tsuperregister));
  383. end;
  384. end;
  385. destructor tsuperregisterworklist.done;
  386. begin
  387. if assigned(buf) then
  388. freemem(buf);
  389. end;
  390. procedure tsuperregisterworklist.add(s:tsuperregister);
  391. begin
  392. inc(length);
  393. { Need to increase buffer length? }
  394. if length>=buflength then
  395. begin
  396. inc(buflength,buflengthinc);
  397. buflengthinc:=buflengthinc*2;
  398. if buflengthinc>256 then
  399. buflengthinc:=256;
  400. reallocmem(buf,buflength*sizeof(Tsuperregister));
  401. end;
  402. buf^[length-1]:=s;
  403. end;
  404. function tsuperregisterworklist.addnodup(s:tsuperregister): boolean;
  405. begin
  406. addnodup := false;
  407. if indexword(buf^,length,s) = -1 then
  408. begin
  409. add(s);
  410. addnodup := true;
  411. end;
  412. end;
  413. procedure tsuperregisterworklist.clear;
  414. begin
  415. length:=0;
  416. end;
  417. procedure tsuperregisterworklist.deleteidx(i:word);
  418. begin
  419. if i>=length then
  420. internalerror(200310144);
  421. buf^[i]:=buf^[length-1];
  422. dec(length);
  423. end;
  424. function tsuperregisterworklist.readidx(i:word):tsuperregister;
  425. begin
  426. if (i >= length) then
  427. internalerror(2005010601);
  428. result := buf^[i];
  429. end;
  430. function tsuperregisterworklist.get:tsuperregister;
  431. begin
  432. if length=0 then
  433. internalerror(200310142);
  434. get:=buf^[0];
  435. buf^[0]:=buf^[length-1];
  436. dec(length);
  437. end;
  438. function tsuperregisterworklist.delete(s:tsuperregister):boolean;
  439. var
  440. i:longint;
  441. begin
  442. delete:=false;
  443. { indexword in 1.0.x and 1.9.4 is broken }
  444. i:=indexword(buf^,length,s);
  445. if i<>-1 then
  446. begin
  447. deleteidx(i);
  448. delete := true;
  449. end;
  450. end;
  451. procedure supregset_reset(var regs:tsuperregisterset;setall:boolean;
  452. maxreg:Tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  453. begin
  454. fillchar(regs,(maxreg+7) shr 3,-byte(setall));
  455. end;
  456. procedure supregset_include(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  457. begin
  458. include(regs[s shr 8],(s and $ff));
  459. end;
  460. procedure supregset_exclude(var regs:tsuperregisterset;s:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  461. begin
  462. exclude(regs[s shr 8],(s and $ff));
  463. end;
  464. function supregset_in(const regs:tsuperregisterset;s:tsuperregister):boolean;{$ifdef USEINLINE}inline;{$endif}
  465. begin
  466. result:=(s and $ff) in regs[s shr 8];
  467. end;
  468. function newreg(rt:tregistertype;sr:tsuperregister;sb:tsubregister):tregister;{$ifdef USEINLINE}inline;{$endif}
  469. begin
  470. tregisterrec(result).regtype:=rt;
  471. tregisterrec(result).supreg:=sr;
  472. tregisterrec(result).subreg:=sb;
  473. end;
  474. function getsubreg(r:tregister):tsubregister;{$ifdef USEINLINE}inline;{$endif}
  475. begin
  476. result:=tregisterrec(r).subreg;
  477. end;
  478. function getsupreg(r:tregister):tsuperregister;{$ifdef USEINLINE}inline;{$endif}
  479. begin
  480. result:=tregisterrec(r).supreg;
  481. end;
  482. function getregtype(r:tregister):tregistertype;{$ifdef USEINLINE}inline;{$endif}
  483. begin
  484. result:=tregisterrec(r).regtype;
  485. end;
  486. procedure setsubreg(var r:tregister;sr:tsubregister);{$ifdef USEINLINE}inline;{$endif}
  487. begin
  488. tregisterrec(r).subreg:=sr;
  489. end;
  490. procedure setsupreg(var r:tregister;sr:tsuperregister);{$ifdef USEINLINE}inline;{$endif}
  491. begin
  492. tregisterrec(r).supreg:=sr;
  493. end;
  494. function generic_regname(r:tregister):string;
  495. var
  496. nr : string[12];
  497. begin
  498. str(getsupreg(r),nr);
  499. case getregtype(r) of
  500. R_INTREGISTER:
  501. result:='ireg'+nr;
  502. R_FPUREGISTER:
  503. result:='freg'+nr;
  504. R_MMREGISTER:
  505. result:='mreg'+nr;
  506. R_MMXREGISTER:
  507. result:='xreg'+nr;
  508. R_ADDRESSREGISTER:
  509. result:='areg'+nr;
  510. R_SPECIALREGISTER:
  511. result:='sreg'+nr;
  512. else
  513. begin
  514. result:='INVALID';
  515. exit;
  516. end;
  517. end;
  518. case getsubreg(r) of
  519. R_SUBNONE:
  520. ;
  521. R_SUBL:
  522. result:=result+'l';
  523. R_SUBH:
  524. result:=result+'h';
  525. R_SUBW:
  526. result:=result+'w';
  527. R_SUBD:
  528. result:=result+'d';
  529. R_SUBQ:
  530. result:=result+'q';
  531. R_SUBFS:
  532. result:=result+'fs';
  533. R_SUBFD:
  534. result:=result+'fd';
  535. R_SUBMMD:
  536. result:=result+'md';
  537. R_SUBMMS:
  538. result:=result+'ms';
  539. R_SUBMMWHOLE:
  540. result:=result+'ma';
  541. R_SUBMMX:
  542. result:=result+'mx';
  543. R_SUBMMY:
  544. result:=result+'my';
  545. else
  546. internalerror(200308252);
  547. end;
  548. end;
  549. function int_cgsize(const a: tcgint): tcgsize;{$ifdef USEINLINE}inline;{$endif}
  550. const
  551. size2cgsize : array[0..8] of tcgsize = (
  552. OS_NO,OS_8,OS_16,OS_NO,OS_32,OS_NO,OS_NO,OS_NO,OS_64
  553. );
  554. begin
  555. {$ifdef cpu64bitalu}
  556. if a=16 then
  557. result:=OS_128
  558. else
  559. {$endif cpu64bitalu}
  560. if a>8 then
  561. result:=OS_NO
  562. else
  563. result:=size2cgsize[a];
  564. end;
  565. function int_float_cgsize(const a: tcgint): tcgsize;
  566. begin
  567. case a of
  568. 4 :
  569. result:=OS_F32;
  570. 8 :
  571. result:=OS_F64;
  572. 10 :
  573. result:=OS_F80;
  574. 16 :
  575. result:=OS_F128;
  576. else
  577. internalerror(200603211);
  578. end;
  579. end;
  580. function tcgsize2str(cgsize: tcgsize):string;
  581. begin
  582. Str(cgsize, Result);
  583. end;
  584. function inverse_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  585. const
  586. list: array[TOpCmp] of TOpCmp =
  587. (OC_NONE,OC_NE,OC_LTE,OC_GTE,OC_LT,OC_GT,OC_EQ,OC_A,OC_AE,
  588. OC_B,OC_BE);
  589. begin
  590. inverse_opcmp := list[opcmp];
  591. end;
  592. function swap_opcmp(opcmp: topcmp): topcmp;{$ifdef USEINLINE}inline;{$endif}
  593. const
  594. list: array[TOpCmp] of TOpCmp =
  595. (OC_NONE,OC_EQ,OC_LT,OC_GT,OC_LTE,OC_GTE,OC_NE,OC_AE,OC_A,
  596. OC_BE,OC_B);
  597. begin
  598. swap_opcmp := list[opcmp];
  599. end;
  600. function commutativeop(op: topcg): boolean;{$ifdef USEINLINE}inline;{$endif}
  601. const
  602. list: array[topcg] of boolean =
  603. (true,false,true,true,false,false,true,true,false,false,
  604. true,false,false,false,false,true,false,false);
  605. begin
  606. commutativeop := list[op];
  607. end;
  608. function realshuffle(shuffle : pmmshuffle) : boolean;
  609. var
  610. i : longint;
  611. begin
  612. realshuffle:=true;
  613. if (shuffle=nil) or (shuffle^.len=0) then
  614. realshuffle:=false
  615. else
  616. begin
  617. for i:=1 to shuffle^.len do
  618. begin
  619. if (shuffle^.shuffles[i] and $f)<>((shuffle^.shuffles[i] and $f0) shr 4) then
  620. exit;
  621. end;
  622. realshuffle:=false;
  623. end;
  624. end;
  625. function shufflescalar(shuffle : pmmshuffle) : boolean;
  626. begin
  627. result:=shuffle^.len=0;
  628. end;
  629. procedure removeshuffles(var shuffle : tmmshuffle);
  630. var
  631. i : longint;
  632. begin
  633. if shuffle.len=0 then
  634. exit;
  635. for i:=1 to shuffle.len do
  636. shuffle.shuffles[i]:=(shuffle.shuffles[i] and $f) or ((shuffle.shuffles[i] and $f0) shr 4);
  637. end;
  638. initialization
  639. new(mms_movescalar);
  640. mms_movescalar^.len:=0;
  641. finalization
  642. dispose(mms_movescalar);
  643. end.