sig_cpu.inc 1.1 KB

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  1. {$IFDEF FPC}
  2. {$PACKRECORDS C}
  3. {$ENDIF}
  4. type
  5. __darwin_arm_exception_state64 = record
  6. __far : cuint64;
  7. __esr : cuint32;
  8. __exception : cuint32;
  9. end;
  10. __darwin_arm_thread_state64 = record
  11. __r : array[0..28] of cuint64;
  12. __fp : cuint64;
  13. __lr : cuint64;
  14. __sp : cuint64;
  15. __pc : cuint64;
  16. __cpsr : cuint32;
  17. end;
  18. __darwin_arm_neon_state64 = record
  19. { actually an array of cuint128 }
  20. __r : array[0..31] of record l1,l2: cuint64; end;
  21. __fpsr : cuint32;
  22. __fpcr : cuint32;
  23. { array of cuint128 is aligned/padded to multiple of 16 bytes }
  24. pad: cuint64;
  25. end;
  26. __darwin_arm_debug_state64 = record
  27. __bvr : array[0..15] of cuint64;
  28. __bcr : array[0..15] of cuint64;
  29. __wvr : array[0..15] of cuint64;
  30. __wcr : array[0..15] of cuint64;
  31. __mdscr_el1: cuint64;
  32. end;
  33. mcontext_t = record
  34. __es : __darwin_arm_exception_state64;
  35. __ss : __darwin_arm_thread_state64;
  36. __fs : __darwin_arm_neon_state64;
  37. end;