cpubase.pas 14 KB

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  1. {
  2. Copyright (c) 2016-2017 by Karoly Balogh
  3. Contains the base types for the WebAssembly
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. { This Unit contains the base types for the Java Virtual Machine
  18. }
  19. unit cpubase;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. aasmbase,cpuinfo,cgbase;
  25. {*****************************************************************************
  26. Assembler Opcodes
  27. *****************************************************************************}
  28. type
  29. TAsmOp=(A_None,
  30. // control flow
  31. a_block, a_loop, a_br, a_br_if, a_br_table, a_if, a_else, a_end_block,
  32. a_end_loop, a_end_if, a_end_function, a_return, a_unreachable,
  33. // basic
  34. a_nop, a_drop, a_i32_const, a_i64_const, a_f32_const, a_f64_const,
  35. a_get_local, a_set_local, a_tee_local, a_get_global, a_set_global,
  36. a_select, a_call, a_call_indirect,
  37. // integer
  38. a_i32_add, a_i64_add, a_i32_sub, a_i64_sub, a_i32_mul, a_i64_mul,
  39. a_i32_div_s, a_i64_div_s, a_i32_div_u, a_i64_div_u, a_i32_rem_s, a_i64_rem_s,
  40. a_i32_rem_u, a_i64_rem_u, a_i32_and, a_i64_and, a_i32_or, a_i64_or,
  41. a_i32_xor, a_i64_xor, a_i32_shl, a_i64_shl, a_i32_shr_s, a_i64_shr_s,
  42. a_i32_shr_u, a_i64_shr_u, a_i32_rotl, a_i64_rotl, a_i32_rotr, a_i64_rotr,
  43. a_i32_clz, a_i64_clz, a_i32_ctz, a_i64_ctz, a_i32_popcnt, a_i64_popcnt,
  44. a_i32_eqz, a_i64_eqz,
  45. // floating point
  46. a_f32_add, a_f64_add, a_f32_sub, a_f64_sub, a_f32_mul, a_f64_mul,
  47. a_f32_div, a_f64_div, a_f32_sqrt, a_f64_sqrt, a_f32_min, a_f64_min,
  48. a_f32_max, a_f64_max, a_f32_ceil, a_f64_ceil, a_f32_floor, a_f64_floor,
  49. a_f32_trunc, a_f64_trunc, a_f32_nearest, a_f64_nearest, a_f32_abs, a_f64_abs,
  50. a_f32_neg, a_f64_neg, a_f32_copysign, a_f64_copysign,
  51. // integer compare
  52. a_i32_eq, a_i64_eq, a_i32_ne, a_i64_ne, a_i32_lt_s, a_i64_lt_s,
  53. a_i32_lt_u, a_i64_lt_u, a_i32_le_s, a_i64_le_s, a_i32_le_u, a_i64_le_u,
  54. a_i32_gt_s, a_i64_gt_s, a_i32_gt_u, a_i64_gt_u, a_i32_ge_s, a_i64_ge_s,
  55. a_i32_ge_u, a_i64_ge_u,
  56. // floating point compare
  57. a_f32_eq, a_f64_eq, a_f32_ne, a_f64_ne, a_f32_lt, a_f64_lt,
  58. a_f32_le, a_f64_le, a_f32_gt, a_f64_gt, a_f32_ge, a_f64_ge,
  59. // conversion
  60. a_i32_wrap_i64, a_i64_extend_s_i32, a_i64_extend_u_i32,
  61. a_i32_trunc_s_f32, a_i32_trunc_s_f64, a_i64_trunc_s_f32, a_i64_trunc_s_f64,
  62. a_i32_trunc_u_f32, a_i32_trunc_u_f64, a_i64_trunc_u_f32, a_i64_trunc_u_f64,
  63. a_f32_demote_f64, a_f64_promote_f32,
  64. a_f32_convert_s_i32, a_f32_convert_s_i64,a_f64_convert_s_i32,a_f64_convert_s_i64,
  65. a_f32_convert_u_i32, a_f32_convert_u_i64,a_f64_convert_u_i32,a_f64_convert_u_i64,
  66. a_i32_reinterpret_f32, a_i64_reinterpret_f64, a_f32_reinterpret_i32, a_f64_reinterpret_f64,
  67. // load/store
  68. a_i32_load, a_i64_load, a_f32_load, a_f64_load,
  69. a_i32_store, a_i64_store, a_f32_store, a_f64_store,
  70. a_i32_load8_s, a_i32_load16_s, a_i64_load8_s, a_i64_load16_s, a_i64_load32_s,
  71. a_i32_load8_u, a_i32_load16_u, a_i64_load8_u, a_i64_load16_u, a_i64_load32_u,
  72. a_i32_store8, a_i32_store16, a_i64_store8, a_i64_store16, a_i64_store32,
  73. // additional memory
  74. a_grow_memory, a_current_memory
  75. );
  76. TWasmBasicType = (wbt_i32, wbt_i64, wbt_f32, wbt_f64);
  77. {# This should define the array of instructions as string }
  78. op2strtable=array[tasmop] of string[31];
  79. Const
  80. {# First value of opcode enumeration }
  81. firstop = low(tasmop);
  82. {# Last value of opcode enumeration }
  83. lastop = high(tasmop);
  84. AsmOp_Store = [
  85. a_i32_store, a_i32_store16, a_i32_store8
  86. ,a_i64_store, a_i64_store16, a_i64_store8, a_i64_store32
  87. ,a_f32_store, a_f64_store
  88. ];
  89. AsmOp_Load = [
  90. a_i32_load,
  91. a_i32_load8_s, a_i32_load8_u,
  92. a_i32_load16_s, a_i32_load16_u,
  93. a_i64_load,
  94. a_i64_load8_s, a_i64_load8_u,
  95. a_i64_load16_s, a_i64_load16_u,
  96. a_i64_load32_s, a_i64_load32_u,
  97. a_f32_load, a_f64_load
  98. ];
  99. AsmOp_LoadStore = AsmOp_Load + AsmOp_Store;
  100. {*****************************************************************************
  101. Registers
  102. *****************************************************************************}
  103. type
  104. { Number of registers used for indexing in tables }
  105. tregisterindex=0..{$i rwasmnor.inc}-1; // no registers in wasm
  106. totherregisterset = set of tregisterindex;
  107. const
  108. { Available Superregisters }
  109. // there's no registers in wasm
  110. {$i rwasmsup.inc}
  111. { No Subregisters }
  112. R_SUBWHOLE = R_SUBNONE;
  113. { Available Registers }
  114. // there's no registers in wasm
  115. {$i rwasmcon.inc}
  116. { aliases }
  117. { used as base register in references for parameters passed to
  118. subroutines: these are passed on the evaluation stack, but this way we
  119. can use the offset field to indicate the order, which is used by ncal
  120. to sort the parameters }
  121. NR_EVAL_STACK_BASE = NR_R0;
  122. { used as base register in references to indicate that it's a local }
  123. NR_LOCAL_STACK_POINTER_REG = NR_R1;
  124. { fake register, representing the local frame pointer. Used for accessing
  125. address-taken local variables on the linear stack: (localframeptr+offset). }
  126. NR_LOCAL_FRAME_POINTER_REG = NR_R3;
  127. maxvarregs = 1;
  128. maxfpuvarregs = 1;
  129. { Integer Super registers first and last }
  130. first_int_imreg = 2;
  131. { Float Super register first and last }
  132. first_fpu_imreg = 2;
  133. { MM Super register first and last }
  134. first_mm_imreg = 2;
  135. regnumber_table : array[tregisterindex] of tregister = (
  136. {$i rwasmnum.inc}
  137. );
  138. EVALSTACKLOCS = [LOC_REGISTER,LOC_CREGISTER,LOC_FPUREGISTER,LOC_CFPUREGISTER,
  139. LOC_MMREGISTER,LOC_CMMREGISTER,LOC_SUBSETREG,LOC_CSUBSETREG];
  140. {*****************************************************************************
  141. References
  142. *****************************************************************************}
  143. type
  144. { array reference types }
  145. tarrayreftype = (art_none,art_indexreg,art_indexref,art_indexconst);
  146. {*****************************************************************************
  147. Conditions
  148. *****************************************************************************}
  149. type
  150. // not used by wasm target
  151. TAsmCond=(C_None);
  152. {*****************************************************************************
  153. Constants
  154. *****************************************************************************}
  155. const
  156. max_operands = 2;
  157. {*****************************************************************************
  158. Default generic sizes
  159. *****************************************************************************}
  160. {$ifdef cpu64bitaddr}
  161. {# Defines the default address size for a processor,
  162. -- fake for JVM, only influences default width of
  163. arithmetic calculations }
  164. OS_ADDR = OS_64;
  165. {# the natural int size for a processor,
  166. has to match osuinttype/ossinttype as initialized in psystem }
  167. OS_INT = OS_64;
  168. OS_SINT = OS_S64;
  169. {$else}
  170. {# Defines the default address size for a processor,
  171. -- fake for wasm, only influences default width of
  172. arithmetic calculations }
  173. OS_ADDR = OS_32;
  174. {# the natural int size for a processor,
  175. has to match osuinttype/ossinttype as initialized in psystem }
  176. OS_INT = OS_32;
  177. OS_SINT = OS_S32;
  178. {$endif}
  179. {# the maximum float size for a processor, }
  180. OS_FLOAT = OS_F64;
  181. {# the size of a vector register for a processor }
  182. OS_VECTOR = OS_M128;
  183. {*****************************************************************************
  184. Generic Register names
  185. *****************************************************************************}
  186. { dummies, not used for Wasm }
  187. {# Stack pointer register }
  188. { used as base register in references to indicate that it's a local }
  189. NR_STACK_POINTER_REG = NR_R1;
  190. RS_STACK_POINTER_REG = RS_R1;
  191. {# Frame pointer register }
  192. NR_FRAME_POINTER_REG = NR_STACK_POINTER_REG;
  193. RS_FRAME_POINTER_REG = RS_STACK_POINTER_REG;
  194. { WebAssembly results are returned on the evaluation stack, not via a register }
  195. { Results are returned in this register (32-bit values) }
  196. NR_FUNCTION_RETURN_REG = NR_NO;
  197. RS_FUNCTION_RETURN_REG = RS_NO;
  198. { Low part of 64bit return value }
  199. NR_FUNCTION_RETURN64_LOW_REG = NR_NO;
  200. RS_FUNCTION_RETURN64_LOW_REG = RS_NO;
  201. { High part of 64bit return value }
  202. NR_FUNCTION_RETURN64_HIGH_REG = NR_NO;
  203. RS_FUNCTION_RETURN64_HIGH_REG = RS_NO;
  204. { The value returned from a function is available in this register }
  205. NR_FUNCTION_RESULT_REG = NR_FUNCTION_RETURN_REG;
  206. RS_FUNCTION_RESULT_REG = RS_FUNCTION_RETURN_REG;
  207. { The lowh part of 64bit value returned from a function }
  208. NR_FUNCTION_RESULT64_LOW_REG = NR_FUNCTION_RETURN64_LOW_REG;
  209. RS_FUNCTION_RESULT64_LOW_REG = RS_FUNCTION_RETURN64_LOW_REG;
  210. { The high part of 64bit value returned from a function }
  211. NR_FUNCTION_RESULT64_HIGH_REG = NR_FUNCTION_RETURN64_HIGH_REG;
  212. RS_FUNCTION_RESULT64_HIGH_REG = RS_FUNCTION_RETURN64_HIGH_REG;
  213. NR_FPU_RESULT_REG = NR_NO;
  214. NR_MM_RESULT_REG = NR_NO;
  215. {*****************************************************************************
  216. GCC /ABI linking information
  217. *****************************************************************************}
  218. { dummies, not used for Wasm }
  219. {# Required parameter alignment when calling a routine
  220. }
  221. std_param_align = 1;
  222. {*****************************************************************************
  223. CPU Dependent Constants
  224. *****************************************************************************}
  225. maxfpuregs = 0;
  226. FRAME_POINTER_SYM = '$fp';
  227. BASE_POINTER_SYM = '$bp';
  228. { Global variable, that acts as the stack pointer in linear memory
  229. (also called the "linear stack"). This stack is used for address-taken
  230. local variables. This separate stack is needed, because the WASM
  231. implementation's runtime call stack (which includes return addresses and
  232. function parameters) is not visible in linear memory. }
  233. STACK_POINTER_SYM = '__stack_pointer';
  234. {*****************************************************************************
  235. Helpers
  236. *****************************************************************************}
  237. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  238. function reg_cgsize(const reg: tregister) : tcgsize;
  239. function std_regnum_search(const s:string):Tregister;
  240. function std_regname(r:Tregister):string;
  241. function findreg_by_number(r:Tregister):tregisterindex;
  242. function eh_return_data_regno(nr: longint): longint;
  243. { since we don't use tasmconds, don't call this routine
  244. (it will internalerror). We need it anyway to get aoptobj
  245. to compile (but it won't execute it).
  246. }
  247. function inverse_cond(const c: TAsmCond): Tasmcond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  248. implementation
  249. uses
  250. verbose,
  251. rgbase;
  252. {*****************************************************************************
  253. Helpers
  254. *****************************************************************************}
  255. const
  256. std_regname_table : array[tregisterindex] of string[15] = (
  257. {$i rwasmstd.inc}
  258. );
  259. regnumber_index : array[tregisterindex] of tregisterindex = (
  260. {$i rwasmrni.inc}
  261. );
  262. std_regname_index : array[tregisterindex] of tregisterindex = (
  263. {$i rwasmsri.inc}
  264. );
  265. function reg_cgsize(const reg: tregister): tcgsize;
  266. begin
  267. result:=OS_NO;
  268. end;
  269. function cgsize2subreg(regtype: tregistertype; s:Tcgsize):Tsubregister;
  270. begin
  271. cgsize2subreg:=R_SUBNONE;
  272. end;
  273. function std_regnum_search(const s:string):Tregister;
  274. begin
  275. result:=NR_NO;
  276. end;
  277. function findreg_by_number(r:Tregister):tregisterindex;
  278. begin
  279. result:=findreg_by_number_table(r,regnumber_index);
  280. end;
  281. function std_regname(r:Tregister):string;
  282. var
  283. p : tregisterindex;
  284. begin
  285. p:=findreg_by_number_table(r,regnumber_index);
  286. if p<>0 then
  287. result:=std_regname_table[p]
  288. else
  289. result:=generic_regname(r);
  290. end;
  291. function eh_return_data_regno(nr: longint): longint;
  292. begin
  293. result:=-1;
  294. end;
  295. function inverse_cond(const c: TAsmCond): Tasmcond; {$ifdef USEINLINE}inline;{$endif USEINLINE}
  296. begin
  297. result:=C_None;
  298. internalerror(2015082701);
  299. end;
  300. end.