daopt386.pas 96 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Freepascal
  3. development team
  4. This unit contains the data flow analyzer and several helper procedures
  5. and functions.
  6. This program is free software; you can redistribute it and/or modify
  7. it under the terms of the GNU General Public License as published by
  8. the Free Software Foundation; either version 2 of the License, or
  9. (at your option) any later version.
  10. This program is distributed in the hope that it will be useful,
  11. but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. GNU General Public License for more details.
  14. You should have received a copy of the GNU General Public License
  15. along with this program; if not, write to the Free Software
  16. Foundation, inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. ****************************************************************************
  18. }
  19. unit daopt386;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. cclasses,aasmbase,aasmtai,aasmdata,aasmcpu,cgbase,cgutils,
  25. cpubase;
  26. {******************************* Constants *******************************}
  27. const
  28. { Possible register content types }
  29. con_Unknown = 0;
  30. con_ref = 1;
  31. con_const = 2;
  32. { The contents aren't usable anymore for CSE, but they may still be }
  33. { useful for detecting whether the result of a load is actually used }
  34. con_invalid = 3;
  35. { the reverse of the above (in case a (conditional) jump is encountered): }
  36. { CSE is still possible, but the original instruction can't be removed }
  37. con_noRemoveRef = 4;
  38. { same, but for constants }
  39. con_noRemoveConst = 5;
  40. const
  41. topsize2tcgsize: array[topsize] of tcgsize = (OS_NO,
  42. OS_8,OS_16,OS_32,OS_64,OS_16,OS_32,OS_32,
  43. OS_16,OS_32,OS_64,
  44. OS_F32,OS_F64,OS_F80,OS_C64,OS_F128,
  45. OS_M32,
  46. OS_ADDR,OS_NO,OS_NO,
  47. OS_NO,
  48. OS_NO,
  49. OS_NO);
  50. {********************************* Types *********************************}
  51. type
  52. TRegEnum = RS_EAX..RS_ESP;
  53. TRegArray = Array[TRegEnum] of tsuperregister;
  54. TRegSet = Set of TRegEnum;
  55. toptreginfo = Record
  56. NewRegsEncountered, OldRegsEncountered: TRegSet;
  57. RegsLoadedForRef: TRegSet;
  58. lastReload: array[RS_EAX..RS_ESP] of tai;
  59. New2OldReg: TRegArray;
  60. end;
  61. {possible actions on an operand: read, write or modify (= read & write)}
  62. TOpAction = (OpAct_Read, OpAct_Write, OpAct_Modify, OpAct_Unknown);
  63. {the possible states of a flag}
  64. TFlagContents = (F_Unknown, F_notSet, F_Set);
  65. TContent = Packed Record
  66. {start and end of block instructions that defines the
  67. content of this register.}
  68. StartMod: tai;
  69. MemWrite: taicpu;
  70. {how many instructions starting with StarMod does the block consist of}
  71. NrOfMods: Word;
  72. {the type of the content of the register: unknown, memory, constant}
  73. Typ: Byte;
  74. case byte of
  75. {starts at 0, gets increased everytime the register is written to}
  76. 1: (WState: Byte;
  77. {starts at 0, gets increased everytime the register is read from}
  78. RState: Byte);
  79. { to compare both states in one operation }
  80. 2: (state: word);
  81. end;
  82. {Contents of the integer registers}
  83. TRegContent = Array[RS_EAX..RS_ESP] Of TContent;
  84. {contents of the FPU registers}
  85. // TRegFPUContent = Array[RS_ST..RS_ST7] Of TContent;
  86. {$ifdef tempOpts}
  87. { linked list which allows searching/deleting based on value, no extra frills}
  88. PSearchLinkedListItem = ^TSearchLinkedListItem;
  89. TSearchLinkedListItem = object(TLinkedList_Item)
  90. constructor init;
  91. function equals(p: PSearchLinkedListItem): boolean; virtual;
  92. end;
  93. PSearchDoubleIntItem = ^TSearchDoubleInttem;
  94. TSearchDoubleIntItem = object(TLinkedList_Item)
  95. constructor init(_int1,_int2: longint);
  96. function equals(p: PSearchLinkedListItem): boolean; virtual;
  97. private
  98. int1, int2: longint;
  99. end;
  100. PSearchLinkedList = ^TSearchLinkedList;
  101. TSearchLinkedList = object(TLinkedList)
  102. function searchByValue(p: PSearchLinkedListItem): boolean;
  103. procedure removeByValue(p: PSearchLinkedListItem);
  104. end;
  105. {$endif tempOpts}
  106. {information record with the contents of every register. Every tai object
  107. gets one of these assigned: a pointer to it is stored in the OptInfo field}
  108. TtaiProp = Record
  109. Regs: TRegContent;
  110. { FPURegs: TRegFPUContent;} {currently not yet used}
  111. { allocated Registers }
  112. UsedRegs: TRegSet;
  113. { status of the direction flag }
  114. DirFlag: TFlagContents;
  115. {$ifdef tempOpts}
  116. { currently used temps }
  117. tempAllocs: PSearchLinkedList;
  118. {$endif tempOpts}
  119. { can this instruction be removed? }
  120. CanBeRemoved: Boolean;
  121. { are the resultflags set by this instruction used? }
  122. FlagsUsed: Boolean;
  123. end;
  124. ptaiprop = ^TtaiProp;
  125. TtaiPropBlock = Array[1..250000] Of TtaiProp;
  126. PtaiPropBlock = ^TtaiPropBlock;
  127. TInstrSinceLastMod = Array[RS_EAX..RS_ESP] Of Word;
  128. TLabelTableItem = Record
  129. taiObj: tai;
  130. {$ifDef JumpAnal}
  131. InstrNr: Longint;
  132. RefsFound: Word;
  133. JmpsProcessed: Word
  134. {$endif JumpAnal}
  135. end;
  136. TLabelTable = Array[0..2500000] Of TLabelTableItem;
  137. PLabelTable = ^TLabelTable;
  138. {*********************** procedures and functions ************************}
  139. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  140. function RefsEqual(const R1, R2: TReference): Boolean;
  141. function isgp32reg(supreg: tsuperregister): Boolean;
  142. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  143. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  144. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  145. function RegInInstruction(supreg: tsuperregister; p1: tai): boolean;
  146. function reginop(supreg: tsuperregister; const o:toper): boolean;
  147. function instrWritesFlags(p: tai): boolean;
  148. function instrReadsFlags(p: tai): boolean;
  149. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  150. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  151. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  152. const c: tcontent): boolean;
  153. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  154. const c: tcontent; var memwritedestroyed: boolean): boolean;
  155. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  156. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  157. function GetLastInstruction(Current: tai; var Last: tai): Boolean;
  158. procedure SkipHead(var p: tai);
  159. function labelCanBeSkipped(p: tai_label): boolean;
  160. procedure RemoveLastDeallocForFuncRes(asmL: TAsmList; p: tai);
  161. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  162. hp: tai): boolean;
  163. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  164. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  165. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  166. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  167. function sizescompatible(loadsize,newsize: topsize): boolean;
  168. function OpsEqual(const o1,o2:toper): Boolean;
  169. type
  170. tdfaobj = class
  171. constructor create(_list: TAsmList); virtual;
  172. function pass_1(_blockstart: tai): tai;
  173. function pass_generate_code: boolean;
  174. procedure clear;
  175. function getlabelwithsym(sym: tasmlabel): tai;
  176. private
  177. { asm list we're working on }
  178. list: TAsmList;
  179. { current part of the asm list }
  180. blockstart, blockend: tai;
  181. { the amount of taiObjects in the current part of the assembler list }
  182. nroftaiobjs: longint;
  183. { Array which holds all TtaiProps }
  184. taipropblock: ptaipropblock;
  185. { all labels in the current block: their value mapped to their location }
  186. lolab, hilab, labdif: longint;
  187. labeltable: plabeltable;
  188. { Walks through the list to find the lowest and highest label number, inits the }
  189. { labeltable and fixes/optimizes some regallocs }
  190. procedure initlabeltable;
  191. function initdfapass2: boolean;
  192. procedure dodfapass2;
  193. end;
  194. function FindLabel(L: tasmlabel; var hp: tai): Boolean;
  195. procedure incState(var S: Byte; amount: longint);
  196. {******************************* Variables *******************************}
  197. var
  198. dfa: tdfaobj;
  199. {*********************** end of Interface section ************************}
  200. Implementation
  201. Uses
  202. {$ifdef csdebug}
  203. cutils,
  204. {$else}
  205. {$ifdef statedebug}
  206. cutils,
  207. {$else}
  208. {$ifdef allocregdebug}
  209. cutils,
  210. {$endif}
  211. {$endif}
  212. {$endif}
  213. globals, systems, verbose, symconst, cgobj,procinfo;
  214. Type
  215. TRefCompare = function(const r1, r2: treference; size1, size2: tcgsize): boolean;
  216. var
  217. {How many instructions are between the current instruction and the last one
  218. that modified the register}
  219. NrOfInstrSinceLastMod: TInstrSinceLastMod;
  220. {$ifdef tempOpts}
  221. constructor TSearchLinkedListItem.init;
  222. begin
  223. end;
  224. function TSearchLinkedListItem.equals(p: PSearchLinkedListItem): boolean;
  225. begin
  226. equals := false;
  227. end;
  228. constructor TSearchDoubleIntItem.init(_int1,_int2: longint);
  229. begin
  230. int1 := _int1;
  231. int2 := _int2;
  232. end;
  233. function TSearchDoubleIntItem.equals(p: PSearchLinkedListItem): boolean;
  234. begin
  235. equals := (TSearchDoubleIntItem(p).int1 = int1) and
  236. (TSearchDoubleIntItem(p).int2 = int2);
  237. end;
  238. function TSearchLinkedList.FindByValue(p: PSearchLinkedListItem): boolean;
  239. var temp: PSearchLinkedListItem;
  240. begin
  241. temp := first;
  242. while (temp <> last.next) and
  243. not(temp.equals(p)) do
  244. temp := temp.next;
  245. searchByValue := temp <> last.next;
  246. end;
  247. procedure TSearchLinkedList.removeByValue(p: PSearchLinkedListItem);
  248. begin
  249. temp := first;
  250. while (temp <> last.next) and
  251. not(temp.equals(p)) do
  252. temp := temp.next;
  253. if temp <> last.next then
  254. begin
  255. remove(temp);
  256. dispose(temp,done);
  257. end;
  258. end;
  259. procedure updateTempAllocs(var UsedRegs: TRegSet; p: tai);
  260. {updates UsedRegs with the RegAlloc Information coming after p}
  261. begin
  262. repeat
  263. while assigned(p) and
  264. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  265. ((p.typ = ait_label) and
  266. labelCanBeSkipped(tai_label(current)))) Do
  267. p := tai(p.next);
  268. while assigned(p) and
  269. (p.typ=ait_RegAlloc) Do
  270. begin
  271. case tai_regalloc(p).ratype of
  272. ra_alloc :
  273. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  274. ra_dealloc :
  275. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  276. end;
  277. p := tai(p.next);
  278. end;
  279. until not(assigned(p)) or
  280. (not(p.typ in SkipInstr) and
  281. not((p.typ = ait_label) and
  282. labelCanBeSkipped(tai_label(current))));
  283. end;
  284. {$endif tempOpts}
  285. {************************ Create the Label table ************************}
  286. function findregalloc(supreg: tsuperregister; starttai: tai; ratyp: tregalloctype): boolean;
  287. { Returns true if a ait_alloc object for reg is found in the block of tai's }
  288. { starting with Starttai and ending with the next "real" instruction }
  289. begin
  290. findregalloc := false;
  291. repeat
  292. while assigned(starttai) and
  293. ((starttai.typ in (skipinstr - [ait_regalloc])) or
  294. ((starttai.typ = ait_label) and
  295. labelcanbeskipped(tai_label(starttai)))) do
  296. starttai := tai(starttai.next);
  297. if assigned(starttai) and
  298. (starttai.typ = ait_regalloc) then
  299. begin
  300. if (tai_regalloc(Starttai).ratype = ratyp) and
  301. (getsupreg(tai_regalloc(Starttai).reg) = supreg) then
  302. begin
  303. findregalloc:=true;
  304. break;
  305. end;
  306. starttai := tai(starttai.next);
  307. end
  308. else
  309. break;
  310. until false;
  311. end;
  312. procedure RemoveLastDeallocForFuncRes(asml: TAsmList; p: tai);
  313. procedure DoRemoveLastDeallocForFuncRes(asml: TAsmList; supreg: tsuperregister);
  314. var
  315. hp2: tai;
  316. begin
  317. hp2 := p;
  318. repeat
  319. hp2 := tai(hp2.previous);
  320. if assigned(hp2) and
  321. (hp2.typ = ait_regalloc) and
  322. (tai_regalloc(hp2).ratype=ra_dealloc) and
  323. (getregtype(tai_regalloc(hp2).reg) = R_INTREGISTER) and
  324. (getsupreg(tai_regalloc(hp2).reg) = supreg) then
  325. begin
  326. asml.remove(hp2);
  327. hp2.free;
  328. break;
  329. end;
  330. until not(assigned(hp2)) or regInInstruction(supreg,hp2);
  331. end;
  332. begin
  333. case current_procinfo.procdef.returndef.typ of
  334. arraydef,recorddef,pointerdef,
  335. stringdef,enumdef,procdef,objectdef,errordef,
  336. filedef,setdef,procvardef,
  337. classrefdef,forwarddef:
  338. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  339. orddef:
  340. if current_procinfo.procdef.returndef.size <> 0 then
  341. begin
  342. DoRemoveLastDeallocForFuncRes(asml,RS_EAX);
  343. { for int64/qword }
  344. if current_procinfo.procdef.returndef.size = 8 then
  345. DoRemoveLastDeallocForFuncRes(asml,RS_EDX);
  346. end;
  347. end;
  348. end;
  349. procedure getNoDeallocRegs(var regs: tregset);
  350. var
  351. regCounter: TSuperRegister;
  352. begin
  353. regs := [];
  354. case current_procinfo.procdef.returndef.typ of
  355. arraydef,recorddef,pointerdef,
  356. stringdef,enumdef,procdef,objectdef,errordef,
  357. filedef,setdef,procvardef,
  358. classrefdef,forwarddef:
  359. regs := [RS_EAX];
  360. orddef:
  361. if current_procinfo.procdef.returndef.size <> 0 then
  362. begin
  363. regs := [RS_EAX];
  364. { for int64/qword }
  365. if current_procinfo.procdef.returndef.size = 8 then
  366. regs := regs + [RS_EDX];
  367. end;
  368. end;
  369. for regCounter := RS_EAX to RS_EBX do
  370. { if not(regCounter in rg.usableregsint) then}
  371. include(regs,regcounter);
  372. end;
  373. procedure AddRegDeallocFor(asml: TAsmList; reg: tregister; p: tai);
  374. var
  375. hp1: tai;
  376. funcResRegs: tregset;
  377. { funcResReg: boolean;}
  378. begin
  379. { if not(supreg in rg.usableregsint) then
  380. exit;}
  381. { if not(supreg in [RS_EDI]) then
  382. exit;}
  383. getNoDeallocRegs(funcresregs);
  384. { funcResRegs := funcResRegs - rg.usableregsint;}
  385. { funcResRegs := funcResRegs - [RS_EDI];}
  386. { funcResRegs := funcResRegs - [RS_EAX,RS_EBX,RS_ECX,RS_EDX,RS_ESI]; }
  387. { funcResReg := getsupreg(reg) in funcresregs;}
  388. hp1 := p;
  389. {
  390. while not(funcResReg and
  391. (p.typ = ait_instruction) and
  392. (taicpu(p).opcode = A_JMP) and
  393. (tasmlabel(taicpu(p).oper[0]^.sym) = aktexit2label)) and
  394. getLastInstruction(p, p) and
  395. not(regInInstruction(supreg, p)) do
  396. hp1 := p;
  397. }
  398. { don't insert a dealloc for registers which contain the function result }
  399. { if they are followed by a jump to the exit label (for exit(...)) }
  400. { if not(funcResReg) or
  401. not((hp1.typ = ait_instruction) and
  402. (taicpu(hp1).opcode = A_JMP) and
  403. (tasmlabel(taicpu(hp1).oper[0]^.sym) = aktexit2label)) then }
  404. begin
  405. p := tai_regalloc.deAlloc(reg,nil);
  406. insertLLItem(AsmL, hp1.previous, hp1, p);
  407. end;
  408. end;
  409. {************************ Search the Label table ************************}
  410. function findlabel(l: tasmlabel; var hp: tai): boolean;
  411. {searches for the specified label starting from hp as long as the
  412. encountered instructions are labels, to be able to optimize constructs like
  413. jne l2 jmp l2
  414. jmp l3 and l1:
  415. l1: l2:
  416. l2:}
  417. var
  418. p: tai;
  419. begin
  420. p := hp;
  421. while assigned(p) and
  422. (p.typ in SkipInstr + [ait_label,ait_align]) Do
  423. if (p.typ <> ait_Label) or
  424. (tai_label(p).labsym <> l) then
  425. GetNextInstruction(p, p)
  426. else
  427. begin
  428. hp := p;
  429. findlabel := true;
  430. exit
  431. end;
  432. findlabel := false;
  433. end;
  434. {************************ Some general functions ************************}
  435. function tch2reg(ch: tinschange): tsuperregister;
  436. {converts a TChange variable to a TRegister}
  437. const
  438. ch2reg: array[CH_REAX..CH_REDI] of tsuperregister = (RS_EAX,RS_ECX,RS_EDX,RS_EBX,RS_ESP,RS_EBP,RS_ESI,RS_EDI);
  439. begin
  440. if (ch <= CH_REDI) then
  441. tch2reg := ch2reg[ch]
  442. else if (ch <= CH_WEDI) then
  443. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_REDI))]
  444. else if (ch <= CH_RWEDI) then
  445. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_WEDI))]
  446. else if (ch <= CH_MEDI) then
  447. tch2reg := ch2reg[tinschange(ord(ch) - ord(CH_RWEDI))]
  448. else
  449. InternalError($db)
  450. end;
  451. { inserts new_one between prev and foll }
  452. procedure InsertLLItem(AsmL: TAsmList; prev, foll, new_one: TLinkedListItem);
  453. begin
  454. if assigned(prev) then
  455. if assigned(foll) then
  456. begin
  457. if assigned(new_one) then
  458. begin
  459. new_one.previous := prev;
  460. new_one.next := foll;
  461. prev.next := new_one;
  462. foll.previous := new_one;
  463. { shgould we update line information }
  464. if (not (tai(new_one).typ in SkipLineInfo)) and
  465. (not (tai(foll).typ in SkipLineInfo)) then
  466. tailineinfo(new_one).fileinfo := tailineinfo(foll).fileinfo;
  467. end;
  468. end
  469. else
  470. asml.Concat(new_one)
  471. else
  472. if assigned(foll) then
  473. asml.Insert(new_one)
  474. end;
  475. {********************* Compare parts of tai objects *********************}
  476. function regssamesize(reg1, reg2: tregister): boolean;
  477. {returns true if Reg1 and Reg2 are of the same size (so if they're both
  478. 8bit, 16bit or 32bit)}
  479. begin
  480. if (reg1 = NR_NO) or (reg2 = NR_NO) then
  481. internalerror(2003111602);
  482. regssamesize := getsubreg(reg1) = getsubreg(reg2);
  483. end;
  484. procedure AddReg2RegInfo(OldReg, NewReg: TRegister; var RegInfo: toptreginfo);
  485. {updates the ???RegsEncountered and ???2???reg fields of RegInfo. Assumes that
  486. OldReg and NewReg have the same size (has to be chcked in advance with
  487. RegsSameSize) and that neither equals RS_INVALID}
  488. var
  489. newsupreg, oldsupreg: tsuperregister;
  490. begin
  491. if (newreg = NR_NO) or (oldreg = NR_NO) then
  492. internalerror(2003111601);
  493. newsupreg := getsupreg(newreg);
  494. oldsupreg := getsupreg(oldreg);
  495. with RegInfo Do
  496. begin
  497. NewRegsEncountered := NewRegsEncountered + [newsupreg];
  498. OldRegsEncountered := OldRegsEncountered + [oldsupreg];
  499. New2OldReg[newsupreg] := oldsupreg;
  500. end;
  501. end;
  502. procedure AddOp2RegInfo(const o:toper; var reginfo: toptreginfo);
  503. begin
  504. case o.typ Of
  505. top_reg:
  506. if (o.reg <> NR_NO) then
  507. AddReg2RegInfo(o.reg, o.reg, RegInfo);
  508. top_ref:
  509. begin
  510. if o.ref^.base <> NR_NO then
  511. AddReg2RegInfo(o.ref^.base, o.ref^.base, RegInfo);
  512. if o.ref^.index <> NR_NO then
  513. AddReg2RegInfo(o.ref^.index, o.ref^.index, RegInfo);
  514. end;
  515. end;
  516. end;
  517. function RegsEquivalent(oldreg, newreg: tregister; const oldinst, newinst: taicpu; var reginfo: toptreginfo; opact: topaction): Boolean;
  518. begin
  519. if not((oldreg = NR_NO) or (newreg = NR_NO)) then
  520. if RegsSameSize(oldreg, newreg) then
  521. with reginfo do
  522. {here we always check for the 32 bit component, because it is possible that
  523. the 8 bit component has not been set, event though NewReg already has been
  524. processed. This happens if it has been compared with a register that doesn't
  525. have an 8 bit component (such as EDI). in that case the 8 bit component is
  526. still set to RS_NO and the comparison in the else-part will fail}
  527. if (getsupreg(oldReg) in OldRegsEncountered) then
  528. if (getsupreg(NewReg) in NewRegsEncountered) then
  529. RegsEquivalent := (getsupreg(oldreg) = New2OldReg[getsupreg(newreg)])
  530. { if we haven't encountered the new register yet, but we have encountered the
  531. old one already, the new one can only be correct if it's being written to
  532. (and consequently the old one is also being written to), otherwise
  533. movl -8(%ebp), %eax and movl -8(%ebp), %eax
  534. movl (%eax), %eax movl (%edx), %edx
  535. are considered equivalent}
  536. else
  537. if (opact = opact_write) then
  538. begin
  539. AddReg2RegInfo(oldreg, newreg, reginfo);
  540. RegsEquivalent := true
  541. end
  542. else
  543. Regsequivalent := false
  544. else
  545. if not(getsupreg(newreg) in NewRegsEncountered) and
  546. ((opact = opact_write) or
  547. ((newreg = oldreg) and
  548. (ptaiprop(oldinst.optinfo)^.regs[getsupreg(oldreg)].wstate =
  549. ptaiprop(newinst.optinfo)^.regs[getsupreg(oldreg)].wstate) and
  550. not(regmodifiedbyinstruction(getsupreg(oldreg),oldinst)))) then
  551. begin
  552. AddReg2RegInfo(oldreg, newreg, reginfo);
  553. RegsEquivalent := true
  554. end
  555. else
  556. RegsEquivalent := false
  557. else
  558. RegsEquivalent := false
  559. else
  560. RegsEquivalent := oldreg = newreg
  561. end;
  562. function RefsEquivalent(const r1, r2: treference; const oldinst, newinst: taicpu; var regInfo: toptreginfo): boolean;
  563. begin
  564. RefsEquivalent :=
  565. (r1.offset = r2.offset) and
  566. RegsEquivalent(r1.base, r2.base, oldinst, newinst, reginfo, OpAct_Read) and
  567. RegsEquivalent(r1.index, r2.index, oldinst, newinst, reginfo, OpAct_Read) and
  568. (r1.segment = r2.segment) and (r1.scalefactor = r2.scalefactor) and
  569. (r1.symbol = r2.symbol) and (r1.refaddr = r2.refaddr) and
  570. (r1.relsymbol = r2.relsymbol);
  571. end;
  572. function refsequal(const r1, r2: treference): boolean;
  573. begin
  574. refsequal :=
  575. (r1.offset = r2.offset) and
  576. (r1.segment = r2.segment) and (r1.base = r2.base) and
  577. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  578. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  579. (r1.relsymbol = r2.relsymbol);
  580. end;
  581. {$push}
  582. {$q-}
  583. // checks whether a write to r2 of size "size" contains address r1
  584. function refsoverlapping(const r1, r2: treference; size1, size2: tcgsize): boolean;
  585. var
  586. realsize1, realsize2: aint;
  587. begin
  588. realsize1 := tcgsize2size[size1];
  589. realsize2 := tcgsize2size[size2];
  590. refsoverlapping :=
  591. (r2.offset <= r1.offset+realsize1) and
  592. (r1.offset <= r2.offset+realsize2) and
  593. (r1.segment = r2.segment) and (r1.base = r2.base) and
  594. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  595. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  596. (r1.relsymbol = r2.relsymbol);
  597. end;
  598. {$pop}
  599. function isgp32reg(supreg: tsuperregister): boolean;
  600. {Checks if the register is a 32 bit general purpose register}
  601. begin
  602. isgp32reg := false;
  603. {$push}{$warnings off}
  604. if (supreg >= RS_EAX) and (supreg <= RS_EBX) then
  605. isgp32reg := true
  606. {$pop}
  607. end;
  608. function reginref(supreg: tsuperregister; const ref: treference): boolean;
  609. begin {checks whether ref contains a reference to reg}
  610. reginref :=
  611. ((ref.base <> NR_NO) and
  612. (getsupreg(ref.base) = supreg)) or
  613. ((ref.index <> NR_NO) and
  614. (getsupreg(ref.index) = supreg))
  615. end;
  616. function RegReadByInstruction(supreg: tsuperregister; hp: tai): boolean;
  617. var
  618. p: taicpu;
  619. opcount: longint;
  620. begin
  621. RegReadByInstruction := false;
  622. if hp.typ <> ait_instruction then
  623. exit;
  624. p := taicpu(hp);
  625. case p.opcode of
  626. A_CALL:
  627. regreadbyinstruction := true;
  628. A_IMUL:
  629. case p.ops of
  630. 1:
  631. regReadByInstruction :=
  632. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  633. 2,3:
  634. regReadByInstruction :=
  635. reginop(supreg,p.oper[0]^) or
  636. reginop(supreg,p.oper[1]^);
  637. end;
  638. A_IDIV,A_DIV,A_MUL:
  639. begin
  640. regReadByInstruction :=
  641. reginop(supreg,p.oper[0]^) or (supreg in [RS_EAX,RS_EDX]);
  642. end;
  643. else
  644. begin
  645. for opcount := 0 to p.ops-1 do
  646. if (p.oper[opCount]^.typ = top_ref) and
  647. reginref(supreg,p.oper[opcount]^.ref^) then
  648. begin
  649. RegReadByInstruction := true;
  650. exit
  651. end;
  652. for opcount := 1 to maxinschanges do
  653. case insprop[p.opcode].ch[opcount] of
  654. CH_REAX..CH_REDI,CH_RWEAX..CH_MEDI:
  655. if supreg = tch2reg(insprop[p.opcode].ch[opcount]) then
  656. begin
  657. RegReadByInstruction := true;
  658. exit
  659. end;
  660. CH_RWOP1,CH_ROP1,CH_MOP1:
  661. if //(p.oper[0]^.typ = top_reg) and
  662. reginop(supreg,p.oper[0]^) then
  663. begin
  664. RegReadByInstruction := true;
  665. exit
  666. end;
  667. Ch_RWOP2,Ch_ROP2,Ch_MOP2:
  668. if //(p.oper[1]^.typ = top_reg) and
  669. reginop(supreg,p.oper[1]^) then
  670. begin
  671. RegReadByInstruction := true;
  672. exit
  673. end;
  674. Ch_RWOP3,Ch_ROP3,Ch_MOP3:
  675. if //(p.oper[2]^.typ = top_reg) and
  676. reginop(supreg,p.oper[2]^) then
  677. begin
  678. RegReadByInstruction := true;
  679. exit
  680. end;
  681. end;
  682. end;
  683. end;
  684. end;
  685. function regInInstruction(supreg: tsuperregister; p1: tai): boolean;
  686. { Checks if reg is used by the instruction p1 }
  687. { Difference with "regReadBysinstruction() or regModifiedByInstruction()": }
  688. { this one ignores CH_ALL opcodes, while regModifiedByInstruction doesn't }
  689. var
  690. p: taicpu;
  691. opcount: longint;
  692. begin
  693. regInInstruction := false;
  694. if p1.typ <> ait_instruction then
  695. exit;
  696. p := taicpu(p1);
  697. case p.opcode of
  698. A_CALL:
  699. regininstruction := true;
  700. A_IMUL:
  701. case p.ops of
  702. 1:
  703. regInInstruction :=
  704. (supreg = RS_EAX) or reginop(supreg,p.oper[0]^);
  705. 2,3:
  706. regInInstruction :=
  707. reginop(supreg,p.oper[0]^) or
  708. reginop(supreg,p.oper[1]^) or
  709. (assigned(p.oper[2]) and
  710. reginop(supreg,p.oper[2]^));
  711. end;
  712. A_IDIV,A_DIV,A_MUL:
  713. regInInstruction :=
  714. reginop(supreg,p.oper[0]^) or
  715. (supreg in [RS_EAX,RS_EDX])
  716. else
  717. begin
  718. for opcount := 0 to p.ops-1 do
  719. if (p.oper[opCount]^.typ = top_ref) and
  720. reginref(supreg,p.oper[opcount]^.ref^) then
  721. begin
  722. regInInstruction := true;
  723. exit
  724. end;
  725. for opcount := 1 to maxinschanges do
  726. case insprop[p.opcode].Ch[opCount] of
  727. CH_REAX..CH_MEDI:
  728. if tch2reg(InsProp[p.opcode].Ch[opCount]) = supreg then
  729. begin
  730. regInInstruction := true;
  731. exit;
  732. end;
  733. CH_ROp1..CH_MOp1:
  734. if reginop(supreg,p.oper[0]^) then
  735. begin
  736. regInInstruction := true;
  737. exit
  738. end;
  739. Ch_ROp2..Ch_MOp2:
  740. if reginop(supreg,p.oper[1]^) then
  741. begin
  742. regInInstruction := true;
  743. exit
  744. end;
  745. Ch_ROp3..Ch_MOp3:
  746. if reginop(supreg,p.oper[2]^) then
  747. begin
  748. regInInstruction := true;
  749. exit
  750. end;
  751. end;
  752. end;
  753. end;
  754. end;
  755. function reginop(supreg: tsuperregister; const o:toper): boolean;
  756. begin
  757. reginop := false;
  758. case o.typ Of
  759. top_reg:
  760. reginop :=
  761. (getregtype(o.reg) = R_INTREGISTER) and
  762. (supreg = getsupreg(o.reg));
  763. top_ref:
  764. reginop :=
  765. ((o.ref^.base <> NR_NO) and
  766. (supreg = getsupreg(o.ref^.base))) or
  767. ((o.ref^.index <> NR_NO) and
  768. (supreg = getsupreg(o.ref^.index)));
  769. end;
  770. end;
  771. function RegModifiedByInstruction(supreg: tsuperregister; p1: tai): boolean;
  772. var
  773. InstrProp: TInsProp;
  774. TmpResult: Boolean;
  775. Cnt: Word;
  776. begin
  777. TmpResult := False;
  778. if supreg = RS_INVALID then
  779. exit;
  780. if (p1.typ = ait_instruction) then
  781. case taicpu(p1).opcode of
  782. A_IMUL:
  783. With taicpu(p1) Do
  784. TmpResult :=
  785. ((ops = 1) and (supreg in [RS_EAX,RS_EDX])) or
  786. ((ops = 2) and (getsupreg(oper[1]^.reg) = supreg)) or
  787. ((ops = 3) and (getsupreg(oper[2]^.reg) = supreg));
  788. A_DIV, A_IDIV, A_MUL:
  789. With taicpu(p1) Do
  790. TmpResult :=
  791. (supreg in [RS_EAX,RS_EDX]);
  792. else
  793. begin
  794. Cnt := 1;
  795. InstrProp := InsProp[taicpu(p1).OpCode];
  796. while (Cnt <= maxinschanges) and
  797. (InstrProp.Ch[Cnt] <> Ch_None) and
  798. not(TmpResult) Do
  799. begin
  800. case InstrProp.Ch[Cnt] Of
  801. Ch_WEAX..Ch_MEDI:
  802. TmpResult := supreg = tch2reg(InstrProp.Ch[Cnt]);
  803. Ch_RWOp1,Ch_WOp1,Ch_Mop1:
  804. TmpResult := (taicpu(p1).oper[0]^.typ = top_reg) and
  805. reginop(supreg,taicpu(p1).oper[0]^);
  806. Ch_RWOp2,Ch_WOp2,Ch_Mop2:
  807. TmpResult := (taicpu(p1).oper[1]^.typ = top_reg) and
  808. reginop(supreg,taicpu(p1).oper[1]^);
  809. Ch_RWOp3,Ch_WOp3,Ch_Mop3:
  810. TmpResult := (taicpu(p1).oper[2]^.typ = top_reg) and
  811. reginop(supreg,taicpu(p1).oper[2]^);
  812. Ch_FPU: TmpResult := false; // supreg is supposed to be an intreg!! supreg in [RS_ST..RS_ST7,RS_MM0..RS_MM7];
  813. Ch_ALL: TmpResult := true;
  814. end;
  815. inc(Cnt)
  816. end
  817. end
  818. end;
  819. RegModifiedByInstruction := TmpResult
  820. end;
  821. function instrWritesFlags(p: tai): boolean;
  822. var
  823. l: longint;
  824. begin
  825. instrWritesFlags := true;
  826. case p.typ of
  827. ait_instruction:
  828. begin
  829. for l := 1 to maxinschanges do
  830. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_WFlags,Ch_RWFlags,Ch_All] then
  831. exit;
  832. end;
  833. ait_label:
  834. exit;
  835. end;
  836. instrWritesFlags := false;
  837. end;
  838. function instrReadsFlags(p: tai): boolean;
  839. var
  840. l: longint;
  841. begin
  842. instrReadsFlags := true;
  843. case p.typ of
  844. ait_instruction:
  845. begin
  846. for l := 1 to maxinschanges do
  847. if InsProp[taicpu(p).opcode].Ch[l] in [Ch_RFlags,Ch_RWFlags,Ch_All] then
  848. exit;
  849. end;
  850. ait_label:
  851. exit;
  852. end;
  853. instrReadsFlags := false;
  854. end;
  855. {********************* GetNext and GetLastInstruction *********************}
  856. function GetNextInstruction(Current: tai; var Next: tai): Boolean;
  857. { skips ait_regalloc, ait_regdealloc and ait_stab* objects and puts the }
  858. { next tai object in Next. Returns false if there isn't any }
  859. begin
  860. repeat
  861. if (Current.typ = ait_marker) and
  862. (tai_Marker(current).Kind = mark_AsmBlockStart) then
  863. begin
  864. GetNextInstruction := False;
  865. Next := Nil;
  866. Exit
  867. end;
  868. Current := tai(current.Next);
  869. while assigned(Current) and
  870. ((current.typ in skipInstr) or
  871. ((current.typ = ait_label) and
  872. labelCanBeSkipped(tai_label(current)))) do
  873. Current := tai(current.Next);
  874. { if assigned(Current) and
  875. (current.typ = ait_Marker) and
  876. (tai_Marker(current).Kind = mark_NoPropInfoStart) then
  877. begin
  878. while assigned(Current) and
  879. ((current.typ <> ait_Marker) or
  880. (tai_Marker(current).Kind <> mark_NoPropInfoEnd)) Do
  881. Current := tai(current.Next);
  882. end;}
  883. until not(assigned(Current)) or
  884. (current.typ <> ait_Marker) or
  885. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  886. Next := Current;
  887. if assigned(Current) and
  888. not((current.typ in SkipInstr) or
  889. ((current.typ = ait_label) and
  890. labelCanBeSkipped(tai_label(current))))
  891. then
  892. GetNextInstruction :=
  893. not((current.typ = ait_marker) and
  894. (tai_marker(current).kind = mark_AsmBlockStart))
  895. else
  896. begin
  897. GetNextInstruction := False;
  898. Next := nil;
  899. end;
  900. end;
  901. function GetLastInstruction(Current: tai; var Last: tai): boolean;
  902. {skips the ait-types in SkipInstr puts the previous tai object in
  903. Last. Returns false if there isn't any}
  904. begin
  905. repeat
  906. Current := tai(current.previous);
  907. while assigned(Current) and
  908. (((current.typ = ait_Marker) and
  909. not(tai_Marker(current).Kind in [mark_AsmBlockEnd{,mark_NoPropInfoEnd}])) or
  910. (current.typ in SkipInstr) or
  911. ((current.typ = ait_label) and
  912. labelCanBeSkipped(tai_label(current)))) Do
  913. Current := tai(current.previous);
  914. { if assigned(Current) and
  915. (current.typ = ait_Marker) and
  916. (tai_Marker(current).Kind = mark_NoPropInfoEnd) then
  917. begin
  918. while assigned(Current) and
  919. ((current.typ <> ait_Marker) or
  920. (tai_Marker(current).Kind <> mark_NoPropInfoStart)) Do
  921. Current := tai(current.previous);
  922. end;}
  923. until not(assigned(Current)) or
  924. (current.typ <> ait_Marker) or
  925. not(tai_Marker(current).Kind in [mark_NoPropInfoStart,mark_NoPropInfoEnd]);
  926. if not(assigned(Current)) or
  927. (current.typ in SkipInstr) or
  928. ((current.typ = ait_label) and
  929. labelCanBeSkipped(tai_label(current))) or
  930. ((current.typ = ait_Marker) and
  931. (tai_Marker(current).Kind = mark_AsmBlockEnd))
  932. then
  933. begin
  934. Last := nil;
  935. GetLastInstruction := False
  936. end
  937. else
  938. begin
  939. Last := Current;
  940. GetLastInstruction := True;
  941. end;
  942. end;
  943. procedure SkipHead(var p: tai);
  944. var
  945. oldp: tai;
  946. begin
  947. repeat
  948. oldp := p;
  949. if (p.typ in SkipInstr) or
  950. ((p.typ = ait_marker) and
  951. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd])) then
  952. GetNextInstruction(p,p)
  953. else if ((p.Typ = Ait_Marker) and
  954. (tai_Marker(p).Kind = mark_NoPropInfoStart)) then
  955. {a marker of the mark_NoPropInfoStart can't be the first instruction of a
  956. TAsmList list}
  957. GetNextInstruction(tai(p.previous),p);
  958. until p = oldp
  959. end;
  960. function labelCanBeSkipped(p: tai_label): boolean;
  961. begin
  962. labelCanBeSkipped := not(p.labsym.is_used) or (p.labsym.labeltype<>alt_jump);
  963. end;
  964. {******************* The Data Flow Analyzer functions ********************}
  965. function regLoadedWithNewValue(supreg: tsuperregister; canDependOnPrevValue: boolean;
  966. hp: tai): boolean;
  967. { assumes reg is a 32bit register }
  968. var
  969. p: taicpu;
  970. begin
  971. if not assigned(hp) or
  972. (hp.typ <> ait_instruction) then
  973. begin
  974. regLoadedWithNewValue := false;
  975. exit;
  976. end;
  977. p := taicpu(hp);
  978. regLoadedWithNewValue :=
  979. (((p.opcode = A_MOV) or
  980. (p.opcode = A_MOVZX) or
  981. (p.opcode = A_MOVSX) or
  982. (p.opcode = A_LEA)) and
  983. (p.oper[1]^.typ = top_reg) and
  984. (getsupreg(p.oper[1]^.reg) = supreg) and
  985. (canDependOnPrevValue or
  986. (p.oper[0]^.typ = top_const) or
  987. ((p.oper[0]^.typ = top_reg) and
  988. (getsupreg(p.oper[0]^.reg) <> supreg)) or
  989. ((p.oper[0]^.typ = top_ref) and
  990. not regInRef(supreg,p.oper[0]^.ref^)))) or
  991. ((p.opcode = A_POP) and
  992. (getsupreg(p.oper[0]^.reg) = supreg));
  993. end;
  994. procedure UpdateUsedRegs(var UsedRegs: TRegSet; p: tai);
  995. {updates UsedRegs with the RegAlloc Information coming after p}
  996. begin
  997. repeat
  998. while assigned(p) and
  999. ((p.typ in (SkipInstr - [ait_RegAlloc])) or
  1000. ((p.typ = ait_label) and
  1001. labelCanBeSkipped(tai_label(p))) or
  1002. ((p.typ = ait_marker) and
  1003. (tai_Marker(p).Kind in [mark_AsmBlockEnd,mark_NoLineInfoStart,mark_NoLineInfoEnd]))) do
  1004. p := tai(p.next);
  1005. while assigned(p) and
  1006. (p.typ=ait_RegAlloc) Do
  1007. begin
  1008. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1009. begin
  1010. case tai_regalloc(p).ratype of
  1011. ra_alloc :
  1012. Include(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1013. ra_dealloc :
  1014. Exclude(UsedRegs, TRegEnum(getsupreg(tai_regalloc(p).reg)));
  1015. end;
  1016. end;
  1017. p := tai(p.next);
  1018. end;
  1019. until not(assigned(p)) or
  1020. (not(p.typ in SkipInstr) and
  1021. not((p.typ = ait_label) and
  1022. labelCanBeSkipped(tai_label(p))));
  1023. end;
  1024. procedure AllocRegBetween(asml: TAsmList; reg: tregister; p1, p2: tai; var initialusedregs: tregset);
  1025. { allocates register reg between (and including) instructions p1 and p2 }
  1026. { the type of p1 and p2 must not be in SkipInstr }
  1027. { note that this routine is both called from the peephole optimizer }
  1028. { where optinfo is not yet initialised) and from the cse (where it is) }
  1029. var
  1030. hp, start: tai;
  1031. removedsomething,
  1032. firstRemovedWasAlloc,
  1033. lastRemovedWasDealloc: boolean;
  1034. supreg: tsuperregister;
  1035. begin
  1036. {$ifdef EXTDEBUG}
  1037. if assigned(p1.optinfo) and
  1038. (ptaiprop(p1.optinfo)^.usedregs <> initialusedregs) then
  1039. internalerror(2004101010);
  1040. {$endif EXTDEBUG}
  1041. start := p1;
  1042. if (reg = NR_ESP) or
  1043. (reg = current_procinfo.framepointer) or
  1044. not(assigned(p1)) then
  1045. { this happens with registers which are loaded implicitely, outside the }
  1046. { current block (e.g. esi with self) }
  1047. exit;
  1048. supreg := getsupreg(reg);
  1049. { make sure we allocate it for this instruction }
  1050. getnextinstruction(p2,p2);
  1051. lastRemovedWasDealloc := false;
  1052. removedSomething := false;
  1053. firstRemovedWasAlloc := false;
  1054. {$ifdef allocregdebug}
  1055. hp := tai_comment.Create(strpnew('allocating '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1056. ' from here...'));
  1057. insertllitem(asml,p1.previous,p1,hp);
  1058. hp := tai_comment.Create(strpnew('allocated '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+
  1059. ' till here...'));
  1060. insertllitem(asml,p2,p2.next,hp);
  1061. {$endif allocregdebug}
  1062. if not(supreg in initialusedregs) then
  1063. begin
  1064. hp := tai_regalloc.alloc(reg,nil);
  1065. insertllItem(asmL,p1.previous,p1,hp);
  1066. include(initialusedregs,supreg);
  1067. end;
  1068. while assigned(p1) and
  1069. (p1 <> p2) do
  1070. begin
  1071. if assigned(p1.optinfo) then
  1072. include(ptaiprop(p1.optinfo)^.usedregs,supreg);
  1073. p1 := tai(p1.next);
  1074. repeat
  1075. while assigned(p1) and
  1076. (p1.typ in (SkipInstr-[ait_regalloc])) Do
  1077. p1 := tai(p1.next);
  1078. { remove all allocation/deallocation info about the register in between }
  1079. if assigned(p1) and
  1080. (p1.typ = ait_regalloc) then
  1081. if (getsupreg(tai_regalloc(p1).reg) = supreg) then
  1082. begin
  1083. if not removedSomething then
  1084. begin
  1085. firstRemovedWasAlloc := tai_regalloc(p1).ratype=ra_alloc;
  1086. removedSomething := true;
  1087. end;
  1088. lastRemovedWasDealloc := (tai_regalloc(p1).ratype=ra_dealloc);
  1089. hp := tai(p1.Next);
  1090. asml.Remove(p1);
  1091. p1.free;
  1092. p1 := hp;
  1093. end
  1094. else p1 := tai(p1.next);
  1095. until not(assigned(p1)) or
  1096. not(p1.typ in SkipInstr);
  1097. end;
  1098. if assigned(p1) then
  1099. begin
  1100. if firstRemovedWasAlloc then
  1101. begin
  1102. hp := tai_regalloc.Alloc(reg,nil);
  1103. insertLLItem(asmL,start.previous,start,hp);
  1104. end;
  1105. if lastRemovedWasDealloc then
  1106. begin
  1107. hp := tai_regalloc.DeAlloc(reg,nil);
  1108. insertLLItem(asmL,p1.previous,p1,hp);
  1109. end;
  1110. end;
  1111. end;
  1112. function FindRegDealloc(supreg: tsuperregister; p: tai): boolean;
  1113. var
  1114. hp: tai;
  1115. first: boolean;
  1116. begin
  1117. findregdealloc := false;
  1118. first := true;
  1119. while assigned(p.previous) and
  1120. ((tai(p.previous).typ in (skipinstr+[ait_align])) or
  1121. ((tai(p.previous).typ = ait_label) and
  1122. labelCanBeSkipped(tai_label(p.previous)))) do
  1123. begin
  1124. p := tai(p.previous);
  1125. if (p.typ = ait_regalloc) and
  1126. (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) and
  1127. (getsupreg(tai_regalloc(p).reg) = supreg) then
  1128. if (tai_regalloc(p).ratype=ra_dealloc) then
  1129. if first then
  1130. begin
  1131. findregdealloc := true;
  1132. break;
  1133. end
  1134. else
  1135. begin
  1136. findRegDealloc :=
  1137. getNextInstruction(p,hp) and
  1138. regLoadedWithNewValue(supreg,false,hp);
  1139. break
  1140. end
  1141. else
  1142. first := false;
  1143. end
  1144. end;
  1145. procedure incState(var S: Byte; amount: longint);
  1146. {increases S by 1, wraps around at $ffff to 0 (so we won't get overflow
  1147. errors}
  1148. begin
  1149. if (s <= $ff - amount) then
  1150. inc(s, amount)
  1151. else s := longint(s) + amount - $ff;
  1152. end;
  1153. function sequenceDependsonReg(const Content: TContent; seqreg: tsuperregister; supreg: tsuperregister): Boolean;
  1154. { Content is the sequence of instructions that describes the contents of }
  1155. { seqReg. reg is being overwritten by the current instruction. if the }
  1156. { content of seqReg depends on reg (ie. because of a }
  1157. { "movl (seqreg,reg), seqReg" instruction), this function returns true }
  1158. var
  1159. p: tai;
  1160. Counter: Word;
  1161. TmpResult: Boolean;
  1162. RegsChecked: TRegSet;
  1163. begin
  1164. RegsChecked := [];
  1165. p := Content.StartMod;
  1166. TmpResult := False;
  1167. Counter := 1;
  1168. while not(TmpResult) and
  1169. (Counter <= Content.NrOfMods) Do
  1170. begin
  1171. if (p.typ = ait_instruction) and
  1172. ((taicpu(p).opcode = A_MOV) or
  1173. (taicpu(p).opcode = A_MOVZX) or
  1174. (taicpu(p).opcode = A_MOVSX) or
  1175. (taicpu(p).opcode = A_LEA)) and
  1176. (taicpu(p).oper[0]^.typ = top_ref) then
  1177. With taicpu(p).oper[0]^.ref^ Do
  1178. if ((base = current_procinfo.FramePointer) or
  1179. (assigned(symbol) and (base = NR_NO))) and
  1180. (index = NR_NO) then
  1181. begin
  1182. RegsChecked := RegsChecked + [getsupreg(taicpu(p).oper[1]^.reg)];
  1183. if supreg = getsupreg(taicpu(p).oper[1]^.reg) then
  1184. break;
  1185. end
  1186. else
  1187. tmpResult :=
  1188. regReadByInstruction(supreg,p) and
  1189. regModifiedByInstruction(seqReg,p)
  1190. else
  1191. tmpResult :=
  1192. regReadByInstruction(supreg,p) and
  1193. regModifiedByInstruction(seqReg,p);
  1194. inc(Counter);
  1195. GetNextInstruction(p,p)
  1196. end;
  1197. sequenceDependsonReg := TmpResult
  1198. end;
  1199. procedure invalidateDependingRegs(p1: ptaiprop; supreg: tsuperregister);
  1200. var
  1201. counter: tsuperregister;
  1202. begin
  1203. for counter := RS_EAX to RS_EDI do
  1204. if counter <> supreg then
  1205. with p1^.regs[counter] Do
  1206. begin
  1207. if (typ in [con_ref,con_noRemoveRef]) and
  1208. sequenceDependsOnReg(p1^.Regs[counter],counter,supreg) then
  1209. if typ in [con_ref, con_invalid] then
  1210. typ := con_invalid
  1211. { con_noRemoveRef = con_unknown }
  1212. else
  1213. typ := con_unknown;
  1214. if assigned(memwrite) and
  1215. regInRef(counter,memwrite.oper[1]^.ref^) then
  1216. memwrite := nil;
  1217. end;
  1218. end;
  1219. procedure DestroyReg(p1: ptaiprop; supreg: tsuperregister; doincState:Boolean);
  1220. {Destroys the contents of the register reg in the ptaiprop p1, as well as the
  1221. contents of registers are loaded with a memory location based on reg.
  1222. doincState is false when this register has to be destroyed not because
  1223. it's contents are directly modified/overwritten, but because of an indirect
  1224. action (e.g. this register holds the contents of a variable and the value
  1225. of the variable in memory is changed) }
  1226. begin
  1227. {$push}{$warnings off}
  1228. { the following happens for fpu registers }
  1229. if (supreg < low(NrOfInstrSinceLastMod)) or
  1230. (supreg > high(NrOfInstrSinceLastMod)) then
  1231. exit;
  1232. {$pop}
  1233. NrOfInstrSinceLastMod[supreg] := 0;
  1234. with p1^.regs[supreg] do
  1235. begin
  1236. if doincState then
  1237. begin
  1238. incState(wstate,1);
  1239. typ := con_unknown;
  1240. startmod := nil;
  1241. end
  1242. else
  1243. if typ in [con_ref,con_const,con_invalid] then
  1244. typ := con_invalid
  1245. { con_noRemoveRef = con_unknown }
  1246. else
  1247. typ := con_unknown;
  1248. memwrite := nil;
  1249. end;
  1250. invalidateDependingRegs(p1,supreg);
  1251. end;
  1252. {procedure AddRegsToSet(p: tai; var RegSet: TRegSet);
  1253. begin
  1254. if (p.typ = ait_instruction) then
  1255. begin
  1256. case taicpu(p).oper[0]^.typ Of
  1257. top_reg:
  1258. if not(taicpu(p).oper[0]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1259. RegSet := RegSet + [taicpu(p).oper[0]^.reg];
  1260. top_ref:
  1261. With TReference(taicpu(p).oper[0]^) Do
  1262. begin
  1263. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1264. then RegSet := RegSet + [base];
  1265. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1266. then RegSet := RegSet + [index];
  1267. end;
  1268. end;
  1269. case taicpu(p).oper[1]^.typ Of
  1270. top_reg:
  1271. if not(taicpu(p).oper[1]^.reg in [RS_NO,RS_ESP,current_procinfo.FramePointer]) then
  1272. if RegSet := RegSet + [TRegister(TwoWords(taicpu(p).oper[1]^).Word1];
  1273. top_ref:
  1274. With TReference(taicpu(p).oper[1]^) Do
  1275. begin
  1276. if not(base in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1277. then RegSet := RegSet + [base];
  1278. if not(index in [current_procinfo.FramePointer,RS_NO,RS_ESP])
  1279. then RegSet := RegSet + [index];
  1280. end;
  1281. end;
  1282. end;
  1283. end;}
  1284. function OpsEquivalent(const o1, o2: toper; const oldinst, newinst: taicpu; var RegInfo: toptreginfo; OpAct: TopAction): Boolean;
  1285. begin {checks whether the two ops are equivalent}
  1286. OpsEquivalent := False;
  1287. if o1.typ=o2.typ then
  1288. case o1.typ Of
  1289. top_reg:
  1290. OpsEquivalent :=RegsEquivalent(o1.reg,o2.reg, oldinst, newinst, RegInfo, OpAct);
  1291. top_ref:
  1292. OpsEquivalent := RefsEquivalent(o1.ref^, o2.ref^, oldinst, newinst, RegInfo);
  1293. Top_Const:
  1294. OpsEquivalent := o1.val = o2.val;
  1295. Top_None:
  1296. OpsEquivalent := True
  1297. end;
  1298. end;
  1299. function OpsEqual(const o1,o2:toper): Boolean;
  1300. begin {checks whether the two ops are equal}
  1301. OpsEqual := False;
  1302. if o1.typ=o2.typ then
  1303. case o1.typ Of
  1304. top_reg :
  1305. OpsEqual:=o1.reg=o2.reg;
  1306. top_ref :
  1307. OpsEqual := RefsEqual(o1.ref^, o2.ref^);
  1308. Top_Const :
  1309. OpsEqual:=o1.val=o2.val;
  1310. Top_None :
  1311. OpsEqual := True
  1312. end;
  1313. end;
  1314. function sizescompatible(loadsize,newsize: topsize): boolean;
  1315. begin
  1316. case loadsize of
  1317. S_B,S_BW,S_BL:
  1318. sizescompatible := (newsize = loadsize) or (newsize = S_B);
  1319. S_W,S_WL:
  1320. sizescompatible := (newsize = loadsize) or (newsize = S_W);
  1321. else
  1322. sizescompatible := newsize = S_L;
  1323. end;
  1324. end;
  1325. function opscompatible(p1,p2: taicpu): boolean;
  1326. begin
  1327. case p1.opcode of
  1328. A_MOVZX,A_MOVSX:
  1329. opscompatible :=
  1330. ((p2.opcode = p1.opcode) or (p2.opcode = A_MOV)) and
  1331. sizescompatible(p1.opsize,p2.opsize);
  1332. else
  1333. opscompatible :=
  1334. (p1.opcode = p2.opcode) and
  1335. (p1.ops = p2.ops) and
  1336. (p1.opsize = p2.opsize);
  1337. end;
  1338. end;
  1339. function InstructionsEquivalent(p1, p2: tai; var RegInfo: toptreginfo): Boolean;
  1340. {$ifdef csdebug}
  1341. var
  1342. hp: tai;
  1343. {$endif csdebug}
  1344. begin {checks whether two taicpu instructions are equal}
  1345. if assigned(p1) and assigned(p2) and
  1346. (tai(p1).typ = ait_instruction) and
  1347. (tai(p2).typ = ait_instruction) and
  1348. opscompatible(taicpu(p1),taicpu(p2)) and
  1349. (not(assigned(taicpu(p1).oper[0])) or
  1350. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ)) and
  1351. (not(assigned(taicpu(p1).oper[1])) or
  1352. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ)) and
  1353. (not(assigned(taicpu(p1).oper[2])) or
  1354. (taicpu(p1).oper[2]^.typ = taicpu(p2).oper[2]^.typ)) then
  1355. {both instructions have the same structure:
  1356. "<operator> <operand of type1>, <operand of type 2>"}
  1357. if ((taicpu(p1).opcode = A_MOV) or
  1358. (taicpu(p1).opcode = A_MOVZX) or
  1359. (taicpu(p1).opcode = A_MOVSX) or
  1360. (taicpu(p1).opcode = A_LEA)) and
  1361. (taicpu(p1).oper[0]^.typ = top_ref) {then .oper[1]^t = top_reg} then
  1362. if not(RegInRef(getsupreg(taicpu(p1).oper[1]^.reg), taicpu(p1).oper[0]^.ref^)) then
  1363. {the "old" instruction is a load of a register with a new value, not with
  1364. a value based on the contents of this register (so no "mov (reg), reg")}
  1365. if not(RegInRef(getsupreg(taicpu(p2).oper[1]^.reg), taicpu(p2).oper[0]^.ref^)) and
  1366. RefsEquivalent(taicpu(p1).oper[0]^.ref^, taicpu(p2).oper[0]^.ref^,taicpu(p1), taicpu(p2), reginfo) then
  1367. {the "new" instruction is also a load of a register with a new value, and
  1368. this value is fetched from the same memory location}
  1369. begin
  1370. With taicpu(p2).oper[0]^.ref^ Do
  1371. begin
  1372. if (base <> NR_NO) and
  1373. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1374. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1375. if (index <> NR_NO) and
  1376. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer), RS_ESP])) then
  1377. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1378. end;
  1379. {add the registers from the reference (.oper[0]^) to the RegInfo, all registers
  1380. from the reference are the same in the old and in the new instruction
  1381. sequence}
  1382. AddOp2RegInfo(taicpu(p1).oper[0]^, RegInfo);
  1383. {the registers from .oper[1]^ have to be equivalent, but not necessarily equal}
  1384. InstructionsEquivalent :=
  1385. RegsEquivalent(taicpu(p1).oper[1]^.reg,
  1386. taicpu(p2).oper[1]^.reg, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write);
  1387. end
  1388. {the registers are loaded with values from different memory locations. if
  1389. this was allowed, the instructions "mov -4(esi),eax" and "mov -4(ebp),eax"
  1390. would be considered equivalent}
  1391. else
  1392. InstructionsEquivalent := False
  1393. else
  1394. {load register with a value based on the current value of this register}
  1395. begin
  1396. With taicpu(p2).oper[0]^.ref^ Do
  1397. begin
  1398. if (base <> NR_NO) and
  1399. (not(getsupreg(base) in [getsupreg(current_procinfo.FramePointer),
  1400. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1401. {it won't do any harm if the register is already in RegsLoadedForRef}
  1402. begin
  1403. include(RegInfo.RegsLoadedForRef, getsupreg(base));
  1404. {$ifdef csdebug}
  1405. Writeln(std_regname(base), ' added');
  1406. {$endif csdebug}
  1407. end;
  1408. if (index <> NR_NO) and
  1409. (not(getsupreg(index) in [getsupreg(current_procinfo.FramePointer),
  1410. getsupreg(taicpu(p2).oper[1]^.reg),RS_ESP])) then
  1411. begin
  1412. include(RegInfo.RegsLoadedForRef, getsupreg(index));
  1413. {$ifdef csdebug}
  1414. Writeln(std_regname(index), ' added');
  1415. {$endif csdebug}
  1416. end;
  1417. end;
  1418. if (taicpu(p2).oper[1]^.reg <> NR_NO) and
  1419. (not(getsupreg(taicpu(p2).oper[1]^.reg) in [getsupreg(current_procinfo.FramePointer),RS_ESP])) then
  1420. begin
  1421. RegInfo.RegsLoadedForRef := RegInfo.RegsLoadedForRef -
  1422. [getsupreg(taicpu(p2).oper[1]^.reg)];
  1423. {$ifdef csdebug}
  1424. Writeln(std_regname(newreg(R_INTREGISTER,getsupreg(taicpu(p2).oper[1]^.reg),R_SUBWHOLE)), ' removed');
  1425. {$endif csdebug}
  1426. end;
  1427. InstructionsEquivalent :=
  1428. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Read) and
  1429. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Write)
  1430. end
  1431. else
  1432. {an instruction <> mov, movzx, movsx}
  1433. begin
  1434. {$ifdef csdebug}
  1435. hp := tai_comment.Create(strpnew('checking if equivalent'));
  1436. hp.previous := p2;
  1437. hp.next := p2.next;
  1438. p2.next.previous := hp;
  1439. p2.next := hp;
  1440. {$endif csdebug}
  1441. InstructionsEquivalent :=
  1442. (not(assigned(taicpu(p1).oper[0])) or
  1443. OpsEquivalent(taicpu(p1).oper[0]^, taicpu(p2).oper[0]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1444. (not(assigned(taicpu(p1).oper[1])) or
  1445. OpsEquivalent(taicpu(p1).oper[1]^, taicpu(p2).oper[1]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown)) and
  1446. (not(assigned(taicpu(p1).oper[2])) or
  1447. OpsEquivalent(taicpu(p1).oper[2]^, taicpu(p2).oper[2]^, taicpu(p1), taicpu(p2), RegInfo, OpAct_Unknown))
  1448. end
  1449. {the instructions haven't even got the same structure, so they're certainly
  1450. not equivalent}
  1451. else
  1452. begin
  1453. {$ifdef csdebug}
  1454. hp := tai_comment.Create(strpnew('different opcodes/format'));
  1455. hp.previous := p2;
  1456. hp.next := p2.next;
  1457. p2.next.previous := hp;
  1458. p2.next := hp;
  1459. {$endif csdebug}
  1460. InstructionsEquivalent := False;
  1461. end;
  1462. {$ifdef csdebug}
  1463. hp := tai_comment.Create(strpnew('instreq: '+tostr(byte(instructionsequivalent))));
  1464. hp.previous := p2;
  1465. hp.next := p2.next;
  1466. p2.next.previous := hp;
  1467. p2.next := hp;
  1468. {$endif csdebug}
  1469. end;
  1470. (*
  1471. function InstructionsEqual(p1, p2: tai): Boolean;
  1472. begin {checks whether two taicpu instructions are equal}
  1473. InstructionsEqual :=
  1474. assigned(p1) and assigned(p2) and
  1475. ((tai(p1).typ = ait_instruction) and
  1476. (tai(p1).typ = ait_instruction) and
  1477. (taicpu(p1).opcode = taicpu(p2).opcode) and
  1478. (taicpu(p1).oper[0]^.typ = taicpu(p2).oper[0]^.typ) and
  1479. (taicpu(p1).oper[1]^.typ = taicpu(p2).oper[1]^.typ) and
  1480. OpsEqual(taicpu(p1).oper[0]^.typ, taicpu(p1).oper[0]^, taicpu(p2).oper[0]^) and
  1481. OpsEqual(taicpu(p1).oper[1]^.typ, taicpu(p1).oper[1]^, taicpu(p2).oper[1]^))
  1482. end;
  1483. *)
  1484. procedure readreg(p: ptaiprop; supreg: tsuperregister);
  1485. begin
  1486. if supreg in [RS_EAX..RS_EDI] then
  1487. incState(p^.regs[supreg].rstate,1)
  1488. end;
  1489. procedure readref(p: ptaiprop; const ref: preference);
  1490. begin
  1491. if ref^.base <> NR_NO then
  1492. readreg(p, getsupreg(ref^.base));
  1493. if ref^.index <> NR_NO then
  1494. readreg(p, getsupreg(ref^.index));
  1495. end;
  1496. procedure ReadOp(p: ptaiprop;const o:toper);
  1497. begin
  1498. case o.typ Of
  1499. top_reg: readreg(p, getsupreg(o.reg));
  1500. top_ref: readref(p, o.ref);
  1501. end;
  1502. end;
  1503. function RefInInstruction(const ref: TReference; p: tai;
  1504. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1505. {checks whehter ref is used in p}
  1506. var
  1507. mysize: tcgsize;
  1508. TmpResult: Boolean;
  1509. begin
  1510. TmpResult := False;
  1511. if (p.typ = ait_instruction) then
  1512. begin
  1513. mysize := topsize2tcgsize[taicpu(p).opsize];
  1514. if (taicpu(p).ops >= 1) and
  1515. (taicpu(p).oper[0]^.typ = top_ref) then
  1516. TmpResult := RefsEq(taicpu(p).oper[0]^.ref^,ref,mysize,size);
  1517. if not(TmpResult) and
  1518. (taicpu(p).ops >= 2) and
  1519. (taicpu(p).oper[1]^.typ = top_ref) then
  1520. TmpResult := RefsEq(taicpu(p).oper[1]^.ref^,ref,mysize,size);
  1521. if not(TmpResult) and
  1522. (taicpu(p).ops >= 3) and
  1523. (taicpu(p).oper[2]^.typ = top_ref) then
  1524. TmpResult := RefsEq(taicpu(p).oper[2]^.ref^,ref,mysize,size);
  1525. end;
  1526. RefInInstruction := TmpResult;
  1527. end;
  1528. function RefInSequence(const ref: TReference; Content: TContent;
  1529. RefsEq: TRefCompare; size: tcgsize): Boolean;
  1530. {checks the whole sequence of Content (so StartMod and and the next NrOfMods
  1531. tai objects) to see whether ref is used somewhere}
  1532. var p: tai;
  1533. Counter: Word;
  1534. TmpResult: Boolean;
  1535. begin
  1536. p := Content.StartMod;
  1537. TmpResult := False;
  1538. Counter := 1;
  1539. while not(TmpResult) and
  1540. (Counter <= Content.NrOfMods) Do
  1541. begin
  1542. if (p.typ = ait_instruction) and
  1543. RefInInstruction(ref, p, RefsEq, size)
  1544. then TmpResult := True;
  1545. inc(Counter);
  1546. GetNextInstruction(p,p)
  1547. end;
  1548. RefInSequence := TmpResult
  1549. end;
  1550. {$push}
  1551. {$q-}
  1552. // checks whether a write to r2 of size "size" contains address r1
  1553. function arrayrefsoverlapping(const r1, r2: treference; size1, size2: tcgsize): Boolean;
  1554. var
  1555. realsize1, realsize2: aint;
  1556. begin
  1557. realsize1 := tcgsize2size[size1];
  1558. realsize2 := tcgsize2size[size2];
  1559. arrayrefsoverlapping :=
  1560. (r2.offset <= r1.offset+realsize1) and
  1561. (r1.offset <= r2.offset+realsize2) and
  1562. (r1.segment = r2.segment) and
  1563. (r1.symbol=r2.symbol) and
  1564. (r1.base = r2.base)
  1565. end;
  1566. {$pop}
  1567. function isSimpleRef(const ref: treference): boolean;
  1568. { returns true if ref is reference to a local or global variable, to a }
  1569. { parameter or to an object field (this includes arrays). Returns false }
  1570. { otherwise. }
  1571. begin
  1572. isSimpleRef :=
  1573. assigned(ref.symbol) or
  1574. (ref.base = current_procinfo.framepointer);
  1575. end;
  1576. function containsPointerRef(p: tai): boolean;
  1577. { checks if an instruction contains a reference which is a pointer location }
  1578. var
  1579. hp: taicpu;
  1580. count: longint;
  1581. begin
  1582. containsPointerRef := false;
  1583. if p.typ <> ait_instruction then
  1584. exit;
  1585. hp := taicpu(p);
  1586. for count := 0 to hp.ops-1 do
  1587. begin
  1588. case hp.oper[count]^.typ of
  1589. top_ref:
  1590. if not isSimpleRef(hp.oper[count]^.ref^) then
  1591. begin
  1592. containsPointerRef := true;
  1593. exit;
  1594. end;
  1595. top_none:
  1596. exit;
  1597. end;
  1598. end;
  1599. end;
  1600. function containsPointerLoad(c: tcontent): boolean;
  1601. { checks whether the contents of a register contain a pointer reference }
  1602. var
  1603. p: tai;
  1604. count: longint;
  1605. begin
  1606. containsPointerLoad := false;
  1607. p := c.startmod;
  1608. for count := c.nrOfMods downto 1 do
  1609. begin
  1610. if containsPointerRef(p) then
  1611. begin
  1612. containsPointerLoad := true;
  1613. exit;
  1614. end;
  1615. getnextinstruction(p,p);
  1616. end;
  1617. end;
  1618. function writeToMemDestroysContents(regWritten: tsuperregister; const ref: treference;
  1619. supreg: tsuperregister; size: tcgsize; const c: tcontent; var invalsmemwrite: boolean): boolean;
  1620. { returns whether the contents c of reg are invalid after regWritten is }
  1621. { is written to ref }
  1622. var
  1623. refsEq: trefCompare;
  1624. begin
  1625. if isSimpleRef(ref) then
  1626. begin
  1627. if (ref.index <> NR_NO) or
  1628. (assigned(ref.symbol) and
  1629. (ref.base <> NR_NO)) then
  1630. { local/global variable or parameter which is an array }
  1631. refsEq := @arrayRefsOverlapping
  1632. else
  1633. { local/global variable or parameter which is not an array }
  1634. refsEq := @refsOverlapping;
  1635. invalsmemwrite :=
  1636. assigned(c.memwrite) and
  1637. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1638. containsPointerRef(c.memwrite)) or
  1639. refsEq(c.memwrite.oper[1]^.ref^,ref,topsize2tcgsize[c.memwrite.opsize],size));
  1640. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1641. begin
  1642. writeToMemDestroysContents := false;
  1643. exit;
  1644. end;
  1645. { write something to a parameter, a local or global variable, so }
  1646. { * with uncertain optimizations on: }
  1647. { - destroy the contents of registers whose contents have somewhere a }
  1648. { "mov?? (ref), %reg". WhichReg (this is the register whose contents }
  1649. { are being written to memory) is not destroyed if it's StartMod is }
  1650. { of that form and NrOfMods = 1 (so if it holds ref, but is not a }
  1651. { expression based on ref) }
  1652. { * with uncertain optimizations off: }
  1653. { - also destroy registers that contain any pointer }
  1654. with c do
  1655. writeToMemDestroysContents :=
  1656. (typ in [con_ref,con_noRemoveRef]) and
  1657. ((not(cs_opt_size in current_settings.optimizerswitches) and
  1658. containsPointerLoad(c)
  1659. ) or
  1660. (refInSequence(ref,c,refsEq,size) and
  1661. ((supreg <> regWritten) or
  1662. not((nrOfMods = 1) and
  1663. {StarMod is always of the type ait_instruction}
  1664. (taicpu(StartMod).oper[0]^.typ = top_ref) and
  1665. refsEq(taicpu(StartMod).oper[0]^.ref^, ref, topsize2tcgsize[taicpu(StartMod).opsize],size)
  1666. )
  1667. )
  1668. )
  1669. );
  1670. end
  1671. else
  1672. { write something to a pointer location, so }
  1673. { * with uncertain optimzations on: }
  1674. { - do not destroy registers which contain a local/global variable or }
  1675. { a parameter, except if DestroyRefs is called because of a "movsl" }
  1676. { * with uncertain optimzations off: }
  1677. { - destroy every register which contains a memory location }
  1678. begin
  1679. invalsmemwrite :=
  1680. assigned(c.memwrite) and
  1681. (not(cs_opt_size in current_settings.optimizerswitches) or
  1682. containsPointerRef(c.memwrite));
  1683. if not(c.typ in [con_ref,con_noRemoveRef,con_invalid]) then
  1684. begin
  1685. writeToMemDestroysContents := false;
  1686. exit;
  1687. end;
  1688. with c do
  1689. writeToMemDestroysContents :=
  1690. (typ in [con_ref,con_noRemoveRef]) and
  1691. (not(cs_opt_size in current_settings.optimizerswitches) or
  1692. { for movsl }
  1693. ((ref.base = NR_EDI) and (ref.index = NR_EDI)) or
  1694. { don't destroy if reg contains a parameter, local or global variable }
  1695. containsPointerLoad(c)
  1696. );
  1697. end;
  1698. end;
  1699. function writeToRegDestroysContents(destReg, supreg: tsuperregister;
  1700. const c: tcontent): boolean;
  1701. { returns whether the contents c of reg are invalid after destReg is }
  1702. { modified }
  1703. begin
  1704. writeToRegDestroysContents :=
  1705. (c.typ in [con_ref,con_noRemoveRef,con_invalid]) and
  1706. sequenceDependsOnReg(c,supreg,destReg);
  1707. end;
  1708. function writeDestroysContents(const op: toper; supreg: tsuperregister; size: tcgsize;
  1709. const c: tcontent; var memwritedestroyed: boolean): boolean;
  1710. { returns whether the contents c of reg are invalid after regWritten is }
  1711. { is written to op }
  1712. begin
  1713. memwritedestroyed := false;
  1714. case op.typ of
  1715. top_reg:
  1716. writeDestroysContents :=
  1717. (getregtype(op.reg) = R_INTREGISTER) and
  1718. writeToRegDestroysContents(getsupreg(op.reg),supreg,c);
  1719. top_ref:
  1720. writeDestroysContents :=
  1721. writeToMemDestroysContents(RS_INVALID,op.ref^,supreg,size,c,memwritedestroyed);
  1722. else
  1723. writeDestroysContents := false;
  1724. end;
  1725. end;
  1726. procedure destroyRefs(p: tai; const ref: treference; regwritten: tsuperregister; size: tcgsize);
  1727. { destroys all registers which possibly contain a reference to ref, regWritten }
  1728. { is the register whose contents are being written to memory (if this proc }
  1729. { is called because of a "mov?? %reg, (mem)" instruction) }
  1730. var
  1731. counter: tsuperregister;
  1732. destroymemwrite: boolean;
  1733. begin
  1734. for counter := RS_EAX to RS_EDI Do
  1735. begin
  1736. if writeToMemDestroysContents(regwritten,ref,counter,size,
  1737. ptaiprop(p.optInfo)^.regs[counter],destroymemwrite) then
  1738. destroyReg(ptaiprop(p.optInfo), counter, false)
  1739. else if destroymemwrite then
  1740. ptaiprop(p.optinfo)^.regs[counter].MemWrite := nil;
  1741. end;
  1742. end;
  1743. procedure DestroyAllRegs(p: ptaiprop; read, written: boolean);
  1744. var Counter: tsuperregister;
  1745. begin {initializes/desrtoys all registers}
  1746. For Counter := RS_EAX To RS_EDI Do
  1747. begin
  1748. if read then
  1749. readreg(p, Counter);
  1750. DestroyReg(p, Counter, written);
  1751. p^.regs[counter].MemWrite := nil;
  1752. end;
  1753. p^.DirFlag := F_Unknown;
  1754. end;
  1755. procedure DestroyOp(taiObj: tai; const o:Toper);
  1756. {$ifdef statedebug}
  1757. var
  1758. hp: tai;
  1759. {$endif statedebug}
  1760. begin
  1761. case o.typ Of
  1762. top_reg:
  1763. begin
  1764. {$ifdef statedebug}
  1765. hp := tai_comment.Create(strpnew('destroying '+std_regname(o.reg)));
  1766. hp.next := taiobj.next;
  1767. hp.previous := taiobj;
  1768. taiobj.next := hp;
  1769. if assigned(hp.next) then
  1770. hp.next.previous := hp;
  1771. {$endif statedebug}
  1772. DestroyReg(ptaiprop(taiObj.OptInfo), getsupreg(o.reg), true);
  1773. end;
  1774. top_ref:
  1775. begin
  1776. readref(ptaiprop(taiObj.OptInfo), o.ref);
  1777. DestroyRefs(taiObj, o.ref^, RS_INVALID,topsize2tcgsize[(taiobj as taicpu).opsize]);
  1778. end;
  1779. end;
  1780. end;
  1781. procedure AddInstr2RegContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1782. p: taicpu; supreg: tsuperregister);
  1783. {$ifdef statedebug}
  1784. var
  1785. hp: tai;
  1786. {$endif statedebug}
  1787. begin
  1788. With ptaiprop(p.optinfo)^.regs[supreg] Do
  1789. if (typ in [con_ref,con_noRemoveRef]) then
  1790. begin
  1791. incState(wstate,1);
  1792. { also store how many instructions are part of the sequence in the first }
  1793. { instructions ptaiprop, so it can be easily accessed from within }
  1794. { CheckSequence}
  1795. inc(NrOfMods, NrOfInstrSinceLastMod[supreg]);
  1796. ptaiprop(tai(StartMod).OptInfo)^.Regs[supreg].NrOfMods := NrOfMods;
  1797. NrOfInstrSinceLastMod[supreg] := 0;
  1798. invalidateDependingRegs(p.optinfo,supreg);
  1799. ptaiprop(p.optinfo)^.regs[supreg].memwrite := nil;
  1800. {$ifdef StateDebug}
  1801. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)
  1802. + ' -- ' + tostr(ptaiprop(p.optinfo)^.Regs[supreg].nrofmods)));
  1803. InsertLLItem(AsmL, p, p.next, hp);
  1804. {$endif StateDebug}
  1805. end
  1806. else
  1807. begin
  1808. {$ifdef statedebug}
  1809. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))));
  1810. insertllitem(asml,p,p.next,hp);
  1811. {$endif statedebug}
  1812. DestroyReg(ptaiprop(p.optinfo), supreg, true);
  1813. {$ifdef StateDebug}
  1814. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,supreg,R_SUBWHOLE))+': '+tostr(ptaiprop(p.optinfo)^.Regs[supreg].WState)));
  1815. InsertLLItem(AsmL, p, p.next, hp);
  1816. {$endif StateDebug}
  1817. end
  1818. end;
  1819. procedure AddInstr2OpContents({$ifdef statedebug} asml: TAsmList; {$endif}
  1820. p: taicpu; const oper: TOper);
  1821. begin
  1822. if oper.typ = top_reg then
  1823. AddInstr2RegContents({$ifdef statedebug} asml, {$endif}p, getsupreg(oper.reg))
  1824. else
  1825. begin
  1826. ReadOp(ptaiprop(p.optinfo), oper);
  1827. DestroyOp(p, oper);
  1828. end
  1829. end;
  1830. {*************************************************************************************}
  1831. {************************************** TDFAOBJ **************************************}
  1832. {*************************************************************************************}
  1833. constructor tdfaobj.create(_list: TAsmList);
  1834. begin
  1835. list := _list;
  1836. blockstart := nil;
  1837. blockend := nil;
  1838. nroftaiobjs := 0;
  1839. taipropblock := nil;
  1840. lolab := 0;
  1841. hilab := 0;
  1842. labdif := 0;
  1843. labeltable := nil;
  1844. end;
  1845. procedure tdfaobj.initlabeltable;
  1846. var
  1847. labelfound: boolean;
  1848. p, prev: tai;
  1849. hp1, hp2: tai;
  1850. {$ifdef i386}
  1851. regcounter,
  1852. supreg : tsuperregister;
  1853. {$endif i386}
  1854. usedregs, nodeallocregs: tregset;
  1855. begin
  1856. labelfound := false;
  1857. lolab := maxlongint;
  1858. hilab := 0;
  1859. p := blockstart;
  1860. prev := p;
  1861. while assigned(p) do
  1862. begin
  1863. if (tai(p).typ = ait_label) then
  1864. if not labelcanbeskipped(tai_label(p)) then
  1865. begin
  1866. labelfound := true;
  1867. if (tai_Label(p).labsym.labelnr < lolab) then
  1868. lolab := tai_label(p).labsym.labelnr;
  1869. if (tai_Label(p).labsym.labelnr > hilab) then
  1870. hilab := tai_label(p).labsym.labelnr;
  1871. end;
  1872. prev := p;
  1873. getnextinstruction(p, p);
  1874. end;
  1875. if (prev.typ = ait_marker) and
  1876. (tai_marker(prev).kind = mark_AsmBlockStart) then
  1877. blockend := prev
  1878. else blockend := nil;
  1879. if labelfound then
  1880. labdif := hilab+1-lolab
  1881. else labdif := 0;
  1882. usedregs := [];
  1883. if (labdif <> 0) then
  1884. begin
  1885. getmem(labeltable, labdif*sizeof(tlabeltableitem));
  1886. fillchar(labeltable^, labdif*sizeof(tlabeltableitem), 0);
  1887. end;
  1888. p := blockstart;
  1889. prev := p;
  1890. while (p <> blockend) do
  1891. begin
  1892. case p.typ of
  1893. ait_label:
  1894. if not labelcanbeskipped(tai_label(p)) then
  1895. labeltable^[tai_label(p).labsym.labelnr-lolab].taiobj := p;
  1896. {$ifdef i386}
  1897. ait_regalloc:
  1898. if (getregtype(tai_regalloc(p).reg) = R_INTREGISTER) then
  1899. begin
  1900. supreg:=getsupreg(tai_regalloc(p).reg);
  1901. case tai_regalloc(p).ratype of
  1902. ra_alloc :
  1903. begin
  1904. if not(supreg in usedregs) then
  1905. include(usedregs, supreg)
  1906. else
  1907. begin
  1908. //addregdeallocfor(list, tai_regalloc(p).reg, p);
  1909. hp1 := tai(p.previous);
  1910. list.remove(p);
  1911. p.free;
  1912. p := hp1;
  1913. end;
  1914. end;
  1915. ra_dealloc :
  1916. begin
  1917. exclude(usedregs, supreg);
  1918. hp1 := p;
  1919. hp2 := nil;
  1920. while not(findregalloc(supreg,tai(hp1.next),ra_alloc)) and
  1921. getnextinstruction(hp1, hp1) and
  1922. regininstruction(getsupreg(tai_regalloc(p).reg), hp1) Do
  1923. hp2 := hp1;
  1924. if hp2 <> nil then
  1925. begin
  1926. hp1 := tai(p.previous);
  1927. list.remove(p);
  1928. insertllitem(list, hp2, tai(hp2.next), p);
  1929. p := hp1;
  1930. end
  1931. else if findregalloc(getsupreg(tai_regalloc(p).reg), tai(p.next),ra_alloc)
  1932. and getnextinstruction(p,hp1) then
  1933. begin
  1934. hp1 := tai(p.previous);
  1935. list.remove(p);
  1936. p.free;
  1937. p := hp1;
  1938. // don't include here, since then the allocation will be removed when it's processed
  1939. // include(usedregs,supreg);
  1940. end;
  1941. end;
  1942. end;
  1943. end;
  1944. {$endif i386}
  1945. end;
  1946. repeat
  1947. prev := p;
  1948. p := tai(p.next);
  1949. until not(assigned(p)) or
  1950. (p = blockend) or
  1951. not(p.typ in (skipinstr - [ait_regalloc]));
  1952. end;
  1953. {$ifdef i386}
  1954. { don't add deallocation for function result variable or for regvars}
  1955. getNoDeallocRegs(noDeallocRegs);
  1956. usedRegs := usedRegs - noDeallocRegs;
  1957. for regCounter := RS_EAX to RS_EDI do
  1958. if regCounter in usedRegs then
  1959. addRegDeallocFor(list,newreg(R_INTREGISTER,regCounter,R_SUBWHOLE),prev);
  1960. {$endif i386}
  1961. end;
  1962. function tdfaobj.pass_1(_blockstart: tai): tai;
  1963. begin
  1964. blockstart := _blockstart;
  1965. initlabeltable;
  1966. pass_1 := blockend;
  1967. end;
  1968. function tdfaobj.initdfapass2: boolean;
  1969. {reserves memory for the PtaiProps in one big memory block when not using
  1970. TP, returns False if not enough memory is available for the optimizer in all
  1971. cases}
  1972. var
  1973. p: tai;
  1974. count: Longint;
  1975. { TmpStr: String; }
  1976. begin
  1977. p := blockstart;
  1978. skiphead(p);
  1979. nroftaiobjs := 0;
  1980. while (p <> blockend) do
  1981. begin
  1982. {$ifDef JumpAnal}
  1983. case p.typ of
  1984. ait_label:
  1985. begin
  1986. if not labelcanbeskipped(tai_label(p)) then
  1987. labeltable^[tai_label(p).labsym.labelnr-lolab].instrnr := nroftaiobjs
  1988. end;
  1989. ait_instruction:
  1990. begin
  1991. if taicpu(p).is_jmp then
  1992. begin
  1993. if (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr >= lolab) and
  1994. (tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr <= hilab) then
  1995. inc(labeltable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-lolab].refsfound);
  1996. end;
  1997. end;
  1998. { ait_instruction:
  1999. begin
  2000. if (taicpu(p).opcode = A_PUSH) and
  2001. (taicpu(p).oper[0]^.typ = top_symbol) and
  2002. (PCSymbol(taicpu(p).oper[0]^)^.offset = 0) then
  2003. begin
  2004. TmpStr := StrPas(PCSymbol(taicpu(p).oper[0]^)^.symbol);
  2005. if}
  2006. end;
  2007. {$endif JumpAnal}
  2008. inc(NrOftaiObjs);
  2009. getnextinstruction(p,p);
  2010. end;
  2011. if nroftaiobjs <> 0 then
  2012. begin
  2013. initdfapass2 := True;
  2014. getmem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2015. fillchar(taiPropblock^,nroftaiobjs*sizeof(ttaiprop),0);
  2016. p := blockstart;
  2017. skiphead(p);
  2018. for count := 1 To nroftaiobjs do
  2019. begin
  2020. ptaiprop(p.optinfo) := @taipropblock^[count];
  2021. getnextinstruction(p, p);
  2022. end;
  2023. end
  2024. else
  2025. initdfapass2 := false;
  2026. end;
  2027. procedure tdfaobj.dodfapass2;
  2028. {Analyzes the Data Flow of an assembler list. Starts creating the reg
  2029. contents for the instructions starting with p. Returns the last tai which has
  2030. been processed}
  2031. var
  2032. curprop, LastFlagsChangeProp: ptaiprop;
  2033. Cnt, InstrCnt : Longint;
  2034. InstrProp: TInsProp;
  2035. UsedRegs: TRegSet;
  2036. prev,p : tai;
  2037. tmpref: TReference;
  2038. tmpsupreg: tsuperregister;
  2039. {$ifdef statedebug}
  2040. hp : tai;
  2041. {$endif}
  2042. {$ifdef AnalyzeLoops}
  2043. hp : tai;
  2044. TmpState: Byte;
  2045. {$endif AnalyzeLoops}
  2046. begin
  2047. p := BlockStart;
  2048. LastFlagsChangeProp := nil;
  2049. prev := nil;
  2050. UsedRegs := [];
  2051. UpdateUsedregs(UsedRegs, p);
  2052. SkipHead(p);
  2053. BlockStart := p;
  2054. InstrCnt := 1;
  2055. fillchar(NrOfInstrSinceLastMod, SizeOf(NrOfInstrSinceLastMod), 0);
  2056. while (p <> Blockend) Do
  2057. begin
  2058. curprop := @taiPropBlock^[InstrCnt];
  2059. if assigned(prev)
  2060. then
  2061. begin
  2062. {$ifdef JumpAnal}
  2063. if (p.Typ <> ait_label) then
  2064. {$endif JumpAnal}
  2065. begin
  2066. curprop^.regs := ptaiprop(prev.OptInfo)^.Regs;
  2067. curprop^.DirFlag := ptaiprop(prev.OptInfo)^.DirFlag;
  2068. curprop^.FlagsUsed := false;
  2069. end
  2070. end
  2071. else
  2072. begin
  2073. fillchar(curprop^, SizeOf(curprop^), 0);
  2074. { For tmpreg := RS_EAX to RS_EDI Do
  2075. curprop^.regs[tmpreg].WState := 1;}
  2076. end;
  2077. curprop^.UsedRegs := UsedRegs;
  2078. curprop^.CanBeRemoved := False;
  2079. UpdateUsedRegs(UsedRegs, tai(p.Next));
  2080. For tmpsupreg := RS_EAX To RS_EDI Do
  2081. if NrOfInstrSinceLastMod[tmpsupreg] < 255 then
  2082. inc(NrOfInstrSinceLastMod[tmpsupreg])
  2083. else
  2084. begin
  2085. NrOfInstrSinceLastMod[tmpsupreg] := 0;
  2086. curprop^.regs[tmpsupreg].typ := con_unknown;
  2087. end;
  2088. case p.typ Of
  2089. ait_marker:;
  2090. ait_label:
  2091. {$ifndef JumpAnal}
  2092. if not labelCanBeSkipped(tai_label(p)) then
  2093. DestroyAllRegs(curprop,false,false);
  2094. {$else JumpAnal}
  2095. begin
  2096. if not labelCanBeSkipped(tai_label(p)) then
  2097. With LTable^[tai_Label(p).labsym^.labelnr-LoLab] Do
  2098. {$ifDef AnalyzeLoops}
  2099. if (RefsFound = tai_Label(p).labsym^.RefCount)
  2100. {$else AnalyzeLoops}
  2101. if (JmpsProcessed = tai_Label(p).labsym^.RefCount)
  2102. {$endif AnalyzeLoops}
  2103. then
  2104. {all jumps to this label have been found}
  2105. {$ifDef AnalyzeLoops}
  2106. if (JmpsProcessed > 0)
  2107. then
  2108. {$endif AnalyzeLoops}
  2109. {we've processed at least one jump to this label}
  2110. begin
  2111. if (GetLastInstruction(p, hp) and
  2112. not(((hp.typ = ait_instruction)) and
  2113. (taicpu_labeled(hp).is_jmp))
  2114. then
  2115. {previous instruction not a JMP -> the contents of the registers after the
  2116. previous intruction has been executed have to be taken into account as well}
  2117. For tmpsupreg := RS_EAX to RS_EDI Do
  2118. begin
  2119. if (curprop^.regs[tmpsupreg].WState <>
  2120. ptaiprop(hp.OptInfo)^.Regs[tmpsupreg].WState)
  2121. then DestroyReg(curprop, tmpsupreg, true)
  2122. end
  2123. end
  2124. {$ifDef AnalyzeLoops}
  2125. else
  2126. {a label from a backward jump (e.g. a loop), no jump to this label has
  2127. already been processed}
  2128. if GetLastInstruction(p, hp) and
  2129. not(hp.typ = ait_instruction) and
  2130. (taicpu_labeled(hp).opcode = A_JMP))
  2131. then
  2132. {previous instruction not a jmp, so keep all the registers' contents from the
  2133. previous instruction}
  2134. begin
  2135. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2136. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2137. end
  2138. else
  2139. {previous instruction a jmp and no jump to this label processed yet}
  2140. begin
  2141. hp := p;
  2142. Cnt := InstrCnt;
  2143. {continue until we find a jump to the label or a label which has already
  2144. been processed}
  2145. while GetNextInstruction(hp, hp) and
  2146. not((hp.typ = ait_instruction) and
  2147. (taicpu(hp).is_jmp) and
  2148. (tasmlabel(taicpu(hp).oper[0]^.sym).labsymabelnr = tai_Label(p).labsym^.labelnr)) and
  2149. not((hp.typ = ait_label) and
  2150. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].RefsFound
  2151. = tai_Label(hp).labsym^.RefCount) and
  2152. (LTable^[tai_Label(hp).labsym^.labelnr-LoLab].JmpsProcessed > 0)) Do
  2153. inc(Cnt);
  2154. if (hp.typ = ait_label)
  2155. then
  2156. {there's a processed label after the current one}
  2157. begin
  2158. curprop^.regs := taiPropBlock^[Cnt].Regs;
  2159. curprop.DirFlag := taiPropBlock^[Cnt].DirFlag;
  2160. end
  2161. else
  2162. {there's no label anymore after the current one, or they haven't been
  2163. processed yet}
  2164. begin
  2165. GetLastInstruction(p, hp);
  2166. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2167. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2168. DestroyAllRegs(ptaiprop(hp.OptInfo),true,true)
  2169. end
  2170. end
  2171. {$endif AnalyzeLoops}
  2172. else
  2173. {not all references to this label have been found, so destroy all registers}
  2174. begin
  2175. GetLastInstruction(p, hp);
  2176. curprop^.regs := ptaiprop(hp.OptInfo)^.Regs;
  2177. curprop.DirFlag := ptaiprop(hp.OptInfo)^.DirFlag;
  2178. DestroyAllRegs(curprop,true,true)
  2179. end;
  2180. end;
  2181. {$endif JumpAnal}
  2182. ait_stab, ait_force_line, ait_function_name:;
  2183. ait_align: ; { may destroy flags !!! }
  2184. ait_instruction:
  2185. begin
  2186. if taicpu(p).is_jmp or
  2187. (taicpu(p).opcode = A_JMP) then
  2188. begin
  2189. {$ifNDef JumpAnal}
  2190. for tmpsupreg := RS_EAX to RS_EDI do
  2191. with curprop^.regs[tmpsupreg] do
  2192. case typ of
  2193. con_ref: typ := con_noRemoveRef;
  2194. con_const: typ := con_noRemoveConst;
  2195. con_invalid: typ := con_unknown;
  2196. end;
  2197. {$else JumpAnal}
  2198. With LTable^[tasmlabel(taicpu(p).oper[0]^.sym).labsymabelnr-LoLab] Do
  2199. if (RefsFound = tasmlabel(taicpu(p).oper[0]^.sym).RefCount) then
  2200. begin
  2201. if (InstrCnt < InstrNr)
  2202. then
  2203. {forward jump}
  2204. if (JmpsProcessed = 0) then
  2205. {no jump to this label has been processed yet}
  2206. begin
  2207. taiPropBlock^[InstrNr].Regs := curprop^.regs;
  2208. taiPropBlock^[InstrNr].DirFlag := curprop.DirFlag;
  2209. inc(JmpsProcessed);
  2210. end
  2211. else
  2212. begin
  2213. For tmpreg := RS_EAX to RS_EDI Do
  2214. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2215. curprop^.regs[tmpreg].WState) then
  2216. DestroyReg(@taiPropBlock^[InstrNr], tmpreg, true);
  2217. inc(JmpsProcessed);
  2218. end
  2219. {$ifdef AnalyzeLoops}
  2220. else
  2221. { backward jump, a loop for example}
  2222. { if (JmpsProcessed > 0) or
  2223. not(GetLastInstruction(taiObj, hp) and
  2224. (hp.typ = ait_labeled_instruction) and
  2225. (taicpu_labeled(hp).opcode = A_JMP))
  2226. then}
  2227. {instruction prior to label is not a jmp, or at least one jump to the label
  2228. has yet been processed}
  2229. begin
  2230. inc(JmpsProcessed);
  2231. For tmpreg := RS_EAX to RS_EDI Do
  2232. if (taiPropBlock^[InstrNr].Regs[tmpreg].WState <>
  2233. curprop^.regs[tmpreg].WState)
  2234. then
  2235. begin
  2236. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2237. Cnt := InstrNr;
  2238. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2239. begin
  2240. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2241. inc(Cnt);
  2242. end;
  2243. while (Cnt <= InstrCnt) Do
  2244. begin
  2245. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2246. inc(Cnt)
  2247. end
  2248. end;
  2249. end
  2250. { else }
  2251. {instruction prior to label is a jmp and no jumps to the label have yet been
  2252. processed}
  2253. { begin
  2254. inc(JmpsProcessed);
  2255. For tmpreg := RS_EAX to RS_EDI Do
  2256. begin
  2257. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2258. Cnt := InstrNr;
  2259. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2260. begin
  2261. taiPropBlock^[Cnt].Regs[tmpreg] := curprop^.regs[tmpreg];
  2262. inc(Cnt);
  2263. end;
  2264. TmpState := taiPropBlock^[InstrNr].Regs[tmpreg].WState;
  2265. while (TmpState = taiPropBlock^[Cnt].Regs[tmpreg].WState) Do
  2266. begin
  2267. DestroyReg(@taiPropBlock^[Cnt], tmpreg, true);
  2268. inc(Cnt);
  2269. end;
  2270. while (Cnt <= InstrCnt) Do
  2271. begin
  2272. inc(taiPropBlock^[Cnt].Regs[tmpreg].WState);
  2273. inc(Cnt)
  2274. end
  2275. end
  2276. end}
  2277. {$endif AnalyzeLoops}
  2278. end;
  2279. {$endif JumpAnal}
  2280. end
  2281. else
  2282. begin
  2283. InstrProp := InsProp[taicpu(p).opcode];
  2284. case taicpu(p).opcode Of
  2285. A_MOV, A_MOVZX, A_MOVSX:
  2286. begin
  2287. case taicpu(p).oper[0]^.typ Of
  2288. top_ref, top_reg:
  2289. case taicpu(p).oper[1]^.typ Of
  2290. top_reg:
  2291. begin
  2292. {$ifdef statedebug}
  2293. hp := tai_comment.Create(strpnew('destroying '+std_regname(taicpu(p).oper[1]^.reg)));
  2294. insertllitem(list,p,p.next,hp);
  2295. {$endif statedebug}
  2296. readOp(curprop, taicpu(p).oper[0]^);
  2297. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2298. if reginop(tmpsupreg, taicpu(p).oper[0]^) and
  2299. (curprop^.regs[tmpsupreg].typ in [con_ref,con_noRemoveRef]) then
  2300. begin
  2301. with curprop^.regs[tmpsupreg] Do
  2302. begin
  2303. incState(wstate,1);
  2304. { also store how many instructions are part of the sequence in the first }
  2305. { instruction's ptaiprop, so it can be easily accessed from within }
  2306. { CheckSequence }
  2307. inc(nrOfMods, nrOfInstrSinceLastMod[tmpsupreg]);
  2308. ptaiprop(startmod.optinfo)^.regs[tmpsupreg].nrOfMods := nrOfMods;
  2309. nrOfInstrSinceLastMod[tmpsupreg] := 0;
  2310. { Destroy the contents of the registers }
  2311. { that depended on the previous value of }
  2312. { this register }
  2313. invalidateDependingRegs(curprop,tmpsupreg);
  2314. curprop^.regs[tmpsupreg].memwrite := nil;
  2315. end;
  2316. end
  2317. else
  2318. begin
  2319. {$ifdef statedebug}
  2320. hp := tai_comment.Create(strpnew('destroying & initing '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2321. insertllitem(list,p,p.next,hp);
  2322. {$endif statedebug}
  2323. destroyReg(curprop, tmpsupreg, true);
  2324. if not(reginop(tmpsupreg, taicpu(p).oper[0]^)) then
  2325. with curprop^.regs[tmpsupreg] Do
  2326. begin
  2327. typ := con_ref;
  2328. startmod := p;
  2329. nrOfMods := 1;
  2330. end
  2331. end;
  2332. {$ifdef StateDebug}
  2333. hp := tai_comment.Create(strpnew(std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))+': '+tostr(curprop^.regs[tmpsupreg].WState)));
  2334. insertllitem(list,p,p.next,hp);
  2335. {$endif StateDebug}
  2336. end;
  2337. top_ref:
  2338. begin
  2339. readref(curprop, taicpu(p).oper[1]^.ref);
  2340. if taicpu(p).oper[0]^.typ = top_reg then
  2341. begin
  2342. readreg(curprop, getsupreg(taicpu(p).oper[0]^.reg));
  2343. DestroyRefs(p, taicpu(p).oper[1]^.ref^, getsupreg(taicpu(p).oper[0]^.reg),topsize2tcgsize[taicpu(p).opsize]);
  2344. ptaiprop(p.optinfo)^.regs[getsupreg(taicpu(p).oper[0]^.reg)].memwrite :=
  2345. taicpu(p);
  2346. end
  2347. else
  2348. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2349. end;
  2350. end;
  2351. top_Const:
  2352. begin
  2353. case taicpu(p).oper[1]^.typ Of
  2354. top_reg:
  2355. begin
  2356. tmpsupreg := getsupreg(taicpu(p).oper[1]^.reg);
  2357. {$ifdef statedebug}
  2358. hp := tai_comment.Create(strpnew('destroying '+std_regname(newreg(R_INTREGISTER,tmpsupreg,R_SUBWHOLE))));
  2359. insertllitem(list,p,p.next,hp);
  2360. {$endif statedebug}
  2361. With curprop^.regs[tmpsupreg] Do
  2362. begin
  2363. DestroyReg(curprop, tmpsupreg, true);
  2364. typ := Con_Const;
  2365. StartMod := p;
  2366. nrOfMods := 1;
  2367. end
  2368. end;
  2369. top_ref:
  2370. begin
  2371. readref(curprop, taicpu(p).oper[1]^.ref);
  2372. DestroyRefs(p, taicpu(p).oper[1]^.ref^, RS_INVALID,topsize2tcgsize[taicpu(p).opsize]);
  2373. end;
  2374. end;
  2375. end;
  2376. end;
  2377. end;
  2378. A_DIV, A_IDIV, A_MUL:
  2379. begin
  2380. ReadOp(curprop, taicpu(p).oper[0]^);
  2381. readreg(curprop,RS_EAX);
  2382. if (taicpu(p).OpCode = A_IDIV) or
  2383. (taicpu(p).OpCode = A_DIV) then
  2384. begin
  2385. readreg(curprop,RS_EDX);
  2386. end;
  2387. {$ifdef statedebug}
  2388. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2389. insertllitem(list,p,p.next,hp);
  2390. {$endif statedebug}
  2391. { DestroyReg(curprop, RS_EAX, true);}
  2392. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2393. taicpu(p), RS_EAX);
  2394. DestroyReg(curprop, RS_EDX, true);
  2395. LastFlagsChangeProp := curprop;
  2396. end;
  2397. A_IMUL:
  2398. begin
  2399. ReadOp(curprop,taicpu(p).oper[0]^);
  2400. if (taicpu(p).ops >= 2) then
  2401. ReadOp(curprop,taicpu(p).oper[1]^);
  2402. if (taicpu(p).ops <= 2) then
  2403. if (taicpu(p).ops=1) then
  2404. begin
  2405. readreg(curprop,RS_EAX);
  2406. {$ifdef statedebug}
  2407. hp := tai_comment.Create(strpnew('destroying eax and edx'));
  2408. insertllitem(list,p,p.next,hp);
  2409. {$endif statedebug}
  2410. { DestroyReg(curprop, RS_EAX, true); }
  2411. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2412. taicpu(p), RS_EAX);
  2413. DestroyReg(curprop,RS_EDX, true)
  2414. end
  2415. else
  2416. AddInstr2OpContents(
  2417. {$ifdef statedebug}list,{$endif}
  2418. taicpu(p), taicpu(p).oper[1]^)
  2419. else
  2420. AddInstr2OpContents({$ifdef statedebug}list,{$endif}
  2421. taicpu(p), taicpu(p).oper[2]^);
  2422. LastFlagsChangeProp := curprop;
  2423. end;
  2424. A_LEA:
  2425. begin
  2426. readop(curprop,taicpu(p).oper[0]^);
  2427. if reginref(getsupreg(taicpu(p).oper[1]^.reg),taicpu(p).oper[0]^.ref^) then
  2428. AddInstr2RegContents({$ifdef statedebug}list,{$endif}
  2429. taicpu(p), getsupreg(taicpu(p).oper[1]^.reg))
  2430. else
  2431. begin
  2432. {$ifdef statedebug}
  2433. hp := tai_comment.Create(strpnew('destroying & initing'+
  2434. std_regname(taicpu(p).oper[1]^.reg)));
  2435. insertllitem(list,p,p.next,hp);
  2436. {$endif statedebug}
  2437. destroyreg(curprop,getsupreg(taicpu(p).oper[1]^.reg),true);
  2438. with curprop^.regs[getsupreg(taicpu(p).oper[1]^.reg)] Do
  2439. begin
  2440. typ := con_ref;
  2441. startmod := p;
  2442. nrOfMods := 1;
  2443. end
  2444. end;
  2445. end;
  2446. else
  2447. begin
  2448. Cnt := 1;
  2449. while (Cnt <= maxinschanges) and
  2450. (InstrProp.Ch[Cnt] <> Ch_None) Do
  2451. begin
  2452. case InstrProp.Ch[Cnt] Of
  2453. Ch_REAX..Ch_REDI:
  2454. begin
  2455. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2456. readreg(curprop,tmpsupreg);
  2457. end;
  2458. Ch_WEAX..Ch_RWEDI:
  2459. begin
  2460. if (InstrProp.Ch[Cnt] >= Ch_RWEAX) then
  2461. begin
  2462. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2463. readreg(curprop,tmpsupreg);
  2464. end;
  2465. {$ifdef statedebug}
  2466. hp := tai_comment.Create(strpnew('destroying '+
  2467. std_regname(tch2reg(InstrProp.Ch[Cnt]))));
  2468. insertllitem(list,p,p.next,hp);
  2469. {$endif statedebug}
  2470. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2471. DestroyReg(curprop,tmpsupreg, true);
  2472. end;
  2473. Ch_MEAX..Ch_MEDI:
  2474. begin
  2475. tmpsupreg:=tch2reg(InstrProp.Ch[Cnt]);
  2476. AddInstr2RegContents({$ifdef statedebug} list,{$endif}
  2477. taicpu(p),tmpsupreg);
  2478. end;
  2479. Ch_CDirFlag: curprop^.DirFlag := F_notSet;
  2480. Ch_SDirFlag: curprop^.DirFlag := F_Set;
  2481. Ch_Rop1: ReadOp(curprop, taicpu(p).oper[0]^);
  2482. Ch_Rop2: ReadOp(curprop, taicpu(p).oper[1]^);
  2483. Ch_ROp3: ReadOp(curprop, taicpu(p).oper[2]^);
  2484. Ch_Wop1..Ch_RWop1:
  2485. begin
  2486. if (InstrProp.Ch[Cnt] in [Ch_RWop1]) then
  2487. ReadOp(curprop, taicpu(p).oper[0]^);
  2488. DestroyOp(p, taicpu(p).oper[0]^);
  2489. end;
  2490. Ch_Mop1:
  2491. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2492. taicpu(p), taicpu(p).oper[0]^);
  2493. Ch_Wop2..Ch_RWop2:
  2494. begin
  2495. if (InstrProp.Ch[Cnt] = Ch_RWop2) then
  2496. ReadOp(curprop, taicpu(p).oper[1]^);
  2497. DestroyOp(p, taicpu(p).oper[1]^);
  2498. end;
  2499. Ch_Mop2:
  2500. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2501. taicpu(p), taicpu(p).oper[1]^);
  2502. Ch_WOp3..Ch_RWOp3:
  2503. begin
  2504. if (InstrProp.Ch[Cnt] = Ch_RWOp3) then
  2505. ReadOp(curprop, taicpu(p).oper[2]^);
  2506. DestroyOp(p, taicpu(p).oper[2]^);
  2507. end;
  2508. Ch_Mop3:
  2509. AddInstr2OpContents({$ifdef statedebug} list, {$endif}
  2510. taicpu(p), taicpu(p).oper[2]^);
  2511. Ch_WMemEDI:
  2512. begin
  2513. readreg(curprop, RS_EDI);
  2514. fillchar(tmpref, SizeOf(tmpref), 0);
  2515. tmpref.base := NR_EDI;
  2516. tmpref.index := NR_EDI;
  2517. DestroyRefs(p, tmpref,RS_INVALID,OS_32)
  2518. end;
  2519. Ch_RFlags:
  2520. if assigned(LastFlagsChangeProp) then
  2521. LastFlagsChangeProp^.FlagsUsed := true;
  2522. Ch_WFlags:
  2523. LastFlagsChangeProp := curprop;
  2524. Ch_RWFlags:
  2525. begin
  2526. if assigned(LastFlagsChangeProp) then
  2527. LastFlagsChangeProp^.FlagsUsed := true;
  2528. LastFlagsChangeProp := curprop;
  2529. end;
  2530. Ch_FPU:;
  2531. else
  2532. begin
  2533. {$ifdef statedebug}
  2534. hp := tai_comment.Create(strpnew(
  2535. 'destroying all regs for prev instruction'));
  2536. insertllitem(list,p, p.next,hp);
  2537. {$endif statedebug}
  2538. DestroyAllRegs(curprop,true,true);
  2539. LastFlagsChangeProp := curprop;
  2540. end;
  2541. end;
  2542. inc(Cnt);
  2543. end
  2544. end;
  2545. end;
  2546. end;
  2547. end
  2548. else
  2549. begin
  2550. {$ifdef statedebug}
  2551. hp := tai_comment.Create(strpnew(
  2552. 'destroying all regs: unknown tai: '+tostr(ord(p.typ))));
  2553. insertllitem(list,p, p.next,hp);
  2554. {$endif statedebug}
  2555. DestroyAllRegs(curprop,true,true);
  2556. end;
  2557. end;
  2558. inc(InstrCnt);
  2559. prev := p;
  2560. GetNextInstruction(p, p);
  2561. end;
  2562. end;
  2563. function tdfaobj.pass_generate_code: boolean;
  2564. begin
  2565. if initdfapass2 then
  2566. begin
  2567. dodfapass2;
  2568. pass_generate_code := true
  2569. end
  2570. else
  2571. pass_generate_code := false;
  2572. end;
  2573. {$push}
  2574. {$r-}
  2575. function tdfaobj.getlabelwithsym(sym: tasmlabel): tai;
  2576. begin
  2577. if (sym.labelnr >= lolab) and
  2578. (sym.labelnr <= hilab) then { range check, a jump can go past an assembler block! }
  2579. getlabelwithsym := labeltable^[sym.labelnr-lolab].taiobj
  2580. else
  2581. getlabelwithsym := nil;
  2582. end;
  2583. {$pop}
  2584. procedure tdfaobj.clear;
  2585. begin
  2586. if labdif <> 0 then
  2587. begin
  2588. freemem(labeltable);
  2589. labeltable := nil;
  2590. end;
  2591. if assigned(taipropblock) then
  2592. begin
  2593. freemem(taipropblock, nroftaiobjs*sizeof(ttaiprop));
  2594. taipropblock := nil;
  2595. end;
  2596. end;
  2597. end.