rax86.pas 39 KB

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  1. {
  2. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  3. Handles the common x86 assembler reader routines
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {
  18. Contains the common x86 (i386 and x86-64) assembler reader routines.
  19. }
  20. unit rax86;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. cpubase,rautils,cclasses;
  26. { Parser helpers }
  27. function is_prefix(t:tasmop):boolean;
  28. function is_override(t:tasmop):boolean;
  29. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  30. Function CheckOverride(overrideop,op:tasmop): Boolean;
  31. Procedure FWaitWarning;
  32. type
  33. Tx86Operand=class(TOperand)
  34. opsize : topsize;
  35. Procedure SetSize(_size:longint;force:boolean);override;
  36. Procedure SetCorrectSize(opcode:tasmop);override;
  37. Function CheckOperand: boolean; override;
  38. end;
  39. Tx86Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create(optype : tcoperand);override;
  43. { Operand sizes }
  44. procedure AddReferenceSizes; virtual;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { Additional actions required by specific reader }
  50. procedure FixupOpcode;virtual;
  51. { opcode adding }
  52. function ConcatInstruction(p : TAsmList) : tai;override;
  53. end;
  54. const
  55. AsmPrefixes = 6;
  56. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  57. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  58. );
  59. AsmOverrides = 6;
  60. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  61. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  62. );
  63. CondAsmOps=3;
  64. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  65. A_CMOVcc, A_Jcc, A_SETcc
  66. );
  67. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  68. 'CMOV','J','SET'
  69. );
  70. implementation
  71. uses
  72. globtype,globals,systems,verbose,
  73. procinfo,
  74. cpuinfo,cgbase,cgutils,
  75. itcpugas,cgx86, symsym, cutils;
  76. {*****************************************************************************
  77. Parser Helpers
  78. *****************************************************************************}
  79. function is_prefix(t:tasmop):boolean;
  80. var
  81. i : longint;
  82. Begin
  83. is_prefix:=false;
  84. for i:=1 to AsmPrefixes do
  85. if t=AsmPrefix[i-1] then
  86. begin
  87. is_prefix:=true;
  88. exit;
  89. end;
  90. end;
  91. function is_override(t:tasmop):boolean;
  92. var
  93. i : longint;
  94. Begin
  95. is_override:=false;
  96. for i:=1 to AsmOverrides do
  97. if t=AsmOverride[i-1] then
  98. begin
  99. is_override:=true;
  100. exit;
  101. end;
  102. end;
  103. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  104. { Checks if the prefix is valid with the following opcode }
  105. { return false if not, otherwise true }
  106. Begin
  107. CheckPrefix := TRUE;
  108. (* Case prefix of
  109. A_REP,A_REPNE,A_REPE:
  110. Case opcode Of
  111. A_SCASB,A_SCASW,A_SCASD,
  112. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  113. Else
  114. Begin
  115. CheckPrefix := FALSE;
  116. exit;
  117. end;
  118. end; { case }
  119. A_LOCK:
  120. Case opcode Of
  121. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  122. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  123. Else
  124. Begin
  125. CheckPrefix := FALSE;
  126. Exit;
  127. end;
  128. end; { case }
  129. A_NONE: exit; { no prefix here }
  130. else
  131. CheckPrefix := FALSE;
  132. end; { end case } *)
  133. end;
  134. Function CheckOverride(overrideop,op:tasmop): Boolean;
  135. { Check if the override is valid, and if so then }
  136. { update the instr variable accordingly. }
  137. Begin
  138. CheckOverride := true;
  139. { Case instr.getinstruction of
  140. A_MOVS,A_XLAT,A_CMPS:
  141. Begin
  142. CheckOverride := TRUE;
  143. Message(assem_e_segment_override_not_supported);
  144. end
  145. end }
  146. end;
  147. Procedure FWaitWarning;
  148. begin
  149. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
  150. Message(asmr_w_fwait_emu_prob);
  151. end;
  152. {*****************************************************************************
  153. TX86Operand
  154. *****************************************************************************}
  155. Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
  156. begin
  157. inherited SetSize(_size,force);
  158. { OS_64 will be set to S_L and be fixed later
  159. in SetCorrectSize }
  160. // multimedia register
  161. case _size of
  162. 16: size := OS_M128;
  163. 32: size := OS_M256;
  164. end;
  165. opsize:=TCGSize2Opsize[size];
  166. end;
  167. Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
  168. begin
  169. if gas_needsuffix[opcode]=attsufFPU then
  170. begin
  171. case size of
  172. OS_32 : opsize:=S_FS;
  173. OS_64 : opsize:=S_FL;
  174. end;
  175. end
  176. else if gas_needsuffix[opcode]=attsufFPUint then
  177. begin
  178. case size of
  179. OS_16 : opsize:=S_IS;
  180. OS_32 : opsize:=S_IL;
  181. OS_64 : opsize:=S_IQ;
  182. end;
  183. end
  184. else if gas_needsuffix[opcode]=AttSufMM then
  185. begin
  186. if (opr.typ=OPR_Reference) then
  187. begin
  188. case size of
  189. OS_32 : size := OS_M32;
  190. OS_64 : size := OS_M64;
  191. end;
  192. end;
  193. end
  194. else
  195. begin
  196. if size=OS_64 then
  197. opsize:=S_Q;
  198. end;
  199. end;
  200. Function Tx86Operand.CheckOperand: boolean;
  201. begin
  202. result:=true;
  203. if (opr.typ=OPR_Reference) then
  204. begin
  205. if not hasvar then
  206. begin
  207. if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
  208. begin
  209. if current_procinfo.procdef.proccalloption=pocall_register then
  210. message(asmr_w_no_direct_ebp_for_parameter)
  211. else
  212. message(asmr_w_direct_ebp_for_parameter_regcall);
  213. end
  214. else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
  215. message(asmr_w_direct_ebp_neg_offset)
  216. else if (getsupreg(opr.ref.base)=RS_ESP) and (opr.ref.offset<0) then
  217. message(asmr_w_direct_esp_neg_offset);
  218. end;
  219. if (cs_create_pic in current_settings.moduleswitches) and
  220. assigned(opr.ref.symbol) and
  221. not assigned(opr.ref.relsymbol) then
  222. begin
  223. if not(opr.ref.refaddr in [addr_pic,addr_pic_no_got]) then
  224. begin
  225. if (opr.ref.symbol.name <> '_GLOBAL_OFFSET_TABLE_') then
  226. begin
  227. message(asmr_e_need_pic_ref);
  228. result:=false;
  229. end
  230. else
  231. opr.ref.refaddr:=addr_pic;
  232. end
  233. else
  234. begin
  235. {$ifdef x86_64}
  236. { should probably be extended to i386, but there the situation
  237. is more complex and ELF-style PIC still need to be
  238. tested/debugged }
  239. if (opr.ref.symbol.bind in [AB_LOCAL,AB_PRIVATE_EXTERN]) and
  240. (opr.ref.refaddr=addr_pic) then
  241. message(asmr_w_useless_got_for_local)
  242. else if (opr.ref.symbol.bind in [AB_GLOBAL,AB_EXTERNAL,AB_COMMON,AB_WEAK_EXTERNAL]) and
  243. (opr.ref.refaddr=addr_pic_no_got) then
  244. message(asmr_w_global_access_without_got);
  245. {$endif x86_64}
  246. end;
  247. end;
  248. end;
  249. end;
  250. {*****************************************************************************
  251. T386Instruction
  252. *****************************************************************************}
  253. constructor Tx86Instruction.Create(optype : tcoperand);
  254. begin
  255. inherited Create(optype);
  256. Opsize:=S_NO;
  257. end;
  258. procedure Tx86Instruction.SwapOperands;
  259. begin
  260. Inherited SwapOperands;
  261. { mark the correct order }
  262. if OpOrder=op_intel then
  263. OpOrder:=op_att
  264. else
  265. OpOrder:=op_intel;
  266. end;
  267. const
  268. {$ifdef x86_64}
  269. topsize2memsize: array[topsize] of integer =
  270. (0, 8,16,32,64,8,8,16,8,16,32,
  271. 16,32,64,
  272. 16,32,64,0,0,
  273. 64,
  274. 0,0,0,
  275. 80,
  276. 128,
  277. 256
  278. );
  279. {$else}
  280. topsize2memsize: array[topsize] of integer =
  281. (0, 8,16,32,64,8,8,16,
  282. 16,32,64,
  283. 16,32,64,0,0,
  284. 64,
  285. 0,0,0,
  286. 80,
  287. 128,
  288. 256
  289. );
  290. {$endif}
  291. procedure Tx86Instruction.AddReferenceSizes;
  292. { this will add the sizes for references like [esi] which do not
  293. have the size set yet, it will take only the size if the other
  294. operand is a register }
  295. var
  296. operand2,i,j : longint;
  297. s : tasmsymbol;
  298. so : aint;
  299. ExistsMemRefNoSize: boolean;
  300. ExistsMemRef: boolean;
  301. ExistsConstNoSize: boolean;
  302. ExistsLocalSymSize: boolean;
  303. memrefsize: integer;
  304. memopsize: integer;
  305. memoffset: asizeint;
  306. begin
  307. ExistsMemRefNoSize := false;
  308. ExistsMemRef := false;
  309. ExistsConstNoSize := false;
  310. ExistsLocalSymSize := false;
  311. // EXIST A MEMORY- OR CONSTANT-OPERAND WITHOUT SIZE ?
  312. for i := 1 to ops do
  313. begin
  314. if operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL] then
  315. begin
  316. ExistsMemRef := true;
  317. if (tx86operand(operands[i]).opsize = S_NO) then
  318. begin
  319. ExistsMemRefNoSize := true;
  320. case operands[i].opr.Typ of
  321. OPR_LOCAL: ExistsLocalSymSize := tx86operand(operands[i]).opr.localsym.getsize > 0;
  322. OPR_REFERENCE: ExistsLocalSymSize := true;
  323. end;
  324. end;
  325. end
  326. else if operands[i].Opr.Typ in [OPR_CONSTANT] then
  327. begin
  328. ExistsConstNoSize := tx86operand(operands[i]).opsize = S_NO;
  329. end;
  330. end;
  331. // ONLY SUPPORTED OPCODES WITH SSE- OR AVX-REGISTERS
  332. if (ExistsMemRef) and
  333. (MemRefInfo(opcode).ExistsSSEAVX) then
  334. begin
  335. // 1. WE HAVE AN SSE- OR AVX-OPCODE WITH MEMORY OPERAND
  336. if (not(ExistsMemRefNoSize)) or
  337. (ExistsLocalSymSize) then
  338. begin
  339. // 2. WE KNOWN THE MEMORYSIZE OF THE MEMORY-OPERAND OR WE CAN
  340. // CALC THE MEMORYSIZE
  341. // 3. CALC THE SIZE OF THE MEMORYOPERAND BY OPCODE-DEFINITION
  342. // 4. COMPARE THE SIZE FROM OPCODE-DEFINITION AND THE REAL MEMORY-OPERAND-SIZE
  343. // - validate memory-reference-size
  344. for i := 1 to ops do
  345. begin
  346. if (operands[i].Opr.Typ in [OPR_REFERENCE, OPR_LOCAL]) then
  347. begin
  348. memrefsize := -1;
  349. case MemRefInfo(opcode).MemRefSize of
  350. msiMem8: memrefsize := 8;
  351. msiMem16: memrefsize := 16;
  352. msiMem32: memrefsize := 32;
  353. msiMem64: memrefsize := 64;
  354. msiMem128: memrefsize := 128;
  355. msiMem256: memrefsize := 256;
  356. msiMemRegSize
  357. : for j := 1 to ops do
  358. begin
  359. if operands[j].Opr.Typ = OPR_REGISTER then
  360. begin
  361. if (tx86operand(operands[j]).opsize <> S_NO) and
  362. (tx86operand(operands[j]).size <> OS_NO) then
  363. begin
  364. case tx86operand(operands[j]).opsize of
  365. S_B : memrefsize := 8;
  366. S_W : memrefsize := 16;
  367. S_L : memrefsize := 32;
  368. S_Q : memrefsize := 64;
  369. S_XMM : memrefsize := 128;
  370. S_YMM : memrefsize := 256;
  371. else Internalerror(777200);
  372. end;
  373. break;
  374. end;
  375. end;
  376. end;
  377. end;
  378. if memrefsize > -1 then
  379. begin
  380. // CALC REAL-MEMORY-OPERAND-SIZE AND A POSSIBLE OFFSET
  381. // OFFSET:
  382. // e.g. PAND XMM0, [RAX + 16] =>> OFFSET = 16 BYTES
  383. // PAND XMM0, [RAX + a.b + 10] =>> OFFSET = 10 BYTES (a = record-variable)
  384. memopsize := 0;
  385. case operands[i].opr.typ of
  386. OPR_LOCAL: memopsize := operands[i].opr.localvarsize * 8;
  387. OPR_REFERENCE: memopsize := operands[i].opr.varsize * 8;
  388. end;
  389. if memopsize = 0 then memopsize := topsize2memsize[tx86operand(operands[i]).opsize];
  390. if (memopsize > 0) and
  391. (memrefsize > 0) then
  392. begin
  393. memoffset := 0;
  394. case operands[i].opr.typ of
  395. OPR_LOCAL:
  396. memoffset := operands[i].opr.localconstoffset;
  397. OPR_REFERENCE:
  398. memoffset := operands[i].opr.constoffset;
  399. end;
  400. if memoffset < 0 then
  401. begin
  402. Message2(asmr_w_check_mem_operand_negative_offset,
  403. std_op2str[opcode],
  404. ToStr(memoffset));
  405. end
  406. else if (memopsize < (memrefsize + memoffset * 8)) then
  407. begin
  408. if memoffset = 0 then
  409. begin
  410. Message3(asmr_w_check_mem_operand_size3,
  411. std_op2str[opcode],
  412. ToStr(memopsize),
  413. ToStr(memrefsize)
  414. );
  415. end
  416. else
  417. begin
  418. Message4(asmr_w_check_mem_operand_size_offset,
  419. std_op2str[opcode],
  420. ToStr(memopsize),
  421. ToStr(memrefsize),
  422. ToStr(memoffset)
  423. );
  424. end;
  425. end;
  426. end;
  427. end;
  428. end;
  429. end;
  430. end;
  431. end;
  432. if (ExistsMemRefNoSize or ExistsConstNoSize) and
  433. (MemRefInfo(opcode).ExistsSSEAVX) then
  434. begin
  435. for i := 1 to ops do
  436. begin
  437. if (tx86operand(operands[i]).opsize = S_NO) then
  438. begin
  439. case operands[i].Opr.Typ of
  440. OPR_REFERENCE:
  441. case MemRefInfo(opcode).MemRefSize of
  442. msiMem8:
  443. begin
  444. tx86operand(operands[i]).opsize := S_B;
  445. tx86operand(operands[i]).size := OS_8;
  446. end;
  447. msiMultiple8:
  448. begin
  449. tx86operand(operands[i]).opsize := S_B;
  450. tx86operand(operands[i]).size := OS_8;
  451. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"8 bit memory operand"');
  452. end;
  453. msiMem16:
  454. begin
  455. tx86operand(operands[i]).opsize := S_W;
  456. tx86operand(operands[i]).size := OS_16;
  457. end;
  458. msiMultiple16:
  459. begin
  460. tx86operand(operands[i]).opsize := S_W;
  461. tx86operand(operands[i]).size := OS_16;
  462. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"16 bit memory operand"');
  463. end;
  464. msiMem32:
  465. begin
  466. tx86operand(operands[i]).opsize := S_L;
  467. tx86operand(operands[i]).size := OS_32;
  468. end;
  469. msiMultiple32:
  470. begin
  471. tx86operand(operands[i]).opsize := S_L;
  472. tx86operand(operands[i]).size := OS_32;
  473. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"32 bit memory operand"');
  474. end;
  475. msiMem64:
  476. begin
  477. tx86operand(operands[i]).opsize := S_Q;
  478. tx86operand(operands[i]).size := OS_M64;
  479. end;
  480. msiMultiple64:
  481. begin
  482. tx86operand(operands[i]).opsize := S_Q;
  483. tx86operand(operands[i]).size := OS_M64;
  484. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"64 bit memory operand"');
  485. end;
  486. msiMem128:
  487. begin
  488. tx86operand(operands[i]).opsize := S_XMM;
  489. tx86operand(operands[i]).size := OS_M128;
  490. end;
  491. msiMultiple128:
  492. begin
  493. tx86operand(operands[i]).opsize := S_XMM;
  494. tx86operand(operands[i]).size := OS_M128;
  495. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"128 bit memory operand"');
  496. end;
  497. msiMem256:
  498. begin
  499. tx86operand(operands[i]).opsize := S_YMM;
  500. tx86operand(operands[i]).size := OS_M256;
  501. opsize := S_YMM;
  502. end;
  503. msiMultiple256:
  504. begin
  505. tx86operand(operands[i]).opsize := S_YMM;
  506. tx86operand(operands[i]).size := OS_M256;
  507. opsize := S_YMM;
  508. Message2(asmr_w_check_mem_operand_automap_multiple_size, std_op2str[opcode], '"256 bit memory operand"');
  509. end;
  510. msiMemRegSize:
  511. begin
  512. // mem-ref-size = register size
  513. for j := 1 to ops do
  514. begin
  515. if operands[j].Opr.Typ = OPR_REGISTER then
  516. begin
  517. if (tx86operand(operands[j]).opsize <> S_NO) and
  518. (tx86operand(operands[j]).size <> OS_NO) then
  519. begin
  520. tx86operand(operands[i]).opsize := tx86operand(operands[j]).opsize;
  521. tx86operand(operands[i]).size := tx86operand(operands[j]).size;
  522. break;
  523. end
  524. else Message(asmr_e_unable_to_determine_reference_size);
  525. end;
  526. end;
  527. end;
  528. msiMemRegx64y128:
  529. begin
  530. for j := 1 to ops do
  531. begin
  532. if operands[j].Opr.Typ = OPR_REGISTER then
  533. begin
  534. case getsubreg(operands[j].opr.reg) of
  535. R_SUBMMX: begin
  536. tx86operand(operands[i]).opsize := S_Q;
  537. tx86operand(operands[i]).size := OS_M64;
  538. break;
  539. end;
  540. R_SUBMMY: begin
  541. tx86operand(operands[i]).opsize := S_XMM;
  542. tx86operand(operands[i]).size := OS_M128;
  543. break;
  544. end;
  545. else Message(asmr_e_unable_to_determine_reference_size);
  546. end;
  547. end;
  548. end;
  549. end;
  550. msiMemRegx64y256:
  551. begin
  552. for j := 1 to ops do
  553. begin
  554. if operands[j].Opr.Typ = OPR_REGISTER then
  555. begin
  556. case getsubreg(operands[j].opr.reg) of
  557. R_SUBMMX: begin
  558. tx86operand(operands[i]).opsize := S_Q;
  559. tx86operand(operands[i]).size := OS_M64;
  560. break;
  561. end;
  562. R_SUBMMY: begin
  563. tx86operand(operands[i]).opsize := S_YMM;
  564. tx86operand(operands[i]).size := OS_M256;
  565. break;
  566. end;
  567. else Message(asmr_e_unable_to_determine_reference_size);
  568. end;
  569. end;
  570. end;
  571. end;
  572. msiNoSize: ; // all memory-sizes are ok
  573. msiMultiple: Message(asmr_e_unable_to_determine_reference_size); // TODO individual message
  574. end;
  575. OPR_CONSTANT:
  576. case MemRefInfo(opcode).ConstSize of
  577. csiMem8: begin
  578. tx86operand(operands[i]).opsize := S_B;
  579. tx86operand(operands[i]).size := OS_8;
  580. end;
  581. csiMem16: begin
  582. tx86operand(operands[i]).opsize := S_W;
  583. tx86operand(operands[i]).size := OS_16;
  584. end;
  585. csiMem32: begin
  586. tx86operand(operands[i]).opsize := S_L;
  587. tx86operand(operands[i]).size := OS_32;
  588. end;
  589. end;
  590. end;
  591. end;
  592. end;
  593. end;
  594. for i:=1 to ops do
  595. begin
  596. operands[i].SetCorrectSize(opcode);
  597. if tx86operand(operands[i]).opsize=S_NO then
  598. begin
  599. {$ifdef x86_64}
  600. if (opcode=A_MOVQ) and
  601. (ops=2) and
  602. (operands[1].opr.typ=OPR_CONSTANT) then
  603. opsize:=S_Q
  604. else
  605. {$endif x86_64}
  606. case operands[i].Opr.Typ of
  607. OPR_LOCAL,
  608. OPR_REFERENCE :
  609. begin
  610. { for 3-operand opcodes, operand #1 (in ATT order) is always an immediate,
  611. don't consider it. }
  612. if i=ops then
  613. operand2:=i-1
  614. else
  615. operand2:=i+1;
  616. if operand2>0 then
  617. begin
  618. { Only allow register as operand to take the size from }
  619. if operands[operand2].opr.typ=OPR_REGISTER then
  620. begin
  621. if ((opcode<>A_MOVD) and
  622. (opcode<>A_CVTSI2SS)) then
  623. begin
  624. //tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
  625. // torsten - 31.01.2012
  626. // old: xmm/ymm-register operands have a opsize = "S_NO"
  627. // new: xmm/ymm-register operands have a opsize = "S_XMM/S_YMM"
  628. // any SSE- and AVX-opcodes have mixed operand sizes (e.g. cvtsd2ss xmmreg, xmmreg/m32)
  629. // in this case is we need the old handling ("S_NO")
  630. // =>> ignore
  631. if (tx86operand(operands[operand2]).opsize <> S_XMM) and
  632. (tx86operand(operands[operand2]).opsize <> S_YMM) then
  633. tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize
  634. else tx86operand(operands[operand2]).opsize := S_NO;
  635. end;
  636. end
  637. else
  638. begin
  639. { if no register then take the opsize (which is available with ATT),
  640. if not availble then give an error }
  641. if opsize<>S_NO then
  642. tx86operand(operands[i]).opsize:=opsize
  643. else
  644. begin
  645. if (m_delphi in current_settings.modeswitches) then
  646. Message(asmr_w_unable_to_determine_reference_size_using_dword)
  647. else
  648. Message(asmr_e_unable_to_determine_reference_size);
  649. { recovery }
  650. tx86operand(operands[i]).opsize:=S_L;
  651. end;
  652. end;
  653. end
  654. else
  655. begin
  656. if opsize<>S_NO then
  657. tx86operand(operands[i]).opsize:=opsize
  658. end;
  659. end;
  660. OPR_SYMBOL :
  661. begin
  662. { Fix lea which need a reference }
  663. if opcode=A_LEA then
  664. begin
  665. s:=operands[i].opr.symbol;
  666. so:=operands[i].opr.symofs;
  667. operands[i].opr.typ:=OPR_REFERENCE;
  668. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  669. operands[i].opr.ref.symbol:=s;
  670. operands[i].opr.ref.offset:=so;
  671. end;
  672. {$ifdef x86_64}
  673. tx86operand(operands[i]).opsize:=S_Q;
  674. {$else x86_64}
  675. tx86operand(operands[i]).opsize:=S_L;
  676. {$endif x86_64}
  677. end;
  678. end;
  679. end;
  680. end;
  681. end;
  682. procedure Tx86Instruction.SetInstructionOpsize;
  683. begin
  684. if opsize<>S_NO then
  685. exit;
  686. if (OpOrder=op_intel) then
  687. SwapOperands;
  688. case ops of
  689. 0 : ;
  690. 1 :
  691. begin
  692. { "push es" must be stored as a long PM }
  693. if ((opcode=A_PUSH) or
  694. (opcode=A_POP)) and
  695. (operands[1].opr.typ=OPR_REGISTER) and
  696. is_segment_reg(operands[1].opr.reg) then
  697. opsize:=S_L
  698. else
  699. opsize:=tx86operand(operands[1]).opsize;
  700. end;
  701. 2 :
  702. begin
  703. case opcode of
  704. A_MOVZX,A_MOVSX :
  705. begin
  706. if tx86operand(operands[1]).opsize=S_NO then
  707. begin
  708. tx86operand(operands[1]).opsize:=S_B;
  709. if (m_delphi in current_settings.modeswitches) then
  710. Message(asmr_w_unable_to_determine_reference_size_using_byte)
  711. else
  712. Message(asmr_e_unable_to_determine_reference_size);
  713. end;
  714. case tx86operand(operands[1]).opsize of
  715. S_W :
  716. case tx86operand(operands[2]).opsize of
  717. S_L :
  718. opsize:=S_WL;
  719. {$ifdef x86_64}
  720. S_Q :
  721. opsize:=S_WQ;
  722. {$endif}
  723. end;
  724. S_B :
  725. begin
  726. case tx86operand(operands[2]).opsize of
  727. S_W :
  728. opsize:=S_BW;
  729. S_L :
  730. opsize:=S_BL;
  731. {$ifdef x86_64}
  732. S_Q :
  733. opsize:=S_BQ;
  734. {$endif}
  735. end;
  736. end;
  737. end;
  738. end;
  739. A_MOVD : { movd is a move from a mmx register to a
  740. 32 bit register or memory, so no opsize is correct here PM }
  741. exit;
  742. A_MOVQ :
  743. opsize:=S_IQ;
  744. A_OUT :
  745. opsize:=tx86operand(operands[1]).opsize;
  746. else
  747. opsize:=tx86operand(operands[2]).opsize;
  748. end;
  749. end;
  750. 3,4 :
  751. opsize:=tx86operand(operands[ops]).opsize;
  752. end;
  753. end;
  754. procedure Tx86Instruction.CheckOperandSizes;
  755. var
  756. sizeerr : boolean;
  757. i : longint;
  758. begin
  759. { Check only the most common opcodes here, the others are done in
  760. the assembler pass }
  761. case opcode of
  762. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  763. A_CMP,A_MOV,
  764. A_ADD,A_SUB,A_ADC,A_SBB,
  765. A_AND,A_OR,A_TEST,A_XOR: ;
  766. else
  767. exit;
  768. end;
  769. { Handle the BW,BL,WL separatly }
  770. sizeerr:=false;
  771. { special push/pop selector case }
  772. if ((opcode=A_PUSH) or
  773. (opcode=A_POP)) and
  774. (operands[1].opr.typ=OPR_REGISTER) and
  775. is_segment_reg(operands[1].opr.reg) then
  776. exit;
  777. if opsize in [S_BW,S_BL,S_WL] then
  778. begin
  779. if ops<>2 then
  780. sizeerr:=true
  781. else
  782. begin
  783. case opsize of
  784. S_BW :
  785. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
  786. S_BL :
  787. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
  788. S_WL :
  789. sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
  790. end;
  791. end;
  792. end
  793. else
  794. begin
  795. for i:=1 to ops do
  796. begin
  797. if (operands[i].opr.typ<>OPR_CONSTANT) and
  798. (tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  799. (tx86operand(operands[i]).opsize<>opsize) then
  800. sizeerr:=true;
  801. end;
  802. end;
  803. if sizeerr then
  804. begin
  805. { if range checks are on then generate an error }
  806. if (cs_compilesystem in current_settings.moduleswitches) or
  807. not (cs_check_range in current_settings.localswitches) then
  808. Message(asmr_w_size_suffix_and_dest_dont_match)
  809. else
  810. Message(asmr_e_size_suffix_and_dest_dont_match);
  811. end;
  812. end;
  813. { This check must be done with the operand in ATT order
  814. i.e.after swapping in the intel reader
  815. but before swapping in the NASM and TASM writers PM }
  816. procedure Tx86Instruction.CheckNonCommutativeOpcodes;
  817. begin
  818. if (OpOrder=op_intel) then
  819. SwapOperands;
  820. if (
  821. (ops=2) and
  822. (operands[1].opr.typ=OPR_REGISTER) and
  823. (operands[2].opr.typ=OPR_REGISTER) and
  824. { if the first is ST and the second is also a register
  825. it is necessarily ST1 .. ST7 }
  826. ((operands[1].opr.reg=NR_ST) or
  827. (operands[1].opr.reg=NR_ST0))
  828. ) or
  829. (ops=0) then
  830. if opcode=A_FSUBR then
  831. opcode:=A_FSUB
  832. else if opcode=A_FSUB then
  833. opcode:=A_FSUBR
  834. else if opcode=A_FDIVR then
  835. opcode:=A_FDIV
  836. else if opcode=A_FDIV then
  837. opcode:=A_FDIVR
  838. else if opcode=A_FSUBRP then
  839. opcode:=A_FSUBP
  840. else if opcode=A_FSUBP then
  841. opcode:=A_FSUBRP
  842. else if opcode=A_FDIVRP then
  843. opcode:=A_FDIVP
  844. else if opcode=A_FDIVP then
  845. opcode:=A_FDIVRP;
  846. if (
  847. (ops=1) and
  848. (operands[1].opr.typ=OPR_REGISTER) and
  849. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  850. (operands[1].opr.reg<>NR_ST) and
  851. (operands[1].opr.reg<>NR_ST0)
  852. ) then
  853. if opcode=A_FSUBRP then
  854. opcode:=A_FSUBP
  855. else if opcode=A_FSUBP then
  856. opcode:=A_FSUBRP
  857. else if opcode=A_FDIVRP then
  858. opcode:=A_FDIVP
  859. else if opcode=A_FDIVP then
  860. opcode:=A_FDIVRP;
  861. end;
  862. procedure Tx86Instruction.FixupOpcode;
  863. begin
  864. { does nothing by default }
  865. end;
  866. {*****************************************************************************
  867. opcode Adding
  868. *****************************************************************************}
  869. function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
  870. var
  871. siz : topsize;
  872. i,asize : longint;
  873. ai : taicpu;
  874. begin
  875. if (OpOrder=op_intel) then
  876. SwapOperands;
  877. ai:=nil;
  878. for i:=1 to Ops do
  879. if not operands[i].CheckOperand then
  880. exit;
  881. { Get Opsize }
  882. if (opsize<>S_NO) or (Ops=0) then
  883. siz:=opsize
  884. else
  885. begin
  886. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  887. siz:=tx86operand(operands[1]).opsize
  888. else
  889. siz:=tx86operand(operands[Ops]).opsize;
  890. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  891. if (ops=2) and
  892. (tx86operand(operands[1]).opsize<>S_NO) and
  893. (tx86operand(operands[2]).opsize<>S_NO) and
  894. (tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
  895. siz:=S_NO;
  896. end;
  897. if ((opcode=A_MOVD)or
  898. (opcode=A_CVTSI2SS)) and
  899. ((tx86operand(operands[1]).opsize=S_NO) or
  900. (tx86operand(operands[2]).opsize=S_NO)) then
  901. siz:=S_NO;
  902. { NASM does not support FADD without args
  903. as alias of FADDP
  904. and GNU AS interprets FADD without operand differently
  905. for version 2.9.1 and 2.9.5 !! }
  906. if (ops=0) and
  907. ((opcode=A_FADD) or
  908. (opcode=A_FMUL) or
  909. (opcode=A_FSUB) or
  910. (opcode=A_FSUBR) or
  911. (opcode=A_FDIV) or
  912. (opcode=A_FDIVR)) then
  913. begin
  914. if opcode=A_FADD then
  915. opcode:=A_FADDP
  916. else if opcode=A_FMUL then
  917. opcode:=A_FMULP
  918. else if opcode=A_FSUB then
  919. opcode:=A_FSUBP
  920. else if opcode=A_FSUBR then
  921. opcode:=A_FSUBRP
  922. else if opcode=A_FDIV then
  923. opcode:=A_FDIVP
  924. else if opcode=A_FDIVR then
  925. opcode:=A_FDIVRP;
  926. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  927. end;
  928. {It is valid to specify some instructions without operand size.}
  929. if siz=S_NO then
  930. begin
  931. if (ops=1) and (opcode=A_INT) then
  932. siz:=S_B;
  933. if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) then
  934. siz:=S_W;
  935. if (ops=1) and (opcode=A_PUSH) then
  936. begin
  937. {We are a 32 compiler, assume 32-bit by default. This is Delphi
  938. compatible but bad coding practise.}
  939. siz:=S_L;
  940. message(asmr_w_unable_to_determine_reference_size_using_dword);
  941. end;
  942. if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
  943. if ops=1 then
  944. siz:=S_NEAR
  945. else
  946. siz:=S_FAR;
  947. end;
  948. { GNU AS interprets FDIV without operand differently
  949. for version 2.9.1 and 2.10
  950. we add explicit args to it !! }
  951. if (ops=0) and
  952. ((opcode=A_FSUBP) or
  953. (opcode=A_FSUBRP) or
  954. (opcode=A_FDIVP) or
  955. (opcode=A_FDIVRP) or
  956. (opcode=A_FSUB) or
  957. (opcode=A_FSUBR) or
  958. (opcode=A_FADD) or
  959. (opcode=A_FADDP) or
  960. (opcode=A_FDIV) or
  961. (opcode=A_FDIVR)) then
  962. begin
  963. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  964. ops:=2;
  965. operands[1].opr.typ:=OPR_REGISTER;
  966. operands[2].opr.typ:=OPR_REGISTER;
  967. operands[1].opr.reg:=NR_ST0;
  968. operands[2].opr.reg:=NR_ST1;
  969. end;
  970. if (ops=1) and
  971. (
  972. (operands[1].opr.typ=OPR_REGISTER) and
  973. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  974. (operands[1].opr.reg<>NR_ST) and
  975. (operands[1].opr.reg<>NR_ST0)
  976. ) and
  977. (
  978. (opcode=A_FSUBP) or
  979. (opcode=A_FSUBRP) or
  980. (opcode=A_FDIVP) or
  981. (opcode=A_FDIVRP) or
  982. (opcode=A_FADDP) or
  983. (opcode=A_FMULP)
  984. ) then
  985. begin
  986. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  987. ops:=2;
  988. operands[2].opr.typ:=OPR_REGISTER;
  989. operands[2].opr.reg:=operands[1].opr.reg;
  990. operands[1].opr.reg:=NR_ST0;
  991. end;
  992. if (ops=1) and
  993. (
  994. (operands[1].opr.typ=OPR_REGISTER) and
  995. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  996. (operands[1].opr.reg<>NR_ST) and
  997. (operands[1].opr.reg<>NR_ST0)
  998. ) and
  999. (
  1000. (opcode=A_FSUB) or
  1001. (opcode=A_FSUBR) or
  1002. (opcode=A_FDIV) or
  1003. (opcode=A_FDIVR) or
  1004. (opcode=A_FADD) or
  1005. (opcode=A_FMUL)
  1006. ) then
  1007. begin
  1008. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  1009. ops:=2;
  1010. operands[2].opr.typ:=OPR_REGISTER;
  1011. operands[2].opr.reg:=NR_ST0;
  1012. end;
  1013. { I tried to convince Linus Torvalds to add
  1014. code to support ENTER instruction
  1015. (when raising a stack page fault)
  1016. but he replied that ENTER is a bad instruction and
  1017. Linux does not need to support it
  1018. So I think its at least a good idea to add a warning
  1019. if someone uses this in assembler code
  1020. FPC itself does not use it at all PM }
  1021. if (opcode=A_ENTER) and
  1022. (target_info.system in [system_i386_linux,system_i386_FreeBSD,system_i386_android]) then
  1023. Message(asmr_w_enter_not_supported_by_linux);
  1024. ai:=taicpu.op_none(opcode,siz);
  1025. ai.fileinfo:=filepos;
  1026. ai.SetOperandOrder(OpOrder);
  1027. ai.Ops:=Ops;
  1028. ai.Allocate_oper(Ops);
  1029. for i:=1 to Ops do
  1030. case operands[i].opr.typ of
  1031. OPR_CONSTANT :
  1032. ai.loadconst(i-1,operands[i].opr.val);
  1033. OPR_REGISTER:
  1034. ai.loadreg(i-1,operands[i].opr.reg);
  1035. OPR_SYMBOL:
  1036. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  1037. OPR_LOCAL :
  1038. with operands[i].opr do
  1039. ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
  1040. localscale,localgetoffset,localforceref);
  1041. OPR_REFERENCE:
  1042. begin
  1043. ai.loadref(i-1,operands[i].opr.ref);
  1044. if operands[i].size<>OS_NO then
  1045. begin
  1046. asize:=0;
  1047. case operands[i].size of
  1048. OS_8,OS_S8 :
  1049. asize:=OT_BITS8;
  1050. OS_16,OS_S16 :
  1051. asize:=OT_BITS16;
  1052. OS_32,OS_S32,OS_F32,OS_M32 :
  1053. asize:=OT_BITS32;
  1054. OS_64,OS_S64:
  1055. begin
  1056. { Only FPU operations know about 64bit values, for all
  1057. integer operations it is seen as 32bit
  1058. this applies only to i386, see tw16622}
  1059. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  1060. asize:=OT_BITS64
  1061. {$ifdef i386}
  1062. else
  1063. asize:=OT_BITS32
  1064. {$endif i386}
  1065. ;
  1066. end;
  1067. OS_F64,OS_C64, OS_M64 :
  1068. asize:=OT_BITS64;
  1069. OS_F80 :
  1070. asize:=OT_BITS80;
  1071. OS_128,OS_M128,OS_MS128:
  1072. asize := OT_BITS128;
  1073. OS_M256,OS_MS256:
  1074. asize := OT_BITS256;
  1075. end;
  1076. if asize<>0 then
  1077. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  1078. end;
  1079. end;
  1080. end;
  1081. { Condition ? }
  1082. if condition<>C_None then
  1083. ai.SetCondition(condition);
  1084. { Set is_jmp, it enables asmwriter to emit short jumps if appropriate }
  1085. if (opcode=A_JMP) or (opcode=A_JCC) then
  1086. ai.is_jmp := True;
  1087. { Concat the opcode or give an error }
  1088. if assigned(ai) then
  1089. p.concat(ai)
  1090. else
  1091. Message(asmr_e_invalid_opcode_and_operand);
  1092. result:=ai;
  1093. end;
  1094. end.