cpuinfo.pas 34 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type extended;
  19. ts128real = type extended;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_armv3,
  26. cpu_armv4,
  27. cpu_armv4t,
  28. cpu_armv5,
  29. cpu_armv5t,
  30. cpu_armv5te,
  31. cpu_armv5tej,
  32. cpu_armv6,
  33. cpu_armv6k,
  34. cpu_armv6t2,
  35. cpu_armv6z,
  36. cpu_armv6m,
  37. cpu_armv7,
  38. cpu_armv7a,
  39. cpu_armv7r,
  40. cpu_armv7m,
  41. cpu_armv7em
  42. );
  43. Const
  44. cpu_arm = [cpu_none,cpu_armv3,cpu_armv4,cpu_armv4t,cpu_armv5];
  45. cpu_thumb = [cpu_armv6m];
  46. cpu_thumb2 = [cpu_armv7m];
  47. Type
  48. tfputype =
  49. (fpu_none,
  50. fpu_soft,
  51. fpu_libgcc,
  52. fpu_fpa,
  53. fpu_fpa10,
  54. fpu_fpa11,
  55. fpu_vfpv2,
  56. fpu_vfpv3,
  57. fpu_vfpv3_d16,
  58. fpu_fpv4_s16
  59. );
  60. tcontrollertype =
  61. (ct_none,
  62. { Phillips }
  63. ct_lpc1343,
  64. ct_lpc2114,
  65. ct_lpc2124,
  66. ct_lpc2194,
  67. ct_lpc1754,
  68. ct_lpc1756,
  69. ct_lpc1758,
  70. ct_lpc1764,
  71. ct_lpc1766,
  72. ct_lpc1768,
  73. { ATMEL }
  74. ct_at91sam7s256,
  75. ct_at91sam7se256,
  76. ct_at91sam7x256,
  77. ct_at91sam7xc256,
  78. { STMicroelectronics }
  79. ct_stm32f100x4, // LD&MD value line, 4=16,6=32,8=64,b=128
  80. ct_stm32f100x6,
  81. ct_stm32f100x8,
  82. ct_stm32f100xB,
  83. ct_stm32f100xC, // HD value line, r=512,d=384,c=256
  84. ct_stm32f100xD,
  85. ct_stm32f100xE,
  86. ct_stm32f101x4, // LD Access line, 4=16,6=32
  87. ct_stm32f101x6,
  88. ct_stm32f101x8, // MD Access line, 8=64,B=128
  89. ct_stm32f101xB,
  90. ct_stm32f101xC, // HD Access line, C=256,D=384,E=512
  91. ct_stm32f101xD,
  92. ct_stm32f101xE,
  93. ct_stm32f101xF, // XL Access line, F=768,G=1M
  94. ct_stm32f101xG,
  95. ct_stm32f102x4, // LD usb access line, 4=16,6=32
  96. ct_stm32f102x6,
  97. ct_stm32f102x8, // MD usb access line, 8=64,B=128
  98. ct_stm32f102xB,
  99. ct_stm32f103x4, // LD performance line, 4=16,6=32
  100. ct_stm32f103x6,
  101. ct_stm32f103x8, // MD performance line, 8=64,B=128
  102. ct_stm32f103xB,
  103. ct_stm32f103xC, // HD performance line, C=256,D=384,E=512
  104. ct_stm32f103xD,
  105. ct_stm32f103xE,
  106. ct_stm32f103xF, // XL performance line, F=768,G=1M
  107. ct_stm32f103xG,
  108. ct_stm32f107x8, // MD and HD connectivity line, 8=64,B=128,C=256
  109. ct_stm32f107xB,
  110. ct_stm32f107xC,
  111. { TI - Fury Class - 64 K Flash, 16 K SRAM Devices }
  112. ct_lm3s1110,
  113. ct_lm3s1133,
  114. ct_lm3s1138,
  115. ct_lm3s1150,
  116. ct_lm3s1162,
  117. ct_lm3s1165,
  118. ct_lm3s1166,
  119. ct_lm3s2110,
  120. ct_lm3s2139,
  121. ct_lm3s6100,
  122. ct_lm3s6110,
  123. { TI - Fury Class - 128K Flash, 32K SRAM devices }
  124. ct_lm3s1601,
  125. ct_lm3s1608,
  126. ct_lm3s1620,
  127. ct_lm3s1635,
  128. ct_lm3s1636,
  129. ct_lm3s1637,
  130. ct_lm3s1651,
  131. ct_lm3s2601,
  132. ct_lm3s2608,
  133. ct_lm3s2620,
  134. ct_lm3s2637,
  135. ct_lm3s2651,
  136. ct_lm3s6610,
  137. ct_lm3s6611,
  138. ct_lm3s6618,
  139. ct_lm3s6633,
  140. ct_lm3s6637,
  141. ct_lm3s8630,
  142. { TI - Fury Class - 256K Flash, 64K SRAM devices }
  143. ct_lm3s1911,
  144. ct_lm3s1918,
  145. ct_lm3s1937,
  146. ct_lm3s1958,
  147. ct_lm3s1960,
  148. ct_lm3s1968,
  149. ct_lm3s1969,
  150. ct_lm3s2911,
  151. ct_lm3s2918,
  152. ct_lm3s2919,
  153. ct_lm3s2939,
  154. ct_lm3s2948,
  155. ct_lm3s2950,
  156. ct_lm3s2965,
  157. ct_lm3s6911,
  158. ct_lm3s6918,
  159. ct_lm3s6938,
  160. ct_lm3s6950,
  161. ct_lm3s6952,
  162. ct_lm3s6965,
  163. ct_lm3s8930,
  164. ct_lm3s8933,
  165. ct_lm3s8938,
  166. ct_lm3s8962,
  167. ct_lm3s8970,
  168. ct_lm3s8971,
  169. { TI - Tempest Tempest - 256 K Flash, 64 K SRAM }
  170. ct_lm3s5951,
  171. ct_lm3s5956,
  172. ct_lm3s1b21,
  173. ct_lm3s2b93,
  174. ct_lm3s5b91,
  175. ct_lm3s9b81,
  176. ct_lm3s9b90,
  177. ct_lm3s9b92,
  178. ct_lm3s9b95,
  179. ct_lm3s9b96,
  180. { SAMSUNG }
  181. ct_sc32442b,
  182. // generic Thumb2 target
  183. ct_thumb2bare
  184. );
  185. Const
  186. {# Size of native extended floating point type }
  187. extended_size = 12;
  188. {# Size of a multimedia register }
  189. mmreg_size = 16;
  190. { target cpu string (used by compiler options) }
  191. target_cpu_string = 'arm';
  192. { calling conventions supported by the code generator }
  193. supported_calling_conventions : tproccalloptions = [
  194. pocall_internproc,
  195. pocall_safecall,
  196. pocall_stdcall,
  197. { same as stdcall only different name mangling }
  198. pocall_cdecl,
  199. { same as stdcall only different name mangling }
  200. pocall_cppdecl,
  201. { same as stdcall but floating point numbers are handled like equal sized integers }
  202. pocall_softfloat,
  203. { same as stdcall (requires that all const records are passed by
  204. reference, but that's already done for stdcall) }
  205. pocall_mwpascal,
  206. { used for interrupt handling }
  207. pocall_interrupt
  208. ];
  209. cputypestr : array[tcputype] of string[8] = ('',
  210. 'ARMV3',
  211. 'ARMV4',
  212. 'ARMV4T',
  213. 'ARMV5',
  214. 'ARMV5T',
  215. 'ARMV5TE',
  216. 'ARMV5TEJ',
  217. 'ARMV6',
  218. 'ARMV6K',
  219. 'ARMV6T2',
  220. 'ARMV6Z',
  221. 'ARMV6M',
  222. 'ARMV7',
  223. 'ARMV7A',
  224. 'ARMV7R',
  225. 'ARMV7M',
  226. 'ARMV7EM'
  227. );
  228. fputypestr : array[tfputype] of string[9] = ('',
  229. 'SOFT',
  230. 'LIBGCC',
  231. 'FPA',
  232. 'FPA10',
  233. 'FPA11',
  234. 'VFPV2',
  235. 'VFPV3',
  236. 'VFPV3_D16',
  237. 'FPV4_S16'
  238. );
  239. { We know that there are fields after sramsize
  240. but we don't care about this warning }
  241. {$WARN 3177 OFF}
  242. embedded_controllers : array [tcontrollertype] of tcontrollerdatatype =
  243. ((
  244. controllertypestr:'';
  245. controllerunitstr:'';
  246. flashbase:0;
  247. flashsize:0;
  248. srambase:0;
  249. sramsize:0
  250. ),
  251. (
  252. controllertypestr:'LPC1343';
  253. controllerunitstr:'LPC1343';
  254. flashbase:$00000000;
  255. flashsize:$00008000;
  256. srambase:$10000000;
  257. sramsize:$00002000
  258. ),
  259. (
  260. controllertypestr:'LPC2114';
  261. controllerunitstr:'LPC21x4';
  262. flashbase:$00000000;
  263. flashsize:$00040000;
  264. srambase:$40000000;
  265. sramsize:$00004000
  266. ),
  267. (
  268. controllertypestr:'LPC2124';
  269. controllerunitstr:'LPC21x4';
  270. flashbase:$00000000;
  271. flashsize:$00040000;
  272. srambase:$40000000;
  273. sramsize:$00004000
  274. ),
  275. (
  276. controllertypestr:'LPC2194';
  277. controllerunitstr:'LPC21x4';
  278. flashbase:$00000000;
  279. flashsize:$00040000;
  280. srambase:$40000000;
  281. sramsize:$00004000
  282. ),
  283. (
  284. controllertypestr:'LPC1754';
  285. controllerunitstr:'LPC1754';
  286. flashbase:$00000000;
  287. flashsize:$00020000;
  288. srambase:$10000000;
  289. sramsize:$00004000
  290. ),
  291. (
  292. controllertypestr:'LPC1756';
  293. controllerunitstr:'LPC1756';
  294. flashbase:$00000000;
  295. flashsize:$00040000;
  296. srambase:$10000000;
  297. sramsize:$00004000
  298. ),
  299. (
  300. controllertypestr:'LPC1758';
  301. controllerunitstr:'LPC1758';
  302. flashbase:$00000000;
  303. flashsize:$00080000;
  304. srambase:$10000000;
  305. sramsize:$00008000
  306. ),
  307. (
  308. controllertypestr:'LPC1764';
  309. controllerunitstr:'LPC1764';
  310. flashbase:$00000000;
  311. flashsize:$00020000;
  312. srambase:$10000000;
  313. sramsize:$00004000
  314. ),
  315. (
  316. controllertypestr:'LPC1766';
  317. controllerunitstr:'LPC1766';
  318. flashbase:$00000000;
  319. flashsize:$00040000;
  320. srambase:$10000000;
  321. sramsize:$00008000
  322. ),
  323. (
  324. controllertypestr:'LPC1768';
  325. controllerunitstr:'LPC1768';
  326. flashbase:$00000000;
  327. flashsize:$00080000;
  328. srambase:$10000000;
  329. sramsize:$00008000
  330. ),
  331. (
  332. controllertypestr:'AT91SAM7S256';
  333. controllerunitstr:'AT91SAM7x256';
  334. flashbase:$00000000;
  335. flashsize:$00040000;
  336. srambase:$00200000;
  337. sramsize:$00010000
  338. ),
  339. (
  340. controllertypestr:'AT91SAM7SE256';
  341. controllerunitstr:'AT91SAM7x256';
  342. flashbase:$00000000;
  343. flashsize:$00040000;
  344. srambase:$00200000;
  345. sramsize:$00010000
  346. ),
  347. (
  348. controllertypestr:'AT91SAM7X256';
  349. controllerunitstr:'AT91SAM7x256';
  350. flashbase:$00000000;
  351. flashsize:$00040000;
  352. srambase:$00200000;
  353. sramsize:$00010000
  354. ),
  355. (
  356. controllertypestr:'AT91SAM7XC256';
  357. controllerunitstr:'AT91SAM7x256';
  358. flashbase:$00000000;
  359. flashsize:$00040000;
  360. srambase:$00200000;
  361. sramsize:$00010000
  362. ),
  363. { STM32F1 series }
  364. (controllertypestr:'STM32F100X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  365. (controllertypestr:'STM32F100X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001000),
  366. (controllertypestr:'STM32F100X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002000),
  367. (controllertypestr:'STM32F100XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00002000),
  368. (controllertypestr:'STM32F100XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00006000),
  369. (controllertypestr:'STM32F100XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00008000),
  370. (controllertypestr:'STM32F100XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00008000),
  371. (controllertypestr:'STM32F101X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  372. (controllertypestr:'STM32F101X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001800),
  373. (controllertypestr:'STM32F101X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002800),
  374. (controllertypestr:'STM32F101XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00004000),
  375. (controllertypestr:'STM32F101XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00008000),
  376. (controllertypestr:'STM32F101XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$0000C000),
  377. (controllertypestr:'STM32F101XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$0000C000),
  378. (controllertypestr:'STM32F101XF'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$000C0000; srambase:$20000000; sramsize:$00014000),
  379. (controllertypestr:'STM32F101XG'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00014000),
  380. (controllertypestr:'STM32F102X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  381. (controllertypestr:'STM32F102X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00001800),
  382. (controllertypestr:'STM32F102X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00002800),
  383. (controllertypestr:'STM32F102XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00004000),
  384. (controllertypestr:'STM32F103X4'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00004000; srambase:$20000000; sramsize:$00001000),
  385. (controllertypestr:'STM32F103X6'; controllerunitstr:'STM32F10X_LD'; flashbase:$08000000; flashsize:$00008000; srambase:$20000000; sramsize:$00002800),
  386. (controllertypestr:'STM32F103X8'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00005000),
  387. (controllertypestr:'STM32F103XB'; controllerunitstr:'STM32F10X_MD'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00005000),
  388. (controllertypestr:'STM32F103XC'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$0000C000),
  389. (controllertypestr:'STM32F103XD'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00060000; srambase:$20000000; sramsize:$00010000),
  390. (controllertypestr:'STM32F103XE'; controllerunitstr:'STM32F10X_HD'; flashbase:$08000000; flashsize:$00080000; srambase:$20000000; sramsize:$00010000),
  391. (controllertypestr:'STM32F103XF'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$000C0000; srambase:$20000000; sramsize:$00018000),
  392. (controllertypestr:'STM32F103XG'; controllerunitstr:'STM32F10X_XL'; flashbase:$08000000; flashsize:$00100000; srambase:$20000000; sramsize:$00018000),
  393. (controllertypestr:'STM32F107X8'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00010000; srambase:$20000000; sramsize:$00010000),
  394. (controllertypestr:'STM32F107XB'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00020000; srambase:$20000000; sramsize:$00010000),
  395. (controllertypestr:'STM32F107XC'; controllerunitstr:'STM32F10X_CONN'; flashbase:$08000000; flashsize:$00040000; srambase:$20000000; sramsize:$00010000),
  396. { TI - 64 K Flash, 16 K SRAM Devices }
  397. // ct_lm3s1110,
  398. (
  399. controllertypestr:'LM3S1110';
  400. controllerunitstr:'LM3FURY';
  401. flashbase:$00000000;
  402. flashsize:$00010000;
  403. srambase:$20000000;
  404. sramsize:$00004000
  405. ),
  406. // ct_lm3s1133,
  407. (
  408. controllertypestr:'LM3S1133';
  409. controllerunitstr:'LM3FURY';
  410. flashbase:$00000000;
  411. flashsize:$00010000;
  412. srambase:$20000000;
  413. sramsize:$00004000
  414. ),
  415. // ct_lm3s1138,
  416. (
  417. controllertypestr:'LM3S1138';
  418. controllerunitstr:'LM3FURY';
  419. flashbase:$00000000;
  420. flashsize:$00010000;
  421. srambase:$20000000;
  422. sramsize:$00004000
  423. ),
  424. // ct_lm3s1150,
  425. (
  426. controllertypestr:'LM3S1150';
  427. controllerunitstr:'LM3FURY';
  428. flashbase:$00000000;
  429. flashsize:$00010000;
  430. srambase:$20000000;
  431. sramsize:$00004000
  432. ),
  433. // ct_lm3s1162,
  434. (
  435. controllertypestr:'LM3S1162';
  436. controllerunitstr:'LM3FURY';
  437. flashbase:$00000000;
  438. flashsize:$00010000;
  439. srambase:$20000000;
  440. sramsize:$00004000
  441. ),
  442. // ct_lm3s1165,
  443. (
  444. controllertypestr:'LM3S1165';
  445. controllerunitstr:'LM3FURY';
  446. flashbase:$00000000;
  447. flashsize:$00010000;
  448. srambase:$20000000;
  449. sramsize:$00004000
  450. ),
  451. // ct_lm3s1166,
  452. (
  453. controllertypestr:'LM3S1166';
  454. controllerunitstr:'LM3FURY';
  455. flashbase:$00000000;
  456. flashsize:$00010000;
  457. srambase:$20000000;
  458. sramsize:$00004000
  459. ),
  460. // ct_lm3s2110,
  461. (
  462. controllertypestr:'LM3S2110';
  463. controllerunitstr:'LM3FURY';
  464. flashbase:$00000000;
  465. flashsize:$00010000;
  466. srambase:$20000000;
  467. sramsize:$00004000
  468. ),
  469. // ct_lm3s2139,
  470. (
  471. controllertypestr:'LM3S2139';
  472. controllerunitstr:'LM3FURY';
  473. flashbase:$00000000;
  474. flashsize:$00010000;
  475. srambase:$20000000;
  476. sramsize:$00004000
  477. ),
  478. // ct_lm3s6100,
  479. (
  480. controllertypestr:'LM3S6100';
  481. controllerunitstr:'LM3FURY';
  482. flashbase:$00000000;
  483. flashsize:$00010000;
  484. srambase:$20000000;
  485. sramsize:$00004000
  486. ),
  487. // ct_lm3s6110,
  488. (
  489. controllertypestr:'LM3S6110';
  490. controllerunitstr:'LM3FURY';
  491. flashbase:$00000000;
  492. flashsize:$00010000;
  493. srambase:$20000000;
  494. sramsize:$00004000
  495. ),
  496. { TI - 128K Flash, 32K SRAM devices }
  497. // ct_lm3s1601,
  498. (
  499. controllertypestr:'LM3S1601';
  500. controllerunitstr:'LM3FURY';
  501. flashbase:$00000000;
  502. flashsize:$00020000;
  503. srambase:$20000000;
  504. sramsize:$00008000
  505. ),
  506. // ct_lm3s1608,
  507. (
  508. controllertypestr:'LM3S1608';
  509. controllerunitstr:'LM3FURY';
  510. flashbase:$00000000;
  511. flashsize:$00020000;
  512. srambase:$20000000;
  513. sramsize:$00008000
  514. ),
  515. // ct_lm3s1620,
  516. (
  517. controllertypestr:'LM3S1620';
  518. controllerunitstr:'LM3FURY';
  519. flashbase:$00000000;
  520. flashsize:$00020000;
  521. srambase:$20000000;
  522. sramsize:$00008000
  523. ),
  524. // ct_lm3s1635,
  525. (
  526. controllertypestr:'LM3S1635';
  527. controllerunitstr:'LM3FURY';
  528. flashbase:$00000000;
  529. flashsize:$00020000;
  530. srambase:$20000000;
  531. sramsize:$00008000
  532. ),
  533. // ct_lm3s1636,
  534. (
  535. controllertypestr:'LM3S1636';
  536. controllerunitstr:'LM3FURY';
  537. flashbase:$00000000;
  538. flashsize:$00020000;
  539. srambase:$20000000;
  540. sramsize:$00008000
  541. ),
  542. // ct_lm3s1637,
  543. (
  544. controllertypestr:'LM3S1637';
  545. controllerunitstr:'LM3FURY';
  546. flashbase:$00000000;
  547. flashsize:$00020000;
  548. srambase:$20000000;
  549. sramsize:$00008000
  550. ),
  551. // ct_lm3s1651,
  552. (
  553. controllertypestr:'LM3S1651';
  554. controllerunitstr:'LM3FURY';
  555. flashbase:$00000000;
  556. flashsize:$00020000;
  557. srambase:$20000000;
  558. sramsize:$00008000
  559. ),
  560. // ct_lm3s2601,
  561. (
  562. controllertypestr:'LM3S2601';
  563. controllerunitstr:'LM3FURY';
  564. flashbase:$00000000;
  565. flashsize:$00020000;
  566. srambase:$20000000;
  567. sramsize:$00008000
  568. ),
  569. // ct_lm3s2608,
  570. (
  571. controllertypestr:'LM3S2608';
  572. controllerunitstr:'LM3FURY';
  573. flashbase:$00000000;
  574. flashsize:$00020000;
  575. srambase:$20000000;
  576. sramsize:$00008000
  577. ),
  578. // ct_lm3s2620,
  579. (
  580. controllertypestr:'LM3S2620';
  581. controllerunitstr:'LM3FURY';
  582. flashbase:$00000000;
  583. flashsize:$00020000;
  584. srambase:$20000000;
  585. sramsize:$00008000
  586. ),
  587. // ct_lm3s2637,
  588. (
  589. controllertypestr:'LM3S2637';
  590. controllerunitstr:'LM3FURY';
  591. flashbase:$00000000;
  592. flashsize:$00020000;
  593. srambase:$20000000;
  594. sramsize:$00008000
  595. ),
  596. // ct_lm3s2651,
  597. (
  598. controllertypestr:'LM3S2651';
  599. controllerunitstr:'LM3FURY';
  600. flashbase:$00000000;
  601. flashsize:$00020000;
  602. srambase:$20000000;
  603. sramsize:$00008000
  604. ),
  605. // ct_lm3s6610,
  606. (
  607. controllertypestr:'LM3S6610';
  608. controllerunitstr:'LM3FURY';
  609. flashbase:$00000000;
  610. flashsize:$00020000;
  611. srambase:$20000000;
  612. sramsize:$00008000
  613. ),
  614. // ct_lm3s6611,
  615. (
  616. controllertypestr:'LM3S6611';
  617. controllerunitstr:'LM3FURY';
  618. flashbase:$00000000;
  619. flashsize:$00020000;
  620. srambase:$20000000;
  621. sramsize:$00008000
  622. ),
  623. // ct_lm3s6618,
  624. (
  625. controllertypestr:'LM3S6618';
  626. controllerunitstr:'LM3FURY';
  627. flashbase:$00000000;
  628. flashsize:$00020000;
  629. srambase:$20000000;
  630. sramsize:$00008000
  631. ),
  632. // ct_lm3s6633,
  633. (
  634. controllertypestr:'LM3S6633';
  635. controllerunitstr:'LM3FURY';
  636. flashbase:$00000000;
  637. flashsize:$00020000;
  638. srambase:$20000000;
  639. sramsize:$00008000
  640. ),
  641. // ct_lm3s6637,
  642. (
  643. controllertypestr:'LM3S6637';
  644. controllerunitstr:'LM3FURY';
  645. flashbase:$00000000;
  646. flashsize:$00020000;
  647. srambase:$20000000;
  648. sramsize:$00008000
  649. ),
  650. // ct_lm3s8630,
  651. (
  652. controllertypestr:'LM3S8630';
  653. controllerunitstr:'LM3FURY';
  654. flashbase:$00000000;
  655. flashsize:$00020000;
  656. srambase:$20000000;
  657. sramsize:$00008000
  658. ),
  659. { TI - 256K Flash, 64K SRAM devices }
  660. // ct_lm3s1911,
  661. (
  662. controllertypestr:'LM3S1911';
  663. controllerunitstr:'LM3FURY';
  664. flashbase:$00000000;
  665. flashsize:$00040000;
  666. srambase:$20000000;
  667. sramsize:$00010000
  668. ),
  669. // ct_lm3s1918,
  670. (
  671. controllertypestr:'LM3S1918';
  672. controllerunitstr:'LM3FURY';
  673. flashbase:$00000000;
  674. flashsize:$00040000;
  675. srambase:$20000000;
  676. sramsize:$00010000
  677. ),
  678. // ct_lm3s1937,
  679. (
  680. controllertypestr:'LM3S1937';
  681. controllerunitstr:'LM3FURY';
  682. flashbase:$00000000;
  683. flashsize:$00040000;
  684. srambase:$20000000;
  685. sramsize:$00010000
  686. ),
  687. // ct_lm3s1958,
  688. (
  689. controllertypestr:'LM3S1958';
  690. controllerunitstr:'LM3FURY';
  691. flashbase:$00000000;
  692. flashsize:$00040000;
  693. srambase:$20000000;
  694. sramsize:$00010000
  695. ),
  696. // ct_lm3s1960,
  697. (
  698. controllertypestr:'LM3S1960';
  699. controllerunitstr:'LM3FURY';
  700. flashbase:$00000000;
  701. flashsize:$00040000;
  702. srambase:$20000000;
  703. sramsize:$00010000
  704. ),
  705. // ct_lm3s1968,
  706. (
  707. controllertypestr:'LM3S1968';
  708. controllerunitstr:'LM3FURY';
  709. flashbase:$00000000;
  710. flashsize:$00040000;
  711. srambase:$20000000;
  712. sramsize:$00010000
  713. ),
  714. // ct_lm3s1969,
  715. (
  716. controllertypestr:'LM3S1969';
  717. controllerunitstr:'LM3FURY';
  718. flashbase:$00000000;
  719. flashsize:$00040000;
  720. srambase:$20000000;
  721. sramsize:$00010000
  722. ),
  723. // ct_lm3s2911,
  724. (
  725. controllertypestr:'LM3S2911';
  726. controllerunitstr:'LM3FURY';
  727. flashbase:$00000000;
  728. flashsize:$00040000;
  729. srambase:$20000000;
  730. sramsize:$00010000
  731. ),
  732. // ct_lm3s2918,
  733. (
  734. controllertypestr:'LM3S2918';
  735. controllerunitstr:'LM3FURY';
  736. flashbase:$00000000;
  737. flashsize:$00040000;
  738. srambase:$20000000;
  739. sramsize:$00010000
  740. ),
  741. // ct_lm3s2919,
  742. (
  743. controllertypestr:'LM3S2919';
  744. controllerunitstr:'LM3FURY';
  745. flashbase:$00000000;
  746. flashsize:$00040000;
  747. srambase:$20000000;
  748. sramsize:$00010000
  749. ),
  750. // ct_lm3s2939,
  751. (
  752. controllertypestr:'LM3S2939';
  753. controllerunitstr:'LM3FURY';
  754. flashbase:$00000000;
  755. flashsize:$00040000;
  756. srambase:$20000000;
  757. sramsize:$00010000
  758. ),
  759. // ct_lm3s2948,
  760. (
  761. controllertypestr:'LM3S2948';
  762. controllerunitstr:'LM3FURY';
  763. flashbase:$00000000;
  764. flashsize:$00040000;
  765. srambase:$20000000;
  766. sramsize:$00010000
  767. ),
  768. // ct_lm3s2950,
  769. (
  770. controllertypestr:'LM3S2950';
  771. controllerunitstr:'LM3FURY';
  772. flashbase:$00000000;
  773. flashsize:$00040000;
  774. srambase:$20000000;
  775. sramsize:$00010000
  776. ),
  777. // ct_lm3s2965,
  778. (
  779. controllertypestr:'LM3S2965';
  780. controllerunitstr:'LM3FURY';
  781. flashbase:$00000000;
  782. flashsize:$00040000;
  783. srambase:$20000000;
  784. sramsize:$00010000
  785. ),
  786. // ct_lm3s6911,
  787. (
  788. controllertypestr:'LM3S6911';
  789. controllerunitstr:'LM3FURY';
  790. flashbase:$00000000;
  791. flashsize:$00040000;
  792. srambase:$20000000;
  793. sramsize:$00010000
  794. ),
  795. // ct_lm3s6918,
  796. (
  797. controllertypestr:'LM3S6918';
  798. controllerunitstr:'LM3FURY';
  799. flashbase:$00000000;
  800. flashsize:$00040000;
  801. srambase:$20000000;
  802. sramsize:$00010000
  803. ),
  804. // ct_lm3s6938,
  805. (
  806. controllertypestr:'LM3S6938';
  807. controllerunitstr:'LM3FURY';
  808. flashbase:$00000000;
  809. flashsize:$00040000;
  810. srambase:$20000000;
  811. sramsize:$00010000
  812. ),
  813. // ct_lm3s6950,
  814. (
  815. controllertypestr:'LM3S6950';
  816. controllerunitstr:'LM3FURY';
  817. flashbase:$00000000;
  818. flashsize:$00040000;
  819. srambase:$20000000;
  820. sramsize:$00010000
  821. ),
  822. // ct_lm3s6952,
  823. (
  824. controllertypestr:'LM3S6952';
  825. controllerunitstr:'LM3FURY';
  826. flashbase:$00000000;
  827. flashsize:$00040000;
  828. srambase:$20000000;
  829. sramsize:$00010000
  830. ),
  831. // ct_lm3s6965,
  832. (
  833. controllertypestr:'LM3S6965';
  834. controllerunitstr:'LM3FURY';
  835. flashbase:$00000000;
  836. flashsize:$00040000;
  837. srambase:$20000000;
  838. sramsize:$00010000
  839. ),
  840. // ct_lm3s8930,
  841. (
  842. controllertypestr:'LM3S8930';
  843. controllerunitstr:'LM3FURY';
  844. flashbase:$00000000;
  845. flashsize:$00040000;
  846. srambase:$20000000;
  847. sramsize:$00010000
  848. ),
  849. // ct_lm3s8933,
  850. (
  851. controllertypestr:'LM3S8933';
  852. controllerunitstr:'LM3FURY';
  853. flashbase:$00000000;
  854. flashsize:$00040000;
  855. srambase:$20000000;
  856. sramsize:$00010000
  857. ),
  858. // ct_lm3s8938,
  859. (
  860. controllertypestr:'LM3S8938';
  861. controllerunitstr:'LM3FURY';
  862. flashbase:$00000000;
  863. flashsize:$00040000;
  864. srambase:$20000000;
  865. sramsize:$00010000
  866. ),
  867. // ct_lm3s8962,
  868. (
  869. controllertypestr:'LM3S8962';
  870. controllerunitstr:'LM3FURY';
  871. flashbase:$00000000;
  872. flashsize:$00040000;
  873. srambase:$20000000;
  874. sramsize:$00010000
  875. ),
  876. // ct_lm3s8970,
  877. (
  878. controllertypestr:'LM3S8970';
  879. controllerunitstr:'LM3FURY';
  880. flashbase:$00000000;
  881. flashsize:$00040000;
  882. srambase:$20000000;
  883. sramsize:$00010000
  884. ),
  885. // ct_lm3s8971,
  886. (
  887. controllertypestr:'LM3S8971';
  888. controllerunitstr:'LM3FURY';
  889. flashbase:$00000000;
  890. flashsize:$00040000;
  891. srambase:$20000000;
  892. sramsize:$00010000
  893. ),
  894. { TI - Tempest parts - 256 K Flash, 64 K SRAM }
  895. // ct_lm3s5951,
  896. (
  897. controllertypestr:'LM3S5951';
  898. controllerunitstr:'LM3TEMPEST';
  899. flashbase:$00000000;
  900. flashsize:$00040000;
  901. srambase:$20000000;
  902. sramsize:$00010000
  903. ),
  904. // ct_lm3s5956,
  905. (
  906. controllertypestr:'LM3S5956';
  907. controllerunitstr:'LM3TEMPEST';
  908. flashbase:$00000000;
  909. flashsize:$00040000;
  910. srambase:$20000000;
  911. sramsize:$00010000
  912. ),
  913. // ct_lm3s1b21,
  914. (
  915. controllertypestr:'LM3S1B21';
  916. controllerunitstr:'LM3TEMPEST';
  917. flashbase:$00000000;
  918. flashsize:$00040000;
  919. srambase:$20000000;
  920. sramsize:$00010000
  921. ),
  922. // ct_lm3s2b93,
  923. (
  924. controllertypestr:'LM3S2B93';
  925. controllerunitstr:'LM3TEMPEST';
  926. flashbase:$00000000;
  927. flashsize:$00040000;
  928. srambase:$20000000;
  929. sramsize:$00010000
  930. ),
  931. // ct_lm3s5b91,
  932. (
  933. controllertypestr:'LM3S5B91';
  934. controllerunitstr:'LM3TEMPEST';
  935. flashbase:$00000000;
  936. flashsize:$00040000;
  937. srambase:$20000000;
  938. sramsize:$00010000
  939. ),
  940. // ct_lm3s9b81,
  941. (
  942. controllertypestr:'LM3S9B81';
  943. controllerunitstr:'LM3TEMPEST';
  944. flashbase:$00000000;
  945. flashsize:$00040000;
  946. srambase:$20000000;
  947. sramsize:$00010000
  948. ),
  949. // ct_lm3s9b90,
  950. (
  951. controllertypestr:'LM3S9B90';
  952. controllerunitstr:'LM3TEMPEST';
  953. flashbase:$00000000;
  954. flashsize:$00040000;
  955. srambase:$20000000;
  956. sramsize:$00010000
  957. ),
  958. // ct_lm3s9b92,
  959. (
  960. controllertypestr:'LM3S9B92';
  961. controllerunitstr:'LM3TEMPEST';
  962. flashbase:$00000000;
  963. flashsize:$00040000;
  964. srambase:$20000000;
  965. sramsize:$00010000
  966. ),
  967. // ct_lm3s9b95,
  968. (
  969. controllertypestr:'LM3S9B95';
  970. controllerunitstr:'LM3TEMPEST';
  971. flashbase:$00000000;
  972. flashsize:$00040000;
  973. srambase:$20000000;
  974. sramsize:$00010000
  975. ),
  976. // ct_lm3s9b96,
  977. (
  978. controllertypestr:'LM3S9B96';
  979. controllerunitstr:'LM3TEMPEST';
  980. flashbase:$00000000;
  981. flashsize:$00040000;
  982. srambase:$20000000;
  983. sramsize:$00010000
  984. ),
  985. //ct_SC32442b,
  986. (
  987. controllertypestr:'SC32442B';
  988. controllerunitstr:'sc32442b';
  989. flashbase:$00000000;
  990. flashsize:$00000000;
  991. srambase:$00000000;
  992. sramsize:$08000000
  993. ),
  994. // bare bones Thumb2
  995. (
  996. controllertypestr:'THUMB2_BARE';
  997. controllerunitstr:'THUMB2_BARE';
  998. flashbase:$00000000;
  999. flashsize:$00100000;
  1000. srambase:$20000000;
  1001. sramsize:$00100000
  1002. )
  1003. );
  1004. vfp_scalar = [fpu_vfpv2,fpu_vfpv3,fpu_vfpv3_d16,fpu_fpv4_s16];
  1005. { Supported optimizations, only used for information }
  1006. supported_optimizerswitches = genericlevel1optimizerswitches+
  1007. genericlevel2optimizerswitches+
  1008. genericlevel3optimizerswitches-
  1009. { no need to write info about those }
  1010. [cs_opt_level1,cs_opt_level2,cs_opt_level3]+
  1011. [cs_opt_regvar,cs_opt_loopunroll,cs_opt_tailrecursion,
  1012. cs_opt_stackframe,cs_opt_nodecse,cs_opt_reorder_fields,cs_opt_fastmath];
  1013. level1optimizerswitches = genericlevel1optimizerswitches;
  1014. level2optimizerswitches = genericlevel2optimizerswitches + level1optimizerswitches +
  1015. [cs_opt_regvar,cs_opt_stackframe,cs_opt_tailrecursion,cs_opt_nodecse];
  1016. level3optimizerswitches = genericlevel3optimizerswitches + level2optimizerswitches + [cs_opt_scheduler{,cs_opt_loopunroll}];
  1017. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  1018. type
  1019. tcpuflags =
  1020. (CPUARM_HAS_BX, { CPU supports the BX instruction }
  1021. CPUARM_HAS_BLX, { CPU supports the BLX rX instruction }
  1022. CPUARM_HAS_BLX_LABEL, { CPU supports the BLX <label> instruction }
  1023. CPUARM_HAS_CLZ, { CPU supports the CLZ instruction }
  1024. CPUARM_HAS_EDSP, { CPU supports the PLD,STRD,LDRD,MCRR and MRRC instructions }
  1025. CPUARM_HAS_REV, { CPU supports the REV instruction }
  1026. CPUARM_HAS_RBIT, { CPU supports the RBIT instruction }
  1027. CPUARM_HAS_DMB, { CPU has memory barrier instructions (DMB, DSB, ISB) }
  1028. CPUARM_HAS_LDREX,
  1029. CPUARM_HAS_IDIV
  1030. );
  1031. const
  1032. cpu_capabilities : array[tcputype] of set of tcpuflags =
  1033. ( { cpu_none } [],
  1034. { cpu_armv3 } [],
  1035. { cpu_armv4 } [],
  1036. { cpu_armv4t } [CPUARM_HAS_BX],
  1037. { cpu_armv5 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ],
  1038. { cpu_armv5t } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ],
  1039. { cpu_armv5te } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP],
  1040. { cpu_armv5tej } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP],
  1041. { cpu_armv6 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1042. { cpu_armv6k } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1043. { cpu_armv6t2 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX],
  1044. { cpu_armv6z } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_LDREX],
  1045. { cpu_armv6m } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_REV],
  1046. { the identifier armv7 is should not be used, it is considered being equal to armv7a }
  1047. { cpu_armv7 } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1048. { cpu_armv7a } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1049. { cpu_armv7r } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_BLX_LABEL,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_DMB],
  1050. { cpu_armv7m } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV,CPUARM_HAS_DMB],
  1051. { cpu_armv7em } [CPUARM_HAS_BX,CPUARM_HAS_BLX,CPUARM_HAS_CLZ,CPUARM_HAS_EDSP,CPUARM_HAS_REV,CPUARM_HAS_RBIT,CPUARM_HAS_LDREX,CPUARM_HAS_IDIV,CPUARM_HAS_DMB]
  1052. );
  1053. Implementation
  1054. end.