rax86.pas 23 KB

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  1. {
  2. $Id$
  3. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  4. Handles the common x86 assembler reader routines
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {
  19. Contains the common x86 (i386 and x86-64) assembler reader routines.
  20. }
  21. unit rax86;
  22. {$i fpcdefs.inc}
  23. interface
  24. uses
  25. aasmbase,aasmtai,aasmcpu,
  26. cpubase,rautils,cclasses;
  27. { Parser helpers }
  28. function is_prefix(t:tasmop):boolean;
  29. function is_override(t:tasmop):boolean;
  30. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  31. Function CheckOverride(overrideop,op:tasmop): Boolean;
  32. Procedure FWaitWarning;
  33. type
  34. T386Operand=class(TOperand)
  35. opsize : topsize;
  36. Procedure SetSize(_size:longint;force:boolean);override;
  37. Procedure SetCorrectSize(opcode:tasmop);override;
  38. end;
  39. T386Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { opcode adding }
  50. procedure ConcatInstruction(p : taasmoutput);override;
  51. end;
  52. tstr2opentry = class(Tnamedindexitem)
  53. op: TAsmOp;
  54. end;
  55. const
  56. AsmPrefixes = 6;
  57. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  58. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  59. );
  60. AsmOverrides = 6;
  61. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  62. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  63. );
  64. CondAsmOps=3;
  65. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  66. A_CMOVcc, A_Jcc, A_SETcc
  67. );
  68. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  69. 'CMOV','J','SET'
  70. );
  71. implementation
  72. uses
  73. globtype,globals,systems,verbose,
  74. cpuinfo,cginfo,
  75. itx86att,cgx86;
  76. {$define ATTOP}
  77. {$define INTELOP}
  78. {$ifdef NORA386INT}
  79. {$ifdef NOAG386NSM}
  80. {$ifdef NOAG386INT}
  81. {$undef INTELOP}
  82. {$endif}
  83. {$endif}
  84. {$endif}
  85. {$ifdef NORA386ATT}
  86. {$ifdef NOAG386ATT}
  87. {$undef ATTOP}
  88. {$endif}
  89. {$endif}
  90. {*****************************************************************************
  91. Parser Helpers
  92. *****************************************************************************}
  93. function is_prefix(t:tasmop):boolean;
  94. var
  95. i : longint;
  96. Begin
  97. is_prefix:=false;
  98. for i:=1 to AsmPrefixes do
  99. if t=AsmPrefix[i-1] then
  100. begin
  101. is_prefix:=true;
  102. exit;
  103. end;
  104. end;
  105. function is_override(t:tasmop):boolean;
  106. var
  107. i : longint;
  108. Begin
  109. is_override:=false;
  110. for i:=1 to AsmOverrides do
  111. if t=AsmOverride[i-1] then
  112. begin
  113. is_override:=true;
  114. exit;
  115. end;
  116. end;
  117. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  118. { Checks if the prefix is valid with the following opcode }
  119. { return false if not, otherwise true }
  120. Begin
  121. CheckPrefix := TRUE;
  122. (* Case prefix of
  123. A_REP,A_REPNE,A_REPE:
  124. Case opcode Of
  125. A_SCASB,A_SCASW,A_SCASD,
  126. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  127. Else
  128. Begin
  129. CheckPrefix := FALSE;
  130. exit;
  131. end;
  132. end; { case }
  133. A_LOCK:
  134. Case opcode Of
  135. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  136. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  137. Else
  138. Begin
  139. CheckPrefix := FALSE;
  140. Exit;
  141. end;
  142. end; { case }
  143. A_NONE: exit; { no prefix here }
  144. else
  145. CheckPrefix := FALSE;
  146. end; { end case } *)
  147. end;
  148. Function CheckOverride(overrideop,op:tasmop): Boolean;
  149. { Check if the override is valid, and if so then }
  150. { update the instr variable accordingly. }
  151. Begin
  152. CheckOverride := true;
  153. { Case instr.getinstruction of
  154. A_MOVS,A_XLAT,A_CMPS:
  155. Begin
  156. CheckOverride := TRUE;
  157. Message(assem_e_segment_override_not_supported);
  158. end
  159. end }
  160. end;
  161. Procedure FWaitWarning;
  162. begin
  163. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in aktmoduleswitches) then
  164. Message(asmr_w_fwait_emu_prob);
  165. end;
  166. {*****************************************************************************
  167. T386Operand
  168. *****************************************************************************}
  169. Procedure T386Operand.SetSize(_size:longint;force:boolean);
  170. begin
  171. inherited SetSize(_size,force);
  172. { OS_64 will be set to S_L and be fixed later
  173. in SetCorrectSize }
  174. opsize:=TCGSize2Opsize[size];
  175. end;
  176. Procedure T386Operand.SetCorrectSize(opcode:tasmop);
  177. begin
  178. if gas_needsuffix[opcode]=attsufFPU then
  179. begin
  180. case size of
  181. OS_32 : opsize:=S_FS;
  182. OS_64 : opsize:=S_FL;
  183. end;
  184. end
  185. else if gas_needsuffix[opcode]=attsufFPUint then
  186. begin
  187. case size of
  188. OS_16 : opsize:=S_IS;
  189. OS_32 : opsize:=S_IL;
  190. OS_64 : opsize:=S_IQ;
  191. end;
  192. end;
  193. end;
  194. {*****************************************************************************
  195. T386Instruction
  196. *****************************************************************************}
  197. constructor T386Instruction.Create;
  198. begin
  199. inherited Create;
  200. Opsize:=S_NO;
  201. end;
  202. procedure T386Instruction.SwapOperands;
  203. begin
  204. Inherited SwapOperands;
  205. { mark the correct order }
  206. if OpOrder=op_intel then
  207. OpOrder:=op_att
  208. else
  209. OpOrder:=op_intel;
  210. end;
  211. procedure T386Instruction.AddReferenceSizes;
  212. { this will add the sizes for references like [esi] which do not
  213. have the size set yet, it will take only the size if the other
  214. operand is a register }
  215. var
  216. operand2,i : longint;
  217. s : tasmsymbol;
  218. so : longint;
  219. begin
  220. for i:=1to ops do
  221. begin
  222. operands[i].SetCorrectSize(opcode);
  223. if t386operand(operands[i]).opsize=S_NO then
  224. begin
  225. case operands[i].Opr.Typ of
  226. OPR_REFERENCE :
  227. begin
  228. if i=2 then
  229. operand2:=1
  230. else
  231. operand2:=2;
  232. if operand2<ops then
  233. begin
  234. { Only allow register as operand to take the size from }
  235. if operands[operand2].opr.typ=OPR_REGISTER then
  236. begin
  237. if ((opcode<>A_MOVD) and
  238. (opcode<>A_CVTSI2SS)) then
  239. operands[i].size:=operands[operand2].size;
  240. end
  241. else
  242. begin
  243. { if no register then take the opsize (which is available with ATT),
  244. if not availble then give an error }
  245. if opsize<>S_NO then
  246. t386operand(operands[i]).opsize:=opsize
  247. else
  248. begin
  249. Message(asmr_e_unable_to_determine_reference_size);
  250. { recovery }
  251. t386operand(operands[i]).opsize:=S_L;
  252. end;
  253. end;
  254. end
  255. else
  256. begin
  257. if opsize<>S_NO then
  258. t386operand(operands[i]).opsize:=opsize
  259. end;
  260. end;
  261. OPR_SYMBOL :
  262. begin
  263. { Fix lea which need a reference }
  264. if opcode=A_LEA then
  265. begin
  266. s:=operands[i].opr.symbol;
  267. so:=operands[i].opr.symofs;
  268. operands[i].opr.typ:=OPR_REFERENCE;
  269. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  270. operands[i].opr.ref.symbol:=s;
  271. operands[i].opr.ref.offset:=so;
  272. end;
  273. t386operand(operands[i]).opsize:=S_L;
  274. end;
  275. end;
  276. end;
  277. end;
  278. end;
  279. procedure T386Instruction.SetInstructionOpsize;
  280. begin
  281. if opsize<>S_NO then
  282. exit;
  283. if (OpOrder=op_intel) then
  284. SwapOperands;
  285. case ops of
  286. 0 : ;
  287. 1 :
  288. { "push es" must be stored as a long PM }
  289. if ((opcode=A_PUSH) or
  290. (opcode=A_POP)) and
  291. (operands[1].opr.typ=OPR_REGISTER) and
  292. ((operands[1].opr.reg.enum in [firstsreg..lastsreg]) or
  293. ((operands[1].opr.reg.enum=R_INTREGISTER) and
  294. (operands[1].opr.reg.number>=nfirstsreg) and
  295. (operands[1].opr.reg.number<=nlastsreg))) then
  296. opsize:=S_L
  297. else
  298. opsize:=t386operand(operands[1]).opsize;
  299. 2 :
  300. begin
  301. case opcode of
  302. A_MOVZX,A_MOVSX :
  303. begin
  304. case t386operand(operands[1]).opsize of
  305. S_W :
  306. case t386operand(operands[2]).opsize of
  307. S_L :
  308. opsize:=S_WL;
  309. end;
  310. S_B :
  311. case t386operand(operands[2]).opsize of
  312. S_W :
  313. opsize:=S_BW;
  314. S_L :
  315. opsize:=S_BL;
  316. end;
  317. end;
  318. end;
  319. A_MOVD : { movd is a move from a mmx register to a
  320. 32 bit register or memory, so no opsize is correct here PM }
  321. exit;
  322. A_OUT :
  323. opsize:=t386operand(operands[1]).opsize;
  324. else
  325. opsize:=t386operand(operands[2]).opsize;
  326. end;
  327. end;
  328. 3 :
  329. opsize:=t386operand(operands[3]).opsize;
  330. end;
  331. end;
  332. procedure T386Instruction.CheckOperandSizes;
  333. var
  334. sizeerr : boolean;
  335. i : longint;
  336. begin
  337. { Check only the most common opcodes here, the others are done in
  338. the assembler pass }
  339. case opcode of
  340. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  341. A_CMP,A_MOV,
  342. A_ADD,A_SUB,A_ADC,A_SBB,
  343. A_AND,A_OR,A_TEST,A_XOR: ;
  344. else
  345. exit;
  346. end;
  347. { Handle the BW,BL,WL separatly }
  348. sizeerr:=false;
  349. { special push/pop selector case }
  350. if ((opcode=A_PUSH) or
  351. (opcode=A_POP)) and
  352. (operands[1].opr.typ=OPR_REGISTER) then
  353. begin
  354. if (operands[1].opr.reg.enum in [firstsreg..lastsreg]) or
  355. ((operands[1].opr.reg.enum=R_INTREGISTER) and
  356. (operands[1].opr.reg.number>=nfirstsreg) and
  357. (operands[1].opr.reg.number<=nlastsreg)) then
  358. exit;
  359. end;
  360. if opsize in [S_BW,S_BL,S_WL] then
  361. begin
  362. if ops<>2 then
  363. sizeerr:=true
  364. else
  365. begin
  366. case opsize of
  367. S_BW :
  368. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_W);
  369. S_BL :
  370. sizeerr:=(t386operand(operands[1]).opsize<>S_B) or (t386operand(operands[2]).opsize<>S_L);
  371. S_WL :
  372. sizeerr:=(t386operand(operands[1]).opsize<>S_W) or (t386operand(operands[2]).opsize<>S_L);
  373. end;
  374. end;
  375. end
  376. else
  377. begin
  378. for i:=1 to ops do
  379. begin
  380. if (operands[i].opr.typ<>OPR_CONSTANT) and
  381. (t386operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  382. (t386operand(operands[i]).opsize<>opsize) then
  383. sizeerr:=true;
  384. end;
  385. end;
  386. if sizeerr then
  387. begin
  388. { if range checks are on then generate an error }
  389. if (cs_compilesystem in aktmoduleswitches) or
  390. not (cs_check_range in aktlocalswitches) then
  391. Message(asmr_w_size_suffix_and_dest_dont_match)
  392. else
  393. Message(asmr_e_size_suffix_and_dest_dont_match);
  394. end;
  395. end;
  396. { This check must be done with the operand in ATT order
  397. i.e.after swapping in the intel reader
  398. but before swapping in the NASM and TASM writers PM }
  399. procedure T386Instruction.CheckNonCommutativeOpcodes;
  400. begin
  401. if (OpOrder=op_intel) then
  402. SwapOperands;
  403. if ((ops=2) and
  404. (operands[1].opr.typ=OPR_REGISTER) and
  405. (operands[2].opr.typ=OPR_REGISTER) and
  406. { if the first is ST and the second is also a register
  407. it is necessarily ST1 .. ST7 }
  408. (operands[1].opr.reg.enum in [R_ST..R_ST0])) or
  409. (ops=0) then
  410. if opcode=A_FSUBR then
  411. opcode:=A_FSUB
  412. else if opcode=A_FSUB then
  413. opcode:=A_FSUBR
  414. else if opcode=A_FDIVR then
  415. opcode:=A_FDIV
  416. else if opcode=A_FDIV then
  417. opcode:=A_FDIVR
  418. else if opcode=A_FSUBRP then
  419. opcode:=A_FSUBP
  420. else if opcode=A_FSUBP then
  421. opcode:=A_FSUBRP
  422. else if opcode=A_FDIVRP then
  423. opcode:=A_FDIVP
  424. else if opcode=A_FDIVP then
  425. opcode:=A_FDIVRP;
  426. if ((ops=1) and
  427. (operands[1].opr.typ=OPR_REGISTER) and
  428. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) then
  429. if opcode=A_FSUBRP then
  430. opcode:=A_FSUBP
  431. else if opcode=A_FSUBP then
  432. opcode:=A_FSUBRP
  433. else if opcode=A_FDIVRP then
  434. opcode:=A_FDIVP
  435. else if opcode=A_FDIVP then
  436. opcode:=A_FDIVRP;
  437. end;
  438. {*****************************************************************************
  439. opcode Adding
  440. *****************************************************************************}
  441. procedure T386Instruction.ConcatInstruction(p : taasmoutput);
  442. var
  443. siz : topsize;
  444. i,asize : longint;
  445. ai : taicpu;
  446. begin
  447. if (OpOrder=op_intel) then
  448. SwapOperands;
  449. { Get Opsize }
  450. if (opsize<>S_NO) or (Ops=0) then
  451. siz:=opsize
  452. else
  453. begin
  454. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  455. siz:=t386operand(operands[1]).opsize
  456. else
  457. siz:=t386operand(operands[Ops]).opsize;
  458. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  459. if (ops=2) and
  460. (t386operand(operands[1]).opsize<>S_NO) and
  461. (t386operand(operands[2]).opsize<>S_NO) and
  462. (t386operand(operands[1]).opsize<>t386operand(operands[2]).opsize) then
  463. siz:=S_NO;
  464. end;
  465. if ((opcode=A_MOVD)or
  466. (opcode=A_CVTSI2SS)) and
  467. ((t386operand(operands[1]).opsize=S_NO) or
  468. (t386operand(operands[2]).opsize=S_NO)) then
  469. siz:=S_NO;
  470. { NASM does not support FADD without args
  471. as alias of FADDP
  472. and GNU AS interprets FADD without operand differently
  473. for version 2.9.1 and 2.9.5 !! }
  474. if (ops=0) and
  475. ((opcode=A_FADD) or
  476. (opcode=A_FMUL) or
  477. (opcode=A_FSUB) or
  478. (opcode=A_FSUBR) or
  479. (opcode=A_FDIV) or
  480. (opcode=A_FDIVR)) then
  481. begin
  482. if opcode=A_FADD then
  483. opcode:=A_FADDP
  484. else if opcode=A_FMUL then
  485. opcode:=A_FMULP
  486. else if opcode=A_FSUB then
  487. opcode:=A_FSUBP
  488. else if opcode=A_FSUBR then
  489. opcode:=A_FSUBRP
  490. else if opcode=A_FDIV then
  491. opcode:=A_FDIVP
  492. else if opcode=A_FDIVR then
  493. opcode:=A_FDIVRP;
  494. {$ifdef ATTOP}
  495. message1(asmr_w_fadd_to_faddp,gas_op2str[opcode]);
  496. {$else}
  497. {$ifdef INTELOP}
  498. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  499. {$else}
  500. message1(asmr_w_fadd_to_faddp,'fXX');
  501. {$endif INTELOP}
  502. {$endif ATTOP}
  503. end;
  504. { GNU AS interprets FDIV without operand differently
  505. for version 2.9.1 and 2.10
  506. we add explicit args to it !! }
  507. if (ops=0) and
  508. ((opcode=A_FSUBP) or
  509. (opcode=A_FSUBRP) or
  510. (opcode=A_FDIVP) or
  511. (opcode=A_FDIVRP) or
  512. (opcode=A_FSUB) or
  513. (opcode=A_FSUBR) or
  514. (opcode=A_FDIV) or
  515. (opcode=A_FDIVR)) then
  516. begin
  517. {$ifdef ATTOP}
  518. message1(asmr_w_adding_explicit_args_fXX,gas_op2str[opcode]);
  519. {$else}
  520. {$ifdef INTELOP}
  521. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  522. {$else}
  523. message1(asmr_w_adding_explicit_args_fXX,'fXX');
  524. {$endif INTELOP}
  525. {$endif ATTOP}
  526. ops:=2;
  527. operands[1].opr.typ:=OPR_REGISTER;
  528. operands[2].opr.typ:=OPR_REGISTER;
  529. operands[1].opr.reg.enum:=R_ST;
  530. operands[2].opr.reg.enum:=R_ST1;
  531. end;
  532. if (ops=1) and
  533. ((operands[1].opr.typ=OPR_REGISTER) and
  534. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) and
  535. ((opcode=A_FSUBP) or
  536. (opcode=A_FSUBRP) or
  537. (opcode=A_FDIVP) or
  538. (opcode=A_FDIVRP) or
  539. (opcode=A_FADDP) or
  540. (opcode=A_FMULP)) then
  541. begin
  542. {$ifdef ATTOP}
  543. message1(asmr_w_adding_explicit_first_arg_fXX,gas_op2str[opcode]);
  544. {$else}
  545. {$ifdef INTELOP}
  546. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  547. {$else}
  548. message1(asmr_w_adding_explicit_first_arg_fXX,'fXX');
  549. {$endif INTELOP}
  550. {$endif ATTOP}
  551. ops:=2;
  552. operands[2].opr.typ:=OPR_REGISTER;
  553. operands[2].opr.reg:=operands[1].opr.reg;
  554. operands[1].opr.reg.enum:=R_ST;
  555. end;
  556. if (ops=1) and
  557. ((operands[1].opr.typ=OPR_REGISTER) and
  558. (operands[1].opr.reg.enum in [R_ST1..R_ST7])) and
  559. ((opcode=A_FSUB) or
  560. (opcode=A_FSUBR) or
  561. (opcode=A_FDIV) or
  562. (opcode=A_FDIVR) or
  563. (opcode=A_FADD) or
  564. (opcode=A_FMUL)) then
  565. begin
  566. {$ifdef ATTOP}
  567. message1(asmr_w_adding_explicit_second_arg_fXX,gas_op2str[opcode]);
  568. {$else}
  569. {$ifdef INTELOP}
  570. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  571. {$else}
  572. message1(asmr_w_adding_explicit_second_arg_fXX,'fXX');
  573. {$endif INTELOP}
  574. {$endif ATTOP}
  575. ops:=2;
  576. operands[2].opr.typ:=OPR_REGISTER;
  577. operands[2].opr.reg.enum:=R_ST;
  578. end;
  579. { I tried to convince Linus Torvalds to add
  580. code to support ENTER instruction
  581. (when raising a stack page fault)
  582. but he replied that ENTER is a bad instruction and
  583. Linux does not need to support it
  584. So I think its at least a good idea to add a warning
  585. if someone uses this in assembler code
  586. FPC itself does not use it at all PM }
  587. if (opcode=A_ENTER) and ((target_info.system=system_i386_linux) or
  588. (target_info.system=system_i386_FreeBSD)) then
  589. message(asmr_w_enter_not_supported_by_linux);
  590. ai:=taicpu.op_none(opcode,siz);
  591. ai.SetOperandOrder(OpOrder);
  592. ai.Ops:=Ops;
  593. for i:=1to Ops do
  594. begin
  595. case operands[i].opr.typ of
  596. OPR_CONSTANT :
  597. ai.loadconst(i-1,aword(operands[i].opr.val));
  598. OPR_REGISTER:
  599. ai.loadreg(i-1,operands[i].opr.reg);
  600. OPR_SYMBOL:
  601. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  602. OPR_REFERENCE:
  603. begin
  604. ai.loadref(i-1,operands[i].opr.ref);
  605. if operands[i].size<>OS_NO then
  606. begin
  607. asize:=0;
  608. case operands[i].size of
  609. OS_8,OS_S8 :
  610. asize:=OT_BITS8;
  611. OS_16,OS_S16 :
  612. asize:=OT_BITS16;
  613. OS_32,OS_S32,OS_F32,
  614. OS_64,OS_S64:
  615. begin
  616. { Only FPU operations know about 64bit values, for all
  617. integer operations it is seen as 32bit }
  618. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  619. asize:=OT_BITS64
  620. else
  621. asize:=OT_BITS32;
  622. end;
  623. OS_F64,OS_C64 :
  624. asize:=OT_BITS64;
  625. OS_F80 :
  626. asize:=OT_BITS80;
  627. end;
  628. if asize<>0 then
  629. ai.oper[i-1].ot:=(ai.oper[i-1].ot and not OT_SIZE_MASK) or asize;
  630. end;
  631. end;
  632. end;
  633. end;
  634. if (opcode=A_CALL) and (opsize=S_FAR) then
  635. opcode:=A_LCALL;
  636. if (opcode=A_JMP) and (opsize=S_FAR) then
  637. opcode:=A_LJMP;
  638. if (opcode=A_LCALL) or (opcode=A_LJMP) then
  639. opsize:=S_FAR;
  640. { Condition ? }
  641. if condition<>C_None then
  642. ai.SetCondition(condition);
  643. { Concat the opcode or give an error }
  644. if assigned(ai) then
  645. begin
  646. { Check the instruction if it's valid }
  647. {$ifndef NOAG386BIN}
  648. ai.CheckIfValid;
  649. {$endif NOAG386BIN}
  650. p.concat(ai);
  651. end
  652. else
  653. Message(asmr_e_invalid_opcode_and_operand);
  654. end;
  655. end.
  656. {
  657. $Log$
  658. Revision 1.4 2003-05-31 16:22:28 peter
  659. * fixed opsize and operand size setting for 64bit values
  660. Revision 1.3 2003/05/30 23:57:08 peter
  661. * more sparc cleanup
  662. * accumulator removed, splitted in function_return_reg (called) and
  663. function_result_reg (caller)
  664. Revision 1.2 2003/05/22 21:33:31 peter
  665. * removed some unit dependencies
  666. Revision 1.1 2003/04/30 15:45:35 florian
  667. * merged more x86-64/i386 code
  668. Revision 1.30 2003/04/25 12:04:31 florian
  669. * merged agx64att and ag386att to x86/agx86att
  670. Revision 1.29 2003/02/19 22:00:16 daniel
  671. * Code generator converted to new register notation
  672. - Horribily outdated todo.txt removed
  673. Revision 1.28 2003/02/03 22:47:14 daniel
  674. - Removed reg_2_opsize array
  675. Revision 1.27 2003/01/08 18:43:57 daniel
  676. * Tregister changed into a record
  677. Revision 1.26 2002/11/15 01:58:58 peter
  678. * merged changes from 1.0.7 up to 04-11
  679. - -V option for generating bug report tracing
  680. - more tracing for option parsing
  681. - errors for cdecl and high()
  682. - win32 import stabs
  683. - win32 records<=8 are returned in eax:edx (turned off by default)
  684. - heaptrc update
  685. - more info for temp management in .s file with EXTDEBUG
  686. Revision 1.25 2002/10/31 13:28:32 pierre
  687. * correct last wrong fix for tw2158
  688. Revision 1.24 2002/10/30 17:10:00 pierre
  689. * merge of fix for tw2158 bug
  690. Revision 1.23 2002/07/26 21:15:44 florian
  691. * rewrote the system handling
  692. Revision 1.22 2002/07/01 18:46:34 peter
  693. * internal linker
  694. * reorganized aasm layer
  695. Revision 1.21 2002/05/18 13:34:25 peter
  696. * readded missing revisions
  697. Revision 1.20 2002/05/16 19:46:52 carl
  698. + defines.inc -> fpcdefs.inc to avoid conflicts if compiling by hand
  699. + try to fix temp allocation (still in ifdef)
  700. + generic constructor calls
  701. + start of tassembler / tmodulebase class cleanup
  702. Revision 1.18 2002/05/12 16:53:18 peter
  703. * moved entry and exitcode to ncgutil and cgobj
  704. * foreach gets extra argument for passing local data to the
  705. iterator function
  706. * -CR checks also class typecasts at runtime by changing them
  707. into as
  708. * fixed compiler to cycle with the -CR option
  709. * fixed stabs with elf writer, finally the global variables can
  710. be watched
  711. * removed a lot of routines from cga unit and replaced them by
  712. calls to cgobj
  713. * u32bit-s32bit updates for and,or,xor nodes. When one element is
  714. u32bit then the other is typecasted also to u32bit without giving
  715. a rangecheck warning/error.
  716. * fixed pascal calling method with reversing also the high tree in
  717. the parast, detected by tcalcst3 test
  718. Revision 1.17 2002/04/15 19:12:09 carl
  719. + target_info.size_of_pointer -> pointer_size
  720. + some cleanup of unused types/variables
  721. * move several constants from cpubase to their specific units
  722. (where they are used)
  723. + att_Reg2str -> gas_reg2str
  724. + int_reg2str -> std_reg2str
  725. Revision 1.16 2002/04/04 19:06:13 peter
  726. * removed unused units
  727. * use tlocation.size in cg.a_*loc*() routines
  728. Revision 1.15 2002/04/02 17:11:39 peter
  729. * tlocation,treference update
  730. * LOC_CONSTANT added for better constant handling
  731. * secondadd splitted in multiple routines
  732. * location_force_reg added for loading a location to a register
  733. of a specified size
  734. * secondassignment parses now first the right and then the left node
  735. (this is compatible with Kylix). This saves a lot of push/pop especially
  736. with string operations
  737. * adapted some routines to use the new cg methods
  738. Revision 1.14 2002/01/24 18:25:53 peter
  739. * implicit result variable generation for assembler routines
  740. * removed m_tp modeswitch, use m_tp7 or not(m_fpc) instead
  741. }