arm.inc 17 KB

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  1. {
  2. This file is part of the Free Pascal run time library.
  3. Copyright (c) 2003 by the Free Pascal development team.
  4. Processor dependent implementation for the system unit for
  5. ARM
  6. See the file COPYING.FPC, included in this distribution,
  7. for details about the copyright.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  11. **********************************************************************}
  12. {$asmmode gas}
  13. {$ifndef FPC_SYSTEM_HAS_MOVE}
  14. {$define FPC_SYSTEM_FPC_MOVE}
  15. {$endif FPC_SYSTEM_HAS_MOVE}
  16. {$ifdef FPC_SYSTEM_FPC_MOVE}
  17. const
  18. cpu_has_edsp : boolean = false;
  19. in_edsp_test : boolean = false;
  20. {$endif FPC_SYSTEM_FPC_MOVE}
  21. {$if not(defined(wince)) and not(defined(gba)) and not(defined(nds)) and not(defined(FPUSOFT)) and not(defined(FPULIBGCC))}
  22. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  23. {$if not defined(darwin) and not defined(FPUVFPV2) and not defined(FPUVFPV3)}
  24. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  25. begin
  26. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  27. asm
  28. rfs r0
  29. and r0,r0,#0xffe0ffff
  30. orr r0,r0,#0x00070000
  31. wfs r0
  32. end;
  33. end;
  34. {$else}
  35. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  36. begin
  37. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  38. asm
  39. fmrx r0,fpscr
  40. // set "round to nearest" mode
  41. and r0,r0,#0xff3fffff
  42. // mask "exception happened" and overflow flags
  43. and r0,r0,#0xffffff20
  44. // mask exception flags
  45. and r0,r0,#0xffff40ff
  46. {$ifndef darwin}
  47. // Floating point exceptions cause kernel panics on iPhoneOS 2.2.1...
  48. // disable flush-to-zero mode (IEEE math compliant)
  49. and r0,r0,#0xfeffffff
  50. // enable invalid operation, div-by-zero and overflow exceptions
  51. orr r0,r0,#0x00000700
  52. {$endif}
  53. fmxr fpscr,r0
  54. end;
  55. end;
  56. {$endif}
  57. {$endif}
  58. procedure fpc_cpuinit;
  59. begin
  60. SysInitFPU;
  61. end;
  62. {$ifdef wince}
  63. function _controlfp(new: DWORD; mask: DWORD): DWORD; cdecl; external 'coredll';
  64. {$define FPC_SYSTEM_HAS_SYSRESETFPU}
  65. Procedure SysResetFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  66. begin
  67. softfloat_exception_flags:=0;
  68. end;
  69. {$define FPC_SYSTEM_HAS_SYSINITFPU}
  70. Procedure SysInitFPU;{$ifdef SYSTEMINLINE}inline;{$endif}
  71. begin
  72. softfloat_exception_mask:=float_flag_underflow or float_flag_inexact or float_flag_denormal;
  73. { Enable FPU exceptions, but disable INEXACT, UNDERFLOW, DENORMAL }
  74. { FPU precision 64 bit, rounding to nearest, affine infinity }
  75. _controlfp($000C0003, $030F031F);
  76. end;
  77. {$endif wince}
  78. {****************************************************************************
  79. stack frame related stuff
  80. ****************************************************************************}
  81. {$IFNDEF INTERNAL_BACKTRACE}
  82. {$define FPC_SYSTEM_HAS_GET_FRAME}
  83. function get_frame:pointer;assembler;nostackframe;
  84. asm
  85. mov r0,r11
  86. end;
  87. {$ENDIF not INTERNAL_BACKTRACE}
  88. {$define FPC_SYSTEM_HAS_GET_CALLER_ADDR}
  89. function get_caller_addr(framebp:pointer):pointer;assembler;
  90. asm
  91. movs r0,r0
  92. beq .Lg_a_null
  93. ldr r0,[r0,#-4]
  94. .Lg_a_null:
  95. end;
  96. {$define FPC_SYSTEM_HAS_GET_CALLER_FRAME}
  97. function get_caller_frame(framebp:pointer):pointer;assembler;
  98. asm
  99. movs r0,r0
  100. beq .Lgnf_null
  101. // see comments in arm/cgcpu.pas, g_proc_entry
  102. ldr r0,[r0,#-12]
  103. .Lgnf_null:
  104. end;
  105. {$define FPC_SYSTEM_HAS_SPTR}
  106. Function Sptr : pointer;assembler;
  107. asm
  108. mov r0,sp
  109. end;
  110. {$ifndef FPC_SYSTEM_HAS_FILLCHAR}
  111. {$define FPC_SYSTEM_HAS_FILLCHAR}
  112. Procedure FillChar(var x;count:longint;value:byte);assembler;nostackframe;
  113. asm
  114. // less than 0?
  115. cmp r1,#0
  116. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  117. movlt pc,lr
  118. {$else}
  119. bxlt lr
  120. {$endif}
  121. mov r3,r0
  122. cmp r1,#8 // at least 8 bytes to do?
  123. blt .LFillchar2
  124. orr r2,r2,r2,lsl #8
  125. orr r2,r2,r2,lsl #16
  126. .LFillchar0:
  127. tst r3,#3 // aligned yet?
  128. strneb r2,[r3],#1
  129. subne r1,r1,#1
  130. bne .LFillchar0
  131. mov ip,r2
  132. .LFillchar1:
  133. cmp r1,#8 // 8 bytes still to do?
  134. blt .LFillchar2
  135. stmia r3!,{r2,ip}
  136. sub r1,r1,#8
  137. cmp r1,#8 // 8 bytes still to do?
  138. blt .LFillchar2
  139. stmia r3!,{r2,ip}
  140. sub r1,r1,#8
  141. cmp r1,#8 // 8 bytes still to do?
  142. blt .LFillchar2
  143. stmia r3!,{r2,ip}
  144. sub r1,r1,#8
  145. cmp r1,#8 // 8 bytes still to do?
  146. stmgeia r3!,{r2,ip}
  147. subge r1,r1,#8
  148. bge .LFillchar1
  149. .LFillchar2:
  150. movs r1,r1 // anything left?
  151. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  152. moveq pc,lr
  153. {$else}
  154. bxeq lr
  155. {$endif}
  156. rsb r1,r1,#7
  157. add pc,pc,r1,lsl #2
  158. mov r0,r0
  159. strb r2,[r3],#1
  160. strb r2,[r3],#1
  161. strb r2,[r3],#1
  162. strb r2,[r3],#1
  163. strb r2,[r3],#1
  164. strb r2,[r3],#1
  165. strb r2,[r3],#1
  166. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  167. mov pc,lr
  168. {$else}
  169. bx lr
  170. {$endif}
  171. end;
  172. {$endif FPC_SYSTEM_HAS_FILLCHAR}
  173. {$ifndef FPC_SYSTEM_HAS_MOVE}
  174. {$define FPC_SYSTEM_HAS_MOVE}
  175. procedure Move_pld(const source;var dest;count:longint);assembler;nostackframe;
  176. asm
  177. pld [r0]
  178. pld [r1]
  179. // count <=0 ?
  180. cmp r2,#0
  181. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  182. movle pc,lr
  183. {$else}
  184. bxle lr
  185. {$endif}
  186. // overlap?
  187. cmp r1,r0
  188. bls .Lnooverlap
  189. add r3,r0,r2
  190. cmp r3,r1
  191. bls .Lnooverlap
  192. // overlap, copy backward
  193. .Loverlapped:
  194. subs r2,r2,#1
  195. ldrb r3,[r0,r2]
  196. strb r3,[r1,r2]
  197. bne .Loverlapped
  198. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  199. mov pc,lr
  200. {$else}
  201. bx lr
  202. {$endif}
  203. .Lnooverlap:
  204. // less then 16 bytes to copy?
  205. cmp r2,#8
  206. // yes, the forget about the whole optimizations
  207. // and do a bytewise copy
  208. blt .Lbyteloop
  209. // both aligned?
  210. orr r3,r0,r1
  211. tst r3,#3
  212. bne .Lbyteloop
  213. (*
  214. // yes, then align
  215. // alignment to 4 byte boundries is enough
  216. ldrb ip,[r0],#1
  217. sub r2,r2,#1
  218. stb ip,[r1],#1
  219. tst r3,#2
  220. bne .Ldifferentaligned
  221. ldrh ip,[r0],#2
  222. sub r2,r2,#2
  223. sth ip,[r1],#2
  224. .Ldifferentaligned
  225. // qword aligned?
  226. orrs r3,r0,r1
  227. tst r3,#7
  228. bne .Ldwordloop
  229. *)
  230. pld [r0,#32]
  231. pld [r1,#32]
  232. .Ldwordloop:
  233. sub r2,r2,#4
  234. ldr r3,[r0],#4
  235. // preload
  236. pld [r0,#64]
  237. pld [r1,#64]
  238. cmp r2,#4
  239. str r3,[r1],#4
  240. bcs .Ldwordloop
  241. cmp r2,#0
  242. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  243. moveq pc,lr
  244. {$else}
  245. bxeq lr
  246. {$endif}
  247. .Lbyteloop:
  248. subs r2,r2,#1
  249. ldrb r3,[r0],#1
  250. strb r3,[r1],#1
  251. bne .Lbyteloop
  252. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  253. mov pc,lr
  254. {$else}
  255. bx lr
  256. {$endif}
  257. end;
  258. procedure Move_blended(const source;var dest;count:longint);assembler;nostackframe;
  259. asm
  260. // count <=0 ?
  261. cmp r2,#0
  262. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  263. movle pc,lr
  264. {$else}
  265. bxle lr
  266. {$endif}
  267. // overlap?
  268. cmp r1,r0
  269. bls .Lnooverlap
  270. add r3,r0,r2
  271. cmp r3,r1
  272. bls .Lnooverlap
  273. // overlap, copy backward
  274. .Loverlapped:
  275. subs r2,r2,#1
  276. ldrb r3,[r0,r2]
  277. strb r3,[r1,r2]
  278. bne .Loverlapped
  279. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  280. mov pc,lr
  281. {$else}
  282. bx lr
  283. {$endif}
  284. .Lnooverlap:
  285. // less then 16 bytes to copy?
  286. cmp r2,#8
  287. // yes, the forget about the whole optimizations
  288. // and do a bytewise copy
  289. blt .Lbyteloop
  290. // both aligned?
  291. orr r3,r0,r1
  292. tst r3,#3
  293. bne .Lbyteloop
  294. (*
  295. // yes, then align
  296. // alignment to 4 byte boundries is enough
  297. ldrb ip,[r0],#1
  298. sub r2,r2,#1
  299. stb ip,[r1],#1
  300. tst r3,#2
  301. bne .Ldifferentaligned
  302. ldrh ip,[r0],#2
  303. sub r2,r2,#2
  304. sth ip,[r1],#2
  305. .Ldifferentaligned
  306. // qword aligned?
  307. orrs r3,r0,r1
  308. tst r3,#7
  309. bne .Ldwordloop
  310. *)
  311. .Ldwordloop:
  312. sub r2,r2,#4
  313. ldr r3,[r0],#4
  314. cmp r2,#4
  315. str r3,[r1],#4
  316. bcs .Ldwordloop
  317. cmp r2,#0
  318. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  319. moveq pc,lr
  320. {$else}
  321. bxeq lr
  322. {$endif}
  323. .Lbyteloop:
  324. subs r2,r2,#1
  325. ldrb r3,[r0],#1
  326. strb r3,[r1],#1
  327. bne .Lbyteloop
  328. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  329. mov pc,lr
  330. {$else}
  331. bx lr
  332. {$endif}
  333. end;
  334. const
  335. moveproc : pointer = @move_blended;
  336. procedure Move(const source;var dest;count:longint);[public, alias: 'FPC_MOVE'];assembler;nostackframe;
  337. asm
  338. ldr ip,.Lmoveproc
  339. ldr pc,[ip]
  340. .Lmoveproc:
  341. .long moveproc
  342. end;
  343. {$endif FPC_SYSTEM_HAS_MOVE}
  344. {****************************************************************************
  345. String
  346. ****************************************************************************}
  347. {$ifndef FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  348. {$define FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  349. {$ifndef FPC_STRTOSHORTSTRINGPROC}
  350. function fpc_shortstr_to_shortstr(len:longint;const sstr:shortstring):shortstring;assembler;nostackframe;[public,alias: 'FPC_SHORTSTR_TO_SHORTSTR'];compilerproc;
  351. {$else}
  352. procedure fpc_shortstr_to_shortstr(out res:shortstring;const sstr:shortstring);assembler;nostackframe;[public,alias: 'FPC_SHORTSTR_TO_SHORTSTR'];compilerproc;
  353. {$endif}
  354. {r0: __RESULT
  355. r1: len
  356. r2: sstr}
  357. asm
  358. ldrb r12,[r2],#1
  359. cmp r12,r1
  360. movgt r12,r1
  361. strb r12,[r0],#1
  362. cmp r12,#6 (* 6 seems to be the break even point. *)
  363. blt .LStartTailCopy
  364. (* Align destination on 32bits. This is the only place where unrolling
  365. really seems to help, since in the common case, sstr is aligned on
  366. 32 bits, therefore in the common case we need to copy 3 bytes to
  367. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  368. rsb r3,r0,#0
  369. ands r3,r3,#3
  370. sub r12,r12,r3
  371. ldrneb r1,[r2],#1
  372. strneb r1,[r0],#1
  373. subnes r3,r3,#1
  374. ldrneb r1,[r2],#1
  375. strneb r1,[r0],#1
  376. subnes r3,r3,#1
  377. ldrneb r1,[r2],#1
  378. strneb r1,[r0],#1
  379. subnes r3,r3,#1
  380. .LDoneAlign:
  381. (* Destination should be aligned now, but source might not be aligned,
  382. if this is the case, do a byte-per-byte copy. *)
  383. tst r2,#3
  384. bne .LStartTailCopy
  385. (* Start the main copy, 32 bit at a time. *)
  386. movs r3,r12,lsr #2
  387. and r12,r12,#3
  388. beq .LStartTailCopy
  389. .LNext4bytes:
  390. (* Unrolling this loop would save a little bit of time for long strings
  391. (>20 chars), but alas, it hurts for short strings and they are the
  392. common case.*)
  393. ldrne r1,[r2],#4
  394. strne r1,[r0],#4
  395. subnes r3,r3,#1
  396. bne .LNext4bytes
  397. .LStartTailCopy:
  398. (* Do remaining bytes. *)
  399. cmp r12,#0
  400. beq .LDoneTail
  401. .LNextChar3:
  402. ldrb r1,[r2],#1
  403. strb r1,[r0],#1
  404. subs r12,r12,#1
  405. bne .LNextChar3
  406. .LDoneTail:
  407. end;
  408. procedure fpc_shortstr_assign(len:longint;sstr,dstr:pointer);assembler;nostackframe;[public,alias:'FPC_SHORTSTR_ASSIGN'];compilerproc;
  409. {r0: len
  410. r1: sstr
  411. r2: dstr}
  412. asm
  413. ldrb r12,[r1],#1
  414. cmp r12,r0
  415. movgt r12,r0
  416. strb r12,[r2],#1
  417. cmp r12,#6 (* 6 seems to be the break even point. *)
  418. blt .LStartTailCopy
  419. (* Align destination on 32bits. This is the only place where unrolling
  420. really seems to help, since in the common case, sstr is aligned on
  421. 32 bits, therefore in the common case we need to copy 3 bytes to
  422. align, i.e. in the case of a loop, you wouldn't branch out early.*)
  423. rsb r3,r2,#0
  424. ands r3,r3,#3
  425. sub r12,r12,r3
  426. ldrneb r0,[r1],#1
  427. strneb r0,[r2],#1
  428. subnes r3,r3,#1
  429. ldrneb r0,[r1],#1
  430. strneb r0,[r2],#1
  431. subnes r3,r3,#1
  432. ldrneb r0,[r1],#1
  433. strneb r0,[r2],#1
  434. subnes r3,r3,#1
  435. .LDoneAlign:
  436. (* Destination should be aligned now, but source might not be aligned,
  437. if this is the case, do a byte-per-byte copy. *)
  438. tst r1,#3
  439. bne .LStartTailCopy
  440. (* Start the main copy, 32 bit at a time. *)
  441. movs r3,r12,lsr #2
  442. and r12,r12,#3
  443. beq .LStartTailCopy
  444. .LNext4bytes:
  445. (* Unrolling this loop would save a little bit of time for long strings
  446. (>20 chars), but alas, it hurts for short strings and they are the
  447. common case.*)
  448. ldrne r0,[r1],#4
  449. strne r0,[r2],#4
  450. subnes r3,r3,#1
  451. bne .LNext4bytes
  452. .LStartTailCopy:
  453. (* Do remaining bytes. *)
  454. cmp r12,#0
  455. beq .LDoneTail
  456. .LNextChar3:
  457. ldrb r0,[r1],#1
  458. strb r0,[r2],#1
  459. subs r12,r12,#1
  460. bne .LNextChar3
  461. .LDoneTail:
  462. end;
  463. {$endif FPC_SYSTEM_HAS_FPC_SHORTSTR_ASSIGN}
  464. {$ifndef FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  465. {$define FPC_SYSTEM_HAS_FPC_PCHAR_LENGTH}
  466. function fpc_Pchar_length(p:Pchar):longint;assembler;nostackframe;[public,alias:'FPC_PCHAR_LENGTH'];compilerproc;
  467. asm
  468. cmp r0,#0
  469. mov r1,r0
  470. beq .Ldone
  471. .Lnextchar:
  472. (*Are we aligned?*)
  473. tst r1,#3
  474. bne .Ltest_unaligned (*No, do byte per byte.*)
  475. ldr r3,.L01010101
  476. .Ltest_aligned:
  477. (*Aligned, load 4 bytes at a time.*)
  478. ldr r12,[r1],#4
  479. (*Check wether r12 contains a 0 byte.*)
  480. sub r2,r12,r3
  481. mvn r12,r12
  482. and r2,r2,r12
  483. ands r2,r2,r3,lsl #7 (*r3 lsl 7 = $80808080*)
  484. beq .Ltest_aligned (*No 0 byte, repeat.*)
  485. sub r1,r1,#4
  486. .Ltest_unaligned:
  487. ldrb r12,[r1],#1
  488. cmp r12,#1 (*r12<1 same as r12=0, but result in carry flag*)
  489. bcs .Lnextchar
  490. (*Dirty trick: we need to subtract 1 extra because we have counted the
  491. terminating 0, due to the known carry flag sbc can do this.*)
  492. sbc r0,r1,r0
  493. .Ldone:
  494. {$if defined(cpuarmv3) or defined(cpuarmv4) or defined(cpuarmv5)}
  495. mov pc,lr
  496. {$else}
  497. bx lr
  498. {$endif}
  499. .L01010101:
  500. .long 0x01010101
  501. end;
  502. {$endif}
  503. var
  504. fpc_system_lock: longint; export name 'fpc_system_lock';
  505. function InterLockedDecrement (var Target: longint) : longint; assembler; nostackframe;
  506. asm
  507. {$if defined(cpuarmv6) or defined(cpuarmv7m) or defined(cpucortexm3)}
  508. .Lloop:
  509. ldrex r1, [r0]
  510. sub r1, r1, #1
  511. strex r2, r1, [r0]
  512. cmp r2, #0
  513. bne .Lloop
  514. mov r0, r1
  515. bx lr
  516. {$else}
  517. // lock
  518. ldr r3, .Lfpc_system_lock
  519. mov r1, #1
  520. .Lloop:
  521. swp r2, r1, [r3]
  522. cmp r2, #0
  523. bne .Lloop
  524. // do the job
  525. ldr r1, [r0]
  526. sub r1, r1, #1
  527. str r1, [r0]
  528. mov r0, r1
  529. // unlock and return
  530. str r2, [r3]
  531. bx lr
  532. .Lfpc_system_lock:
  533. .long fpc_system_lock
  534. {$endif}
  535. end;
  536. function InterLockedIncrement (var Target: longint) : longint; assembler; nostackframe;
  537. asm
  538. {$if defined(cpuarmv6) or defined(cpuarmv7m) or defined(cpucortexm3)}
  539. .Lloop:
  540. ldrex r1, [r0]
  541. add r1, r1, #1
  542. strex r2, r1, [r0]
  543. cmp r2, #0
  544. bne .Lloop
  545. mov r0, r1
  546. bx lr
  547. {$else}
  548. // lock
  549. ldr r3, .Lfpc_system_lock
  550. mov r1, #1
  551. .Lloop:
  552. swp r2, r1, [r3]
  553. cmp r2, #0
  554. bne .Lloop
  555. // do the job
  556. ldr r1, [r0]
  557. add r1, r1, #1
  558. str r1, [r0]
  559. mov r0, r1
  560. // unlock and return
  561. str r2, [r3]
  562. bx lr
  563. .Lfpc_system_lock:
  564. .long fpc_system_lock
  565. {$endif}
  566. end;
  567. function InterLockedExchange (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  568. asm
  569. {$if defined(cpuarmv6) or defined(cpuarmv7m) or defined(cpucortexm3)}
  570. // swp is deprecated on ARMv6 and above
  571. .Lloop:
  572. ldrex r2, [r0]
  573. strex r3, r1, [r0]
  574. cmp r3, #0
  575. bne .Lloop
  576. mov r0, r2
  577. bx lr
  578. {$else}
  579. swp r1, r1, [r0]
  580. mov r0,r1
  581. {$endif}
  582. end;
  583. function InterLockedExchangeAdd (var Target: longint;Source : longint) : longint; assembler; nostackframe;
  584. asm
  585. {$if defined(cpuarmv6) or defined(cpuarmv7m) or defined(cpucortexm3)}
  586. .Lloop:
  587. ldrex r2, [r0]
  588. add r12, r1, r2
  589. strex r3, r12, [r0]
  590. cmp r3, #0
  591. bne .Lloop
  592. mov r0, r2
  593. bx lr
  594. {$else}
  595. // lock
  596. ldr r3, .Lfpc_system_lock
  597. mov r2, #1
  598. .Lloop:
  599. swp r2, r2, [r3]
  600. cmp r2, #0
  601. bne .Lloop
  602. // do the job
  603. ldr r2, [r0]
  604. add r1, r1, r2
  605. str r1, [r0]
  606. mov r0, r2
  607. // unlock and return
  608. mov r2, #0
  609. str r2, [r3]
  610. bx lr
  611. .Lfpc_system_lock:
  612. .long fpc_system_lock
  613. {$endif}
  614. end;
  615. function InterlockedCompareExchange(var Target: longint; NewValue: longint; Comperand: longint): longint; assembler; nostackframe;
  616. asm
  617. {$if defined(cpuarmv6) or defined(cpuarmv7m) or defined(cpucortexm3)}
  618. .Lloop:
  619. ldrex r3, [r0]
  620. mov r12, #0
  621. cmp r3, r2
  622. strexeq r12, r1, [r0]
  623. cmp r12, #0
  624. bne .Lloop
  625. mov r0, r3
  626. bx lr
  627. {$else}
  628. // lock
  629. ldr r12, .Lfpc_system_lock
  630. mov r3, #1
  631. .Lloop:
  632. swp r3, r3, [r12]
  633. cmp r3, #0
  634. bne .Lloop
  635. // do the job
  636. ldr r3, [r0]
  637. cmp r3, r2
  638. streq r1, [r0]
  639. mov r0, r3
  640. // unlock and return
  641. mov r3, #0
  642. str r3, [r12]
  643. bx lr
  644. .Lfpc_system_lock:
  645. .long fpc_system_lock
  646. {$endif}
  647. end;
  648. {$define FPC_SYSTEM_HAS_DECLOCKED_LONGINT}
  649. function declocked(var l: longint) : boolean; inline;
  650. begin
  651. Result:=InterLockedDecrement(l) = 0;
  652. end;
  653. {$define FPC_SYSTEM_HAS_INCLOCKED_LONGINT}
  654. procedure inclocked(var l: longint); inline;
  655. begin
  656. InterLockedIncrement(l);
  657. end;
  658. procedure fpc_cpucodeinit;
  659. begin
  660. {$ifdef FPC_SYSTEM_FPC_MOVE}
  661. cpu_has_edsp:=true;
  662. in_edsp_test:=true;
  663. asm
  664. bic r0,sp,#7
  665. ldrd r0,[r0]
  666. end;
  667. in_edsp_test:=false;
  668. if cpu_has_edsp then
  669. moveproc:=@move_pld
  670. else
  671. moveproc:=@move_blended;
  672. {$endif FPC_SYSTEM_FPC_MOVE}
  673. end;
  674. {include hand-optimized assembler division code}
  675. {$i divide.inc}