ncgmem.pas 47 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cgutils,cpuinfo,cpubase,
  23. symtype,
  24. node,nmem;
  25. type
  26. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  27. procedure pass_generate_code;override;
  28. end;
  29. tcgloadparentfpnode = class(tloadparentfpnode)
  30. procedure pass_generate_code;override;
  31. end;
  32. tcgaddrnode = class(taddrnode)
  33. procedure pass_generate_code;override;
  34. end;
  35. tcgderefnode = class(tderefnode)
  36. procedure pass_generate_code;override;
  37. end;
  38. tcgsubscriptnode = class(tsubscriptnode)
  39. protected
  40. function handle_platform_subscript: boolean; virtual;
  41. public
  42. procedure pass_generate_code;override;
  43. end;
  44. tcgwithnode = class(twithnode)
  45. procedure pass_generate_code;override;
  46. end;
  47. tcgvecnode = class(tvecnode)
  48. function get_mul_size : aint;
  49. private
  50. procedure rangecheck_array;
  51. procedure rangecheck_string;
  52. protected
  53. {# This routine is used to calculate the address of the reference.
  54. On entry reg contains the index in the array,
  55. and l contains the size of each element in the array.
  56. This routine should update location.reference correctly,
  57. so it points to the correct address.
  58. }
  59. procedure update_reference_reg_mul(maybe_const_reg: tregister;regsize: tdef; l: aint);virtual;
  60. procedure update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l: aint);virtual;
  61. procedure update_reference_offset(var ref: treference; index, mulsize: aint); virtual;
  62. procedure second_wideansistring;virtual;
  63. procedure second_dynamicarray;virtual;
  64. public
  65. procedure pass_generate_code;override;
  66. end;
  67. implementation
  68. uses
  69. systems,
  70. cutils,cclasses,verbose,globals,constexp,
  71. symconst,symbase,symdef,symsym,symtable,defutil,paramgr,
  72. aasmbase,aasmtai,aasmdata,
  73. procinfo,pass_2,parabase,
  74. pass_1,nld,ncon,nadd,ncnv,nutils,
  75. cgobj,hlcgobj,
  76. tgobj,ncgutil,objcgutl,
  77. defcmp
  78. ;
  79. {*****************************************************************************
  80. TCGLOADVMTADDRNODE
  81. *****************************************************************************}
  82. procedure tcgloadvmtaddrnode.pass_generate_code;
  83. var
  84. href : treference;
  85. pool : THashSet;
  86. entry : PHashSetItem;
  87. begin
  88. location_reset(location,LOC_REGISTER,OS_ADDR);
  89. if (left.nodetype=typen) then
  90. begin
  91. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  92. if not is_objcclass(left.resultdef) then
  93. begin
  94. reference_reset_symbol(href,
  95. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  96. sizeof(pint));
  97. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,href,location.register);
  98. end
  99. else
  100. begin
  101. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  102. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  103. if (target_info.system in systems_objc_nfabi) then
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  107. end
  108. else
  109. begin
  110. { find/add necessary classref/classname pool entries }
  111. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  112. end;
  113. reference_reset_symbol(href,tasmlabel(entry^.Data),0,sizeof(pint));
  114. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  115. end;
  116. end
  117. else
  118. begin
  119. { left contains self, load vmt from self }
  120. secondpass(left);
  121. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  122. end;
  123. end;
  124. {*****************************************************************************
  125. TCGLOADPARENTFPNODE
  126. *****************************************************************************}
  127. procedure tcgloadparentfpnode.pass_generate_code;
  128. var
  129. currpi : tprocinfo;
  130. hsym : tparavarsym;
  131. href : treference;
  132. begin
  133. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  134. begin
  135. location_reset(location,LOC_REGISTER,OS_ADDR);
  136. location.register:=current_procinfo.framepointer;
  137. end
  138. else
  139. begin
  140. currpi:=current_procinfo;
  141. location_reset(location,LOC_REGISTER,OS_ADDR);
  142. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  143. { load framepointer of current proc }
  144. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  145. if not assigned(hsym) then
  146. internalerror(200309281);
  147. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,hsym.localloc,location.register);
  148. { walk parents }
  149. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  150. begin
  151. currpi:=currpi.parent;
  152. if not assigned(currpi) then
  153. internalerror(200311201);
  154. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  155. if not assigned(hsym) then
  156. internalerror(200309282);
  157. if hsym.localloc.loc<>LOC_REFERENCE then
  158. internalerror(200309283);
  159. reference_reset_base(href,location.register,hsym.localloc.reference.offset,sizeof(pint));
  160. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,href,location.register);
  161. end;
  162. end;
  163. end;
  164. {*****************************************************************************
  165. TCGADDRNODE
  166. *****************************************************************************}
  167. procedure tcgaddrnode.pass_generate_code;
  168. begin
  169. secondpass(left);
  170. location_reset(location,LOC_REGISTER,OS_ADDR);
  171. location.register:=cg.getaddressregister(current_asmdata.CurrAsmList);
  172. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  173. { on x86_64-win64, array of chars can be returned in registers, however,
  174. when passing these arrays to other functions, the compiler wants to take
  175. the address of the array so when the addrnode has been created internally,
  176. we have to force the data into memory, see also tw14388.pp
  177. }
  178. if nf_internal in flags then
  179. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  180. else
  181. internalerror(2006111510);
  182. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,location.register);
  183. end;
  184. {*****************************************************************************
  185. TCGDEREFNODE
  186. *****************************************************************************}
  187. procedure tcgderefnode.pass_generate_code;
  188. var
  189. paraloc1 : tcgpara;
  190. pd : tprocdef;
  191. sym : tsym;
  192. st : tsymtable;
  193. hp : pnode;
  194. hp2 : tnode;
  195. extraoffset : tcgint;
  196. begin
  197. { assume natural alignment, except for packed records }
  198. if not(resultdef.typ in [recorddef,objectdef]) or
  199. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  200. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  201. else
  202. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  203. { can we fold an add/sub node into the offset of the deref node? }
  204. extraoffset:=0;
  205. hp:=actualtargetnode(@left);
  206. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  207. begin
  208. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  209. replacenode(hp^,taddnode(hp^).left);
  210. end
  211. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  212. begin
  213. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  214. replacenode(hp^,taddnode(hp^).left);
  215. end
  216. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  217. begin
  218. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  219. replacenode(hp^,taddnode(hp^).right);
  220. end;
  221. secondpass(left);
  222. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  223. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  224. case left.location.loc of
  225. LOC_CREGISTER,
  226. LOC_REGISTER:
  227. begin
  228. maybechangeloadnodereg(current_asmdata.CurrAsmList,left,true);
  229. {$ifdef cpu_uses_separate_address_registers}
  230. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  231. begin
  232. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  233. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  234. location.reference.base);
  235. end
  236. else
  237. {$endif}
  238. location.reference.base := left.location.register;
  239. end;
  240. LOC_CREFERENCE,
  241. LOC_REFERENCE:
  242. begin
  243. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  244. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  245. end;
  246. LOC_CONSTANT:
  247. begin
  248. location.reference.offset:=left.location.value;
  249. end;
  250. else
  251. internalerror(200507031);
  252. end;
  253. location.reference.offset:=location.reference.offset+extraoffset;
  254. if (cs_use_heaptrc in current_settings.globalswitches) and
  255. (cs_checkpointer in current_settings.localswitches) and
  256. not(cs_compilesystem in current_settings.moduleswitches) and
  257. {$ifdef x86}
  258. (tpointerdef(left.resultdef).x86pointertyp = default_x86_data_pointer_type) and
  259. {$endif x86}
  260. not(nf_no_checkpointer in flags) and
  261. { can be NR_NO in case of LOC_CONSTANT }
  262. (location.reference.base<>NR_NO) then
  263. begin
  264. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  265. (sym.typ<>procsym) then
  266. internalerror(2012010601);
  267. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  268. paraloc1.init;
  269. paramanager.getintparaloc(pd,1,paraloc1);
  270. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  271. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  272. paraloc1.done;
  273. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  274. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  275. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  276. end;
  277. end;
  278. {*****************************************************************************
  279. TCGSUBSCRIPTNODE
  280. *****************************************************************************}
  281. function tcgsubscriptnode.handle_platform_subscript: boolean;
  282. begin
  283. result:=false;
  284. end;
  285. procedure tcgsubscriptnode.pass_generate_code;
  286. var
  287. sym: tasmsymbol;
  288. paraloc1 : tcgpara;
  289. tmpref: treference;
  290. sref: tsubsetreference;
  291. offsetcorrection : aint;
  292. pd : tprocdef;
  293. srym : tsym;
  294. st : tsymtable;
  295. begin
  296. secondpass(left);
  297. if codegenerror then
  298. exit;
  299. paraloc1.init;
  300. { several object types must be dereferenced implicitly }
  301. if is_implicit_pointer_object_type(left.resultdef) then
  302. begin
  303. if (not is_managed_type(left.resultdef)) or
  304. (target_info.system in systems_garbage_collected_managed_types) then
  305. begin
  306. { the contents of a class are aligned to a sizeof(pointer) }
  307. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),sizeof(pint));
  308. case left.location.loc of
  309. LOC_CREGISTER,
  310. LOC_REGISTER:
  311. begin
  312. {$ifdef cpu_uses_separate_address_registers}
  313. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  314. begin
  315. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  316. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  317. left.location.register,location.reference.base);
  318. end
  319. else
  320. {$endif}
  321. location.reference.base := left.location.register;
  322. end;
  323. LOC_CREFERENCE,
  324. LOC_REFERENCE,
  325. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  326. LOC_SUBSETREG,
  327. LOC_CSUBSETREG,
  328. LOC_SUBSETREF,
  329. LOC_CSUBSETREF:
  330. begin
  331. location.reference.base:=hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef);
  332. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  333. end;
  334. LOC_CONSTANT:
  335. begin
  336. { can happen with @classtype(pointerconst).field }
  337. location.reference.offset:=left.location.value;
  338. end;
  339. else
  340. internalerror(2009092401);
  341. end;
  342. { implicit deferencing }
  343. if (cs_use_heaptrc in current_settings.globalswitches) and
  344. (cs_checkpointer in current_settings.localswitches) and
  345. not(cs_compilesystem in current_settings.moduleswitches) then
  346. begin
  347. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',srym,st) or
  348. (srym.typ<>procsym) then
  349. internalerror(2012010602);
  350. pd:=tprocdef(tprocsym(srym).ProcdefList[0]);
  351. paramanager.getintparaloc(pd,1,paraloc1);
  352. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,resultdef,location.reference.base,paraloc1);
  353. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  354. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  355. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  356. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  357. end;
  358. end
  359. else
  360. { reference-counted implicit pointer object types don't have
  361. fields -> cannot be subscripted (calls are handled via call
  362. nodes) }
  363. internalerror(2011011901);
  364. end
  365. else
  366. begin
  367. location_copy(location,left.location);
  368. { some abi's require that functions return (some) records in }
  369. { registers }
  370. case location.loc of
  371. LOC_REFERENCE,
  372. LOC_CREFERENCE:
  373. ;
  374. LOC_REGISTER,
  375. LOC_CREGISTER,
  376. LOC_MMREGISTER,
  377. LOC_FPUREGISTER:
  378. begin
  379. { in case the result is not something that can be put
  380. into an integer register (e.g.
  381. function_returning_record().non_regable_field, or
  382. a function returning a value > sizeof(intreg))
  383. -> force to memory
  384. }
  385. if not tstoreddef(left.resultdef).is_intregable or
  386. not tstoreddef(resultdef).is_intregable or
  387. { if the field spans multiple registers, we must force the record into
  388. memory as well }
  389. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  390. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  391. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER]) then
  392. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  393. else
  394. begin
  395. if (left.location.loc = LOC_REGISTER) then
  396. location.loc := LOC_SUBSETREG
  397. else
  398. location.loc := LOC_CSUBSETREG;
  399. location.size:=def_cgsize(resultdef);
  400. offsetcorrection:=0;
  401. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  402. begin
  403. if (vs.fieldoffset>=sizeof(aword)) then
  404. begin
  405. location.sreg.subsetreg := left.location.registerhi;
  406. offsetcorrection:=sizeof(aword)*8;
  407. end
  408. else
  409. location.sreg.subsetreg := left.location.register;
  410. location.sreg.subsetregsize := OS_INT;
  411. end
  412. else
  413. begin
  414. location.sreg.subsetreg := left.location.register;
  415. location.sreg.subsetregsize := left.location.size;
  416. end;
  417. if not is_packed_record_or_object(left.resultdef) then
  418. begin
  419. if (target_info.endian = ENDIAN_BIG) then
  420. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  421. else
  422. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  423. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  424. end
  425. else
  426. begin
  427. location.sreg.bitlen := resultdef.packedbitsize;
  428. if (target_info.endian = ENDIAN_BIG) then
  429. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  430. else
  431. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  432. end;
  433. end;
  434. end;
  435. LOC_SUBSETREG,
  436. LOC_CSUBSETREG:
  437. begin
  438. location.size:=def_cgsize(resultdef);
  439. if not is_packed_record_or_object(left.resultdef) then
  440. begin
  441. if (target_info.endian = ENDIAN_BIG) then
  442. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  443. else
  444. inc(location.sreg.startbit, vs.fieldoffset * 8);
  445. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  446. end
  447. else
  448. begin
  449. location.sreg.bitlen := resultdef.packedbitsize;
  450. if (target_info.endian = ENDIAN_BIG) then
  451. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  452. else
  453. inc(location.sreg.startbit, vs.fieldoffset);
  454. end;
  455. end;
  456. else
  457. internalerror(2006031901);
  458. end;
  459. end;
  460. if is_objc_class_or_protocol(left.resultdef) and
  461. (target_info.system in systems_objc_nfabi) then
  462. begin
  463. if (location.loc<>LOC_REFERENCE) or
  464. (location.reference.index<>NR_NO) then
  465. internalerror(2009092402);
  466. { the actual field offset is stored in memory (to solve the
  467. "fragile base class" problem: this way the layout of base
  468. classes can be changed without breaking programs compiled against
  469. earlier versions)
  470. }
  471. sym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  472. reference_reset_symbol(tmpref,sym,0,sizeof(pint));
  473. location.reference.index:=hlcg.getintregister(current_asmdata.CurrAsmList,ptruinttype);
  474. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,ptruinttype,ptruinttype,tmpref,location.reference.index);
  475. { always packrecords C -> natural alignment }
  476. location.reference.alignment:=vs.vardef.alignment;
  477. end
  478. else if handle_platform_subscript then
  479. begin
  480. { done }
  481. end
  482. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  483. begin
  484. if not is_packed_record_or_object(left.resultdef) then
  485. begin
  486. inc(location.reference.offset,vs.fieldoffset);
  487. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  488. end
  489. else if (vs.fieldoffset mod 8 = 0) and
  490. (resultdef.packedbitsize mod 8 = 0) and
  491. { is different in case of e.g. packenum 2 and an enum }
  492. { which fits in 8 bits }
  493. (resultdef.size*8 = resultdef.packedbitsize) then
  494. begin
  495. inc(location.reference.offset,vs.fieldoffset div 8);
  496. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  497. end
  498. else
  499. begin
  500. sref.ref:=location.reference;
  501. sref.ref.alignment:=1;
  502. sref.bitindexreg:=NR_NO;
  503. inc(sref.ref.offset,vs.fieldoffset div 8);
  504. sref.startbit:=vs.fieldoffset mod 8;
  505. sref.bitlen:=resultdef.packedbitsize;
  506. if (left.location.loc=LOC_REFERENCE) then
  507. location.loc:=LOC_SUBSETREF
  508. else
  509. location.loc:=LOC_CSUBSETREF;
  510. location.sref:=sref;
  511. end;
  512. { also update the size of the location }
  513. location.size:=def_cgsize(resultdef);
  514. end;
  515. paraloc1.done;
  516. end;
  517. {*****************************************************************************
  518. TCGWITHNODE
  519. *****************************************************************************}
  520. procedure tcgwithnode.pass_generate_code;
  521. begin
  522. location_reset(location,LOC_VOID,OS_NO);
  523. if assigned(left) then
  524. secondpass(left);
  525. end;
  526. {*****************************************************************************
  527. TCGVECNODE
  528. *****************************************************************************}
  529. function tcgvecnode.get_mul_size : aint;
  530. begin
  531. if nf_memindex in flags then
  532. get_mul_size:=1
  533. else
  534. begin
  535. if (left.resultdef.typ=arraydef) then
  536. if not is_packed_array(left.resultdef) then
  537. get_mul_size:=tarraydef(left.resultdef).elesize
  538. else
  539. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  540. else
  541. get_mul_size:=resultdef.size;
  542. end
  543. end;
  544. { this routine must, like any other routine, not change the contents }
  545. { of base/index registers of references, as these may be regvars. }
  546. { The register allocator can coalesce one LOC_REGISTER being moved }
  547. { into another (as their live ranges won't overlap), but not a }
  548. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  549. { the live range of the LOC_CREGISTER will most likely overlap the }
  550. { the live range of the target LOC_(C)REGISTER) }
  551. { The passed register may be a LOC_CREGISTER as well. }
  552. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg: tregister; regsize: tdef; l: aint);
  553. var
  554. hreg: tregister;
  555. begin
  556. if l<>1 then
  557. begin
  558. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  559. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  560. maybe_const_reg:=hreg;
  561. end;
  562. if location.reference.base=NR_NO then
  563. location.reference.base:=maybe_const_reg
  564. else if location.reference.index=NR_NO then
  565. location.reference.index:=maybe_const_reg
  566. else
  567. begin
  568. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  569. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  570. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  571. { insert new index register }
  572. location.reference.index:=maybe_const_reg;
  573. end;
  574. { update alignment }
  575. if (location.reference.alignment=0) then
  576. internalerror(2009020704);
  577. location.reference.alignment:=newalignment(location.reference.alignment,l);
  578. end;
  579. { see remarks for tcgvecnode.update_reference_reg_mul above }
  580. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg: tregister; regsize: tdef; l:aint);
  581. var
  582. sref: tsubsetreference;
  583. offsetreg, hreg: tregister;
  584. alignpower: aint;
  585. temp : longint;
  586. begin
  587. { only orddefs are bitpacked. Even then we only need special code in }
  588. { case the bitpacked *byte size* is not a power of two, otherwise }
  589. { everything can be handled using the the regular array code. }
  590. if ((l mod 8) = 0) and
  591. (ispowerof2(l div 8,temp) or
  592. not is_ordinal(resultdef)
  593. {$ifndef cpu64bitalu}
  594. or is_64bitint(resultdef)
  595. {$endif not cpu64bitalu}
  596. ) then
  597. begin
  598. update_reference_reg_mul(maybe_const_reg,regsize,l div 8);
  599. exit;
  600. end;
  601. if (l > 8*sizeof(aint)) then
  602. internalerror(200608051);
  603. sref.ref := location.reference;
  604. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  605. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  606. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  607. { keep alignment for index }
  608. sref.ref.alignment := left.resultdef.alignment;
  609. if not ispowerof2(packedbitsloadsize(l),temp) then
  610. internalerror(2006081201);
  611. alignpower:=temp;
  612. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  613. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  614. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  615. if (sref.ref.base = NR_NO) then
  616. sref.ref.base := offsetreg
  617. else if (sref.ref.index = NR_NO) then
  618. sref.ref.index := offsetreg
  619. else
  620. begin
  621. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  622. sref.ref.base := offsetreg;
  623. end;
  624. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  625. sref.bitindexreg := hreg;
  626. sref.startbit := 0;
  627. sref.bitlen := resultdef.packedbitsize;
  628. if (left.location.loc = LOC_REFERENCE) then
  629. location.loc := LOC_SUBSETREF
  630. else
  631. location.loc := LOC_CSUBSETREF;
  632. location.sref := sref;
  633. end;
  634. procedure tcgvecnode.update_reference_offset(var ref: treference; index, mulsize: aint);
  635. begin
  636. inc(ref.offset,index*mulsize);
  637. end;
  638. procedure tcgvecnode.second_wideansistring;
  639. begin
  640. end;
  641. procedure tcgvecnode.second_dynamicarray;
  642. begin
  643. end;
  644. procedure tcgvecnode.rangecheck_array;
  645. var
  646. hightree : tnode;
  647. poslabel,
  648. neglabel : tasmlabel;
  649. hreg : tregister;
  650. paraloc1,paraloc2 : tcgpara;
  651. pd : tprocdef;
  652. begin
  653. { omit range checking when this is an array access to a pointer which has been
  654. typecasted from an array }
  655. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  656. exit;
  657. paraloc1.init;
  658. paraloc2.init;
  659. if is_open_array(left.resultdef) or
  660. is_array_of_const(left.resultdef) then
  661. begin
  662. { cdecl functions don't have high() so we can not check the range }
  663. { (can't use current_procdef, since it may be a nested procedure) }
  664. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(left).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  665. begin
  666. { Get high value }
  667. hightree:=load_high_value_node(tparavarsym(tloadnode(left).symtableentry));
  668. { it must be available }
  669. if not assigned(hightree) then
  670. internalerror(200212201);
  671. firstpass(hightree);
  672. secondpass(hightree);
  673. { generate compares }
  674. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  675. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  676. else
  677. begin
  678. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  679. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  680. end;
  681. current_asmdata.getjumplabel(neglabel);
  682. current_asmdata.getjumplabel(poslabel);
  683. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  684. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  685. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  686. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  687. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  688. { release hightree }
  689. hightree.free;
  690. end;
  691. end
  692. else
  693. if is_dynamic_array(left.resultdef) then
  694. begin
  695. pd:=search_system_proc('fpc_dynarray_rangecheck');
  696. paramanager.getintparaloc(pd,1,paraloc1);
  697. paramanager.getintparaloc(pd,2,paraloc2);
  698. if pd.is_pushleftright then
  699. begin
  700. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  701. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  702. end
  703. else
  704. begin
  705. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  706. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  707. end;
  708. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  709. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  710. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  711. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  712. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  713. end;
  714. { for regular arrays, we don't have to do anything because the index has been
  715. type converted to the index type, which already inserted a range check if
  716. necessary }
  717. paraloc1.done;
  718. paraloc2.done;
  719. end;
  720. procedure tcgvecnode.rangecheck_string;
  721. var
  722. paraloc1,
  723. paraloc2: tcgpara;
  724. helpername: TIDString;
  725. pd: tprocdef;
  726. begin
  727. paraloc1.init;
  728. paraloc2.init;
  729. case tstringdef(left.resultdef).stringtype of
  730. { it's the same for ansi- and wide strings }
  731. st_unicodestring,
  732. st_widestring,
  733. st_ansistring:
  734. begin
  735. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  736. pd:=search_system_proc(helpername);
  737. paramanager.getintparaloc(pd,1,paraloc1);
  738. paramanager.getintparaloc(pd,2,paraloc2);
  739. if pd.is_pushleftright then
  740. begin
  741. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  742. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  743. end
  744. else
  745. begin
  746. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  747. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  748. end;
  749. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  750. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  751. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  752. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  753. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  754. end;
  755. st_shortstring:
  756. begin
  757. {!!!!!!!!!!!!!!!!!}
  758. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  759. end;
  760. st_longstring:
  761. begin
  762. {!!!!!!!!!!!!!!!!!}
  763. end;
  764. end;
  765. paraloc1.done;
  766. paraloc2.done;
  767. end;
  768. procedure tcgvecnode.pass_generate_code;
  769. var
  770. offsetdec,
  771. extraoffset : aint;
  772. rightp : pnode;
  773. otl,ofl : tasmlabel;
  774. newsize : tcgsize;
  775. mulsize,
  776. bytemulsize,
  777. alignpow : aint;
  778. isjump : boolean;
  779. paraloc1,
  780. paraloc2 : tcgpara;
  781. subsetref : tsubsetreference;
  782. temp : longint;
  783. begin
  784. paraloc1.init;
  785. paraloc2.init;
  786. mulsize:=get_mul_size;
  787. if not is_packed_array(left.resultdef) then
  788. bytemulsize:=mulsize
  789. else
  790. bytemulsize:=mulsize div 8;
  791. newsize:=def_cgsize(resultdef);
  792. secondpass(left);
  793. if left.location.loc=LOC_CREFERENCE then
  794. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  795. else
  796. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  797. { an ansistring needs to be dereferenced }
  798. if is_ansistring(left.resultdef) or
  799. is_wide_or_unicode_string(left.resultdef) then
  800. begin
  801. if nf_callunique in flags then
  802. internalerror(200304236);
  803. {DM!!!!!}
  804. case left.location.loc of
  805. LOC_REGISTER,
  806. LOC_CREGISTER :
  807. begin
  808. {$ifdef m68k}
  809. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  810. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  811. {$else m68k}
  812. location.reference.base:=left.location.register;
  813. {$endif m68k}
  814. end;
  815. LOC_CREFERENCE,
  816. LOC_REFERENCE :
  817. begin
  818. location.reference.base:=hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef);
  819. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  820. end;
  821. else
  822. internalerror(2002032218);
  823. end;
  824. if is_ansistring(left.resultdef) then
  825. offsetdec:=1
  826. else
  827. offsetdec:=2;
  828. location.reference.alignment:=offsetdec;
  829. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  830. if not(cs_zerobasedstrings in current_settings.localswitches) then
  831. update_reference_offset(location.reference,-1,offsetdec);
  832. end
  833. else if is_dynamic_array(left.resultdef) then
  834. begin
  835. case left.location.loc of
  836. LOC_REGISTER,
  837. LOC_CREGISTER :
  838. location.reference.base:=left.location.register;
  839. LOC_REFERENCE,
  840. LOC_CREFERENCE :
  841. begin
  842. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  843. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  844. left.location.reference,location.reference.base);
  845. end;
  846. else
  847. internalerror(2002032219);
  848. end;
  849. { a dynarray points to the start of a memory block, which
  850. we assume to be always aligned to a multiple of the
  851. pointer size
  852. }
  853. location.reference.alignment:=sizeof(pint);
  854. end
  855. else
  856. begin
  857. { may happen in case of function results }
  858. case left.location.loc of
  859. LOC_CREGISTER,
  860. LOC_CMMREGISTER,
  861. LOC_REGISTER,
  862. LOC_MMREGISTER:
  863. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  864. end;
  865. location_copy(location,left.location);
  866. end;
  867. { location must be memory }
  868. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  869. internalerror(200411013);
  870. { offset can only differ from 0 if arraydef }
  871. if (left.resultdef.typ=arraydef) and
  872. not(is_dynamic_array(left.resultdef)) and
  873. (not(is_packed_array(left.resultdef)) or
  874. ((mulsize mod 8 = 0) and
  875. ispowerof2(mulsize div 8,temp)) or
  876. { only orddefs are bitpacked }
  877. not is_ordinal(resultdef)
  878. {$ifndef cpu64bitalu}
  879. or is_64bitint(resultdef)
  880. {$endif not cpu64bitalu}
  881. ) then
  882. update_reference_offset(location.reference,-tarraydef(left.resultdef).lowrange,bytemulsize);
  883. if right.nodetype=ordconstn then
  884. begin
  885. { offset can only differ from 0 if arraydef }
  886. if cs_check_range in current_settings.localswitches then
  887. begin
  888. secondpass(right);
  889. case left.resultdef.typ of
  890. arraydef :
  891. rangecheck_array;
  892. stringdef :
  893. rangecheck_string;
  894. end;
  895. end;
  896. if not(is_packed_array(left.resultdef)) or
  897. ((mulsize mod 8 = 0) and
  898. (ispowerof2(mulsize div 8,temp) or
  899. { only orddefs are bitpacked }
  900. not is_ordinal(resultdef))) then
  901. begin
  902. extraoffset:=tordconstnode(right).value.svalue;
  903. update_reference_offset(location.reference,extraoffset,bytemulsize);
  904. { adjust alignment after this change }
  905. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset*bytemulsize);
  906. { don't do this for floats etc.; needed to properly set the }
  907. { size for bitpacked arrays (e.g. a bitpacked array of }
  908. { enums who are size 2 but fit in one byte -> in the array }
  909. { they will be one byte and have to be stored like that) }
  910. if is_packed_array(left.resultdef) and
  911. (tcgsize2size[newsize] <> bytemulsize) then
  912. newsize:=int_cgsize(bytemulsize);
  913. end
  914. else
  915. begin
  916. subsetref.ref := location.reference;
  917. subsetref.ref.alignment := left.resultdef.alignment;
  918. if not ispowerof2(packedbitsloadsize(resultdef.packedbitsize),temp) then
  919. internalerror(2006081212);
  920. alignpow:=temp;
  921. update_reference_offset(subsetref.ref,(mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow),1 shl alignpow);
  922. subsetref.bitindexreg := NR_NO;
  923. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  924. subsetref.bitlen := resultdef.packedbitsize;
  925. if (left.location.loc = LOC_REFERENCE) then
  926. location.loc := LOC_SUBSETREF
  927. else
  928. location.loc := LOC_CSUBSETREF;
  929. location.sref := subsetref;
  930. end;
  931. end
  932. else
  933. { not nodetype=ordconstn }
  934. begin
  935. if (cs_opt_level1 in current_settings.optimizerswitches) and
  936. { if we do range checking, we don't }
  937. { need that fancy code (it would be }
  938. { buggy) }
  939. not(cs_check_range in current_settings.localswitches) and
  940. (left.resultdef.typ=arraydef) and
  941. not is_packed_array(left.resultdef) then
  942. begin
  943. extraoffset:=0;
  944. rightp:=actualtargetnode(@right);
  945. if rightp^.nodetype=addn then
  946. begin
  947. if taddnode(rightp^).right.nodetype=ordconstn then
  948. begin
  949. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  950. replacenode(rightp^,taddnode(rightp^).left);
  951. end
  952. else if taddnode(rightp^).left.nodetype=ordconstn then
  953. begin
  954. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  955. replacenode(rightp^,taddnode(rightp^).right);
  956. end;
  957. end
  958. else if rightp^.nodetype=subn then
  959. begin
  960. if taddnode(rightp^).right.nodetype=ordconstn then
  961. begin
  962. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  963. replacenode(rightp^,taddnode(rightp^).left);
  964. end;
  965. end;
  966. update_reference_offset(location.reference,extraoffset,mulsize);
  967. end;
  968. { calculate from left to right }
  969. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  970. internalerror(200304237);
  971. isjump:=(right.expectloc=LOC_JUMP);
  972. if isjump then
  973. begin
  974. otl:=current_procinfo.CurrTrueLabel;
  975. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  976. ofl:=current_procinfo.CurrFalseLabel;
  977. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  978. end;
  979. secondpass(right);
  980. { if mulsize = 1, we won't have to modify the index }
  981. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  982. if isjump then
  983. begin
  984. current_procinfo.CurrTrueLabel:=otl;
  985. current_procinfo.CurrFalseLabel:=ofl;
  986. end
  987. else if (right.location.loc = LOC_JUMP) then
  988. internalerror(2006010801);
  989. { produce possible range check code: }
  990. if cs_check_range in current_settings.localswitches then
  991. begin
  992. if left.resultdef.typ=arraydef then
  993. rangecheck_array
  994. else if (left.resultdef.typ=stringdef) then
  995. rangecheck_string;
  996. end;
  997. { insert the register and the multiplication factor in the
  998. reference }
  999. if not is_packed_array(left.resultdef) then
  1000. update_reference_reg_mul(right.location.register,right.resultdef,mulsize)
  1001. else
  1002. update_reference_reg_packed(right.location.register,right.resultdef,mulsize);
  1003. end;
  1004. location.size:=newsize;
  1005. paraloc1.done;
  1006. paraloc2.done;
  1007. end;
  1008. begin
  1009. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1010. cloadparentfpnode:=tcgloadparentfpnode;
  1011. caddrnode:=tcgaddrnode;
  1012. cderefnode:=tcgderefnode;
  1013. csubscriptnode:=tcgsubscriptnode;
  1014. cwithnode:=tcgwithnode;
  1015. cvecnode:=tcgvecnode;
  1016. end.