cgcpu.pas 69 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979
  1. {
  2. Copyright (c) 2008 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the code generator for the AVR
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit cgcpu;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,symtype,symdef,
  23. cgbase,cgutils,cgobj,
  24. aasmbase,aasmcpu,aasmtai,aasmdata,
  25. parabase,
  26. cpubase,cpuinfo,node,cg64f32,rgcpu;
  27. type
  28. { tcgavr }
  29. tcgavr = class(tcg)
  30. { true, if the next arithmetic operation should modify the flags }
  31. cgsetflags : boolean;
  32. procedure init_register_allocators;override;
  33. procedure done_register_allocators;override;
  34. function getintregister(list:TAsmList;size:Tcgsize):Tregister;override;
  35. function getaddressregister(list:TAsmList):TRegister;override;
  36. procedure a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);override;
  37. procedure a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);override;
  38. procedure a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);override;
  39. procedure a_load_reg_cgpara(list : TAsmList; size : tcgsize;r : tregister; const cgpara : tcgpara);override;
  40. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);override;
  41. procedure a_call_reg(list : TAsmList;reg: tregister);override;
  42. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister); override;
  43. procedure a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister); override;
  44. { move instructions }
  45. procedure a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);override;
  46. procedure a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);override;
  47. procedure a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;const Ref : treference;reg : tregister);override;
  48. procedure a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);override;
  49. { fpu move instructions }
  50. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister); override;
  51. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); override;
  52. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); override;
  53. { comparison operations }
  54. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : tcgint;reg : tregister;
  55. l : tasmlabel);override;
  56. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); override;
  57. procedure a_jmp_name(list : TAsmList;const s : string); override;
  58. procedure a_jmp_always(list : TAsmList;l: tasmlabel); override;
  59. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); override;
  60. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister); override;
  61. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);override;
  62. procedure g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean); override;
  63. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);override;
  64. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);override;
  65. procedure g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  66. procedure g_overflowcheck(list: TAsmList; const l: tlocation; def: tdef); override;
  67. procedure g_save_registers(list : TAsmList);override;
  68. procedure g_restore_registers(list : TAsmList);override;
  69. procedure a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  70. procedure fixref(list : TAsmList;var ref : treference);
  71. function normalize_ref(list : TAsmList;ref : treference;
  72. tmpreg : tregister) : treference;
  73. procedure emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  74. procedure a_adjust_sp(list: TAsmList; value: longint);
  75. function GetLoad(const ref : treference) : tasmop;
  76. function GetStore(const ref: treference): tasmop;
  77. protected
  78. procedure a_op_reg_reg_internal(list: TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  79. procedure a_op_const_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg, reghi: TRegister);
  80. end;
  81. tcg64favr = class(tcg64f32)
  82. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);override;
  83. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);override;
  84. end;
  85. procedure create_codegen;
  86. const
  87. TOpCG2AsmOp: Array[topcg] of TAsmOp = (A_NONE,A_MOV,A_ADD,A_AND,A_NONE,
  88. A_NONE,A_MULS,A_MUL,A_NEG,A_COM,A_OR,
  89. A_ASR,A_LSL,A_LSR,A_SUB,A_EOR,A_ROL,A_ROR);
  90. implementation
  91. uses
  92. globals,verbose,systems,cutils,
  93. fmodule,
  94. symconst,symsym,symtable,
  95. tgobj,rgobj,
  96. procinfo,cpupi,
  97. paramgr;
  98. procedure tcgavr.init_register_allocators;
  99. begin
  100. inherited init_register_allocators;
  101. rg[R_INTREGISTER]:=trgintcpu.create(R_INTREGISTER,R_SUBWHOLE,
  102. [RS_R18,RS_R19,RS_R20,RS_R21,RS_R22,RS_R23,RS_R24,RS_R25,
  103. RS_R2,RS_R3,RS_R4,RS_R5,RS_R6,RS_R7,RS_R8,RS_R9,
  104. RS_R10,RS_R11,RS_R12,RS_R13,RS_R14,RS_R15,RS_R16,RS_R17],first_int_imreg,[]);
  105. end;
  106. procedure tcgavr.done_register_allocators;
  107. begin
  108. rg[R_INTREGISTER].free;
  109. // rg[R_ADDRESSREGISTER].free;
  110. inherited done_register_allocators;
  111. end;
  112. function tcgavr.getintregister(list: TAsmList; size: Tcgsize): Tregister;
  113. var
  114. tmp1,tmp2,tmp3 : TRegister;
  115. begin
  116. case size of
  117. OS_8,OS_S8:
  118. Result:=inherited getintregister(list, size);
  119. OS_16,OS_S16:
  120. begin
  121. Result:=inherited getintregister(list, OS_8);
  122. { ensure that the high register can be retrieved by
  123. GetNextReg
  124. }
  125. if inherited getintregister(list, OS_8)<>GetNextReg(Result) then
  126. internalerror(2011021331);
  127. end;
  128. OS_32,OS_S32:
  129. begin
  130. Result:=inherited getintregister(list, OS_8);
  131. tmp1:=inherited getintregister(list, OS_8);
  132. { ensure that the high register can be retrieved by
  133. GetNextReg
  134. }
  135. if tmp1<>GetNextReg(Result) then
  136. internalerror(2011021332);
  137. tmp2:=inherited getintregister(list, OS_8);
  138. { ensure that the upper register can be retrieved by
  139. GetNextReg
  140. }
  141. if tmp2<>GetNextReg(tmp1) then
  142. internalerror(2011021333);
  143. tmp3:=inherited getintregister(list, OS_8);
  144. { ensure that the upper register can be retrieved by
  145. GetNextReg
  146. }
  147. if tmp3<>GetNextReg(tmp2) then
  148. internalerror(2011021334);
  149. end;
  150. else
  151. internalerror(2011021330);
  152. end;
  153. end;
  154. function tcgavr.getaddressregister(list: TAsmList): TRegister;
  155. begin
  156. Result:=getintregister(list,OS_ADDR);
  157. end;
  158. procedure tcgavr.a_load_reg_cgpara(list : TAsmList;size : tcgsize;r : tregister;const cgpara : tcgpara);
  159. procedure load_para_loc(r : TRegister;paraloc : PCGParaLocation);
  160. var
  161. ref : treference;
  162. begin
  163. paramanager.allocparaloc(list,paraloc);
  164. case paraloc^.loc of
  165. LOC_REGISTER,LOC_CREGISTER:
  166. a_load_reg_reg(list,paraloc^.size,paraloc^.size,r,paraloc^.register);
  167. LOC_REFERENCE,LOC_CREFERENCE:
  168. begin
  169. reference_reset_base(ref,paraloc^.reference.index,paraloc^.reference.offset,2);
  170. a_load_reg_ref(list,paraloc^.size,paraloc^.size,r,ref);
  171. end;
  172. else
  173. internalerror(2002071004);
  174. end;
  175. end;
  176. var
  177. i, i2 : longint;
  178. hp : PCGParaLocation;
  179. begin
  180. { if use_push(cgpara) then
  181. begin
  182. if tcgsize2size[cgpara.Size] > 2 then
  183. begin
  184. if tcgsize2size[cgpara.Size] <> 4 then
  185. internalerror(2013031101);
  186. if cgpara.location^.Next = nil then
  187. begin
  188. if tcgsize2size[cgpara.location^.size] <> 4 then
  189. internalerror(2013031101);
  190. end
  191. else
  192. begin
  193. if tcgsize2size[cgpara.location^.size] <> 2 then
  194. internalerror(2013031101);
  195. if tcgsize2size[cgpara.location^.Next^.size] <> 2 then
  196. internalerror(2013031101);
  197. if cgpara.location^.Next^.Next <> nil then
  198. internalerror(2013031101);
  199. end;
  200. if tcgsize2size[cgpara.size]>cgpara.alignment then
  201. pushsize:=cgpara.size
  202. else
  203. pushsize:=int_cgsize(cgpara.alignment);
  204. pushsize2 := int_cgsize(tcgsize2size[pushsize] - 2);
  205. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize2],makeregsize(list,GetNextReg(r),pushsize2)));
  206. list.concat(taicpu.op_reg(A_PUSH,S_W,makeregsize(list,r,OS_16)));
  207. end
  208. else
  209. begin
  210. cgpara.check_simple_location;
  211. if tcgsize2size[cgpara.location^.size]>cgpara.alignment then
  212. pushsize:=cgpara.location^.size
  213. else
  214. pushsize:=int_cgsize(cgpara.alignment);
  215. list.concat(taicpu.op_reg(A_PUSH,TCgsize2opsize[pushsize],makeregsize(list,r,pushsize)));
  216. end;
  217. end
  218. else }
  219. begin
  220. if not(tcgsize2size[cgpara.Size] in [1..4]) then
  221. internalerror(2014011101);
  222. hp:=cgpara.location;
  223. i:=0;
  224. while i<tcgsize2size[cgpara.Size] do
  225. begin
  226. if not(assigned(hp)) then
  227. internalerror(2014011102);
  228. inc(i, tcgsize2size[hp^.Size]);
  229. if hp^.Loc=LOC_REGISTER then
  230. begin
  231. load_para_loc(r,hp);
  232. hp:=hp^.Next;
  233. r:=GetNextReg(r);
  234. end
  235. else
  236. begin
  237. load_para_loc(r,hp);
  238. for i2:=1 to tcgsize2size[hp^.Size] do
  239. r:=GetNextReg(r);
  240. hp:=hp^.Next;
  241. end;
  242. end;
  243. if assigned(hp) then
  244. internalerror(2014011103);
  245. end;
  246. end;
  247. procedure tcgavr.a_load_const_cgpara(list : TAsmList;size : tcgsize;a : tcgint;const paraloc : TCGPara);
  248. var
  249. i : longint;
  250. hp : PCGParaLocation;
  251. begin
  252. if not(tcgsize2size[paraloc.Size] in [1..4]) then
  253. internalerror(2014011101);
  254. hp:=paraloc.location;
  255. for i:=1 to tcgsize2size[paraloc.Size] do
  256. begin
  257. if not(assigned(hp)) then
  258. internalerror(2014011105);
  259. case hp^.loc of
  260. LOC_REGISTER,LOC_CREGISTER:
  261. begin
  262. if (tcgsize2size[hp^.size]<>1) or
  263. (hp^.shiftval<>0) then
  264. internalerror(2015041101);
  265. a_load_const_reg(list,hp^.size,(a shr (8*(i-1))) and $ff,hp^.register);
  266. hp:=hp^.Next;
  267. end;
  268. LOC_REFERENCE,LOC_CREFERENCE:
  269. list.concat(taicpu.op_const(A_PUSH,(a shr (8*(i-1))) and $ff));
  270. else
  271. internalerror(2002071004);
  272. end;
  273. end;
  274. end;
  275. procedure tcgavr.a_load_ref_cgpara(list : TAsmList;size : tcgsize;const r : treference;const paraloc : TCGPara);
  276. var
  277. tmpref, ref: treference;
  278. location: pcgparalocation;
  279. sizeleft: tcgint;
  280. begin
  281. location := paraloc.location;
  282. tmpref := r;
  283. sizeleft := paraloc.intsize;
  284. while assigned(location) do
  285. begin
  286. paramanager.allocparaloc(list,location);
  287. case location^.loc of
  288. LOC_REGISTER,LOC_CREGISTER:
  289. a_load_ref_reg(list,location^.size,location^.size,tmpref,location^.register);
  290. LOC_REFERENCE:
  291. begin
  292. reference_reset_base(ref,location^.reference.index,location^.reference.offset,paraloc.alignment);
  293. { doubles in softemu mode have a strange order of registers and references }
  294. if location^.size=OS_32 then
  295. g_concatcopy(list,tmpref,ref,4)
  296. else
  297. begin
  298. g_concatcopy(list,tmpref,ref,sizeleft);
  299. if assigned(location^.next) then
  300. internalerror(2005010710);
  301. end;
  302. end;
  303. LOC_VOID:
  304. begin
  305. // nothing to do
  306. end;
  307. else
  308. internalerror(2002081103);
  309. end;
  310. inc(tmpref.offset,tcgsize2size[location^.size]);
  311. dec(sizeleft,tcgsize2size[location^.size]);
  312. location := location^.next;
  313. end;
  314. end;
  315. procedure tcgavr.a_loadaddr_ref_cgpara(list : TAsmList;const r : treference;const paraloc : TCGPara);
  316. var
  317. tmpreg: tregister;
  318. begin
  319. tmpreg:=getaddressregister(list);
  320. a_loadaddr_ref_reg(list,r,tmpreg);
  321. a_load_reg_cgpara(list,OS_ADDR,tmpreg,paraloc);
  322. end;
  323. procedure tcgavr.a_call_name(list : TAsmList;const s : string; weak: boolean);
  324. begin
  325. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  326. list.concat(taicpu.op_sym(A_CALL,current_asmdata.RefAsmSymbol(s)))
  327. else
  328. list.concat(taicpu.op_sym(A_RCALL,current_asmdata.RefAsmSymbol(s)));
  329. include(current_procinfo.flags,pi_do_call);
  330. end;
  331. procedure tcgavr.a_call_reg(list : TAsmList;reg: tregister);
  332. begin
  333. a_reg_alloc(list,NR_ZLO);
  334. a_reg_alloc(list,NR_ZHI);
  335. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZLO,reg));
  336. list.concat(taicpu.op_reg_reg(A_MOV,NR_ZHI,GetHigh(reg)));
  337. list.concat(taicpu.op_none(A_ICALL));
  338. a_reg_dealloc(list,NR_ZLO);
  339. a_reg_dealloc(list,NR_ZHI);
  340. include(current_procinfo.flags,pi_do_call);
  341. end;
  342. procedure tcgavr.a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: tcgint; reg: TRegister);
  343. begin
  344. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  345. internalerror(2012102403);
  346. a_op_const_reg_internal(list,Op,size,a,reg,NR_NO);
  347. end;
  348. procedure tcgavr.a_op_reg_reg(list: TAsmList; Op: TOpCG; size: TCGSize; src, dst : TRegister);
  349. begin
  350. if not(size in [OS_S8,OS_8,OS_S16,OS_16,OS_S32,OS_32]) then
  351. internalerror(2012102401);
  352. a_op_reg_reg_internal(list,Op,size,src,NR_NO,dst,NR_NO);
  353. end;
  354. procedure tcgavr.a_op_reg_reg_internal(list : TAsmList; Op: TOpCG; size: TCGSize; src, srchi, dst, dsthi: TRegister);
  355. var
  356. countreg,
  357. tmpreg: tregister;
  358. i : integer;
  359. instr : taicpu;
  360. paraloc1,paraloc2,paraloc3 : TCGPara;
  361. l1,l2 : tasmlabel;
  362. pd : tprocdef;
  363. procedure NextSrcDst;
  364. begin
  365. if i=5 then
  366. begin
  367. dst:=dsthi;
  368. src:=srchi;
  369. end
  370. else
  371. begin
  372. dst:=GetNextReg(dst);
  373. src:=GetNextReg(src);
  374. end;
  375. end;
  376. { iterates TmpReg through all registers of dst }
  377. procedure NextTmp;
  378. begin
  379. if i=5 then
  380. tmpreg:=dsthi
  381. else
  382. tmpreg:=GetNextReg(tmpreg);
  383. end;
  384. begin
  385. case op of
  386. OP_ADD:
  387. begin
  388. list.concat(taicpu.op_reg_reg(A_ADD,dst,src));
  389. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  390. begin
  391. for i:=2 to tcgsize2size[size] do
  392. begin
  393. NextSrcDst;
  394. list.concat(taicpu.op_reg_reg(A_ADC,dst,src));
  395. end;
  396. end;
  397. end;
  398. OP_SUB:
  399. begin
  400. list.concat(taicpu.op_reg_reg(A_SUB,dst,src));
  401. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  402. begin
  403. for i:=2 to tcgsize2size[size] do
  404. begin
  405. NextSrcDst;
  406. list.concat(taicpu.op_reg_reg(A_SBC,dst,src));
  407. end;
  408. end;
  409. end;
  410. OP_NEG:
  411. begin
  412. if src<>dst then
  413. begin
  414. if size in [OS_S64,OS_64] then
  415. begin
  416. a_load_reg_reg(list,OS_32,OS_32,src,dst);
  417. a_load_reg_reg(list,OS_32,OS_32,srchi,dsthi);
  418. end
  419. else
  420. a_load_reg_reg(list,size,size,src,dst);
  421. end;
  422. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  423. begin
  424. tmpreg:=GetNextReg(dst);
  425. for i:=2 to tcgsize2size[size] do
  426. begin
  427. list.concat(taicpu.op_reg(A_COM,tmpreg));
  428. NextTmp;
  429. end;
  430. list.concat(taicpu.op_reg(A_NEG,dst));
  431. tmpreg:=GetNextReg(dst);
  432. for i:=2 to tcgsize2size[size] do
  433. begin
  434. list.concat(taicpu.op_reg_const(A_SBCI,tmpreg,-1));
  435. NextTmp;
  436. end;
  437. end;
  438. end;
  439. OP_NOT:
  440. begin
  441. for i:=1 to tcgsize2size[size] do
  442. begin
  443. if src<>dst then
  444. a_load_reg_reg(list,OS_8,OS_8,src,dst);
  445. list.concat(taicpu.op_reg(A_COM,dst));
  446. NextSrcDst;
  447. end;
  448. end;
  449. OP_MUL,OP_IMUL:
  450. begin
  451. if size in [OS_8,OS_S8] then
  452. begin
  453. cg.a_reg_alloc(list,NR_R0);
  454. cg.a_reg_alloc(list,NR_R1);
  455. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  456. cg.a_reg_dealloc(list,NR_R1);
  457. list.concat(taicpu.op_reg_reg(A_MOV,dst,NR_R0));
  458. cg.a_reg_dealloc(list,NR_R0);
  459. end
  460. else if size=OS_16 then
  461. begin
  462. pd:=search_system_proc('fpc_mul_word');
  463. paraloc1.init;
  464. paraloc2.init;
  465. paraloc3.init;
  466. paramanager.getintparaloc(list,pd,1,paraloc1);
  467. paramanager.getintparaloc(list,pd,2,paraloc2);
  468. paramanager.getintparaloc(list,pd,3,paraloc3);
  469. a_load_const_cgpara(list,OS_8,0,paraloc3);
  470. a_load_reg_cgpara(list,OS_16,src,paraloc2);
  471. a_load_reg_cgpara(list,OS_16,dst,paraloc1);
  472. paramanager.freecgpara(list,paraloc3);
  473. paramanager.freecgpara(list,paraloc2);
  474. paramanager.freecgpara(list,paraloc1);
  475. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  476. a_call_name(list,'FPC_MUL_WORD',false);
  477. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  478. cg.a_reg_alloc(list,NR_R24);
  479. cg.a_reg_alloc(list,NR_R25);
  480. cg.a_load_reg_reg(list,OS_8,OS_8,NR_R24,dst);
  481. cg.a_reg_dealloc(list,NR_R24);
  482. cg.a_load_reg_reg(list,OS_8,OS_8,NR_R25,GetNextReg(dst));
  483. cg.a_reg_dealloc(list,NR_R25);
  484. paraloc3.done;
  485. paraloc2.done;
  486. paraloc1.done;
  487. end
  488. else
  489. internalerror(2011022002);
  490. end;
  491. OP_DIV,OP_IDIV:
  492. { special stuff, needs separate handling inside code }
  493. { generator }
  494. internalerror(2011022001);
  495. OP_SHR,OP_SHL,OP_SAR,OP_ROL,OP_ROR:
  496. begin
  497. current_asmdata.getjumplabel(l1);
  498. current_asmdata.getjumplabel(l2);
  499. countreg:=getintregister(list,OS_8);
  500. a_load_reg_reg(list,size,OS_8,src,countreg);
  501. list.concat(taicpu.op_reg(A_TST,countreg));
  502. a_jmp_flags(list,F_EQ,l2);
  503. cg.a_label(list,l1);
  504. case op of
  505. OP_SHR:
  506. list.concat(taicpu.op_reg(A_LSR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  507. OP_SHL:
  508. list.concat(taicpu.op_reg(A_LSL,dst));
  509. OP_SAR:
  510. list.concat(taicpu.op_reg(A_ASR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  511. OP_ROR:
  512. begin
  513. { load carry? }
  514. if not(size in [OS_8,OS_S8]) then
  515. begin
  516. list.concat(taicpu.op_none(A_CLC));
  517. list.concat(taicpu.op_reg_const(A_SBRC,src,0));
  518. list.concat(taicpu.op_none(A_SEC));
  519. end;
  520. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1)));
  521. end;
  522. OP_ROL:
  523. begin
  524. { load carry? }
  525. if not(size in [OS_8,OS_S8]) then
  526. begin
  527. list.concat(taicpu.op_none(A_CLC));
  528. list.concat(taicpu.op_reg_const(A_SBRC,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-1),7));
  529. list.concat(taicpu.op_none(A_SEC));
  530. end;
  531. list.concat(taicpu.op_reg(A_ROL,dst))
  532. end;
  533. else
  534. internalerror(2011030901);
  535. end;
  536. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  537. begin
  538. for i:=2 to tcgsize2size[size] do
  539. begin
  540. case op of
  541. OP_ROR,
  542. OP_SHR:
  543. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  544. OP_ROL,
  545. OP_SHL:
  546. list.concat(taicpu.op_reg(A_ROL,GetOffsetReg64(dst,dsthi,i-1)));
  547. OP_SAR:
  548. list.concat(taicpu.op_reg(A_ROR,GetOffsetReg64(dst,dsthi,tcgsize2size[size]-i)));
  549. else
  550. internalerror(2011030902);
  551. end;
  552. end;
  553. end;
  554. list.concat(taicpu.op_reg(A_DEC,countreg));
  555. a_jmp_flags(list,F_NE,l1);
  556. // keep registers alive
  557. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  558. cg.a_label(list,l2);
  559. end;
  560. OP_AND,OP_OR,OP_XOR:
  561. begin
  562. for i:=1 to tcgsize2size[size] do
  563. begin
  564. list.concat(taicpu.op_reg_reg(topcg2asmop[op],dst,src));
  565. NextSrcDst;
  566. end;
  567. end;
  568. else
  569. internalerror(2011022004);
  570. end;
  571. end;
  572. procedure tcgavr.a_op_const_reg_internal(list: TAsmList; Op: TOpCG;
  573. size: TCGSize; a: tcgint; reg, reghi: TRegister);
  574. var
  575. mask : qword;
  576. shift : byte;
  577. i : byte;
  578. tmpreg : tregister;
  579. tmpreg64 : tregister64;
  580. procedure NextReg;
  581. begin
  582. if i=5 then
  583. reg:=reghi
  584. else
  585. reg:=GetNextReg(reg);
  586. end;
  587. var
  588. curvalue : byte;
  589. begin
  590. mask:=$ff;
  591. shift:=0;
  592. case op of
  593. OP_OR:
  594. begin
  595. for i:=1 to tcgsize2size[size] do
  596. begin
  597. list.concat(taicpu.op_reg_const(A_ORI,reg,(qword(a) and mask) shr shift));
  598. NextReg;
  599. mask:=mask shl 8;
  600. inc(shift,8);
  601. end;
  602. end;
  603. OP_AND:
  604. begin
  605. for i:=1 to tcgsize2size[size] do
  606. begin
  607. list.concat(taicpu.op_reg_const(A_ANDI,reg,(qword(a) and mask) shr shift));
  608. NextReg;
  609. mask:=mask shl 8;
  610. inc(shift,8);
  611. end;
  612. end;
  613. OP_SUB:
  614. begin
  615. list.concat(taicpu.op_reg_const(A_SUBI,reg,a and mask));
  616. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  617. begin
  618. for i:=2 to tcgsize2size[size] do
  619. begin
  620. NextReg;
  621. mask:=mask shl 8;
  622. inc(shift,8);
  623. curvalue:=(qword(a) and mask) shr shift;
  624. { decrease pressure on upper half of registers by using SBC ...,R1 instead
  625. of SBCI ...,0 }
  626. if curvalue=0 then
  627. list.concat(taicpu.op_reg_reg(A_SBC,reg,NR_R1))
  628. else
  629. list.concat(taicpu.op_reg_const(A_SBCI,reg,curvalue));
  630. end;
  631. end;
  632. end;
  633. OP_ADD:
  634. begin
  635. curvalue:=a and mask;
  636. if curvalue=0 then
  637. list.concat(taicpu.op_reg_reg(A_ADD,reg,NR_R1))
  638. else
  639. begin
  640. tmpreg:=getintregister(list,OS_8);
  641. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  642. list.concat(taicpu.op_reg_reg(A_ADD,reg,tmpreg));
  643. end;
  644. if size in [OS_S16,OS_16,OS_S32,OS_32,OS_S64,OS_64] then
  645. begin
  646. for i:=2 to tcgsize2size[size] do
  647. begin
  648. NextReg;
  649. mask:=mask shl 8;
  650. inc(shift,8);
  651. curvalue:=(qword(a) and mask) shr shift;
  652. { decrease pressure on upper half of registers by using ADC ...,R1 instead
  653. of ADD ...,0 }
  654. if curvalue=0 then
  655. list.concat(taicpu.op_reg_reg(A_ADC,reg,NR_R1))
  656. else
  657. begin
  658. tmpreg:=getintregister(list,OS_8);
  659. a_load_const_reg(list,OS_8,curvalue,tmpreg);
  660. list.concat(taicpu.op_reg_reg(A_ADC,reg,tmpreg));
  661. end;
  662. end;
  663. end;
  664. end;
  665. else
  666. begin
  667. if size in [OS_64,OS_S64] then
  668. begin
  669. tmpreg64.reglo:=getintregister(list,OS_32);
  670. tmpreg64.reghi:=getintregister(list,OS_32);
  671. cg64.a_load64_const_reg(list,a,tmpreg64);
  672. cg64.a_op64_reg_reg(list,op,size,tmpreg64,joinreg64(reg,reghi));
  673. end
  674. else
  675. begin
  676. {$if 0}
  677. { code not working yet }
  678. if (op=OP_SAR) and (a=31) and (size in [OS_32,OS_S32]) then
  679. begin
  680. tmpreg:=reg;
  681. for i:=1 to 4 do
  682. begin
  683. list.concat(taicpu.op_reg_reg(A_MOV,tmpreg,NR_R1));
  684. tmpreg:=GetNextReg(tmpreg);
  685. end;
  686. end
  687. else
  688. {$endif}
  689. begin
  690. tmpreg:=getintregister(list,size);
  691. a_load_const_reg(list,size,a,tmpreg);
  692. a_op_reg_reg(list,op,size,tmpreg,reg);
  693. end;
  694. end;
  695. end;
  696. end;
  697. end;
  698. procedure tcgavr.a_load_const_reg(list : TAsmList; size: tcgsize; a : tcgint;reg : tregister);
  699. var
  700. mask : qword;
  701. shift : byte;
  702. i : byte;
  703. begin
  704. mask:=$ff;
  705. shift:=0;
  706. for i:=1 to tcgsize2size[size] do
  707. begin
  708. if ((qword(a) and mask) shr shift)=0 then
  709. emit_mov(list,reg,NR_R1)
  710. else
  711. list.concat(taicpu.op_reg_const(A_LDI,reg,(qword(a) and mask) shr shift));
  712. mask:=mask shl 8;
  713. inc(shift,8);
  714. reg:=GetNextReg(reg);
  715. end;
  716. end;
  717. function tcgavr.normalize_ref(list:TAsmList;ref: treference;tmpreg : tregister) : treference;
  718. procedure maybegetcpuregister(list:tasmlist;reg : tregister);
  719. begin
  720. { allocate the register only, if a cpu register is passed }
  721. if getsupreg(reg)<first_int_imreg then
  722. getcpuregister(list,reg);
  723. end;
  724. var
  725. tmpref : treference;
  726. l : tasmlabel;
  727. begin
  728. Result:=ref;
  729. if ref.addressmode<>AM_UNCHANGED then
  730. internalerror(2011021701);
  731. { Be sure to have a base register }
  732. if (ref.base=NR_NO) then
  733. begin
  734. { only symbol+offset? }
  735. if ref.index=NR_NO then
  736. exit;
  737. ref.base:=ref.index;
  738. ref.index:=NR_NO;
  739. end;
  740. if assigned(ref.symbol) or (ref.offset<>0) then
  741. begin
  742. reference_reset(tmpref,0);
  743. tmpref.symbol:=ref.symbol;
  744. tmpref.offset:=ref.offset;
  745. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  746. tmpref.refaddr:=addr_lo8_gs
  747. else
  748. tmpref.refaddr:=addr_lo8;
  749. maybegetcpuregister(list,tmpreg);
  750. list.concat(taicpu.op_reg_ref(A_LDI,tmpreg,tmpref));
  751. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  752. tmpref.refaddr:=addr_hi8_gs
  753. else
  754. tmpref.refaddr:=addr_hi8;
  755. maybegetcpuregister(list,GetNextReg(tmpreg));
  756. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(tmpreg),tmpref));
  757. if (ref.base<>NR_NO) then
  758. begin
  759. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.base));
  760. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.base)));
  761. end;
  762. if (ref.index<>NR_NO) then
  763. begin
  764. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  765. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  766. end;
  767. ref.symbol:=nil;
  768. ref.offset:=0;
  769. ref.base:=tmpreg;
  770. ref.index:=NR_NO;
  771. end
  772. else if (ref.base<>NR_NO) and (ref.index<>NR_NO) then
  773. begin
  774. maybegetcpuregister(list,tmpreg);
  775. emit_mov(list,tmpreg,ref.base);
  776. maybegetcpuregister(list,GetNextReg(tmpreg));
  777. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  778. list.concat(taicpu.op_reg_reg(A_ADD,tmpreg,ref.index));
  779. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(tmpreg),GetNextReg(ref.index)));
  780. ref.base:=tmpreg;
  781. ref.index:=NR_NO;
  782. end
  783. else if (ref.base<>NR_NO) then
  784. begin
  785. maybegetcpuregister(list,tmpreg);
  786. emit_mov(list,tmpreg,ref.base);
  787. maybegetcpuregister(list,GetNextReg(tmpreg));
  788. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.base));
  789. ref.base:=tmpreg;
  790. ref.index:=NR_NO;
  791. end
  792. else if (ref.index<>NR_NO) then
  793. begin
  794. maybegetcpuregister(list,tmpreg);
  795. emit_mov(list,tmpreg,ref.index);
  796. maybegetcpuregister(list,GetNextReg(tmpreg));
  797. emit_mov(list,GetNextReg(tmpreg),GetNextReg(ref.index));
  798. ref.base:=tmpreg;
  799. ref.index:=NR_NO;
  800. end;
  801. Result:=ref;
  802. end;
  803. procedure tcgavr.a_load_reg_ref(list : TAsmList; fromsize, tosize: tcgsize; reg : tregister;const ref : treference);
  804. var
  805. href : treference;
  806. conv_done: boolean;
  807. tmpreg : tregister;
  808. i : integer;
  809. QuickRef : Boolean;
  810. begin
  811. QuickRef:=false;
  812. if not((Ref.addressmode=AM_UNCHANGED) and
  813. (Ref.symbol=nil) and
  814. ((Ref.base=NR_R28) or
  815. (Ref.base=NR_R29)) and
  816. (Ref.Index=NR_No) and
  817. (Ref.Offset in [0..64-tcgsize2size[tosize]])) and
  818. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  819. href:=normalize_ref(list,Ref,NR_R30)
  820. else
  821. begin
  822. QuickRef:=true;
  823. href:=Ref;
  824. end;
  825. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  826. internalerror(2011021307);
  827. conv_done:=false;
  828. if tosize<>fromsize then
  829. begin
  830. conv_done:=true;
  831. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  832. fromsize:=tosize;
  833. case fromsize of
  834. OS_8:
  835. begin
  836. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  837. href.addressmode:=AM_POSTINCREMENT;
  838. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  839. for i:=2 to tcgsize2size[tosize] do
  840. begin
  841. if QuickRef then
  842. inc(href.offset);
  843. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  844. href.addressmode:=AM_POSTINCREMENT
  845. else
  846. href.addressmode:=AM_UNCHANGED;
  847. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  848. end;
  849. end;
  850. OS_S8:
  851. begin
  852. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  853. href.addressmode:=AM_POSTINCREMENT;
  854. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  855. if tcgsize2size[tosize]>1 then
  856. begin
  857. tmpreg:=getintregister(list,OS_8);
  858. emit_mov(list,tmpreg,NR_R1);
  859. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  860. list.concat(taicpu.op_reg(A_COM,tmpreg));
  861. for i:=2 to tcgsize2size[tosize] do
  862. begin
  863. if QuickRef then
  864. inc(href.offset);
  865. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  866. href.addressmode:=AM_POSTINCREMENT
  867. else
  868. href.addressmode:=AM_UNCHANGED;
  869. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  870. end;
  871. end;
  872. end;
  873. OS_16:
  874. begin
  875. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  876. href.addressmode:=AM_POSTINCREMENT;
  877. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  878. if QuickRef then
  879. inc(href.offset)
  880. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  881. href.addressmode:=AM_POSTINCREMENT
  882. else
  883. href.addressmode:=AM_UNCHANGED;
  884. reg:=GetNextReg(reg);
  885. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  886. for i:=3 to tcgsize2size[tosize] do
  887. begin
  888. if QuickRef then
  889. inc(href.offset);
  890. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  891. href.addressmode:=AM_POSTINCREMENT
  892. else
  893. href.addressmode:=AM_UNCHANGED;
  894. list.concat(taicpu.op_ref_reg(GetStore(href),href,NR_R1));
  895. end;
  896. end;
  897. OS_S16:
  898. begin
  899. if not(QuickRef) and (tcgsize2size[tosize]>1) then
  900. href.addressmode:=AM_POSTINCREMENT;
  901. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  902. if QuickRef then
  903. inc(href.offset)
  904. else if not(QuickRef) and (tcgsize2size[fromsize]>2) then
  905. href.addressmode:=AM_POSTINCREMENT
  906. else
  907. href.addressmode:=AM_UNCHANGED;
  908. reg:=GetNextReg(reg);
  909. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  910. if tcgsize2size[tosize]>2 then
  911. begin
  912. tmpreg:=getintregister(list,OS_8);
  913. emit_mov(list,tmpreg,NR_R1);
  914. list.concat(taicpu.op_reg_const(A_SBRC,reg,7));
  915. list.concat(taicpu.op_reg(A_COM,tmpreg));
  916. for i:=3 to tcgsize2size[tosize] do
  917. begin
  918. if QuickRef then
  919. inc(href.offset);
  920. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  921. href.addressmode:=AM_POSTINCREMENT
  922. else
  923. href.addressmode:=AM_UNCHANGED;
  924. list.concat(taicpu.op_ref_reg(GetStore(href),href,tmpreg));
  925. end;
  926. end;
  927. end;
  928. else
  929. conv_done:=false;
  930. end;
  931. end;
  932. if not conv_done then
  933. begin
  934. for i:=1 to tcgsize2size[fromsize] do
  935. begin
  936. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  937. href.addressmode:=AM_POSTINCREMENT
  938. else
  939. href.addressmode:=AM_UNCHANGED;
  940. list.concat(taicpu.op_ref_reg(GetStore(href),href,reg));
  941. if QuickRef then
  942. inc(href.offset);
  943. reg:=GetNextReg(reg);
  944. end;
  945. end;
  946. if not(QuickRef) then
  947. begin
  948. ungetcpuregister(list,href.base);
  949. ungetcpuregister(list,GetNextReg(href.base));
  950. end;
  951. end;
  952. procedure tcgavr.a_load_ref_reg(list : TAsmList; fromsize, tosize : tcgsize;
  953. const Ref : treference;reg : tregister);
  954. var
  955. href : treference;
  956. conv_done: boolean;
  957. tmpreg : tregister;
  958. i : integer;
  959. QuickRef : boolean;
  960. begin
  961. QuickRef:=false;
  962. if not((Ref.addressmode=AM_UNCHANGED) and
  963. (Ref.symbol=nil) and
  964. ((Ref.base=NR_R28) or
  965. (Ref.base=NR_R29)) and
  966. (Ref.Index=NR_No) and
  967. (Ref.Offset in [0..64-tcgsize2size[fromsize]])) and
  968. not((Ref.Base=NR_NO) and (Ref.Index=NR_NO)) then
  969. href:=normalize_ref(list,Ref,NR_R30)
  970. else
  971. begin
  972. QuickRef:=true;
  973. href:=Ref;
  974. end;
  975. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  976. internalerror(2011021307);
  977. conv_done:=false;
  978. if tosize<>fromsize then
  979. begin
  980. conv_done:=true;
  981. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  982. fromsize:=tosize;
  983. case fromsize of
  984. OS_8:
  985. begin
  986. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  987. for i:=2 to tcgsize2size[tosize] do
  988. begin
  989. reg:=GetNextReg(reg);
  990. emit_mov(list,reg,NR_R1);
  991. end;
  992. end;
  993. OS_S8:
  994. begin
  995. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  996. tmpreg:=reg;
  997. if tcgsize2size[tosize]>1 then
  998. begin
  999. reg:=GetNextReg(reg);
  1000. emit_mov(list,reg,NR_R1);
  1001. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  1002. list.concat(taicpu.op_reg(A_COM,reg));
  1003. tmpreg:=reg;
  1004. for i:=3 to tcgsize2size[tosize] do
  1005. begin
  1006. reg:=GetNextReg(reg);
  1007. emit_mov(list,reg,tmpreg);
  1008. end;
  1009. end;
  1010. end;
  1011. OS_16:
  1012. begin
  1013. if not(QuickRef) then
  1014. href.addressmode:=AM_POSTINCREMENT;
  1015. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1016. if QuickRef then
  1017. inc(href.offset);
  1018. href.addressmode:=AM_UNCHANGED;
  1019. reg:=GetNextReg(reg);
  1020. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1021. for i:=3 to tcgsize2size[tosize] do
  1022. begin
  1023. reg:=GetNextReg(reg);
  1024. emit_mov(list,reg,NR_R1);
  1025. end;
  1026. end;
  1027. OS_S16:
  1028. begin
  1029. if not(QuickRef) then
  1030. href.addressmode:=AM_POSTINCREMENT;
  1031. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1032. if QuickRef then
  1033. inc(href.offset);
  1034. href.addressmode:=AM_UNCHANGED;
  1035. reg:=GetNextReg(reg);
  1036. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1037. tmpreg:=reg;
  1038. reg:=GetNextReg(reg);
  1039. emit_mov(list,reg,NR_R1);
  1040. list.concat(taicpu.op_reg_const(A_SBRC,tmpreg,7));
  1041. list.concat(taicpu.op_reg(A_COM,reg));
  1042. tmpreg:=reg;
  1043. for i:=4 to tcgsize2size[tosize] do
  1044. begin
  1045. reg:=GetNextReg(reg);
  1046. emit_mov(list,reg,tmpreg);
  1047. end;
  1048. end;
  1049. else
  1050. conv_done:=false;
  1051. end;
  1052. end;
  1053. if not conv_done then
  1054. begin
  1055. for i:=1 to tcgsize2size[fromsize] do
  1056. begin
  1057. if not(QuickRef) and (i<tcgsize2size[fromsize]) then
  1058. href.addressmode:=AM_POSTINCREMENT
  1059. else
  1060. href.addressmode:=AM_UNCHANGED;
  1061. list.concat(taicpu.op_reg_ref(GetLoad(href),reg,href));
  1062. if QuickRef then
  1063. inc(href.offset);
  1064. reg:=GetNextReg(reg);
  1065. end;
  1066. end;
  1067. if not(QuickRef) then
  1068. begin
  1069. ungetcpuregister(list,href.base);
  1070. ungetcpuregister(list,GetNextReg(href.base));
  1071. end;
  1072. end;
  1073. procedure tcgavr.a_load_reg_reg(list : TAsmList; fromsize, tosize : tcgsize;reg1,reg2 : tregister);
  1074. var
  1075. conv_done: boolean;
  1076. tmpreg : tregister;
  1077. i : integer;
  1078. begin
  1079. if (tcgsize2size[fromsize]>32) or (tcgsize2size[tosize]>32) or (fromsize=OS_NO) or (tosize=OS_NO) then
  1080. internalerror(2011021310);
  1081. conv_done:=false;
  1082. if tosize<>fromsize then
  1083. begin
  1084. conv_done:=true;
  1085. if tcgsize2size[tosize]<=tcgsize2size[fromsize] then
  1086. fromsize:=tosize;
  1087. case fromsize of
  1088. OS_8:
  1089. begin
  1090. emit_mov(list,reg2,reg1);
  1091. for i:=2 to tcgsize2size[tosize] do
  1092. begin
  1093. reg2:=GetNextReg(reg2);
  1094. emit_mov(list,reg2,NR_R1);
  1095. end;
  1096. end;
  1097. OS_S8:
  1098. begin
  1099. emit_mov(list,reg2,reg1);
  1100. if tcgsize2size[tosize]>1 then
  1101. begin
  1102. reg2:=GetNextReg(reg2);
  1103. emit_mov(list,reg2,NR_R1);
  1104. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1105. list.concat(taicpu.op_reg(A_COM,reg2));
  1106. tmpreg:=reg2;
  1107. for i:=3 to tcgsize2size[tosize] do
  1108. begin
  1109. reg2:=GetNextReg(reg2);
  1110. emit_mov(list,reg2,tmpreg);
  1111. end;
  1112. end;
  1113. end;
  1114. OS_16:
  1115. begin
  1116. emit_mov(list,reg2,reg1);
  1117. reg1:=GetNextReg(reg1);
  1118. reg2:=GetNextReg(reg2);
  1119. emit_mov(list,reg2,reg1);
  1120. for i:=3 to tcgsize2size[tosize] do
  1121. begin
  1122. reg2:=GetNextReg(reg2);
  1123. emit_mov(list,reg2,NR_R1);
  1124. end;
  1125. end;
  1126. OS_S16:
  1127. begin
  1128. emit_mov(list,reg2,reg1);
  1129. reg1:=GetNextReg(reg1);
  1130. reg2:=GetNextReg(reg2);
  1131. emit_mov(list,reg2,reg1);
  1132. if tcgsize2size[tosize]>2 then
  1133. begin
  1134. reg2:=GetNextReg(reg2);
  1135. emit_mov(list,reg2,NR_R1);
  1136. list.concat(taicpu.op_reg_const(A_SBRC,reg1,7));
  1137. list.concat(taicpu.op_reg(A_COM,reg2));
  1138. tmpreg:=reg2;
  1139. for i:=4 to tcgsize2size[tosize] do
  1140. begin
  1141. reg2:=GetNextReg(reg2);
  1142. emit_mov(list,reg2,tmpreg);
  1143. end;
  1144. end;
  1145. end;
  1146. else
  1147. conv_done:=false;
  1148. end;
  1149. end;
  1150. if not conv_done and (reg1<>reg2) then
  1151. begin
  1152. for i:=1 to tcgsize2size[fromsize] do
  1153. begin
  1154. emit_mov(list,reg2,reg1);
  1155. reg1:=GetNextReg(reg1);
  1156. reg2:=GetNextReg(reg2);
  1157. end;
  1158. end;
  1159. end;
  1160. procedure tcgavr.a_loadfpu_reg_reg(list: TAsmList; fromsize,tosize: tcgsize; reg1, reg2: tregister);
  1161. begin
  1162. internalerror(2012010702);
  1163. end;
  1164. procedure tcgavr.a_loadfpu_ref_reg(list: TAsmList; fromsize,tosize: tcgsize; const ref: treference; reg: tregister);
  1165. begin
  1166. internalerror(2012010703);
  1167. end;
  1168. procedure tcgavr.a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference);
  1169. begin
  1170. internalerror(2012010704);
  1171. end;
  1172. { comparison operations }
  1173. procedure tcgavr.a_cmp_const_reg_label(list : TAsmList;size : tcgsize;
  1174. cmp_op : topcmp;a : tcgint;reg : tregister;l : tasmlabel);
  1175. var
  1176. swapped : boolean;
  1177. tmpreg : tregister;
  1178. i : byte;
  1179. begin
  1180. if a=0 then
  1181. begin
  1182. swapped:=false;
  1183. { swap parameters? }
  1184. case cmp_op of
  1185. OC_GT:
  1186. begin
  1187. swapped:=true;
  1188. cmp_op:=OC_LT;
  1189. end;
  1190. OC_LTE:
  1191. begin
  1192. swapped:=true;
  1193. cmp_op:=OC_GTE;
  1194. end;
  1195. OC_BE:
  1196. begin
  1197. swapped:=true;
  1198. cmp_op:=OC_AE;
  1199. end;
  1200. OC_A:
  1201. begin
  1202. swapped:=true;
  1203. cmp_op:=OC_B;
  1204. end;
  1205. end;
  1206. if swapped then
  1207. list.concat(taicpu.op_reg_reg(A_CP,reg,NR_R1))
  1208. else
  1209. list.concat(taicpu.op_reg_reg(A_CP,NR_R1,reg));
  1210. for i:=2 to tcgsize2size[size] do
  1211. begin
  1212. reg:=GetNextReg(reg);
  1213. if swapped then
  1214. list.concat(taicpu.op_reg_reg(A_CPC,reg,NR_R1))
  1215. else
  1216. list.concat(taicpu.op_reg_reg(A_CPC,NR_R1,reg));
  1217. end;
  1218. a_jmp_cond(list,cmp_op,l);
  1219. end
  1220. else
  1221. inherited a_cmp_const_reg_label(list,size,cmp_op,a,reg,l);
  1222. end;
  1223. procedure tcgavr.a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;
  1224. cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel);
  1225. var
  1226. swapped : boolean;
  1227. tmpreg : tregister;
  1228. i : byte;
  1229. begin
  1230. swapped:=false;
  1231. { swap parameters? }
  1232. case cmp_op of
  1233. OC_GT:
  1234. begin
  1235. swapped:=true;
  1236. cmp_op:=OC_LT;
  1237. end;
  1238. OC_LTE:
  1239. begin
  1240. swapped:=true;
  1241. cmp_op:=OC_GTE;
  1242. end;
  1243. OC_BE:
  1244. begin
  1245. swapped:=true;
  1246. cmp_op:=OC_AE;
  1247. end;
  1248. OC_A:
  1249. begin
  1250. swapped:=true;
  1251. cmp_op:=OC_B;
  1252. end;
  1253. end;
  1254. if swapped then
  1255. begin
  1256. tmpreg:=reg1;
  1257. reg1:=reg2;
  1258. reg2:=tmpreg;
  1259. end;
  1260. list.concat(taicpu.op_reg_reg(A_CP,reg2,reg1));
  1261. for i:=2 to tcgsize2size[size] do
  1262. begin
  1263. reg1:=GetNextReg(reg1);
  1264. reg2:=GetNextReg(reg2);
  1265. list.concat(taicpu.op_reg_reg(A_CPC,reg2,reg1));
  1266. end;
  1267. a_jmp_cond(list,cmp_op,l);
  1268. end;
  1269. procedure tcgavr.a_jmp_name(list : TAsmList;const s : string);
  1270. var
  1271. ai : taicpu;
  1272. begin
  1273. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1274. ai:=taicpu.op_sym(A_JMP,current_asmdata.RefAsmSymbol(s))
  1275. else
  1276. ai:=taicpu.op_sym(A_RJMP,current_asmdata.RefAsmSymbol(s));
  1277. ai.is_jmp:=true;
  1278. list.concat(ai);
  1279. end;
  1280. procedure tcgavr.a_jmp_always(list : TAsmList;l: tasmlabel);
  1281. var
  1282. ai : taicpu;
  1283. begin
  1284. if CPUAVR_HAS_JMP_CALL in cpu_capabilities[current_settings.cputype] then
  1285. ai:=taicpu.op_sym(A_JMP,l)
  1286. else
  1287. ai:=taicpu.op_sym(A_RJMP,l);
  1288. ai.is_jmp:=true;
  1289. list.concat(ai);
  1290. end;
  1291. procedure tcgavr.a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel);
  1292. var
  1293. ai : taicpu;
  1294. begin
  1295. ai:=setcondition(taicpu.op_sym(A_BRxx,l),flags_to_cond(f));
  1296. ai.is_jmp:=true;
  1297. list.concat(ai);
  1298. end;
  1299. procedure tcgavr.g_flags2reg(list: TAsmList; size: TCgSize; const f: TResFlags; reg: TRegister);
  1300. var
  1301. l : TAsmLabel;
  1302. tmpflags : TResFlags;
  1303. begin
  1304. current_asmdata.getjumplabel(l);
  1305. {
  1306. if flags_to_cond(f) then
  1307. begin
  1308. tmpflags:=f;
  1309. inverse_flags(tmpflags);
  1310. emit_mov(reg,NR_R1);
  1311. a_jmp_flags(list,tmpflags,l);
  1312. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1313. end
  1314. else
  1315. }
  1316. begin
  1317. list.concat(taicpu.op_reg_const(A_LDI,reg,1));
  1318. a_jmp_flags(list,f,l);
  1319. emit_mov(list,reg,NR_R1);
  1320. end;
  1321. cg.a_label(list,l);
  1322. end;
  1323. procedure tcgavr.a_adjust_sp(list : TAsmList; value : longint);
  1324. var
  1325. i : integer;
  1326. begin
  1327. case value of
  1328. 0:
  1329. ;
  1330. {-14..-1:
  1331. begin
  1332. if ((-value) mod 2)<>0 then
  1333. list.concat(taicpu.op_reg(A_PUSH,NR_R0));
  1334. for i:=1 to (-value) div 2 do
  1335. list.concat(taicpu.op_const(A_RCALL,0));
  1336. end;
  1337. 1..7:
  1338. begin
  1339. for i:=1 to value do
  1340. list.concat(taicpu.op_reg(A_POP,NR_R0));
  1341. end;}
  1342. else
  1343. begin
  1344. list.concat(taicpu.op_reg_const(A_SUBI,NR_R28,lo(word(-value))));
  1345. list.concat(taicpu.op_reg_const(A_SBCI,NR_R29,hi(word(-value))));
  1346. // get SREG
  1347. list.concat(taicpu.op_reg_const(A_IN,NR_R0,NIO_SREG));
  1348. // block interrupts
  1349. list.concat(taicpu.op_none(A_CLI));
  1350. // write high SP
  1351. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_HI,NR_R29));
  1352. // release interrupts
  1353. list.concat(taicpu.op_const_reg(A_OUT,NIO_SREG,NR_R0));
  1354. // write low SP
  1355. list.concat(taicpu.op_const_reg(A_OUT,NIO_SP_LO,NR_R28));
  1356. end;
  1357. end;
  1358. end;
  1359. function tcgavr.GetLoad(const ref: treference) : tasmop;
  1360. begin
  1361. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1362. result:=A_LDS
  1363. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1364. result:=A_LDD
  1365. else
  1366. result:=A_LD;
  1367. end;
  1368. function tcgavr.GetStore(const ref: treference) : tasmop;
  1369. begin
  1370. if (ref.base=NR_NO) and (ref.index=NR_NO) then
  1371. result:=A_STS
  1372. else if (ref.base<>NR_NO) and (ref.offset<>0) then
  1373. result:=A_STD
  1374. else
  1375. result:=A_ST;
  1376. end;
  1377. procedure tcgavr.g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);
  1378. var
  1379. regs : tcpuregisterset;
  1380. reg : tsuperregister;
  1381. begin
  1382. if not(nostackframe) then
  1383. begin
  1384. { save int registers }
  1385. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1386. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1387. regs:=regs+[RS_R28,RS_R29];
  1388. for reg:=RS_R31 downto RS_R0 do
  1389. if reg in regs then
  1390. list.concat(taicpu.op_reg(A_PUSH,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1391. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1392. begin
  1393. list.concat(taicpu.op_reg_const(A_IN,NR_R28,NIO_SP_LO));
  1394. list.concat(taicpu.op_reg_const(A_IN,NR_R29,NIO_SP_HI));
  1395. end
  1396. else
  1397. { the framepointer cannot be omitted on avr because sp
  1398. is not a register but part of the i/o map
  1399. }
  1400. internalerror(2011021901);
  1401. a_adjust_sp(list,-localsize);
  1402. end;
  1403. end;
  1404. procedure tcgavr.g_proc_exit(list : TAsmList;parasize : longint;nostackframe:boolean);
  1405. var
  1406. regs : tcpuregisterset;
  1407. reg : TSuperRegister;
  1408. LocalSize : longint;
  1409. begin
  1410. if not(nostackframe) then
  1411. begin
  1412. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1413. begin
  1414. LocalSize:=current_procinfo.calc_stackframe_size;
  1415. a_adjust_sp(list,LocalSize);
  1416. regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
  1417. if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
  1418. regs:=regs+[RS_R28,RS_R29];
  1419. for reg:=RS_R0 to RS_R31 do
  1420. if reg in regs then
  1421. list.concat(taicpu.op_reg(A_POP,newreg(R_INTREGISTER,reg,R_SUBWHOLE)));
  1422. end
  1423. else
  1424. { the framepointer cannot be omitted on avr because sp
  1425. is not a register but part of the i/o map
  1426. }
  1427. internalerror(2011021902);
  1428. end;
  1429. list.concat(taicpu.op_none(A_RET));
  1430. end;
  1431. procedure tcgavr.a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);
  1432. var
  1433. tmpref : treference;
  1434. begin
  1435. if ref.addressmode<>AM_UNCHANGED then
  1436. internalerror(2011021701);
  1437. if assigned(ref.symbol) or (ref.offset<>0) then
  1438. begin
  1439. reference_reset(tmpref,0);
  1440. tmpref.symbol:=ref.symbol;
  1441. tmpref.offset:=ref.offset;
  1442. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  1443. tmpref.refaddr:=addr_lo8_gs
  1444. else
  1445. tmpref.refaddr:=addr_lo8;
  1446. list.concat(taicpu.op_reg_ref(A_LDI,r,tmpref));
  1447. if assigned(ref.symbol) and (ref.symbol.typ in [AT_FUNCTION,AT_LABEL]) then
  1448. tmpref.refaddr:=addr_hi8_gs
  1449. else
  1450. tmpref.refaddr:=addr_hi8;
  1451. list.concat(taicpu.op_reg_ref(A_LDI,GetNextReg(r),tmpref));
  1452. if (ref.base<>NR_NO) then
  1453. begin
  1454. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.base));
  1455. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.base)));
  1456. end;
  1457. if (ref.index<>NR_NO) then
  1458. begin
  1459. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1460. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1461. end;
  1462. end
  1463. else if (ref.base<>NR_NO)then
  1464. begin
  1465. emit_mov(list,r,ref.base);
  1466. emit_mov(list,GetNextReg(r),GetNextReg(ref.base));
  1467. if (ref.index<>NR_NO) then
  1468. begin
  1469. list.concat(taicpu.op_reg_reg(A_ADD,r,ref.index));
  1470. list.concat(taicpu.op_reg_reg(A_ADC,GetNextReg(r),GetNextReg(ref.index)));
  1471. end;
  1472. end
  1473. else if (ref.index<>NR_NO) then
  1474. begin
  1475. emit_mov(list,r,ref.index);
  1476. emit_mov(list,GetNextReg(r),GetNextReg(ref.index));
  1477. end;
  1478. end;
  1479. procedure tcgavr.fixref(list : TAsmList;var ref : treference);
  1480. begin
  1481. internalerror(2011021320);
  1482. end;
  1483. procedure tcgavr.g_concatcopy_move(list : TAsmList;const source,dest : treference;len : tcgint);
  1484. var
  1485. paraloc1,paraloc2,paraloc3 : TCGPara;
  1486. pd : tprocdef;
  1487. begin
  1488. pd:=search_system_proc('MOVE');
  1489. paraloc1.init;
  1490. paraloc2.init;
  1491. paraloc3.init;
  1492. paramanager.getintparaloc(list,pd,1,paraloc1);
  1493. paramanager.getintparaloc(list,pd,2,paraloc2);
  1494. paramanager.getintparaloc(list,pd,3,paraloc3);
  1495. a_load_const_cgpara(list,OS_SINT,len,paraloc3);
  1496. a_loadaddr_ref_cgpara(list,dest,paraloc2);
  1497. a_loadaddr_ref_cgpara(list,source,paraloc1);
  1498. paramanager.freecgpara(list,paraloc3);
  1499. paramanager.freecgpara(list,paraloc2);
  1500. paramanager.freecgpara(list,paraloc1);
  1501. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1502. a_call_name_static(list,'FPC_MOVE');
  1503. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  1504. paraloc3.done;
  1505. paraloc2.done;
  1506. paraloc1.done;
  1507. end;
  1508. procedure tcgavr.g_concatcopy(list : TAsmList;const source,dest : treference;len : tcgint);
  1509. var
  1510. countreg,tmpreg : tregister;
  1511. srcref,dstref : treference;
  1512. copysize,countregsize : tcgsize;
  1513. l : TAsmLabel;
  1514. i : longint;
  1515. SrcQuickRef, DestQuickRef : Boolean;
  1516. begin
  1517. if len>16 then
  1518. begin
  1519. current_asmdata.getjumplabel(l);
  1520. reference_reset(srcref,0);
  1521. reference_reset(dstref,0);
  1522. srcref.base:=NR_R30;
  1523. srcref.addressmode:=AM_POSTINCREMENT;
  1524. dstref.base:=NR_R26;
  1525. dstref.addressmode:=AM_POSTINCREMENT;
  1526. copysize:=OS_8;
  1527. if len<256 then
  1528. countregsize:=OS_8
  1529. else if len<65536 then
  1530. countregsize:=OS_16
  1531. else
  1532. internalerror(2011022007);
  1533. countreg:=getintregister(list,countregsize);
  1534. a_load_const_reg(list,countregsize,len,countreg);
  1535. a_loadaddr_ref_reg(list,source,NR_R30);
  1536. tmpreg:=getaddressregister(list);
  1537. a_loadaddr_ref_reg(list,dest,tmpreg);
  1538. { X is used for spilling code so we can load it
  1539. only by a push/pop sequence, this can be
  1540. optimized later on by the peephole optimizer
  1541. }
  1542. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1543. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1544. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1545. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1546. cg.a_label(list,l);
  1547. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1548. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1549. a_op_const_reg(list,OP_SUB,countregsize,1,countreg);
  1550. a_jmp_flags(list,F_NE,l);
  1551. // keep registers alive
  1552. list.concat(taicpu.op_reg_reg(A_MOV,countreg,countreg));
  1553. end
  1554. else
  1555. begin
  1556. SrcQuickRef:=false;
  1557. DestQuickRef:=false;
  1558. if not((source.addressmode=AM_UNCHANGED) and
  1559. (source.symbol=nil) and
  1560. ((source.base=NR_R28) or
  1561. (source.base=NR_R29)) and
  1562. (source.Index=NR_NO) and
  1563. (source.Offset in [0..64-len])) and
  1564. not((source.Base=NR_NO) and (source.Index=NR_NO)) then
  1565. srcref:=normalize_ref(list,source,NR_R30)
  1566. else
  1567. begin
  1568. SrcQuickRef:=true;
  1569. srcref:=source;
  1570. end;
  1571. if not((dest.addressmode=AM_UNCHANGED) and
  1572. (dest.symbol=nil) and
  1573. ((dest.base=NR_R28) or
  1574. (dest.base=NR_R29)) and
  1575. (dest.Index=NR_No) and
  1576. (dest.Offset in [0..64-len])) and
  1577. not((dest.Base=NR_NO) and (dest.Index=NR_NO)) then
  1578. begin
  1579. if not(SrcQuickRef) then
  1580. begin
  1581. tmpreg:=getaddressregister(list);
  1582. dstref:=normalize_ref(list,dest,tmpreg);
  1583. { X is used for spilling code so we can load it
  1584. only by a push/pop sequence, this can be
  1585. optimized later on by the peephole optimizer
  1586. }
  1587. list.concat(taicpu.op_reg(A_PUSH,tmpreg));
  1588. list.concat(taicpu.op_reg(A_PUSH,GetNextReg(tmpreg)));
  1589. list.concat(taicpu.op_reg(A_POP,NR_R27));
  1590. list.concat(taicpu.op_reg(A_POP,NR_R26));
  1591. dstref.base:=NR_R26;
  1592. end
  1593. else
  1594. dstref:=normalize_ref(list,dest,NR_R30);
  1595. end
  1596. else
  1597. begin
  1598. DestQuickRef:=true;
  1599. dstref:=dest;
  1600. end;
  1601. for i:=1 to len do
  1602. begin
  1603. if not(SrcQuickRef) and (i<len) then
  1604. srcref.addressmode:=AM_POSTINCREMENT
  1605. else
  1606. srcref.addressmode:=AM_UNCHANGED;
  1607. if not(DestQuickRef) and (i<len) then
  1608. dstref.addressmode:=AM_POSTINCREMENT
  1609. else
  1610. dstref.addressmode:=AM_UNCHANGED;
  1611. list.concat(taicpu.op_reg_ref(GetLoad(srcref),NR_R0,srcref));
  1612. list.concat(taicpu.op_ref_reg(GetStore(dstref),dstref,NR_R0));
  1613. if SrcQuickRef then
  1614. inc(srcref.offset);
  1615. if DestQuickRef then
  1616. inc(dstref.offset);
  1617. end;
  1618. if not(SrcQuickRef) then
  1619. begin
  1620. ungetcpuregister(list,srcref.base);
  1621. ungetcpuregister(list,GetNextReg(srcref.base));
  1622. end;
  1623. end;
  1624. end;
  1625. procedure tcgavr.g_overflowCheck(list : TAsmList;const l : tlocation;def : tdef);
  1626. var
  1627. hl : tasmlabel;
  1628. ai : taicpu;
  1629. cond : TAsmCond;
  1630. begin
  1631. if not(cs_check_overflow in current_settings.localswitches) then
  1632. exit;
  1633. current_asmdata.getjumplabel(hl);
  1634. if not ((def.typ=pointerdef) or
  1635. ((def.typ=orddef) and
  1636. (torddef(def).ordtype in [u64bit,u16bit,u32bit,u8bit,uchar,
  1637. pasbool8,pasbool16,pasbool32,pasbool64]))) then
  1638. cond:=C_VC
  1639. else
  1640. cond:=C_CC;
  1641. ai:=Taicpu.Op_Sym(A_BRxx,hl);
  1642. ai.SetCondition(cond);
  1643. ai.is_jmp:=true;
  1644. list.concat(ai);
  1645. a_call_name(list,'FPC_OVERFLOW',false);
  1646. a_label(list,hl);
  1647. end;
  1648. procedure tcgavr.g_save_registers(list: TAsmList);
  1649. begin
  1650. { this is done by the entry code }
  1651. end;
  1652. procedure tcgavr.g_restore_registers(list: TAsmList);
  1653. begin
  1654. { this is done by the exit code }
  1655. end;
  1656. procedure tcgavr.a_jmp_cond(list : TAsmList;cond : TOpCmp;l: tasmlabel);
  1657. var
  1658. ai1,ai2 : taicpu;
  1659. hl : TAsmLabel;
  1660. begin
  1661. ai1:=Taicpu.Op_sym(A_BRxx,l);
  1662. ai1.is_jmp:=true;
  1663. hl:=nil;
  1664. case cond of
  1665. OC_EQ:
  1666. ai1.SetCondition(C_EQ);
  1667. OC_GT:
  1668. begin
  1669. { emulate GT }
  1670. current_asmdata.getjumplabel(hl);
  1671. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1672. ai2.SetCondition(C_EQ);
  1673. ai2.is_jmp:=true;
  1674. list.concat(ai2);
  1675. ai1.SetCondition(C_GE);
  1676. end;
  1677. OC_LT:
  1678. ai1.SetCondition(C_LT);
  1679. OC_GTE:
  1680. ai1.SetCondition(C_GE);
  1681. OC_LTE:
  1682. begin
  1683. { emulate LTE }
  1684. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1685. ai2.SetCondition(C_EQ);
  1686. ai2.is_jmp:=true;
  1687. list.concat(ai2);
  1688. ai1.SetCondition(C_LT);
  1689. end;
  1690. OC_NE:
  1691. ai1.SetCondition(C_NE);
  1692. OC_BE:
  1693. begin
  1694. { emulate BE }
  1695. ai2:=Taicpu.Op_Sym(A_BRxx,l);
  1696. ai2.SetCondition(C_EQ);
  1697. ai2.is_jmp:=true;
  1698. list.concat(ai2);
  1699. ai1.SetCondition(C_LO);
  1700. end;
  1701. OC_B:
  1702. ai1.SetCondition(C_LO);
  1703. OC_AE:
  1704. ai1.SetCondition(C_SH);
  1705. OC_A:
  1706. begin
  1707. { emulate A (unsigned GT) }
  1708. current_asmdata.getjumplabel(hl);
  1709. ai2:=Taicpu.Op_Sym(A_BRxx,hl);
  1710. ai2.SetCondition(C_EQ);
  1711. ai2.is_jmp:=true;
  1712. list.concat(ai2);
  1713. ai1.SetCondition(C_SH);
  1714. end;
  1715. else
  1716. internalerror(2011082501);
  1717. end;
  1718. list.concat(ai1);
  1719. if assigned(hl) then
  1720. a_label(list,hl);
  1721. end;
  1722. procedure tcgavr.emit_mov(list: TAsmList;reg2: tregister; reg1: tregister);
  1723. var
  1724. instr: taicpu;
  1725. begin
  1726. instr:=taicpu.op_reg_reg(A_MOV,reg2,reg1);
  1727. list.Concat(instr);
  1728. { Notify the register allocator that we have written a move instruction so
  1729. it can try to eliminate it. }
  1730. add_move_instruction(instr);
  1731. end;
  1732. procedure tcg64favr.a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);
  1733. begin
  1734. if not(size in [OS_S64,OS_64]) then
  1735. internalerror(2012102402);
  1736. tcgavr(cg).a_op_reg_reg_internal(list,Op,size,regsrc.reglo,regsrc.reghi,regdst.reglo,regdst.reghi);
  1737. end;
  1738. procedure tcg64favr.a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;reg : tregister64);
  1739. begin
  1740. tcgavr(cg).a_op_const_reg_internal(list,Op,size,value,reg.reglo,reg.reghi);
  1741. end;
  1742. procedure create_codegen;
  1743. begin
  1744. cg:=tcgavr.create;
  1745. cg64:=tcg64favr.create;
  1746. end;
  1747. end.