ncgmem.pas 49 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate assembler for memory related nodes which are
  4. the same for all (most?) processors
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit ncgmem;
  19. {$i fpcdefs.inc}
  20. interface
  21. uses
  22. globtype,cgbase,cpuinfo,cpubase,
  23. node,nmem;
  24. type
  25. tcgloadvmtaddrnode = class(tloadvmtaddrnode)
  26. procedure pass_generate_code;override;
  27. end;
  28. tcgloadparentfpnode = class(tloadparentfpnode)
  29. procedure pass_generate_code;override;
  30. end;
  31. tcgaddrnode = class(taddrnode)
  32. procedure pass_generate_code;override;
  33. end;
  34. tcgderefnode = class(tderefnode)
  35. procedure pass_generate_code;override;
  36. end;
  37. tcgsubscriptnode = class(tsubscriptnode)
  38. procedure pass_generate_code;override;
  39. end;
  40. tcgwithnode = class(twithnode)
  41. procedure pass_generate_code;override;
  42. end;
  43. tcgvecnode = class(tvecnode)
  44. function get_mul_size : aint;
  45. private
  46. procedure rangecheck_array;
  47. procedure rangecheck_string;
  48. protected
  49. {# This routine is used to calculate the address of the reference.
  50. On entry reg contains the index in the array,
  51. and l contains the size of each element in the array.
  52. This routine should update location.reference correctly,
  53. so it points to the correct address.
  54. }
  55. procedure update_reference_reg_mul(maybe_const_reg:tregister;l:aint);virtual;
  56. procedure update_reference_reg_packed(maybe_const_reg:tregister;l:aint);virtual;
  57. procedure second_wideansistring;virtual;
  58. procedure second_dynamicarray;virtual;
  59. public
  60. procedure pass_generate_code;override;
  61. end;
  62. implementation
  63. uses
  64. systems,
  65. cutils,cclasses,verbose,globals,constexp,
  66. symconst,symbase,symtype,symdef,symsym,symcpu,symtable,defutil,paramgr,
  67. aasmbase,aasmtai,aasmdata,
  68. procinfo,pass_2,parabase,
  69. pass_1,nld,ncon,nadd,ncnv,nutils,
  70. cgutils,cgobj,hlcgobj,
  71. tgobj,ncgutil,objcgutl,
  72. defcmp
  73. ;
  74. {*****************************************************************************
  75. TCGLOADVMTADDRNODE
  76. *****************************************************************************}
  77. procedure tcgloadvmtaddrnode.pass_generate_code;
  78. var
  79. href : treference;
  80. pool : THashSet;
  81. entry : PHashSetItem;
  82. begin
  83. location_reset(location,LOC_REGISTER,def_cgsize(voidpointertype));
  84. if (left.nodetype=typen) then
  85. begin
  86. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,voidpointertype);
  87. if not is_objcclass(left.resultdef) then
  88. begin
  89. reference_reset_symbol(href,
  90. current_asmdata.RefAsmSymbol(tobjectdef(tclassrefdef(resultdef).pointeddef).vmt_mangledname,AT_DATA),0,
  91. voidpointertype.size);
  92. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  93. end
  94. else
  95. begin
  96. pool:=current_asmdata.ConstPools[sp_objcclassnamerefs];
  97. entry:=pool.FindOrAdd(@tobjectdef(left.resultdef).objextname^[1],length(tobjectdef(left.resultdef).objextname^));
  98. if (target_info.system in systems_objc_nfabi) then
  99. begin
  100. { find/add necessary classref/classname pool entries }
  101. objcfinishclassrefnfpoolentry(entry,tobjectdef(left.resultdef));
  102. end
  103. else
  104. begin
  105. { find/add necessary classref/classname pool entries }
  106. objcfinishstringrefpoolentry(entry,sp_objcclassnames,sec_objc_cls_refs,sec_objc_class_names);
  107. end;
  108. reference_reset_symbol(href,tasmlabel(entry^.Data),0,voidpointertype.size);
  109. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,voidpointertype,voidpointertype,href,location.register);
  110. end;
  111. end
  112. else
  113. begin
  114. { left contains self, load vmt from self }
  115. secondpass(left);
  116. gen_load_vmt_register(current_asmdata.CurrAsmList,tobjectdef(left.resultdef),left.location,location.register);
  117. end;
  118. end;
  119. {*****************************************************************************
  120. TCGLOADPARENTFPNODE
  121. *****************************************************************************}
  122. procedure tcgloadparentfpnode.pass_generate_code;
  123. var
  124. currpi : tprocinfo;
  125. hsym : tparavarsym;
  126. href : treference;
  127. begin
  128. if (current_procinfo.procdef.parast.symtablelevel=parentpd.parast.symtablelevel) then
  129. begin
  130. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  131. location.register:=current_procinfo.framepointer;
  132. end
  133. else
  134. begin
  135. currpi:=current_procinfo;
  136. location_reset(location,LOC_REGISTER,def_cgsize(parentfpvoidpointertype));
  137. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,parentfpvoidpointertype);
  138. { load framepointer of current proc }
  139. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  140. if not assigned(hsym) then
  141. internalerror(200309281);
  142. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,hsym.localloc,location.register);
  143. { walk parents }
  144. while (currpi.procdef.owner.symtablelevel>parentpd.parast.symtablelevel) do
  145. begin
  146. currpi:=currpi.parent;
  147. if not assigned(currpi) then
  148. internalerror(200311201);
  149. hsym:=tparavarsym(currpi.procdef.parast.Find('parentfp'));
  150. if not assigned(hsym) then
  151. internalerror(200309282);
  152. if hsym.localloc.loc<>LOC_REFERENCE then
  153. internalerror(200309283);
  154. hlcg.reference_reset_base(href,parentfpvoidpointertype,location.register,hsym.localloc.reference.offset,sizeof(pint));
  155. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,parentfpvoidpointertype,parentfpvoidpointertype,href,location.register);
  156. end;
  157. end;
  158. end;
  159. {*****************************************************************************
  160. TCGADDRNODE
  161. *****************************************************************************}
  162. procedure tcgaddrnode.pass_generate_code;
  163. begin
  164. secondpass(left);
  165. location_reset(location,LOC_REGISTER,int_cgsize(resultdef.size));
  166. location.register:=hlcg.getaddressregister(current_asmdata.CurrAsmList,resultdef);
  167. if not(left.location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  168. { on x86_64-win64, array of chars can be returned in registers, however,
  169. when passing these arrays to other functions, the compiler wants to take
  170. the address of the array so when the addrnode has been created internally,
  171. we have to force the data into memory, see also tw14388.pp
  172. }
  173. if nf_internal in flags then
  174. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef)
  175. else
  176. internalerror(2006111510);
  177. hlcg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.resultdef,resultdef,left.location.reference,location.register);
  178. end;
  179. {*****************************************************************************
  180. TCGDEREFNODE
  181. *****************************************************************************}
  182. procedure tcgderefnode.pass_generate_code;
  183. var
  184. paraloc1 : tcgpara;
  185. pd : tprocdef;
  186. sym : tsym;
  187. st : tsymtable;
  188. hp : pnode;
  189. hp2 : tnode;
  190. extraoffset : tcgint;
  191. begin
  192. sym:=nil;
  193. { assume natural alignment, except for packed records }
  194. if not(resultdef.typ in [recorddef,objectdef]) or
  195. (tabstractrecordsymtable(tabstractrecorddef(resultdef).symtable).usefieldalignment<>1) then
  196. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),resultdef.alignment)
  197. else
  198. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),1);
  199. { can we fold an add/sub node into the offset of the deref node? }
  200. extraoffset:=0;
  201. hp:=actualtargetnode(@left);
  202. if (hp^.nodetype=subn) and is_constintnode(taddnode(hp^).right) then
  203. begin
  204. extraoffset:=-tcgint(tordconstnode(taddnode(hp^).right).value);
  205. replacenode(hp^,taddnode(hp^).left);
  206. end
  207. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).right) then
  208. begin
  209. extraoffset:=tcgint(tordconstnode(taddnode(hp^).right).value);
  210. replacenode(hp^,taddnode(hp^).left);
  211. end
  212. else if (hp^.nodetype=addn) and is_constintnode(taddnode(hp^).left) then
  213. begin
  214. extraoffset:=tcgint(tordconstnode(taddnode(hp^).left).value);
  215. replacenode(hp^,taddnode(hp^).right);
  216. end;
  217. secondpass(left);
  218. if not(left.location.loc in [LOC_CREGISTER,LOC_REGISTER,LOC_CREFERENCE,LOC_REFERENCE,LOC_CONSTANT]) then
  219. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  220. case left.location.loc of
  221. LOC_CREGISTER,
  222. LOC_REGISTER:
  223. begin
  224. hlcg.maybe_change_load_node_reg(current_asmdata.CurrAsmList,left,true);
  225. {$ifdef cpu_uses_separate_address_registers}
  226. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  227. begin
  228. location.reference.base := cg.getaddressregister(current_asmdata.CurrAsmList);
  229. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,
  230. location.reference.base);
  231. end
  232. else
  233. {$endif}
  234. location.reference.base := left.location.register;
  235. end;
  236. LOC_CREFERENCE,
  237. LOC_REFERENCE:
  238. begin
  239. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  240. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  241. end;
  242. LOC_CONSTANT:
  243. begin
  244. location.reference.offset:=left.location.value;
  245. end;
  246. else
  247. internalerror(200507031);
  248. end;
  249. location.reference.offset:=location.reference.offset+extraoffset;
  250. if (cs_use_heaptrc in current_settings.globalswitches) and
  251. (cs_checkpointer in current_settings.localswitches) and
  252. not(cs_compilesystem in current_settings.moduleswitches) and
  253. {$ifdef x86}
  254. (tcpupointerdef(left.resultdef).x86pointertyp = tcpupointerdefclass(cpointerdef).default_x86_data_pointer_type) and
  255. {$endif x86}
  256. not(nf_no_checkpointer in flags) and
  257. { can be NR_NO in case of LOC_CONSTANT }
  258. (location.reference.base<>NR_NO) then
  259. begin
  260. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  261. (sym.typ<>procsym) then
  262. internalerror(2012010601);
  263. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  264. paraloc1.init;
  265. paramanager.getintparaloc(pd,1,paraloc1);
  266. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  267. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  268. paraloc1.done;
  269. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  270. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  271. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  272. end;
  273. end;
  274. {*****************************************************************************
  275. TCGSUBSCRIPTNODE
  276. *****************************************************************************}
  277. procedure tcgsubscriptnode.pass_generate_code;
  278. var
  279. asmsym: tasmsymbol;
  280. paraloc1 : tcgpara;
  281. tmpref: treference;
  282. sref: tsubsetreference;
  283. offsetcorrection : aint;
  284. pd : tprocdef;
  285. sym : tsym;
  286. st : tsymtable;
  287. begin
  288. sym:=nil;
  289. secondpass(left);
  290. if codegenerror then
  291. exit;
  292. paraloc1.init;
  293. { several object types must be dereferenced implicitly }
  294. if is_implicit_pointer_object_type(left.resultdef) then
  295. begin
  296. if (not is_managed_type(left.resultdef)) or
  297. (target_info.system in systems_garbage_collected_managed_types) then
  298. begin
  299. { the contents of a class are aligned to a sizeof(pointer) }
  300. location_reset_ref(location,LOC_REFERENCE,def_cgsize(resultdef),voidpointertype.size);
  301. case left.location.loc of
  302. LOC_CREGISTER,
  303. LOC_REGISTER:
  304. begin
  305. {$ifdef cpu_uses_separate_address_registers}
  306. if getregtype(left.location.register)<>R_ADDRESSREGISTER then
  307. begin
  308. location.reference.base:=rg.getaddressregister(current_asmdata.CurrAsmList);
  309. hlcg.a_load_reg_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  310. left.location.register,location.reference.base);
  311. end
  312. else
  313. {$endif}
  314. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  315. end;
  316. LOC_CREFERENCE,
  317. LOC_REFERENCE,
  318. { tricky type casting of parameters can cause these locations, see tb0592.pp on x86_64-linux }
  319. LOC_SUBSETREG,
  320. LOC_CSUBSETREG,
  321. LOC_SUBSETREF,
  322. LOC_CSUBSETREF:
  323. begin
  324. hlcg.reference_reset_base(location.reference,left.resultdef,
  325. hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  326. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location,location.reference.base);
  327. end;
  328. LOC_CONSTANT:
  329. begin
  330. { can happen with @classtype(pointerconst).field }
  331. location.reference.offset:=left.location.value;
  332. end;
  333. else
  334. internalerror(2009092401);
  335. end;
  336. { implicit deferencing }
  337. if (cs_use_heaptrc in current_settings.globalswitches) and
  338. (cs_checkpointer in current_settings.localswitches) and
  339. not(cs_compilesystem in current_settings.moduleswitches) then
  340. begin
  341. if not searchsym_in_named_module('HEAPTRC','CHECKPOINTER',sym,st) or
  342. (sym.typ<>procsym) then
  343. internalerror(2012010602);
  344. pd:=tprocdef(tprocsym(sym).ProcdefList[0]);
  345. paramanager.getintparaloc(pd,1,paraloc1);
  346. hlcg.a_load_reg_cgpara(current_asmdata.CurrAsmList,left.resultdef,location.reference.base,paraloc1);
  347. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  348. hlcg.allocallcpuregisters(current_asmdata.CurrAsmList);
  349. hlcg.a_call_name(current_asmdata.CurrAsmList,pd,'FPC_CHECKPOINTER',nil,false);
  350. hlcg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  351. end;
  352. end
  353. else
  354. { reference-counted implicit pointer object types don't have
  355. fields -> cannot be subscripted (calls are handled via call
  356. nodes) }
  357. internalerror(2011011901);
  358. end
  359. else
  360. begin
  361. location_copy(location,left.location);
  362. { some abi's require that functions return (some) records in }
  363. { registers }
  364. case location.loc of
  365. LOC_REFERENCE,
  366. LOC_CREFERENCE:
  367. ;
  368. LOC_CONSTANT,
  369. LOC_REGISTER,
  370. LOC_CREGISTER,
  371. { if a floating point value is casted into a record, it
  372. can happen that we get here an fpu or mm register }
  373. LOC_MMREGISTER,
  374. LOC_FPUREGISTER,
  375. LOC_CMMREGISTER,
  376. LOC_CFPUREGISTER:
  377. begin
  378. { in case the result is not something that can be put
  379. into an integer register (e.g.
  380. function_returning_record().non_regable_field, or
  381. a function returning a value > sizeof(intreg))
  382. -> force to memory
  383. }
  384. if not tstoreddef(left.resultdef).is_intregable or
  385. not tstoreddef(resultdef).is_intregable or
  386. { if the field spans multiple registers, we must force the record into
  387. memory as well }
  388. ((left.location.size in [OS_PAIR,OS_SPAIR]) and
  389. (vs.fieldoffset div sizeof(aword)<>(vs.fieldoffset+vs.getsize-1) div sizeof(aword))) or
  390. (location.loc in [LOC_MMREGISTER,LOC_FPUREGISTER,LOC_CMMREGISTER,LOC_CFPUREGISTER,
  391. { actually, we should be able to "subscript" a constant, but this would require some code
  392. which enables dumping and reading constants from a temporary memory buffer. This
  393. must be done a CPU dependent way, so it is not easy and probably not worth the effort (FK)
  394. }
  395. LOC_CONSTANT]) then
  396. hlcg.location_force_mem(current_asmdata.CurrAsmList,location,left.resultdef)
  397. else
  398. begin
  399. if (left.location.loc = LOC_REGISTER) then
  400. location.loc := LOC_SUBSETREG
  401. else
  402. location.loc := LOC_CSUBSETREG;
  403. location.size:=def_cgsize(resultdef);
  404. offsetcorrection:=0;
  405. if (left.location.size in [OS_PAIR,OS_SPAIR]) then
  406. begin
  407. if (vs.fieldoffset>=sizeof(aword)) then
  408. begin
  409. location.sreg.subsetreg := left.location.registerhi;
  410. offsetcorrection:=sizeof(aword)*8;
  411. end
  412. else
  413. location.sreg.subsetreg := left.location.register;
  414. location.sreg.subsetregsize := OS_INT;
  415. end
  416. else
  417. begin
  418. location.sreg.subsetreg := left.location.register;
  419. location.sreg.subsetregsize := left.location.size;
  420. end;
  421. if not is_packed_record_or_object(left.resultdef) then
  422. begin
  423. if (target_info.endian = ENDIAN_BIG) then
  424. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize] - tcgsize2size[location.size] - vs.fieldoffset) * 8+offsetcorrection
  425. else
  426. location.sreg.startbit := (vs.fieldoffset * 8)-offsetcorrection;
  427. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  428. end
  429. else
  430. begin
  431. location.sreg.bitlen := resultdef.packedbitsize;
  432. if (target_info.endian = ENDIAN_BIG) then
  433. location.sreg.startbit := (tcgsize2size[location.sreg.subsetregsize]*8 - location.sreg.bitlen) - vs.fieldoffset+offsetcorrection
  434. else
  435. location.sreg.startbit := vs.fieldoffset-offsetcorrection;
  436. end;
  437. end;
  438. end;
  439. LOC_SUBSETREG,
  440. LOC_CSUBSETREG:
  441. begin
  442. location.size:=def_cgsize(resultdef);
  443. if not is_packed_record_or_object(left.resultdef) then
  444. begin
  445. if (target_info.endian = ENDIAN_BIG) then
  446. inc(location.sreg.startbit, (left.resultdef.size - tcgsize2size[location.size] - vs.fieldoffset) * 8)
  447. else
  448. inc(location.sreg.startbit, vs.fieldoffset * 8);
  449. location.sreg.bitlen := tcgsize2size[location.size] * 8;
  450. end
  451. else
  452. begin
  453. location.sreg.bitlen := resultdef.packedbitsize;
  454. if (target_info.endian = ENDIAN_BIG) then
  455. inc(location.sreg.startbit, left.location.sreg.bitlen - location.sreg.bitlen - vs.fieldoffset)
  456. else
  457. inc(location.sreg.startbit, vs.fieldoffset);
  458. end;
  459. end;
  460. else
  461. internalerror(2006031901);
  462. end;
  463. end;
  464. if is_objc_class_or_protocol(left.resultdef) and
  465. (target_info.system in systems_objc_nfabi) then
  466. begin
  467. if (location.loc<>LOC_REFERENCE) or
  468. (location.reference.index<>NR_NO) then
  469. internalerror(2009092402);
  470. { the actual field offset is stored in memory (to solve the
  471. "fragile base class" problem: this way the layout of base
  472. classes can be changed without breaking programs compiled against
  473. earlier versions)
  474. }
  475. asmsym:=current_asmdata.RefAsmSymbol(vs.mangledname);
  476. reference_reset_symbol(tmpref,asmsym,0,sizeof(pint));
  477. location.reference.index:=cg.getaddressregister(current_asmdata.CurrAsmList);
  478. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,tmpref,location.reference.index);
  479. { always packrecords C -> natural alignment }
  480. location.reference.alignment:=vs.vardef.alignment;
  481. end
  482. else if is_java_class_or_interface(left.resultdef) or
  483. ((target_info.system in systems_jvm) and
  484. (left.resultdef.typ=recorddef)) then
  485. begin
  486. if (location.loc<>LOC_REFERENCE) or
  487. (location.reference.index<>NR_NO) or
  488. assigned(location.reference.symbol) then
  489. internalerror(2011011301);
  490. location.reference.symbol:=current_asmdata.RefAsmSymbol(vs.mangledname);
  491. end
  492. else if (location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  493. begin
  494. if not is_packed_record_or_object(left.resultdef) then
  495. begin
  496. inc(location.reference.offset,vs.fieldoffset);
  497. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset);
  498. end
  499. else if (vs.fieldoffset mod 8 = 0) and
  500. (resultdef.packedbitsize mod 8 = 0) and
  501. { is different in case of e.g. packenum 2 and an enum }
  502. { which fits in 8 bits }
  503. (resultdef.size*8 = resultdef.packedbitsize) then
  504. begin
  505. inc(location.reference.offset,vs.fieldoffset div 8);
  506. location.reference.alignment:=newalignment(location.reference.alignment,vs.fieldoffset div 8);
  507. end
  508. else
  509. begin
  510. sref.ref:=location.reference;
  511. sref.ref.alignment:=1;
  512. sref.bitindexreg:=NR_NO;
  513. inc(sref.ref.offset,vs.fieldoffset div 8);
  514. sref.startbit:=vs.fieldoffset mod 8;
  515. sref.bitlen:=resultdef.packedbitsize;
  516. if (left.location.loc=LOC_REFERENCE) then
  517. location.loc:=LOC_SUBSETREF
  518. else
  519. location.loc:=LOC_CSUBSETREF;
  520. location.sref:=sref;
  521. end;
  522. { also update the size of the location }
  523. location.size:=def_cgsize(resultdef);
  524. end;
  525. paraloc1.done;
  526. end;
  527. {*****************************************************************************
  528. TCGWITHNODE
  529. *****************************************************************************}
  530. procedure tcgwithnode.pass_generate_code;
  531. begin
  532. location_reset(location,LOC_VOID,OS_NO);
  533. if assigned(left) then
  534. secondpass(left);
  535. end;
  536. {*****************************************************************************
  537. TCGVECNODE
  538. *****************************************************************************}
  539. function tcgvecnode.get_mul_size : aint;
  540. begin
  541. if nf_memindex in flags then
  542. get_mul_size:=1
  543. else
  544. begin
  545. if (left.resultdef.typ=arraydef) then
  546. if not is_packed_array(left.resultdef) then
  547. get_mul_size:=tarraydef(left.resultdef).elesize
  548. else
  549. get_mul_size:=tarraydef(left.resultdef).elepackedbitsize
  550. else
  551. get_mul_size:=resultdef.size;
  552. end
  553. end;
  554. { this routine must, like any other routine, not change the contents }
  555. { of base/index registers of references, as these may be regvars. }
  556. { The register allocator can coalesce one LOC_REGISTER being moved }
  557. { into another (as their live ranges won't overlap), but not a }
  558. { LOC_CREGISTER moved into a LOC_(C)REGISTER most of the time (as }
  559. { the live range of the LOC_CREGISTER will most likely overlap the }
  560. { the live range of the target LOC_(C)REGISTER) }
  561. { The passed register may be a LOC_CREGISTER as well. }
  562. procedure tcgvecnode.update_reference_reg_mul(maybe_const_reg:tregister;l:aint);
  563. var
  564. hreg: tregister;
  565. begin
  566. if l<>1 then
  567. begin
  568. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  569. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_ADDR,l,maybe_const_reg,hreg);
  570. maybe_const_reg:=hreg;
  571. end;
  572. if location.reference.base=NR_NO then
  573. location.reference.base:=maybe_const_reg
  574. else if location.reference.index=NR_NO then
  575. location.reference.index:=maybe_const_reg
  576. else
  577. begin
  578. hreg:=cg.getaddressregister(current_asmdata.CurrAsmList);
  579. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,location.reference,hreg);
  580. reference_reset_base(location.reference,hreg,0,location.reference.alignment);
  581. { insert new index register }
  582. location.reference.index:=maybe_const_reg;
  583. end;
  584. { update alignment }
  585. if (location.reference.alignment=0) then
  586. internalerror(2009020704);
  587. location.reference.alignment:=newalignment(location.reference.alignment,l);
  588. end;
  589. { see remarks for tcgvecnode.update_reference_reg_mul above }
  590. procedure tcgvecnode.update_reference_reg_packed(maybe_const_reg:tregister;l:aint);
  591. var
  592. sref: tsubsetreference;
  593. offsetreg, hreg: tregister;
  594. alignpower: aint;
  595. temp : longint;
  596. begin
  597. { only orddefs are bitpacked. Even then we only need special code in }
  598. { case the bitpacked *byte size* is not a power of two, otherwise }
  599. { everything can be handled using the the regular array code. }
  600. if ((l mod 8) = 0) and
  601. (ispowerof2(l div 8,temp) or
  602. not is_ordinal(resultdef)
  603. {$ifndef cpu64bitalu}
  604. or is_64bitint(resultdef)
  605. {$endif not cpu64bitalu}
  606. ) then
  607. begin
  608. update_reference_reg_mul(maybe_const_reg,l div 8);
  609. exit;
  610. end;
  611. if (l > 8*sizeof(aint)) then
  612. internalerror(200608051);
  613. sref.ref := location.reference;
  614. hreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  615. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,tarraydef(left.resultdef).lowrange,maybe_const_reg,hreg);
  616. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_IMUL,OS_INT,l,hreg);
  617. { keep alignment for index }
  618. sref.ref.alignment := left.resultdef.alignment;
  619. if not ispowerof2(sref.ref.alignment,temp) then
  620. internalerror(2006081201);
  621. alignpower:=temp;
  622. offsetreg := cg.getaddressregister(current_asmdata.CurrAsmList);
  623. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SHR,OS_ADDR,3+alignpower,hreg,offsetreg);
  624. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_SHL,OS_ADDR,alignpower,offsetreg);
  625. if (sref.ref.base = NR_NO) then
  626. sref.ref.base := offsetreg
  627. else if (sref.ref.index = NR_NO) then
  628. sref.ref.index := offsetreg
  629. else
  630. begin
  631. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_ADD,OS_ADDR,sref.ref.base,offsetreg);
  632. sref.ref.base := offsetreg;
  633. end;
  634. cg.a_op_const_reg(current_asmdata.CurrAsmList,OP_AND,OS_INT,(1 shl (3+alignpower))-1,hreg);
  635. sref.bitindexreg := hreg;
  636. sref.startbit := 0;
  637. sref.bitlen := resultdef.packedbitsize;
  638. if (left.location.loc = LOC_REFERENCE) then
  639. location.loc := LOC_SUBSETREF
  640. else
  641. location.loc := LOC_CSUBSETREF;
  642. location.sref := sref;
  643. end;
  644. procedure tcgvecnode.second_wideansistring;
  645. begin
  646. end;
  647. procedure tcgvecnode.second_dynamicarray;
  648. begin
  649. end;
  650. procedure tcgvecnode.rangecheck_array;
  651. var
  652. hightree : tnode;
  653. poslabel,
  654. neglabel : tasmlabel;
  655. hreg : tregister;
  656. paraloc1,paraloc2 : tcgpara;
  657. pd : tprocdef;
  658. begin
  659. { omit range checking when this is an array access to a pointer which has been
  660. typecasted from an array }
  661. if (ado_isconvertedpointer in tarraydef(left.resultdef).arrayoptions) then
  662. exit;
  663. paraloc1.init;
  664. paraloc2.init;
  665. if is_open_array(left.resultdef) or
  666. is_array_of_const(left.resultdef) then
  667. begin
  668. { cdecl functions don't have high() so we can not check the range }
  669. { (can't use current_procdef, since it may be a nested procedure) }
  670. if not(tprocdef(tparasymtable(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry).owner).defowner).proccalloption in cdecl_pocalls) then
  671. begin
  672. { Get high value }
  673. hightree:=load_high_value_node(tparavarsym(tloadnode(get_open_const_array(left)).symtableentry));
  674. { it must be available }
  675. if not assigned(hightree) then
  676. internalerror(200212201);
  677. firstpass(hightree);
  678. secondpass(hightree);
  679. { generate compares }
  680. if (right.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  681. hreg:=cg.makeregsize(current_asmdata.CurrAsmList,right.location.register,OS_INT)
  682. else
  683. begin
  684. hreg:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  685. hlcg.a_load_loc_reg(current_asmdata.CurrAsmList,right.resultdef,osuinttype,right.location,hreg);
  686. end;
  687. current_asmdata.getjumplabel(neglabel);
  688. current_asmdata.getjumplabel(poslabel);
  689. cg.a_cmp_const_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_LT,0,hreg,poslabel);
  690. cg.a_cmp_loc_reg_label(current_asmdata.CurrAsmList,OS_INT,OC_BE,hightree.location,hreg,neglabel);
  691. cg.a_label(current_asmdata.CurrAsmList,poslabel);
  692. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_RANGEERROR',false);
  693. cg.a_label(current_asmdata.CurrAsmList,neglabel);
  694. { release hightree }
  695. hightree.free;
  696. end;
  697. end
  698. else
  699. if is_dynamic_array(left.resultdef) then
  700. begin
  701. pd:=search_system_proc('fpc_dynarray_rangecheck');
  702. paramanager.getintparaloc(pd,1,paraloc1);
  703. paramanager.getintparaloc(pd,2,paraloc2);
  704. if pd.is_pushleftright then
  705. begin
  706. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  707. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  708. end
  709. else
  710. begin
  711. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  712. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  713. end;
  714. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  715. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  716. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  717. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_DYNARRAY_RANGECHECK',false);
  718. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  719. end;
  720. { for regular arrays, we don't have to do anything because the index has been
  721. type converted to the index type, which already inserted a range check if
  722. necessary }
  723. paraloc1.done;
  724. paraloc2.done;
  725. end;
  726. procedure tcgvecnode.rangecheck_string;
  727. var
  728. paraloc1,
  729. paraloc2: tcgpara;
  730. helpername: TIDString;
  731. pd: tprocdef;
  732. begin
  733. paraloc1.init;
  734. paraloc2.init;
  735. case tstringdef(left.resultdef).stringtype of
  736. { it's the same for ansi- and wide strings }
  737. st_unicodestring,
  738. st_widestring,
  739. st_ansistring:
  740. begin
  741. helpername:='fpc_'+tstringdef(left.resultdef).stringtypname+'_rangecheck';
  742. pd:=search_system_proc(helpername);
  743. paramanager.getintparaloc(pd,1,paraloc1);
  744. paramanager.getintparaloc(pd,2,paraloc2);
  745. if pd.is_pushleftright then
  746. begin
  747. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  748. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  749. end
  750. else
  751. begin
  752. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,right.location,paraloc2);
  753. cg.a_load_loc_cgpara(current_asmdata.CurrAsmList,left.location,paraloc1);
  754. end;
  755. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc1);
  756. paramanager.freecgpara(current_asmdata.CurrAsmList,paraloc2);
  757. cg.allocallcpuregisters(current_asmdata.CurrAsmList);
  758. cg.a_call_name(current_asmdata.CurrAsmList,helpername,false);
  759. cg.deallocallcpuregisters(current_asmdata.CurrAsmList);
  760. end;
  761. st_shortstring:
  762. begin
  763. {!!!!!!!!!!!!!!!!!}
  764. { if this one is implemented making use of the high parameter for openshortstrings, update ncgutils.do_get_used_regvars() too (JM) }
  765. end;
  766. st_longstring:
  767. begin
  768. {!!!!!!!!!!!!!!!!!}
  769. end;
  770. end;
  771. paraloc1.done;
  772. paraloc2.done;
  773. end;
  774. procedure tcgvecnode.pass_generate_code;
  775. var
  776. offsetdec,
  777. extraoffset : aint;
  778. rightp : pnode;
  779. otl,ofl : tasmlabel;
  780. newsize : tcgsize;
  781. mulsize,
  782. bytemulsize,
  783. alignpow : aint;
  784. isjump : boolean;
  785. paraloc1,
  786. paraloc2 : tcgpara;
  787. subsetref : tsubsetreference;
  788. temp : longint;
  789. begin
  790. paraloc1.init;
  791. paraloc2.init;
  792. mulsize:=get_mul_size;
  793. if not is_packed_array(left.resultdef) then
  794. bytemulsize:=mulsize
  795. else
  796. bytemulsize:=mulsize div 8;
  797. newsize:=def_cgsize(resultdef);
  798. secondpass(left);
  799. if left.location.loc=LOC_CREFERENCE then
  800. location_reset_ref(location,LOC_CREFERENCE,newsize,left.location.reference.alignment)
  801. else
  802. location_reset_ref(location,LOC_REFERENCE,newsize,left.location.reference.alignment);
  803. { an ansistring needs to be dereferenced }
  804. if is_ansistring(left.resultdef) or
  805. is_wide_or_unicode_string(left.resultdef) then
  806. begin
  807. if nf_callunique in flags then
  808. internalerror(200304236);
  809. {DM!!!!!}
  810. case left.location.loc of
  811. LOC_REGISTER,
  812. LOC_CREGISTER :
  813. begin
  814. {$ifdef m68k}
  815. location.reference.base:=cg.getaddressregister(current_asmdata.CurrAsmList);
  816. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_ADDR,OS_ADDR,left.location.register,location.reference.base);
  817. {$else m68k}
  818. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  819. {$endif m68k}
  820. end;
  821. LOC_CREFERENCE,
  822. LOC_REFERENCE :
  823. begin
  824. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  825. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,left.location.reference,location.reference.base);
  826. end;
  827. LOC_CONSTANT:
  828. begin
  829. hlcg.reference_reset_base(location.reference,left.resultdef,NR_NO,left.location.value,location.reference.alignment);
  830. end;
  831. else
  832. internalerror(2002032218);
  833. end;
  834. if is_ansistring(left.resultdef) then
  835. offsetdec:=1
  836. else
  837. offsetdec:=2;
  838. location.reference.alignment:=offsetdec;
  839. { in ansistrings/widestrings S[1] is p<w>char(S)[0] }
  840. if not(cs_zerobasedstrings in current_settings.localswitches) then
  841. dec(location.reference.offset,offsetdec);
  842. end
  843. else if is_dynamic_array(left.resultdef) then
  844. begin
  845. case left.location.loc of
  846. LOC_REGISTER,
  847. LOC_CREGISTER :
  848. hlcg.reference_reset_base(location.reference,left.resultdef,left.location.register,0,location.reference.alignment);
  849. LOC_REFERENCE,
  850. LOC_CREFERENCE :
  851. begin
  852. hlcg.reference_reset_base(location.reference,left.resultdef,hlcg.getaddressregister(current_asmdata.CurrAsmList,left.resultdef),0,location.reference.alignment);
  853. hlcg.a_load_ref_reg(current_asmdata.CurrAsmList,left.resultdef,left.resultdef,
  854. left.location.reference,location.reference.base);
  855. end;
  856. else
  857. internalerror(2002032219);
  858. end;
  859. { a dynarray points to the start of a memory block, which
  860. we assume to be always aligned to a multiple of the
  861. pointer size
  862. }
  863. location.reference.alignment:=voidpointertype.size;
  864. end
  865. else
  866. begin
  867. { may happen in case of function results }
  868. case left.location.loc of
  869. LOC_CREGISTER,
  870. LOC_CMMREGISTER,
  871. LOC_REGISTER,
  872. LOC_MMREGISTER:
  873. hlcg.location_force_mem(current_asmdata.CurrAsmList,left.location,left.resultdef);
  874. end;
  875. location_copy(location,left.location);
  876. end;
  877. { location must be memory }
  878. if not(location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) then
  879. internalerror(200411013);
  880. { offset can only differ from 0 if arraydef }
  881. if (left.resultdef.typ=arraydef) and
  882. not(is_dynamic_array(left.resultdef)) and
  883. (not(is_packed_array(left.resultdef)) or
  884. ((mulsize mod 8 = 0) and
  885. ispowerof2(mulsize div 8,temp)) or
  886. { only orddefs are bitpacked }
  887. not is_ordinal(resultdef)
  888. {$ifndef cpu64bitalu}
  889. or is_64bitint(resultdef)
  890. {$endif not cpu64bitalu}
  891. ) then
  892. dec(location.reference.offset,bytemulsize*tarraydef(left.resultdef).lowrange);
  893. if right.nodetype=ordconstn then
  894. begin
  895. { offset can only differ from 0 if arraydef }
  896. if cs_check_range in current_settings.localswitches then
  897. begin
  898. secondpass(right);
  899. case left.resultdef.typ of
  900. arraydef :
  901. rangecheck_array;
  902. stringdef :
  903. rangecheck_string;
  904. end;
  905. end;
  906. if not(is_packed_array(left.resultdef)) or
  907. ((mulsize mod 8 = 0) and
  908. (ispowerof2(mulsize div 8,temp) or
  909. { only orddefs are bitpacked }
  910. not is_ordinal(resultdef))) then
  911. begin
  912. extraoffset:=bytemulsize*tordconstnode(right).value.svalue;
  913. inc(location.reference.offset,extraoffset);
  914. { adjust alignment after to this change }
  915. location.reference.alignment:=newalignment(location.reference.alignment,extraoffset);
  916. { don't do this for floats etc.; needed to properly set the }
  917. { size for bitpacked arrays (e.g. a bitpacked array of }
  918. { enums who are size 2 but fit in one byte -> in the array }
  919. { they will be one byte and have to be stored like that) }
  920. if is_packed_array(left.resultdef) and
  921. (tcgsize2size[newsize] <> bytemulsize) then
  922. newsize:=int_cgsize(bytemulsize);
  923. end
  924. else
  925. begin
  926. subsetref.ref := location.reference;
  927. subsetref.ref.alignment := left.resultdef.alignment;
  928. if not ispowerof2(subsetref.ref.alignment,temp) then
  929. internalerror(2006081212);
  930. alignpow:=temp;
  931. inc(subsetref.ref.offset,((mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) shr (3+alignpow)) shl alignpow);
  932. subsetref.bitindexreg := NR_NO;
  933. subsetref.startbit := (mulsize * (tordconstnode(right).value.svalue-tarraydef(left.resultdef).lowrange)) and ((1 shl (3+alignpow))-1);
  934. subsetref.bitlen := resultdef.packedbitsize;
  935. if (left.location.loc = LOC_REFERENCE) then
  936. location.loc := LOC_SUBSETREF
  937. else
  938. location.loc := LOC_CSUBSETREF;
  939. location.sref := subsetref;
  940. end;
  941. end
  942. else
  943. { not nodetype=ordconstn }
  944. begin
  945. if (cs_opt_level1 in current_settings.optimizerswitches) and
  946. { if we do range checking, we don't }
  947. { need that fancy code (it would be }
  948. { buggy) }
  949. not(cs_check_range in current_settings.localswitches) and
  950. (left.resultdef.typ=arraydef) and
  951. not is_packed_array(left.resultdef) then
  952. begin
  953. extraoffset:=0;
  954. rightp:=actualtargetnode(@right);
  955. if rightp^.nodetype=addn then
  956. begin
  957. if taddnode(rightp^).right.nodetype=ordconstn then
  958. begin
  959. extraoffset:=tordconstnode(taddnode(rightp^).right).value.svalue;
  960. replacenode(rightp^,taddnode(rightp^).left);
  961. end
  962. else if taddnode(rightp^).left.nodetype=ordconstn then
  963. begin
  964. extraoffset:=tordconstnode(taddnode(rightp^).left).value.svalue;
  965. replacenode(rightp^,taddnode(rightp^).right);
  966. end;
  967. end
  968. else if rightp^.nodetype=subn then
  969. begin
  970. if taddnode(rightp^).right.nodetype=ordconstn then
  971. begin
  972. extraoffset:=-tordconstnode(taddnode(rightp^).right).value.svalue;
  973. replacenode(rightp^,taddnode(rightp^).left);
  974. end;
  975. end;
  976. inc(location.reference.offset,
  977. mulsize*extraoffset);
  978. end;
  979. { calculate from left to right }
  980. if not(location.loc in [LOC_CREFERENCE,LOC_REFERENCE]) then
  981. internalerror(200304237);
  982. isjump:=(right.expectloc=LOC_JUMP);
  983. otl:=nil;
  984. ofl:=nil;
  985. if isjump then
  986. begin
  987. otl:=current_procinfo.CurrTrueLabel;
  988. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  989. ofl:=current_procinfo.CurrFalseLabel;
  990. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  991. end;
  992. secondpass(right);
  993. { if mulsize = 1, we won't have to modify the index }
  994. if not(right.location.loc in [LOC_CREGISTER,LOC_REGISTER]) or (right.location.size<>OS_ADDR) then
  995. hlcg.location_force_reg(current_asmdata.CurrAsmList,right.location,right.resultdef,ptruinttype,true);
  996. if isjump then
  997. begin
  998. current_procinfo.CurrTrueLabel:=otl;
  999. current_procinfo.CurrFalseLabel:=ofl;
  1000. end
  1001. else if (right.location.loc = LOC_JUMP) then
  1002. internalerror(2006010801);
  1003. { produce possible range check code: }
  1004. if cs_check_range in current_settings.localswitches then
  1005. begin
  1006. if left.resultdef.typ=arraydef then
  1007. rangecheck_array
  1008. else if (left.resultdef.typ=stringdef) then
  1009. rangecheck_string;
  1010. end;
  1011. { insert the register and the multiplication factor in the
  1012. reference }
  1013. if not is_packed_array(left.resultdef) then
  1014. update_reference_reg_mul(right.location.register,mulsize)
  1015. else
  1016. update_reference_reg_packed(right.location.register,mulsize);
  1017. end;
  1018. location.size:=newsize;
  1019. paraloc1.done;
  1020. paraloc2.done;
  1021. end;
  1022. begin
  1023. cloadvmtaddrnode:=tcgloadvmtaddrnode;
  1024. cloadparentfpnode:=tcgloadparentfpnode;
  1025. caddrnode:=tcgaddrnode;
  1026. cderefnode:=tcgderefnode;
  1027. csubscriptnode:=tcgsubscriptnode;
  1028. cwithnode:=tcgwithnode;
  1029. cvecnode:=tcgvecnode;
  1030. end.