nppcadd.pas 31 KB

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  1. {
  2. Copyright (c) 2000-2002 by Florian Klaempfl and Jonas Maebe
  3. Code generation for add nodes on the PowerPC
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nppcadd;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,nadd,ncgadd,ngppcadd,cpubase;
  22. type
  23. tppcaddnode = class(tgenppcaddnode)
  24. procedure pass_generate_code;override;
  25. protected
  26. function use_generic_mul32to64: boolean; override;
  27. private
  28. procedure emit_compare(unsigned : boolean); override;
  29. {$ifdef SUPPORT_MMX}
  30. procedure second_addmmx;override;
  31. {$endif SUPPORT_MMX}
  32. procedure second_add64bit;override;
  33. end;
  34. implementation
  35. uses
  36. globtype,systems,
  37. cutils,verbose,globals,
  38. symconst,symdef,paramgr,
  39. aasmbase,aasmtai,aasmdata,aasmcpu,defutil,htypechk,
  40. cgbase,cpuinfo,pass_1,pass_2,regvars,
  41. cpupara,cgcpu,cgutils,procinfo,
  42. ncon,nset,
  43. ncgutil,tgobj,rgobj,rgcpu,cgobj,hlcgobj,cg64f32;
  44. {*****************************************************************************
  45. Pass 1
  46. *****************************************************************************}
  47. function tppcaddnode.use_generic_mul32to64: boolean;
  48. begin
  49. result := false;
  50. end;
  51. {*****************************************************************************
  52. Helpers
  53. *****************************************************************************}
  54. procedure tppcaddnode.emit_compare(unsigned: boolean);
  55. var
  56. op : tasmop;
  57. tmpreg : tregister;
  58. useconst : boolean;
  59. begin
  60. tmpreg:=NR_NO;
  61. // get the constant on the right if there is one
  62. if (left.location.loc = LOC_CONSTANT) then
  63. swapleftright;
  64. // can we use an immediate, or do we have to load the
  65. // constant in a register first?
  66. if (right.location.loc = LOC_CONSTANT) then
  67. begin
  68. {$ifdef dummy}
  69. if (right.location.size in [OS_64,OS_S64]) and (hi(right.location.value64)<>0) and ((hi(right.location.value64)<>$ffffffff) or unsigned) then
  70. internalerror(2002080301);
  71. {$endif extdebug}
  72. if (nodetype in [equaln,unequaln]) then
  73. if (unsigned and
  74. (aword(right.location.value) > high(word))) or
  75. (not unsigned and
  76. (aint(right.location.value) < low(smallint)) or
  77. (aint(right.location.value) > high(smallint))) then
  78. { we can then maybe use a constant in the 'othersigned' case
  79. (the sign doesn't matter for // equal/unequal)}
  80. unsigned := not unsigned;
  81. if (unsigned and
  82. (aword(right.location.value) <= high(word))) or
  83. (not(unsigned) and
  84. (aint(right.location.value) >= low(smallint)) and
  85. (aint(right.location.value) <= high(smallint))) then
  86. useconst := true
  87. else
  88. begin
  89. useconst := false;
  90. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  91. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  92. right.location.value,tmpreg);
  93. end
  94. end
  95. else
  96. useconst := false;
  97. location.loc := LOC_FLAGS;
  98. location.resflags := getresflags;
  99. if not unsigned then
  100. if useconst then
  101. op := A_CMPWI
  102. else
  103. op := A_CMPW
  104. else
  105. if useconst then
  106. op := A_CMPLWI
  107. else
  108. op := A_CMPLW;
  109. if (right.location.loc = LOC_CONSTANT) then
  110. begin
  111. if useconst then
  112. current_asmdata.CurrAsmList.concat(taicpu.op_reg_const(op,left.location.register,longint(right.location.value)))
  113. else
  114. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,left.location.register,tmpreg));
  115. end
  116. else
  117. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,
  118. left.location.register,right.location.register));
  119. end;
  120. {*****************************************************************************
  121. Add64bit
  122. *****************************************************************************}
  123. procedure tppcaddnode.second_add64bit;
  124. var
  125. op : TOpCG;
  126. op1,op2 : TAsmOp;
  127. cmpop,
  128. unsigned : boolean;
  129. procedure emit_cmp64_hi;
  130. var
  131. oldleft, oldright: tlocation;
  132. begin
  133. // put the high part of the location in the low part
  134. location_copy(oldleft,left.location);
  135. location_copy(oldright,right.location);
  136. if left.location.loc = LOC_CONSTANT then
  137. left.location.value64 := left.location.value64 shr 32
  138. else
  139. left.location.register64.reglo := left.location.register64.reghi;
  140. if right.location.loc = LOC_CONSTANT then
  141. right.location.value64 := right.location.value64 shr 32
  142. else
  143. right.location.register64.reglo := right.location.register64.reghi;
  144. // and call the normal emit_compare
  145. emit_compare(unsigned);
  146. location_copy(left.location,oldleft);
  147. location_copy(right.location,oldright);
  148. end;
  149. procedure emit_cmp64_lo;
  150. begin
  151. emit_compare(true);
  152. end;
  153. procedure firstjmp64bitcmp;
  154. var
  155. oldnodetype: tnodetype;
  156. begin
  157. {$ifdef OLDREGVARS}
  158. load_all_regvars(current_asmdata.CurrAsmList);
  159. {$endif OLDREGVARS}
  160. { the jump the sequence is a little bit hairy }
  161. case nodetype of
  162. ltn,gtn:
  163. begin
  164. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrTrueLabel);
  165. { cheat a little bit for the negative test }
  166. toggleflag(nf_swapped);
  167. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrFalseLabel);
  168. toggleflag(nf_swapped);
  169. end;
  170. lten,gten:
  171. begin
  172. oldnodetype:=nodetype;
  173. if nodetype=lten then
  174. nodetype:=ltn
  175. else
  176. nodetype:=gtn;
  177. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrTrueLabel);
  178. { cheat for the negative test }
  179. if nodetype=ltn then
  180. nodetype:=gtn
  181. else
  182. nodetype:=ltn;
  183. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrFalseLabel);
  184. nodetype:=oldnodetype;
  185. end;
  186. equaln:
  187. begin
  188. nodetype := unequaln;
  189. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrFalseLabel);
  190. nodetype := equaln;
  191. end;
  192. unequaln:
  193. begin
  194. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrTrueLabel);
  195. end;
  196. end;
  197. end;
  198. procedure secondjmp64bitcmp;
  199. begin
  200. { the jump the sequence is a little bit hairy }
  201. case nodetype of
  202. ltn,gtn,lten,gten:
  203. begin
  204. { the comparison of the low dword always has }
  205. { to be always unsigned! }
  206. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrTrueLabel);
  207. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  208. end;
  209. equaln:
  210. begin
  211. nodetype := unequaln;
  212. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrFalseLabel);
  213. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  214. nodetype := equaln;
  215. end;
  216. unequaln:
  217. begin
  218. cg.a_jmp_flags(current_asmdata.CurrAsmList,getresflags,current_procinfo.CurrTrueLabel);
  219. cg.a_jmp_always(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  220. end;
  221. end;
  222. end;
  223. var
  224. tempreg64: tregister64;
  225. begin
  226. firstcomplex(self);
  227. pass_left_and_right;
  228. cmpop:=false;
  229. unsigned:=((left.resultdef.typ=orddef) and
  230. (torddef(left.resultdef).ordtype=u64bit)) or
  231. ((right.resultdef.typ=orddef) and
  232. (torddef(right.resultdef).ordtype=u64bit));
  233. case nodetype of
  234. addn :
  235. begin
  236. op:=OP_ADD;
  237. end;
  238. subn :
  239. begin
  240. op:=OP_SUB;
  241. if (nf_swapped in flags) then
  242. swapleftright;
  243. end;
  244. ltn,lten,
  245. gtn,gten,
  246. equaln,unequaln:
  247. begin
  248. op:=OP_NONE;
  249. cmpop:=true;
  250. end;
  251. xorn:
  252. op:=OP_XOR;
  253. orn:
  254. op:=OP_OR;
  255. andn:
  256. op:=OP_AND;
  257. muln:
  258. begin
  259. { should be handled in pass_1 (JM) }
  260. if not(torddef(left.resultdef).ordtype in [U32bit,s32bit]) or
  261. (torddef(left.resultdef).typ <> torddef(right.resultdef).typ) then
  262. internalerror(200109051);
  263. { handled separately }
  264. op := OP_NONE;
  265. end;
  266. else
  267. internalerror(2002072705);
  268. end;
  269. if not cmpop then
  270. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  271. load_left_right(cmpop,((cs_check_overflow in current_settings.localswitches) and
  272. (nodetype in [addn,subn])) or (nodetype = muln));
  273. if (nodetype <> muln) and
  274. (not(cs_check_overflow in current_settings.localswitches) or
  275. not(nodetype in [addn,subn])) then
  276. begin
  277. case nodetype of
  278. ltn,lten,
  279. gtn,gten:
  280. begin
  281. emit_cmp64_hi;
  282. firstjmp64bitcmp;
  283. emit_cmp64_lo;
  284. secondjmp64bitcmp;
  285. end;
  286. equaln,unequaln:
  287. begin
  288. // instead of doing a complicated compare, do
  289. // (left.hi xor right.hi) or (left.lo xor right.lo)
  290. // (somewhate optimized so that no superfluous 'mr's are
  291. // generated)
  292. if (left.location.loc = LOC_CONSTANT) then
  293. swapleftright;
  294. if (right.location.loc = LOC_CONSTANT) then
  295. begin
  296. if left.location.loc = LOC_REGISTER then
  297. begin
  298. tempreg64.reglo := left.location.register64.reglo;
  299. tempreg64.reghi := left.location.register64.reghi;
  300. end
  301. else
  302. begin
  303. if (aint(right.location.value64) <> 0) then
  304. tempreg64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_32)
  305. else
  306. tempreg64.reglo := left.location.register64.reglo;
  307. if ((right.location.value64 shr 32) <> 0) then
  308. tempreg64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_32)
  309. else
  310. tempreg64.reghi := left.location.register64.reghi;
  311. end;
  312. if (aint(right.location.value64) <> 0) then
  313. { negative values can be handled using SUB, }
  314. { positive values < 65535 using XOR. }
  315. if (longint(right.location.value64) >= -32767) and
  316. (longint(right.location.value64) < 0) then
  317. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,
  318. aint(right.location.value64),
  319. left.location.register64.reglo,tempreg64.reglo)
  320. else
  321. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_INT,
  322. aint(right.location.value64),
  323. left.location.register64.reglo,tempreg64.reglo);
  324. if ((right.location.value64 shr 32) <> 0) then
  325. if (longint(right.location.value64 shr 32) >= -32767) and
  326. (longint(right.location.value64 shr 32) < 0) then
  327. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,
  328. aint(right.location.value64 shr 32),
  329. left.location.register64.reghi,tempreg64.reghi)
  330. else
  331. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_XOR,OS_INT,
  332. aint(right.location.value64 shr 32),
  333. left.location.register64.reghi,tempreg64.reghi);
  334. end
  335. else
  336. begin
  337. tempreg64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  338. tempreg64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  339. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,OP_XOR,location.size,
  340. left.location.register64,right.location.register64,
  341. tempreg64);
  342. end;
  343. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_R0);
  344. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_OR_,NR_R0,
  345. tempreg64.reglo,tempreg64.reghi));
  346. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_R0);
  347. location_reset(location,LOC_FLAGS,OS_NO);
  348. location.resflags := getresflags;
  349. end;
  350. xorn,orn,andn,addn:
  351. begin
  352. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  353. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  354. if (left.location.loc = LOC_CONSTANT) then
  355. swapleftright;
  356. if (right.location.loc = LOC_CONSTANT) then
  357. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.value64,
  358. left.location.register64,location.register64)
  359. else
  360. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,op,location.size,right.location.register64,
  361. left.location.register64,location.register64);
  362. end;
  363. subn:
  364. begin
  365. location.register64.reglo := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  366. location.register64.reghi := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  367. if left.location.loc <> LOC_CONSTANT then
  368. begin
  369. if right.location.loc <> LOC_CONSTANT then
  370. // reg64 - reg64
  371. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,location.size,
  372. right.location.register64,left.location.register64,
  373. location.register64)
  374. else
  375. // reg64 - const64
  376. cg64.a_op64_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,location.size,
  377. right.location.value64,left.location.register64,
  378. location.register64)
  379. end
  380. else if ((left.location.value64 shr 32) = 0) then
  381. begin
  382. if (int64(left.location.value64) >= low(smallint)) and
  383. (int64(left.location.value64) <= high(smallint)) then
  384. begin
  385. // consts16 - reg64
  386. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SUBFIC,
  387. location.register64.reglo,right.location.register64.reglo,
  388. left.location.value));
  389. end
  390. else
  391. begin
  392. // const32 - reg64
  393. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
  394. left.resultdef,u32inttype,true);
  395. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBC,
  396. location.register64.reglo,left.location.register64.reglo,
  397. right.location.register64.reglo));
  398. end;
  399. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SUBFZE,
  400. location.register64.reghi,right.location.register64.reghi));
  401. end
  402. else if (aint(left.location.value64) = 0) then
  403. begin
  404. // (const32 shl 32) - reg64
  405. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SUBFIC,
  406. location.register64.reglo,right.location.register64.reglo,0));
  407. left.location.value64 := left.location.value64 shr 32;
  408. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,u32inttype,true);
  409. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBFE,
  410. location.register64.reghi,right.location.register64.reghi,
  411. left.location.register));
  412. end
  413. else
  414. begin
  415. // const64 - reg64
  416. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,
  417. left.resultdef,left.resultdef,false);
  418. cg64.a_op64_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,location.size,
  419. right.location.register64,left.location.register64,
  420. location.register64);
  421. end;
  422. end;
  423. else
  424. internalerror(2002072803);
  425. end;
  426. end
  427. else
  428. begin
  429. if is_signed(resultdef) then
  430. begin
  431. case nodetype of
  432. addn:
  433. begin
  434. op1 := A_ADDC;
  435. op2 := A_ADDEO;
  436. end;
  437. subn:
  438. begin
  439. op1 := A_SUBC;
  440. op2 := A_SUBFEO;
  441. end;
  442. muln:
  443. begin
  444. op1 := A_MULLW;
  445. op2 := A_MULHW
  446. end;
  447. else
  448. internalerror(2002072806);
  449. end
  450. end
  451. else
  452. begin
  453. case nodetype of
  454. addn:
  455. begin
  456. op1 := A_ADDC;
  457. op2 := A_ADDE;
  458. end;
  459. subn:
  460. begin
  461. op1 := A_SUBC;
  462. op2 := A_SUBFE;
  463. end;
  464. muln:
  465. begin
  466. op1 := A_MULLW;
  467. op2 := A_MULHWU
  468. end;
  469. else
  470. internalerror(2014082040);
  471. end;
  472. end;
  473. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op1,location.register64.reglo,
  474. left.location.register64.reglo,right.location.register64.reglo));
  475. if (nodetype <> muln) then
  476. begin
  477. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op2,location.register64.reghi,
  478. right.location.register64.reghi,left.location.register64.reghi));
  479. if not(is_signed(resultdef)) then
  480. if nodetype = addn then
  481. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,location.register64.reghi,left.location.register64.reghi))
  482. else
  483. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,left.location.register64.reghi,location.register64.reghi));
  484. cg.g_overflowcheck(current_asmdata.CurrAsmList,location,resultdef);
  485. end
  486. else
  487. begin
  488. { 32 * 32 -> 64 cannot overflow }
  489. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op2,location.register64.reghi,
  490. left.location.register64.reglo,right.location.register64.reglo));
  491. end
  492. end;
  493. { set result location }
  494. { (emit_compare sets it to LOC_FLAGS for compares, so set the }
  495. { real location only now) (JM) }
  496. if cmpop and
  497. not(nodetype in [equaln,unequaln]) then
  498. location_reset(location,LOC_JUMP,OS_NO);
  499. end;
  500. {*****************************************************************************
  501. pass_2
  502. *****************************************************************************}
  503. procedure tppcaddnode.pass_generate_code;
  504. { is also being used for xor, and "mul", "sub, or and comparative }
  505. { operators }
  506. var
  507. cgop : topcg;
  508. op : tasmop;
  509. tmpreg : tregister;
  510. hl : tasmlabel;
  511. cmpop : boolean;
  512. { true, if unsigned types are compared }
  513. unsigned : boolean;
  514. checkoverflow : boolean;
  515. begin
  516. { to make it more readable, string and set (not smallset!) have their
  517. own procedures }
  518. case left.resultdef.typ of
  519. orddef :
  520. begin
  521. { handling boolean expressions }
  522. if is_boolean(left.resultdef) and
  523. is_boolean(right.resultdef) then
  524. begin
  525. second_addboolean;
  526. exit;
  527. end
  528. { 64bit operations }
  529. else if is_64bit(resultdef) or
  530. is_64bit(left.resultdef) then
  531. begin
  532. second_add64bit;
  533. exit;
  534. end;
  535. end;
  536. stringdef :
  537. begin
  538. internalerror(2002072402);
  539. exit;
  540. end;
  541. setdef :
  542. begin
  543. { normalsets are already handled in pass1 }
  544. if not is_smallset(left.resultdef) then
  545. internalerror(200109042);
  546. second_addsmallset;
  547. exit;
  548. end;
  549. arraydef :
  550. begin
  551. {$ifdef SUPPORT_MMX}
  552. if is_mmx_able_array(left.resultdef) then
  553. begin
  554. second_addmmx;
  555. exit;
  556. end;
  557. {$endif SUPPORT_MMX}
  558. end;
  559. floatdef :
  560. begin
  561. second_addfloat;
  562. exit;
  563. end;
  564. end;
  565. { defaults }
  566. cmpop:=nodetype in [ltn,lten,gtn,gten,equaln,unequaln];
  567. unsigned:=not(is_signed(left.resultdef)) or
  568. not(is_signed(right.resultdef));
  569. pass_left_and_right;
  570. { Convert flags to register first }
  571. { can any of these things be in the flags actually?? (JM) }
  572. if (left.location.loc = LOC_FLAGS) or
  573. (right.location.loc = LOC_FLAGS) then
  574. internalerror(2002072602);
  575. { set result location }
  576. if not cmpop then
  577. location_reset(location,LOC_REGISTER,def_cgsize(resultdef))
  578. else
  579. location_reset(location,LOC_FLAGS,OS_NO);
  580. checkoverflow:=
  581. (nodetype in [addn,subn,muln]) and
  582. (cs_check_overflow in current_settings.localswitches) and
  583. (left.resultdef.typ<>pointerdef) and
  584. (right.resultdef.typ<>pointerdef);
  585. load_left_right(cmpop, checkoverflow);
  586. if not(cmpop) then
  587. location.register := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  588. if not(checkoverflow) then
  589. begin
  590. case nodetype of
  591. addn, muln, xorn, orn, andn:
  592. begin
  593. case nodetype of
  594. addn:
  595. cgop := OP_ADD;
  596. muln:
  597. if unsigned then
  598. cgop := OP_MUL
  599. else
  600. cgop := OP_IMUL;
  601. xorn:
  602. cgop := OP_XOR;
  603. orn:
  604. cgop := OP_OR;
  605. andn:
  606. cgop := OP_AND;
  607. else
  608. internalerror(2014082041);
  609. end;
  610. if (left.location.loc = LOC_CONSTANT) then
  611. swapleftright;
  612. if (right.location.loc <> LOC_CONSTANT) then
  613. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  614. left.location.register,right.location.register,
  615. location.register)
  616. else
  617. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,cgop,OS_INT,
  618. right.location.value,left.location.register,
  619. location.register);
  620. end;
  621. subn:
  622. begin
  623. if (nf_swapped in flags) then
  624. swapleftright;
  625. if left.location.loc <> LOC_CONSTANT then
  626. if right.location.loc <> LOC_CONSTANT then
  627. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,
  628. right.location.register,left.location.register,
  629. location.register)
  630. else
  631. cg.a_op_const_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,
  632. right.location.value,left.location.register,
  633. location.register)
  634. else
  635. if (longint(left.location.value) >= low(smallint)) and
  636. (longint(left.location.value) <= high(smallint)) then
  637. begin
  638. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_const(A_SUBFIC,
  639. location.register,right.location.register,
  640. longint(left.location.value)));
  641. end
  642. else
  643. begin
  644. tmpreg := cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  645. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,
  646. left.location.value,tmpreg);
  647. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_SUB,OS_INT,
  648. right.location.register,tmpreg,location.register);
  649. end;
  650. end;
  651. ltn,lten,gtn,gten,equaln,unequaln :
  652. begin
  653. emit_compare(unsigned);
  654. end;
  655. end;
  656. end
  657. else
  658. // overflow checking is on and we have an addn, subn or muln
  659. begin
  660. if is_signed(resultdef) then
  661. begin
  662. case nodetype of
  663. addn:
  664. op := A_ADDO;
  665. subn:
  666. begin
  667. op := A_SUBO;
  668. if (nf_swapped in flags) then
  669. swapleftright;
  670. end;
  671. muln:
  672. op := A_MULLWO;
  673. else
  674. internalerror(2002072601);
  675. end;
  676. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(op,location.register,
  677. left.location.register,right.location.register));
  678. cg.g_overflowcheck(current_asmdata.CurrAsmList,location,resultdef);
  679. end
  680. else
  681. begin
  682. case nodetype of
  683. addn:
  684. begin
  685. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ADD,location.register,
  686. left.location.register,right.location.register));
  687. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,location.register,left.location.register));
  688. cg.g_overflowcheck(current_asmdata.CurrAsmList,location,resultdef);
  689. end;
  690. subn:
  691. begin
  692. if nf_swapped in flags then
  693. swapleftright;
  694. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUB,location.register,
  695. left.location.register,right.location.register));
  696. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CMPLW,left.location.register,location.register));
  697. cg.g_overflowcheck(current_asmdata.CurrAsmList,location,resultdef);
  698. end;
  699. muln:
  700. begin
  701. { calculate the upper 32 bits of the product, = 0 if no overflow }
  702. cg.a_reg_alloc(current_asmdata.CurrAsmList,NR_R0);
  703. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_MULHWU_,NR_R0,
  704. left.location.register,right.location.register));
  705. cg.a_reg_dealloc(current_asmdata.CurrAsmList,NR_R0);
  706. { calculate the real result }
  707. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_MULLW,location.register,
  708. left.location.register,right.location.register));
  709. { g_overflowcheck generates a OC_AE instead of OC_EQ :/ }
  710. current_asmdata.getjumplabel(hl);
  711. tcgppc(cg).a_jmp_cond(current_asmdata.CurrAsmList,OC_EQ,hl);
  712. cg.a_call_name(current_asmdata.CurrAsmList,'FPC_OVERFLOW',false);
  713. cg.a_label(current_asmdata.CurrAsmList,hl);
  714. end;
  715. end;
  716. end;
  717. end;
  718. end;
  719. begin
  720. caddnode:=tppcaddnode;
  721. end.