nx86inl.pas 35 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate x86 inline nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. unit nx86inl;
  18. {$i fpcdefs.inc}
  19. interface
  20. uses
  21. node,ninl,ncginl;
  22. type
  23. tx86inlinenode = class(tcginlinenode)
  24. { first pass override
  25. so that the code generator will actually generate
  26. these nodes.
  27. }
  28. function first_pi: tnode ; override;
  29. function first_arctan_real: tnode; override;
  30. function first_abs_real: tnode; override;
  31. function first_sqr_real: tnode; override;
  32. function first_sqrt_real: tnode; override;
  33. function first_ln_real: tnode; override;
  34. function first_cos_real: tnode; override;
  35. function first_sin_real: tnode; override;
  36. function first_round_real: tnode; override;
  37. function first_trunc_real: tnode; override;
  38. function first_popcnt: tnode; override;
  39. function first_fma: tnode; override;
  40. { second pass override to generate these nodes }
  41. procedure second_IncludeExclude;override;
  42. procedure second_pi; override;
  43. procedure second_arctan_real; override;
  44. procedure second_abs_real; override;
  45. procedure second_round_real; override;
  46. procedure second_sqr_real; override;
  47. procedure second_sqrt_real; override;
  48. procedure second_ln_real; override;
  49. procedure second_cos_real; override;
  50. procedure second_sin_real; override;
  51. procedure second_trunc_real; override;
  52. procedure second_prefetch;override;
  53. {$ifndef i8086}
  54. procedure second_abs_long;override;
  55. {$endif not i8086}
  56. procedure second_popcnt;override;
  57. procedure second_fma;override;
  58. private
  59. procedure load_fpu_location(lnode: tnode);
  60. end;
  61. implementation
  62. uses
  63. systems,
  64. globtype,globals,
  65. cutils,verbose,
  66. symconst,
  67. defutil,
  68. aasmbase,aasmtai,aasmdata,aasmcpu,
  69. symtype,symdef,symcpu,
  70. cgbase,pass_2,
  71. cpuinfo,cpubase,paramgr,
  72. nbas,ncon,ncal,ncnv,nld,ncgutil,
  73. tgobj,
  74. cga,cgutils,cgx86,cgobj,hlcgobj;
  75. {*****************************************************************************
  76. TX86INLINENODE
  77. *****************************************************************************}
  78. function tx86inlinenode.first_pi : tnode;
  79. begin
  80. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  81. begin
  82. expectloc:=LOC_FPUREGISTER;
  83. first_pi := nil;
  84. end
  85. else
  86. result:=inherited;
  87. end;
  88. function tx86inlinenode.first_arctan_real : tnode;
  89. begin
  90. {$ifdef i8086}
  91. { FPATAN's range is limited to (0 <= value < 1) on the 8087 and 80287,
  92. so we need to use the RTL helper on these FPUs }
  93. if current_settings.cputype < cpu_386 then
  94. begin
  95. result := inherited;
  96. exit;
  97. end;
  98. {$endif i8086}
  99. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  100. begin
  101. expectloc:=LOC_FPUREGISTER;
  102. first_arctan_real := nil;
  103. end
  104. else
  105. result:=inherited;
  106. end;
  107. function tx86inlinenode.first_abs_real : tnode;
  108. begin
  109. if use_vectorfpu(resultdef) then
  110. expectloc:=LOC_MMREGISTER
  111. else
  112. expectloc:=LOC_FPUREGISTER;
  113. first_abs_real := nil;
  114. end;
  115. function tx86inlinenode.first_sqr_real : tnode;
  116. begin
  117. if use_vectorfpu(resultdef) then
  118. expectloc:=LOC_MMREGISTER
  119. else
  120. expectloc:=LOC_FPUREGISTER;
  121. first_sqr_real := nil;
  122. end;
  123. function tx86inlinenode.first_sqrt_real : tnode;
  124. begin
  125. if use_vectorfpu(resultdef) then
  126. expectloc:=LOC_MMREGISTER
  127. else
  128. expectloc:=LOC_FPUREGISTER;
  129. first_sqrt_real := nil;
  130. end;
  131. function tx86inlinenode.first_ln_real : tnode;
  132. begin
  133. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  134. begin
  135. expectloc:=LOC_FPUREGISTER;
  136. first_ln_real := nil;
  137. end
  138. else
  139. result:=inherited;
  140. end;
  141. function tx86inlinenode.first_cos_real : tnode;
  142. begin
  143. {$ifdef i8086}
  144. { FCOS is 387+ }
  145. if current_settings.cputype < cpu_386 then
  146. begin
  147. result := inherited;
  148. exit;
  149. end;
  150. {$endif i8086}
  151. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  152. begin
  153. expectloc:=LOC_FPUREGISTER;
  154. result:=nil;
  155. end
  156. else
  157. result:=inherited;
  158. end;
  159. function tx86inlinenode.first_sin_real : tnode;
  160. begin
  161. {$ifdef i8086}
  162. { FSIN is 387+ }
  163. if current_settings.cputype < cpu_386 then
  164. begin
  165. result := inherited;
  166. exit;
  167. end;
  168. {$endif i8086}
  169. if (tfloatdef(pbestrealtype^).floattype=s80real) then
  170. begin
  171. expectloc:=LOC_FPUREGISTER;
  172. result:=nil;
  173. end
  174. else
  175. result:=inherited;
  176. end;
  177. function tx86inlinenode.first_round_real : tnode;
  178. begin
  179. {$ifdef x86_64}
  180. if use_vectorfpu(left.resultdef) then
  181. expectloc:=LOC_REGISTER
  182. else
  183. {$endif x86_64}
  184. expectloc:=LOC_REFERENCE;
  185. result:=nil;
  186. end;
  187. function tx86inlinenode.first_trunc_real: tnode;
  188. begin
  189. if (cs_opt_size in current_settings.optimizerswitches)
  190. {$ifdef x86_64}
  191. and not(use_vectorfpu(left.resultdef))
  192. {$endif x86_64}
  193. then
  194. result:=inherited
  195. else
  196. begin
  197. {$ifdef x86_64}
  198. if use_vectorfpu(left.resultdef) then
  199. expectloc:=LOC_REGISTER
  200. else
  201. {$endif x86_64}
  202. expectloc:=LOC_REFERENCE;
  203. result:=nil;
  204. end;
  205. end;
  206. function tx86inlinenode.first_popcnt: tnode;
  207. begin
  208. Result:=nil;
  209. {$ifndef i8086}
  210. if (CPUX86_HAS_POPCNT in cpu_capabilities[current_settings.cputype])
  211. {$ifdef i386}
  212. and not is_64bit(left.resultdef)
  213. {$endif i386}
  214. then
  215. expectloc:=LOC_REGISTER
  216. else
  217. {$endif not i8086}
  218. Result:=inherited first_popcnt
  219. end;
  220. function tx86inlinenode.first_fma : tnode;
  221. begin
  222. {$ifndef i8086}
  223. if ((cpu_capabilities[current_settings.cputype]*[CPUX86_HAS_FMA,CPUX86_HAS_FMA4])<>[]) and
  224. ((is_double(resultdef)) or (is_single(resultdef))) then
  225. begin
  226. expectloc:=LOC_MMREGISTER;
  227. Result:=nil;
  228. end
  229. else
  230. {$endif i8086}
  231. Result:=inherited first_fma;
  232. end;
  233. procedure tx86inlinenode.second_pi;
  234. begin
  235. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  236. emit_none(A_FLDPI,S_NO);
  237. tcgx86(cg).inc_fpu_stack;
  238. location.register:=NR_FPU_RESULT_REG;
  239. end;
  240. { load the FPU into the an fpu register }
  241. procedure tx86inlinenode.load_fpu_location(lnode: tnode);
  242. begin
  243. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  244. location.register:=NR_FPU_RESULT_REG;
  245. secondpass(lnode);
  246. case lnode.location.loc of
  247. LOC_FPUREGISTER:
  248. ;
  249. LOC_CFPUREGISTER:
  250. begin
  251. cg.a_loadfpu_reg_reg(current_asmdata.CurrAsmList,lnode.location.size,
  252. lnode.location.size,lnode.location.register,location.register);
  253. end;
  254. LOC_REFERENCE,LOC_CREFERENCE:
  255. begin
  256. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,
  257. lnode.location.size,lnode.location.size,
  258. lnode.location.reference,location.register);
  259. end;
  260. LOC_MMREGISTER,LOC_CMMREGISTER:
  261. begin
  262. location:=lnode.location;
  263. hlcg.location_force_fpureg(current_asmdata.CurrAsmList,location,resultdef,false);
  264. end;
  265. else
  266. internalerror(309991);
  267. end;
  268. end;
  269. procedure tx86inlinenode.second_arctan_real;
  270. begin
  271. load_fpu_location(left);
  272. emit_none(A_FLD1,S_NO);
  273. emit_none(A_FPATAN,S_NO);
  274. end;
  275. procedure tx86inlinenode.second_abs_real;
  276. var
  277. href : treference;
  278. begin
  279. if use_vectorfpu(resultdef) then
  280. begin
  281. secondpass(left);
  282. if left.location.loc<>LOC_MMREGISTER then
  283. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  284. if UseAVX then
  285. begin
  286. location_reset(location,LOC_MMREGISTER,def_cgsize(resultdef));
  287. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,def_cgsize(resultdef));
  288. end
  289. else
  290. location:=left.location;
  291. case tfloatdef(resultdef).floattype of
  292. s32real:
  293. begin
  294. reference_reset_symbol(href,current_asmdata.RefAsmSymbol(target_info.cprefix+'FPC_ABSMASK_SINGLE'),0,4);
  295. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList, href);
  296. if UseAVX then
  297. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(
  298. A_VANDPS,S_XMM,href,left.location.register,location.register))
  299. else
  300. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPS,S_XMM,href,location.register));
  301. end;
  302. s64real:
  303. begin
  304. reference_reset_symbol(href,current_asmdata.RefAsmSymbol(target_info.cprefix+'FPC_ABSMASK_DOUBLE'),0,4);
  305. tcgx86(cg).make_simple_ref(current_asmdata.CurrAsmList, href);
  306. if UseAVX then
  307. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg_reg(
  308. A_VANDPD,S_XMM,href,left.location.register,location.register))
  309. else
  310. current_asmdata.CurrAsmList.concat(taicpu.op_ref_reg(A_ANDPD,S_XMM,href,location.register))
  311. end;
  312. else
  313. internalerror(200506081);
  314. end;
  315. end
  316. else
  317. begin
  318. load_fpu_location(left);
  319. emit_none(A_FABS,S_NO);
  320. end;
  321. end;
  322. procedure tx86inlinenode.second_round_real;
  323. begin
  324. {$ifdef x86_64}
  325. if use_vectorfpu(left.resultdef) then
  326. begin
  327. secondpass(left);
  328. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  329. location_reset(location,LOC_REGISTER,OS_S64);
  330. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  331. if UseAVX then
  332. case left.location.size of
  333. OS_F32:
  334. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTSS2SI,S_Q,left.location.register,location.register));
  335. OS_F64:
  336. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTSD2SI,S_Q,left.location.register,location.register));
  337. else
  338. internalerror(2007031402);
  339. end
  340. else
  341. case left.location.size of
  342. OS_F32:
  343. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSS2SI,S_Q,left.location.register,location.register));
  344. OS_F64:
  345. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTSD2SI,S_Q,left.location.register,location.register));
  346. else
  347. internalerror(2007031402);
  348. end;
  349. end
  350. else
  351. {$endif x86_64}
  352. begin
  353. load_fpu_location(left);
  354. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  355. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  356. emit_ref(A_FISTP,S_IQ,location.reference);
  357. tcgx86(cg).dec_fpu_stack;
  358. emit_none(A_FWAIT,S_NO);
  359. end;
  360. end;
  361. procedure tx86inlinenode.second_trunc_real;
  362. var
  363. oldcw,newcw : treference;
  364. begin
  365. {$ifdef x86_64}
  366. if use_vectorfpu(left.resultdef) and
  367. not((left.location.loc=LOC_FPUREGISTER) and (current_settings.fputype>=fpu_sse3)) then
  368. begin
  369. secondpass(left);
  370. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,false);
  371. location_reset(location,LOC_REGISTER,OS_S64);
  372. location.register:=cg.getintregister(current_asmdata.CurrAsmList,OS_S64);
  373. if UseAVX then
  374. case left.location.size of
  375. OS_F32:
  376. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTTSS2SI,S_Q,left.location.register,location.register));
  377. OS_F64:
  378. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_VCVTTSD2SI,S_Q,left.location.register,location.register));
  379. else
  380. internalerror(2007031401);
  381. end
  382. else
  383. case left.location.size of
  384. OS_F32:
  385. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSS2SI,S_Q,left.location.register,location.register));
  386. OS_F64:
  387. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_CVTTSD2SI,S_Q,left.location.register,location.register));
  388. else
  389. internalerror(2007031401);
  390. end;
  391. end
  392. else
  393. {$endif x86_64}
  394. begin
  395. if (current_settings.fputype>=fpu_sse3) then
  396. begin
  397. load_fpu_location(left);
  398. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  399. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  400. emit_ref(A_FISTTP,S_IQ,location.reference);
  401. tcgx86(cg).dec_fpu_stack;
  402. end
  403. else
  404. begin
  405. tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,oldcw);
  406. tg.GetTemp(current_asmdata.CurrAsmList,2,2,tt_normal,newcw);
  407. {$ifdef i8086}
  408. if current_settings.cputype<=cpu_286 then
  409. begin
  410. emit_ref(A_FSTCW,S_NO,newcw);
  411. emit_ref(A_FSTCW,S_NO,oldcw);
  412. emit_none(A_FWAIT,S_NO);
  413. end
  414. else
  415. {$endif i8086}
  416. begin
  417. emit_ref(A_FNSTCW,S_NO,newcw);
  418. emit_ref(A_FNSTCW,S_NO,oldcw);
  419. end;
  420. emit_const_ref(A_OR,S_W,$0f00,newcw);
  421. load_fpu_location(left);
  422. emit_ref(A_FLDCW,S_NO,newcw);
  423. location_reset_ref(location,LOC_REFERENCE,OS_S64,0);
  424. tg.GetTemp(current_asmdata.CurrAsmList,resultdef.size,resultdef.alignment,tt_normal,location.reference);
  425. emit_ref(A_FISTP,S_IQ,location.reference);
  426. tcgx86(cg).dec_fpu_stack;
  427. emit_ref(A_FLDCW,S_NO,oldcw);
  428. emit_none(A_FWAIT,S_NO);
  429. tg.UnGetTemp(current_asmdata.CurrAsmList,oldcw);
  430. tg.UnGetTemp(current_asmdata.CurrAsmList,newcw);
  431. end;
  432. end;
  433. end;
  434. procedure tx86inlinenode.second_sqr_real;
  435. begin
  436. if use_vectorfpu(resultdef) then
  437. begin
  438. secondpass(left);
  439. location_reset(location,LOC_MMREGISTER,left.location.size);
  440. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  441. if UseAVX then
  442. begin
  443. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  444. cg.a_opmm_reg_reg_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,left.location.register,left.location.register,location.register,mms_movescalar);
  445. end
  446. else
  447. begin
  448. if left.location.loc in [LOC_CFPUREGISTER,LOC_FPUREGISTER] then
  449. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  450. cg.a_loadmm_loc_reg(current_asmdata.CurrAsmList,location.size,left.location,location.register,mms_movescalar);
  451. cg.a_opmm_reg_reg(current_asmdata.CurrAsmList,OP_MUL,left.location.size,location.register,location.register,mms_movescalar);
  452. end;
  453. end
  454. else
  455. begin
  456. load_fpu_location(left);
  457. emit_reg_reg(A_FMUL,S_NO,NR_ST0,NR_ST0);
  458. end;
  459. end;
  460. procedure tx86inlinenode.second_sqrt_real;
  461. begin
  462. if use_vectorfpu(resultdef) then
  463. begin
  464. secondpass(left);
  465. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,left.location,left.resultdef,true);
  466. location_reset(location,LOC_MMREGISTER,left.location.size);
  467. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  468. if UseAVX then
  469. case tfloatdef(resultdef).floattype of
  470. s32real:
  471. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_VSQRTSS,S_XMM,left.location.register,location.register,location.register));
  472. s64real:
  473. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_VSQRTSD,S_XMM,left.location.register,location.register,location.register));
  474. else
  475. internalerror(200510031);
  476. end
  477. else
  478. case tfloatdef(resultdef).floattype of
  479. s32real:
  480. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSS,S_XMM,left.location.register,location.register));
  481. s64real:
  482. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_SQRTSD,S_XMM,left.location.register,location.register));
  483. else
  484. internalerror(200510031);
  485. end;
  486. end
  487. else
  488. begin
  489. load_fpu_location(left);
  490. emit_none(A_FSQRT,S_NO);
  491. end;
  492. end;
  493. procedure tx86inlinenode.second_ln_real;
  494. begin
  495. load_fpu_location(left);
  496. emit_none(A_FLDLN2,S_NO);
  497. emit_none(A_FXCH,S_NO);
  498. emit_none(A_FYL2X,S_NO);
  499. end;
  500. procedure tx86inlinenode.second_cos_real;
  501. begin
  502. {$ifdef i8086}
  503. { FCOS is 387+ }
  504. if current_settings.cputype < cpu_386 then
  505. begin
  506. inherited;
  507. exit;
  508. end;
  509. {$endif i8086}
  510. load_fpu_location(left);
  511. emit_none(A_FCOS,S_NO);
  512. end;
  513. procedure tx86inlinenode.second_sin_real;
  514. begin
  515. {$ifdef i8086}
  516. { FSIN is 387+ }
  517. if current_settings.cputype < cpu_386 then
  518. begin
  519. inherited;
  520. exit;
  521. end;
  522. {$endif i8086}
  523. load_fpu_location(left);
  524. emit_none(A_FSIN,S_NO)
  525. end;
  526. procedure tx86inlinenode.second_prefetch;
  527. var
  528. ref : treference;
  529. r : tregister;
  530. begin
  531. {$if defined(i386) or defined(i8086)}
  532. if current_settings.cputype>=cpu_Pentium3 then
  533. {$endif i386 or i8086}
  534. begin
  535. secondpass(left);
  536. case left.location.loc of
  537. LOC_CREFERENCE,
  538. LOC_REFERENCE:
  539. begin
  540. r:=cg.getintregister(current_asmdata.CurrAsmList,OS_ADDR);
  541. cg.a_loadaddr_ref_reg(current_asmdata.CurrAsmList,left.location.reference,r);
  542. reference_reset_base(ref,r,0,left.location.reference.alignment);
  543. current_asmdata.CurrAsmList.concat(taicpu.op_ref(A_PREFETCHNTA,S_NO,ref));
  544. end;
  545. else
  546. internalerror(200402021);
  547. end;
  548. end;
  549. end;
  550. {$ifndef i8086}
  551. procedure tx86inlinenode.second_abs_long;
  552. var
  553. hregister : tregister;
  554. opsize : tcgsize;
  555. hp : taicpu;
  556. begin
  557. {$ifdef i386}
  558. if current_settings.cputype<cpu_Pentium2 then
  559. begin
  560. opsize:=def_cgsize(left.resultdef);
  561. secondpass(left);
  562. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,false);
  563. location:=left.location;
  564. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  565. emit_reg_reg(A_MOV,S_L,left.location.register,location.register);
  566. emit_const_reg(A_SAR,tcgsize2opsize[opsize],31,left.location.register);
  567. emit_reg_reg(A_XOR,S_L,left.location.register,location.register);
  568. emit_reg_reg(A_SUB,S_L,left.location.register,location.register);
  569. end
  570. else
  571. {$endif i386}
  572. begin
  573. opsize:=def_cgsize(left.resultdef);
  574. secondpass(left);
  575. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,left.resultdef,true);
  576. hregister:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  577. location:=left.location;
  578. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  579. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hregister);
  580. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,location.register);
  581. emit_reg(A_NEG,tcgsize2opsize[opsize],hregister);
  582. hp:=taicpu.op_reg_reg(A_CMOVcc,tcgsize2opsize[opsize],hregister,location.register);
  583. hp.condition:=C_NS;
  584. current_asmdata.CurrAsmList.concat(hp);
  585. end;
  586. end;
  587. {$endif not i8086}
  588. {*****************************************************************************
  589. INCLUDE/EXCLUDE GENERIC HANDLING
  590. *****************************************************************************}
  591. procedure tx86inlinenode.second_IncludeExclude;
  592. var
  593. hregister,
  594. hregister2: tregister;
  595. setbase : aint;
  596. bitsperop,l : longint;
  597. cgop : topcg;
  598. asmop : tasmop;
  599. opdef : tdef;
  600. opsize,
  601. orgsize: tcgsize;
  602. begin
  603. {$ifdef i8086}
  604. { BTS and BTR are 386+ }
  605. if current_settings.cputype < cpu_386 then
  606. begin
  607. inherited;
  608. exit;
  609. end;
  610. {$endif i8086}
  611. if is_smallset(tcallparanode(left).resultdef) then
  612. begin
  613. opdef:=tcallparanode(left).resultdef;
  614. opsize:=int_cgsize(opdef.size)
  615. end
  616. else
  617. begin
  618. opdef:=u32inttype;
  619. opsize:=OS_32;
  620. end;
  621. bitsperop:=(8*tcgsize2size[opsize]);
  622. secondpass(tcallparanode(left).left);
  623. secondpass(tcallparanode(tcallparanode(left).right).left);
  624. setbase:=tsetdef(tcallparanode(left).left.resultdef).setbase;
  625. if tcallparanode(tcallparanode(left).right).left.location.loc=LOC_CONSTANT then
  626. begin
  627. { calculate bit position }
  628. l:=1 shl ((tcallparanode(tcallparanode(left).right).left.location.value-setbase) mod bitsperop);
  629. { determine operator }
  630. if inlinenumber=in_include_x_y then
  631. cgop:=OP_OR
  632. else
  633. begin
  634. cgop:=OP_AND;
  635. l:=not(l);
  636. end;
  637. case tcallparanode(left).left.location.loc of
  638. LOC_REFERENCE :
  639. begin
  640. inc(tcallparanode(left).left.location.reference.offset,
  641. ((tcallparanode(tcallparanode(left).right).left.location.value-setbase) div bitsperop)*tcgsize2size[opsize]);
  642. cg.a_op_const_ref(current_asmdata.CurrAsmList,cgop,opsize,l,tcallparanode(left).left.location.reference);
  643. end;
  644. LOC_CREGISTER :
  645. cg.a_op_const_reg(current_asmdata.CurrAsmList,cgop,tcallparanode(left).left.location.size,l,tcallparanode(left).left.location.register);
  646. else
  647. internalerror(200405022);
  648. end;
  649. end
  650. else
  651. begin
  652. orgsize:=opsize;
  653. if opsize in [OS_8,OS_S8] then
  654. begin
  655. opdef:=u32inttype;
  656. opsize:=OS_32;
  657. end;
  658. { determine asm operator }
  659. if inlinenumber=in_include_x_y then
  660. asmop:=A_BTS
  661. else
  662. asmop:=A_BTR;
  663. hlcg.location_force_reg(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,tcallparanode(tcallparanode(left).right).left.resultdef,opdef,true);
  664. register_maybe_adjust_setbase(current_asmdata.CurrAsmList,tcallparanode(tcallparanode(left).right).left.location,setbase);
  665. hregister:=tcallparanode(tcallparanode(left).right).left.location.register;
  666. if (tcallparanode(left).left.location.loc=LOC_REFERENCE) then
  667. emit_reg_ref(asmop,tcgsize2opsize[opsize],hregister,tcallparanode(left).left.location.reference)
  668. else
  669. begin
  670. { second argument can't be an 8 bit register either }
  671. hregister2:=tcallparanode(left).left.location.register;
  672. if (orgsize in [OS_8,OS_S8]) then
  673. hregister2:=cg.makeregsize(current_asmdata.CurrAsmList,hregister2,opsize);
  674. emit_reg_reg(asmop,tcgsize2opsize[opsize],hregister,hregister2);
  675. end;
  676. end;
  677. end;
  678. procedure tx86inlinenode.second_popcnt;
  679. var
  680. opsize: tcgsize;
  681. begin
  682. secondpass(left);
  683. opsize:=tcgsize2unsigned[left.location.size];
  684. { no 8 Bit popcont }
  685. if opsize=OS_8 then
  686. opsize:=OS_16;
  687. if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER,LOC_REFERENCE,LOC_CREFERENCE]) or
  688. (left.location.size<>opsize) then
  689. hlcg.location_force_reg(current_asmdata.CurrAsmList,left.location,left.resultdef,cgsize_orddef(opsize),true);
  690. location_reset(location,LOC_REGISTER,opsize);
  691. location.register:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  692. if left.location.loc in [LOC_REGISTER,LOC_CREGISTER] then
  693. emit_reg_reg(A_POPCNT,TCGSize2OpSize[opsize],left.location.register,location.register)
  694. else
  695. emit_ref_reg(A_POPCNT,TCGSize2OpSize[opsize],left.location.reference,location.register);
  696. end;
  697. procedure tx86inlinenode.second_fma;
  698. const
  699. op : array[false..true,false..true,s32real..s64real,0..3] of TAsmOp =
  700. (
  701. { positive product }
  702. (
  703. { positive third operand }
  704. ((A_VFMADD231SS,A_VFMADD231SS,A_VFMADD231SS,A_VFMADD213SS),
  705. (A_VFMADD231SD,A_VFMADD231SD,A_VFMADD231SD,A_VFMADD213SD)
  706. ),
  707. { negative third operand }
  708. ((A_VFMSUB231SS,A_VFMSUB231SS,A_VFMSUB231SS,A_VFMSUB213SS),
  709. (A_VFMSUB231SD,A_VFMSUB231SD,A_VFMSUB231SD,A_VFMSUB213SD)
  710. )
  711. ),
  712. { negative product }
  713. (
  714. { positive third operand }
  715. ((A_VFNMADD231SS,A_VFNMADD231SS,A_VFNMADD231SS,A_VFNMADD213SS),
  716. (A_VFNMADD231SD,A_VFNMADD231SD,A_VFNMADD231SD,A_VFNMADD213SD)
  717. ),
  718. { negative third operand }
  719. ((A_VFNMSUB231SS,A_VFNMSUB231SS,A_VFNMSUB231SS,A_VFNMSUB213SS),
  720. (A_VFNMSUB231SD,A_VFNMSUB231SD,A_VFNMSUB231SD,A_VFNMSUB213SD)
  721. )
  722. )
  723. );
  724. var
  725. paraarray : array[1..3] of tnode;
  726. memop,
  727. i : integer;
  728. negop3,
  729. negproduct,
  730. gotmem : boolean;
  731. hp : tnode;
  732. begin
  733. {$ifndef i8086}
  734. if (cpu_capabilities[current_settings.cputype]*[CPUX86_HAS_FMA,CPUX86_HAS_FMA4])<>[] then
  735. begin
  736. negop3:=false;
  737. negproduct:=false;
  738. paraarray[1]:=tcallparanode(tcallparanode(tcallparanode(parameters).nextpara).nextpara).paravalue;
  739. paraarray[2]:=tcallparanode(tcallparanode(parameters).nextpara).paravalue;
  740. paraarray[3]:=tcallparanode(parameters).paravalue;
  741. { check if a neg. node can be removed
  742. this is possible because changing the sign of
  743. a floating point number does not affect its absolute
  744. value in any way
  745. }
  746. if paraarray[1].nodetype=unaryminusn then
  747. begin
  748. paraarray[1]:=tunarynode(paraarray[1]).left;
  749. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  750. only no code is generated for it }
  751. negproduct:=not(negproduct);
  752. end;
  753. if paraarray[2].nodetype=unaryminusn then
  754. begin
  755. paraarray[2]:=tunarynode(paraarray[2]).left;
  756. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  757. only no code is generated for it }
  758. negproduct:=not(negproduct);
  759. end;
  760. if paraarray[3].nodetype=unaryminusn then
  761. begin
  762. paraarray[3]:=tunarynode(paraarray[3]).left;
  763. { do not release the unused unary minus node, it is kept and release together with the other nodes,
  764. only no code is generated for it }
  765. negop3:=true;
  766. end;
  767. for i:=1 to 3 do
  768. secondpass(paraarray[i]);
  769. { only one memory operand is allowed }
  770. gotmem:=false;
  771. memop:=0;
  772. for i:=1 to 3 do
  773. begin
  774. if not(paraarray[i].location.loc in [LOC_MMREGISTER,LOC_CMMREGISTER]) then
  775. begin
  776. if (paraarray[i].location.loc in [LOC_REFERENCE,LOC_CREFERENCE]) and not(gotmem) then
  777. begin
  778. memop:=i;
  779. gotmem:=true;
  780. end
  781. else
  782. hlcg.location_force_mmregscalar(current_asmdata.CurrAsmList,paraarray[i].location,paraarray[i].resultdef,true);
  783. end;
  784. end;
  785. location_reset(location,LOC_MMREGISTER,paraarray[1].location.size);
  786. location.register:=cg.getmmregister(current_asmdata.CurrAsmList,location.size);
  787. if gotmem then
  788. begin
  789. case memop of
  790. 1:
  791. begin
  792. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  793. paraarray[3].location.register,location.register,mms_movescalar);
  794. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  795. paraarray[1].location.reference,paraarray[2].location.register,location.register);
  796. end;
  797. 2:
  798. begin
  799. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  800. paraarray[3].location.register,location.register,mms_movescalar);
  801. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  802. paraarray[2].location.reference,paraarray[1].location.register,location.register);
  803. end;
  804. 3:
  805. begin
  806. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[1].resultdef,resultdef,
  807. paraarray[1].location.register,location.register,mms_movescalar);
  808. emit_ref_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,memop],S_NO,
  809. paraarray[3].location.reference,paraarray[2].location.register,location.register);
  810. end
  811. else
  812. internalerror(2014041301);
  813. end;
  814. end
  815. else
  816. begin
  817. { try to use the location which is already in a temp. mm register as destination,
  818. so the compiler might be able to re-use the register }
  819. if paraarray[1].location.loc=LOC_MMREGISTER then
  820. begin
  821. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[1].resultdef,resultdef,
  822. paraarray[1].location.register,location.register,mms_movescalar);
  823. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,3],S_NO,
  824. paraarray[3].location.register,paraarray[2].location.register,location.register);
  825. end
  826. else if paraarray[2].location.loc=LOC_MMREGISTER then
  827. begin
  828. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[2].resultdef,resultdef,
  829. paraarray[2].location.register,location.register,mms_movescalar);
  830. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,3],S_NO,
  831. paraarray[3].location.register,paraarray[1].location.register,location.register);
  832. end
  833. else
  834. begin
  835. hlcg.a_loadmm_reg_reg(current_asmdata.CurrAsmList,paraarray[3].resultdef,resultdef,
  836. paraarray[3].location.register,location.register,mms_movescalar);
  837. emit_reg_reg_reg(op[negproduct,negop3,tfloatdef(resultdef).floattype,0],S_NO,
  838. paraarray[1].location.register,paraarray[2].location.register,location.register);
  839. end;
  840. end;
  841. end
  842. else
  843. {$endif i8086}
  844. internalerror(2014032301);
  845. end;
  846. end.