atmega168fam.pp 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662
  1. {******************************************************************************
  2. Register definitions and startup code for ATMEL ATmega48/88
  3. ******************************************************************************}
  4. unit atmega168fam;
  5. {$goto on}
  6. interface
  7. var
  8. PINB : byte absolute $23;
  9. DDRB : byte absolute $24;
  10. PORTB : byte absolute $25;
  11. PINC : byte absolute $26;
  12. DDRC : byte absolute $27;
  13. PORTC : byte absolute $28;
  14. PIND : byte absolute $29;
  15. DDRD : byte absolute $2A;
  16. PORTD : byte absolute $2B;
  17. TIFR0 : byte absolute $35;
  18. TIFR1 : byte absolute $36;
  19. PCIFR : byte absolute $3B;
  20. EIFR : byte absolute $3C;
  21. EIMSK : byte absolute $3D;
  22. GPIOR0 : byte absolute $3E;
  23. EECR : byte absolute $3F;
  24. EEDR : byte absolute $40;
  25. EEARL : byte absolute $41;
  26. EEARH : byte absolute $42;
  27. EEAR : word absolute $41;
  28. GTCCR : byte absolute $43;
  29. TCCR0A : byte absolute $44;
  30. TCCR0B : byte absolute $45;
  31. TCNT0 : byte absolute $46;
  32. OCR0A : byte absolute $47;
  33. OCR0B : byte absolute $48;
  34. GPIOR1 : byte absolute $4A;
  35. GPIOR2 : byte absolute $4B;
  36. SPCR : byte absolute $4C;
  37. SPSR : byte absolute $4D;
  38. SPDR : byte absolute $4E;
  39. ACSR : byte absolute $50;
  40. SMCR : byte absolute $53;
  41. MCUSR : byte absolute $54;
  42. MCUCR : byte absolute $55;
  43. SPMCSR : byte absolute $57;
  44. SPL : byte absolute $5D;
  45. SPH : byte absolute $5E;
  46. SP : word absolute $5D;
  47. SREG : byte absolute $5F;
  48. WDTCSR : byte absolute $60;
  49. CLKPR : byte absolute $61;
  50. PRR : byte absolute $64;
  51. OSCCAL : byte absolute $66;
  52. PCICR : byte absolute $68;
  53. EICRA : byte absolute $69;
  54. PCMSK0 : byte absolute $6B;
  55. PCMSK1 : byte absolute $6C;
  56. PCMSK2 : byte absolute $6D;
  57. TIMSK0 : byte absolute $6E;
  58. TIMSK1 : byte absolute $6F;
  59. TIMSK2 : byte absolute $70;
  60. ADCL : byte absolute $78;
  61. ADCH : byte absolute $79;
  62. ADC : word absolute $78;
  63. ADCSRA : byte absolute $7A;
  64. ADCSRB : byte absolute $7B;
  65. ADMUX : byte absolute $7C;
  66. DIDR0 : byte absolute $7E;
  67. DIDR1 : byte absolute $7F;
  68. TCCR1A : byte absolute $80;
  69. TCCR1B : byte absolute $81;
  70. TCCR1C : byte absolute $82;
  71. TCNT1L : byte absolute $84;
  72. TCNT1H : byte absolute $85;
  73. TCNT1 : word absolute $84;
  74. ICRL : byte absolute $86;
  75. ICR1H : byte absolute $87;
  76. OCR1AL : byte absolute $88;
  77. OCR1AH : byte absolute $89;
  78. OCR1A : word absolute $88;
  79. OCR1BL : byte absolute $8A;
  80. OCR1BH : byte absolute $8B;
  81. OCR1B : word absolute $8A;
  82. TCCR2A : byte absolute $B0;
  83. TCCR2B : byte absolute $B1;
  84. TCNT2 : byte absolute $B2;
  85. OCR2A : byte absolute $B3;
  86. OCR2B : byte absolute $B4;
  87. ASSR : byte absolute $B6;
  88. TWBR : byte absolute $B8;
  89. TWSR : byte absolute $B9;
  90. TWAR : byte absolute $BA;
  91. TWDR : byte absolute $BB;
  92. TWCR : byte absolute $BC;
  93. TWAMR : byte absolute $BD;
  94. UCSR0A : byte absolute $C0;
  95. UCSR0B : byte absolute $C1;
  96. UCSR0C : byte absolute $C2;
  97. UBRR0L : byte absolute $C4;
  98. UBRR0H : byte absolute $C5;
  99. UBRR0 : word absolute $C4;
  100. UDR0 : byte absolute $C6;
  101. const
  102. { PINB }
  103. PINB7 = 7;
  104. PINB6 = 6;
  105. PINB5 = 5;
  106. PINB4 = 4;
  107. PINB3 = 3;
  108. PINB2 = 2;
  109. PINB1 = 1;
  110. PINB0 = 0;
  111. { DDRB }
  112. DDB7 = 7;
  113. DDB6 = 6;
  114. DDB5 = 5;
  115. DDB4 = 4;
  116. DDB3 = 3;
  117. DDB2 = 2;
  118. DDB1 = 1;
  119. DDB0 = 0;
  120. { PORTB }
  121. PORTB7 = 7;
  122. PORTB6 = 6;
  123. PORTB5 = 5;
  124. PORTB4 = 4;
  125. PORTB3 = 3;
  126. PORTB2 = 2;
  127. PORTB1 = 1;
  128. PORTB0 = 0;
  129. { PINC }
  130. PINC6 = 6;
  131. PINC5 = 5;
  132. PINC4 = 4;
  133. PINC3 = 3;
  134. PINC2 = 2;
  135. PINC1 = 1;
  136. PINC0 = 0;
  137. { DDRC }
  138. DDC6 = 6;
  139. DDC5 = 5;
  140. DDC4 = 4;
  141. DDC3 = 3;
  142. DDC2 = 2;
  143. DDC1 = 1;
  144. DDC0 = 0;
  145. { PORTC }
  146. PORTC6 = 6;
  147. PORTC5 = 5;
  148. PORTC4 = 4;
  149. PORTC3 = 3;
  150. PORTC2 = 2;
  151. PORTC1 = 1;
  152. PORTC0 = 0;
  153. { PIND }
  154. PIND7 = 7;
  155. PIND6 = 6;
  156. PIND5 = 5;
  157. PIND4 = 4;
  158. PIND3 = 3;
  159. PIND2 = 2;
  160. PIND1 = 1;
  161. PIND0 = 0;
  162. { DDRD }
  163. DDD7 = 7;
  164. DDD6 = 6;
  165. DDD5 = 5;
  166. DDD4 = 4;
  167. DDD3 = 3;
  168. DDD2 = 2;
  169. DDD1 = 1;
  170. DDD0 = 0;
  171. { PORTD }
  172. PORTD7 = 7;
  173. PORTD6 = 6;
  174. PORTD5 = 5;
  175. PORTD4 = 4;
  176. PORTD3 = 3;
  177. PORTD2 = 2;
  178. PORTD1 = 1;
  179. PORTD0 = 0;
  180. { TIFR0 }
  181. OCF0B = 2;
  182. OCF0A = 1;
  183. TOV0 = 0;
  184. { TIFR1 }
  185. ICF1 = 5;
  186. OCF1B = 2;
  187. OCF1A = 1;
  188. TOV1 = 0;
  189. { PCIFR }
  190. PCIF2 = 2;
  191. PCIF1 = 1;
  192. PCIF0 = 0;
  193. { EIFR }
  194. INTF1 = 1;
  195. INTF0 = 0;
  196. { EIMSK }
  197. INT1 = 1;
  198. INT0 = 0;
  199. { EECR }
  200. EEPM1 = 5;
  201. EEPM0 = 4;
  202. EERIE = 3;
  203. EEMPE = 2;
  204. EEPE = 1;
  205. EERE = 0;
  206. { GTCCR }
  207. TSM = 7;
  208. PSRASY = 1;
  209. PSRSYNC = 0;
  210. { TCCR0A }
  211. COM0A1 = 7;
  212. COM0A0 = 6;
  213. COM0B1 = 5;
  214. COM0B0 = 4;
  215. WGM01 = 1;
  216. WGM00 = 0;
  217. { TCCR0B }
  218. FOC0A = 7;
  219. FOC0B = 6;
  220. WGM02 = 3;
  221. CS02 = 2;
  222. CS01 = 1;
  223. CS00 = 0;
  224. { SPCR }
  225. SPIE = 7;
  226. SPE = 6;
  227. DORD = 5;
  228. MSTR = 4;
  229. CPOL = 3;
  230. CPHA = 2;
  231. SPR1 = 1;
  232. SPR0 = 0;
  233. { SPSR }
  234. SPIF = 7;
  235. WCOL = 6;
  236. SPI2X = 0;
  237. { ACSR }
  238. ACD = 7;
  239. ACBG = 6;
  240. ACO = 5;
  241. ACI = 4;
  242. ACIE = 3;
  243. ACIC = 2;
  244. ACIS1 = 1;
  245. ACIS0 = 0;
  246. { SMCR }
  247. SM2 = 3;
  248. SM1 = 2;
  249. SM0 = 1;
  250. SE = 0;
  251. { MCUSR }
  252. WDRF = 3;
  253. BORF = 2;
  254. EXTRF = 1;
  255. PORF = 0;
  256. { MCUCR }
  257. PUD = 4;
  258. IVSEL = 1;
  259. IVCE = 0;
  260. { SPMCSR }
  261. SPMIE = 7;
  262. RWWSB = 6;
  263. RWWSRE = 4;
  264. BLBSET = 3;
  265. PGWRT = 2;
  266. PGERS = 1;
  267. SPMEN = 0;
  268. { WDTCSR }
  269. WDIF = 7;
  270. WDIE = 6;
  271. WDP3 = 5;
  272. WDCE = 4;
  273. WDE = 3;
  274. WDP2 = 2;
  275. WDP1 = 1;
  276. WDP0 = 0;
  277. { CLKPR }
  278. CLKPCE = 7;
  279. CLKPS3 = 3;
  280. CLKPS2 = 2;
  281. CLKPS1 = 1;
  282. CLKPS0 = 0;
  283. { PRR }
  284. PRTWI = 7;
  285. PRTIM2 = 6;
  286. PRTIM0 = 5;
  287. PRTIM1 = 3;
  288. PRSPI = 2;
  289. PRUSART0 = 1;
  290. PRADC = 0;
  291. { PCICR }
  292. PCIE2 = 2;
  293. PCIE1 = 1;
  294. PCIE0 = 0;
  295. { EICRA }
  296. ISC11 = 3;
  297. ISC10 = 2;
  298. ISC01 = 1;
  299. ISC00 = 0;
  300. { PCMSK0 }
  301. PCINT7 = 7;
  302. PCINT6 = 6;
  303. PCINT5 = 5;
  304. PCINT4 = 4;
  305. PCINT3 = 3;
  306. PCINT2 = 2;
  307. PCINT1 = 1;
  308. PCINT0 = 0;
  309. { PCMSK1 }
  310. PCINT14 = 6;
  311. PCINT13 = 5;
  312. PCINT12 = 4;
  313. PCINT11 = 3;
  314. PCINT10 = 2;
  315. PCINT9 = 1;
  316. PCINT8 = 0;
  317. { PCMSK2 }
  318. PCINT23 = 7;
  319. PCINT22 = 6;
  320. PCINT21 = 5;
  321. PCINT20 = 4;
  322. PCINT19 = 3;
  323. PCINT18 = 2;
  324. PCINT17 = 1;
  325. PCINT16 = 0;
  326. { TIMSK0 }
  327. OCIE0B = 2;
  328. OCIE0A = 1;
  329. TOIE0 = 0;
  330. { TIMSK1 }
  331. ICIE1 = 5;
  332. OCIE1B = 2;
  333. OCIE1A = 1;
  334. TOIE1 = 0;
  335. { TIMSK2 }
  336. OCIE2B = 2;
  337. OCIE2A = 1;
  338. TOIE2 = 0;
  339. { ADCSRA }
  340. ADEN = 7;
  341. ADSC = 6;
  342. ADATE = 5;
  343. ADIF = 4;
  344. ADIE = 3;
  345. ADPS2 = 2;
  346. ADPS1 = 1;
  347. ADPS0 = 0;
  348. { ADCSRB }
  349. ACME = 6;
  350. ADTS2 = 2;
  351. ADTS1 = 1;
  352. ADTS0 = 0;
  353. { ADMUX }
  354. REFS1 = 7;
  355. REFS0 = 6;
  356. ADLAR = 5;
  357. MUX3 = 3;
  358. MUX2 = 2;
  359. MUX1 = 1;
  360. MUX0 = 0;
  361. { DIDR0 }
  362. ADC5D = 5;
  363. ADC4D = 4;
  364. ADC3D = 3;
  365. ADC2D = 2;
  366. ADC1D = 1;
  367. ADC0D = 0;
  368. { DIDR1 }
  369. AIN1D = 1;
  370. AIN0D = 0;
  371. { TCCR1A }
  372. COM1A1 = 7;
  373. COM1A0 = 6;
  374. COM1B1 = 5;
  375. COM1B0 = 4;
  376. WGM11 = 1;
  377. WGM10 = 0;
  378. { TCCR1B }
  379. ICNC1 = 7;
  380. ICES1 = 6;
  381. WGM13 = 4;
  382. WGM12 = 3;
  383. CS12 = 2;
  384. CS11 = 1;
  385. CS10 = 0;
  386. { TCCR1C }
  387. FOC1A = 7;
  388. FOC1B = 6;
  389. { TCCR2A }
  390. COM2A1 = 7;
  391. COM2A0 = 6;
  392. COM2B1 = 5;
  393. COM2B0 = 4;
  394. WGM21 = 1;
  395. WGM20 = 0;
  396. { TCCR2B }
  397. FOC2A = 7;
  398. FOC2B = 6;
  399. WGM22 = 3;
  400. CS22 = 2;
  401. CS21 = 1;
  402. CS20 = 0;
  403. { ASSR }
  404. EXCLK = 6;
  405. AS2 = 5;
  406. TCN2UB = 4;
  407. OCR2AUB = 3;
  408. OCR2BUB = 2;
  409. TCR2AUB = 1;
  410. TCR2BUB = 0;
  411. { TWSR }
  412. TWS7 = 7;
  413. TWS6 = 6;
  414. TWS5 = 5;
  415. TWS4 = 4;
  416. TWS3 = 3;
  417. TWPS1 = 1;
  418. TWPS0 = 0;
  419. { TWAR }
  420. TWA6 = 7;
  421. TWA5 = 6;
  422. TWA4 = 5;
  423. TWA3 = 4;
  424. TWA2 = 3;
  425. TWA1 = 2;
  426. TWA0 = 1;
  427. { TWCR }
  428. TWINT = 7;
  429. TWEA = 6;
  430. TWSTA = 5;
  431. TWSTO = 4;
  432. TWWC = 3;
  433. TWEN = 2;
  434. TWIE = 0;
  435. { TWAMR }
  436. TWAM6 = 7;
  437. TWAM5 = 6;
  438. TWAM4 = 5;
  439. TWAM3 = 4;
  440. TWAM2 = 3;
  441. TWAM1 = 2;
  442. TWAM0 = 1;
  443. { UCSR0A }
  444. RXC0 = 7;
  445. TXC0 = 6;
  446. UDRE0 = 5;
  447. FE0 = 4;
  448. DOR0 = 3;
  449. UPE0 = 2;
  450. U2X0 = 1;
  451. MPCM0 = 0;
  452. { UCSR0B }
  453. RXCIE0 = 7;
  454. TXCIE0 = 6;
  455. UDRIE0 = 5;
  456. RXEN0 = 4;
  457. TXEN0 = 3;
  458. UCVSZ02 = 2;
  459. RXB80 = 1;
  460. TXB80 = 0;
  461. { UCSR0C }
  462. UMSEL01 = 7;
  463. UMSEL00 = 6;
  464. UPM01 = 5;
  465. UPM00 = 4;
  466. USBS0 = 3;
  467. UCVSZ01 = 2;
  468. UCVSZ00 = 1;
  469. UCPOL0 = 0;
  470. implementation
  471. {$i avrcommon.inc}
  472. procedure Int00Handler; external name 'Int00Handler';
  473. procedure Int01Handler; external name 'Int01Handler';
  474. procedure Int02Handler; external name 'Int02Handler';
  475. procedure Int03Handler; external name 'Int03Handler';
  476. procedure Int04Handler; external name 'Int04Handler';
  477. procedure Int05Handler; external name 'Int05Handler';
  478. procedure Int06Handler; external name 'Int06Handler';
  479. procedure Int07Handler; external name 'Int07Handler';
  480. procedure Int08Handler; external name 'Int08Handler';
  481. procedure Int09Handler; external name 'Int09Handler';
  482. procedure Int10Handler; external name 'Int10Handler';
  483. procedure Int11Handler; external name 'Int11Handler';
  484. procedure Int12Handler; external name 'Int12Handler';
  485. procedure Int13Handler; external name 'Int13Handler';
  486. procedure Int14Handler; external name 'Int14Handler';
  487. procedure Int15Handler; external name 'Int15Handler';
  488. procedure Int16Handler; external name 'Int16Handler';
  489. procedure Int17Handler; external name 'Int17Handler';
  490. procedure Int18Handler; external name 'Int18Handler';
  491. procedure Int19Handler; external name 'Int19Handler';
  492. procedure Int20Handler; external name 'Int20Handler';
  493. procedure Int21Handler; external name 'Int21Handler';
  494. procedure Int22Handler; external name 'Int22Handler';
  495. procedure Int23Handler; external name 'Int23Handler';
  496. procedure Int24Handler; external name 'Int24Handler';
  497. procedure Int25Handler; external name 'Int25Handler';
  498. procedure Int26Handler; external name 'Int26Handler';
  499. procedure Int27Handler; external name 'Int27Handler';
  500. procedure Int28Handler; external name 'Int28Handler';
  501. procedure Int29Handler; external name 'Int29Handler';
  502. procedure Int30Handler; external name 'Int30Handler';
  503. procedure Int31Handler; external name 'Int31Handler';
  504. procedure Int32Handler; external name 'Int32Handler';
  505. procedure Int33Handler; external name 'Int33Handler';
  506. procedure Int34Handler; external name 'Int34Handler';
  507. procedure _FPC_start; assembler; nostackframe;
  508. label
  509. _start;
  510. asm
  511. .init
  512. .globl _start
  513. jmp _start
  514. jmp Int00Handler
  515. jmp Int01Handler
  516. jmp Int02Handler
  517. jmp Int03Handler
  518. jmp Int04Handler
  519. jmp Int05Handler
  520. jmp Int06Handler
  521. jmp Int07Handler
  522. jmp Int08Handler
  523. jmp Int09Handler
  524. jmp Int10Handler
  525. jmp Int11Handler
  526. jmp Int12Handler
  527. jmp Int13Handler
  528. jmp Int14Handler
  529. jmp Int15Handler
  530. jmp Int16Handler
  531. jmp Int17Handler
  532. jmp Int18Handler
  533. jmp Int19Handler
  534. jmp Int20Handler
  535. jmp Int21Handler
  536. jmp Int22Handler
  537. jmp Int23Handler
  538. jmp Int24Handler
  539. {
  540. all ATMEL MCUs use the same startup code, the details are
  541. governed by defines
  542. }
  543. {$i start.inc}
  544. .weak Int00Handler
  545. .weak Int01Handler
  546. .weak Int02Handler
  547. .weak Int03Handler
  548. .weak Int04Handler
  549. .weak Int05Handler
  550. .weak Int06Handler
  551. .weak Int07Handler
  552. .weak Int08Handler
  553. .weak Int09Handler
  554. .weak Int10Handler
  555. .weak Int11Handler
  556. .weak Int12Handler
  557. .weak Int13Handler
  558. .weak Int14Handler
  559. .weak Int15Handler
  560. .weak Int16Handler
  561. .weak Int17Handler
  562. .weak Int18Handler
  563. .weak Int19Handler
  564. .weak Int20Handler
  565. .weak Int21Handler
  566. .weak Int22Handler
  567. .weak Int23Handler
  568. .weak Int24Handler
  569. .set Int00Handler, Default_IRQ_handler
  570. .set Int01Handler, Default_IRQ_handler
  571. .set Int02Handler, Default_IRQ_handler
  572. .set Int03Handler, Default_IRQ_handler
  573. .set Int04Handler, Default_IRQ_handler
  574. .set Int05Handler, Default_IRQ_handler
  575. .set Int06Handler, Default_IRQ_handler
  576. .set Int07Handler, Default_IRQ_handler
  577. .set Int08Handler, Default_IRQ_handler
  578. .set Int09Handler, Default_IRQ_handler
  579. .set Int10Handler, Default_IRQ_handler
  580. .set Int11Handler, Default_IRQ_handler
  581. .set Int12Handler, Default_IRQ_handler
  582. .set Int13Handler, Default_IRQ_handler
  583. .set Int14Handler, Default_IRQ_handler
  584. .set Int15Handler, Default_IRQ_handler
  585. .set Int16Handler, Default_IRQ_handler
  586. .set Int17Handler, Default_IRQ_handler
  587. .set Int18Handler, Default_IRQ_handler
  588. .set Int19Handler, Default_IRQ_handler
  589. .set Int20Handler, Default_IRQ_handler
  590. .set Int21Handler, Default_IRQ_handler
  591. .set Int22Handler, Default_IRQ_handler
  592. .set Int23Handler, Default_IRQ_handler
  593. .set Int24Handler, Default_IRQ_handler
  594. end;
  595. end.