aoptcpu.pas 23 KB

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  1. {
  2. Copyright (c) 1998-2014 by the Free Pascal development team
  3. This unit calls the optimization procedures to optimize the assembler
  4. code for m68k
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. {$define DEBUG_AOPTCPU}
  21. Interface
  22. uses
  23. cpubase, aoptobj, aoptcpub, aopt, aasmtai,
  24. cgbase;
  25. Type
  26. TCpuAsmOptimizer = class(TAsmOptimizer)
  27. function RegLoadedWithNewValue(reg: tregister; hp: tai): boolean; override;
  28. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  29. function TryToOptimizeMove(var p: tai): boolean;
  30. function MaybeRealConstOperSimplify(var p: tai): boolean;
  31. function OptPass1LEA(var p: tai): Boolean;
  32. function OptPass1MOVEM(var p: tai): Boolean;
  33. { outputs a debug message into the assembler file }
  34. procedure DebugMsg(const s: string; p: tai);
  35. End;
  36. Implementation
  37. uses
  38. cutils, aasmcpu, cgutils, globtype, globals, verbose, cpuinfo, itcpugas, procinfo, cpupi,
  39. aoptutils;
  40. { Range check must be disabled explicitly as conversions between signed and unsigned
  41. 32-bit values are done without explicit typecasts }
  42. {$R-}
  43. function opname(var p: tai): string;
  44. begin
  45. result:=upcase(gas_op2str[taicpu(p).opcode]);
  46. end;
  47. function RefsEqual(const r1, r2: treference): boolean;
  48. begin
  49. RefsEqual :=
  50. (r1.offset = r2.offset) and
  51. (r1.base = r2.base) and
  52. (r1.index = r2.index) and (r1.scalefactor = r2.scalefactor) and
  53. (r1.symbol=r2.symbol) and (r1.refaddr = r2.refaddr) and
  54. (r1.relsymbol = r2.relsymbol) and
  55. (r1.volatility=[]) and
  56. (r2.volatility=[]);
  57. end;
  58. function MatchOperand(const oper1: TOper; const oper2: TOper): boolean;
  59. begin
  60. result := oper1.typ = oper2.typ;
  61. if result then
  62. case oper1.typ of
  63. top_const:
  64. Result:=oper1.val = oper2.val;
  65. top_reg:
  66. Result:=oper1.reg = oper2.reg;
  67. top_ref:
  68. Result:=RefsEqual(oper1.ref^, oper2.ref^);
  69. else
  70. internalerror(2016112401);
  71. end
  72. end;
  73. function MatchInstruction(const instr: tai; const op: TAsmOp; const opsize: topsizes): boolean;
  74. begin
  75. result :=
  76. (instr.typ = ait_instruction) and
  77. (taicpu(instr).opcode = op) and
  78. ((opsize = []) or (taicpu(instr).opsize in opsize));
  79. end;
  80. function MatchInstruction(const instr : tai;const ops : array of TAsmOp;
  81. const opsize : topsizes) : boolean;
  82. var
  83. op : TAsmOp;
  84. begin
  85. result:=false;
  86. for op in ops do
  87. begin
  88. if (instr.typ = ait_instruction) and
  89. (taicpu(instr).opcode = op) and
  90. ((opsize = []) or (taicpu(instr).opsize in opsize)) then
  91. begin
  92. result:=true;
  93. exit;
  94. end;
  95. end;
  96. end;
  97. function TCpuAsmOptimizer.MaybeRealConstOperSimplify(var p: tai): boolean;
  98. var
  99. tmpint64: int64;
  100. tmpsingle: single;
  101. begin
  102. result:=false;
  103. if (taicpu(p).oper[0]^.typ = top_realconst) then
  104. begin
  105. { if we work with actual integers, turn the operand into one }
  106. if frac(taicpu(p).oper[0]^.val_real) = 0 then
  107. begin
  108. tmpint64:=trunc(taicpu(p).oper[0]^.val_real);
  109. if (high(shortint) >= tmpint64) and (low(shortint) <= tmpint64) then
  110. begin
  111. taicpu(p).opsize := S_B;
  112. taicpu(p).oper[0]^.typ:=top_const;
  113. end
  114. else
  115. if (high(smallint) >= tmpint64) and (low(smallint) <= tmpint64) then
  116. begin
  117. taicpu(p).opsize := S_W;
  118. taicpu(p).oper[0]^.typ:=top_const;
  119. end
  120. else
  121. if (high(longint) >= tmpint64) and (low(longint) <= tmpint64) then
  122. begin
  123. taicpu(p).opsize := S_L;
  124. taicpu(p).oper[0]^.typ:=top_const;
  125. end;
  126. if (taicpu(p).oper[0]^.typ) = top_const then
  127. begin
  128. DebugMsg('Optimizer: FPU real const to integer',p);
  129. taicpu(p).oper[0]^.val:=tmpint64;
  130. result:=true;
  131. end;
  132. end
  133. else
  134. begin
  135. tmpsingle:=taicpu(p).oper[0]^.val_real;
  136. if (taicpu(p).opsize = S_FD) and
  137. ((taicpu(p).oper[0]^.val_real - tmpsingle) = 0.0) then
  138. begin
  139. DebugMsg('Optimizer: FPU real const to lesser precision',p);
  140. taicpu(p).opsize:=S_FS;
  141. result:=true;
  142. end;
  143. end;
  144. end;
  145. end;
  146. function TCpuAsmOptimizer.RegLoadedWithNewValue(reg: tregister; hp: tai): boolean;
  147. var
  148. p: taicpu;
  149. begin
  150. if not assigned(hp) or
  151. (hp.typ <> ait_instruction) then
  152. begin
  153. Result := false;
  154. exit;
  155. end;
  156. p := taicpu(hp);
  157. Result :=
  158. (((p.opcode=A_MOVE) or (p.opcode=A_MOVEA) or (p.opcode=A_MVS) or
  159. (p.opcode=A_MVZ) or (p.opcode=A_MOVEQ) or (p.opcode=A_LEA)) and
  160. (p.oper[1]^.typ = top_reg) and
  161. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  162. ((p.oper[0]^.typ = top_const) or
  163. ((p.oper[0]^.typ = top_reg) and
  164. not(SuperRegistersEqual(p.oper[0]^.reg,reg))) or
  165. ((p.oper[0]^.typ = top_ref) and
  166. not RegInRef(reg,p.oper[0]^.ref^)))) or
  167. ((p.opcode = A_FMOVE) and
  168. (p.oper[1]^.typ = top_reg) and
  169. (SuperRegistersEqual(p.oper[1]^.reg,reg)) and
  170. ((p.oper[0]^.typ = top_realconst) or
  171. ((p.oper[0]^.typ = top_reg) and
  172. not(SuperRegistersEqual(p.oper[0]^.reg,reg))))) or
  173. ((p.opcode = A_MOVEM) and
  174. (p.oper[1]^.typ = top_regset) and
  175. ((getsupreg(reg) in p.oper[1]^.dataregset) or
  176. (getsupreg(reg) in p.oper[1]^.addrregset))) or
  177. ((p.opcode = A_FMOVEM) and
  178. (p.oper[1]^.typ = top_regset) and
  179. (getsupreg(reg) in p.oper[1]^.fpuregset));
  180. end;
  181. {$ifdef DEBUG_AOPTCPU}
  182. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);
  183. begin
  184. asml.insertbefore(tai_comment.Create(strpnew(s)), p);
  185. end;
  186. {$else DEBUG_AOPTCPU}
  187. procedure TCpuAsmOptimizer.DebugMsg(const s: string; p : tai);inline;
  188. begin
  189. end;
  190. {$endif DEBUG_AOPTCPU}
  191. function TCpuAsmOptimizer.TryToOptimizeMove(var p: tai): boolean;
  192. var
  193. next, next2: tai;
  194. opstr: string[15];
  195. begin
  196. result:=false;
  197. if (taicpu(p).opcode=A_MOVE) and
  198. GetNextInstruction(p,next) and
  199. MatchInstruction(next,A_TST,[taicpu(p).opsize]) and
  200. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) and
  201. { for movea, it won't work }
  202. not((taicpu(p).oper[1]^.typ=top_reg) and isaddressregister(taicpu(p).oper[1]^.reg)) and
  203. GetNextInstruction(next,next2) and
  204. MatchInstruction(next2,[A_BXX,A_SXX],[S_NO]) and
  205. (taicpu(next2).condition in [C_NE,C_EQ,C_PL,C_MI]) then
  206. begin
  207. DebugMsg('Optimizer: MOVE, TST, Jxx/Sxx to MOVE, Jxx',p);
  208. asml.remove(next);
  209. next.free;
  210. result:=true;
  211. exit;
  212. end;
  213. if GetNextInstruction(p,next) and
  214. (next.typ = ait_instruction) and
  215. (taicpu(next).opcode = taicpu(p).opcode) and
  216. (taicpu(p).opsize = taicpu(next).opsize) and
  217. (taicpu(p).oper[1]^.typ = top_reg) and
  218. MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[0]^) then
  219. begin
  220. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[1]^)) and
  221. RegEndOfLife(taicpu(next).oper[0]^.reg, taicpu(next)) then
  222. begin
  223. opstr:=opname(p);
  224. case taicpu(p).oper[0]^.typ of
  225. top_reg:
  226. { do not optimize away FPU to INT to FPU reg moves. These are used for
  227. to-single-rounding on FPUs which have no FSMOVE/FDMOVE. (KB) }
  228. if not ((taicpu(p).opcode = A_FMOVE) and
  229. (getregtype(taicpu(p).oper[0]^.reg) <> getregtype(taicpu(p).oper[1]^.reg))) then
  230. begin
  231. { move %reg0, %tmpreg; move %tmpreg, <ea> -> move %reg0, <ea> }
  232. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  233. asml.remove(next);
  234. next.free;
  235. result:=true;
  236. { also remove leftover move %reg0, %reg0, which can occur as the result
  237. of the previous optimization, if %reg0 and %tmpreg was different types
  238. (addr vs. data), so these moves were left in by the cg }
  239. if MatchOperand(taicpu(p).oper[0]^,taicpu(p).oper[1]^) then
  240. begin
  241. DebugMsg('Optimizer: '+opstr+' + '+opstr+' removed',p);
  242. GetNextInstruction(p,next);
  243. asml.remove(p);
  244. p.free;
  245. p:=next;
  246. end
  247. else
  248. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #1',p)
  249. end;
  250. top_const:
  251. begin
  252. // DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #2',p);
  253. end;
  254. top_ref:
  255. begin
  256. { move ref, %tmpreg; move %tmpreg, <ea> -> move ref, <ea> }
  257. { we only want to do this when <ea> is a reg or a simple reference }
  258. with taicpu(next).oper[1]^ do
  259. if (taicpu(next).opcode <> A_FMOVE) and
  260. ((typ = top_reg) or
  261. ((typ = top_ref) and
  262. ((ref^.index = NR_NO) or
  263. (ref^.base = NR_NO)) and
  264. (ref^.symbol = nil) and
  265. (ref^.offset = 0))) then
  266. begin
  267. DebugMsg('Optimizer: '+opstr+' + '+opstr+' to '+opstr+' #3',p);
  268. taicpu(p).loadOper(1,taicpu(next).oper[1]^);
  269. asml.remove(next);
  270. next.free;
  271. result:=true;
  272. end;
  273. end;
  274. else
  275. ;
  276. end;
  277. end;
  278. exit;
  279. end;
  280. if GetNextInstruction(p,next) and
  281. (next.typ = ait_instruction) and
  282. GetNextInstruction(next,next2) and
  283. (next2.typ = ait_instruction) and
  284. (taicpu(next).opcode <> taicpu(p).opcode) and
  285. (taicpu(next2).opcode = taicpu(p).opcode) and
  286. (taicpu(p).oper[0]^.typ = top_reg) and
  287. (taicpu(p).oper[1]^.typ = top_reg) and
  288. (getregtype(taicpu(p).oper[0]^.reg) = getregtype(taicpu(p).oper[1]^.reg)) and
  289. MatchOperand(taicpu(p).oper[1]^,taicpu(next2).oper[0]^) and
  290. MatchOperand(taicpu(next2).oper[1]^,taicpu(p).oper[0]^) and
  291. (taicpu(p).opsize = taicpu(next2).opsize) and
  292. ((taicpu(p).opcode = A_FMOVE) or
  293. (taicpu(p).opsize = taicpu(next).opsize)) then
  294. begin
  295. opstr:=opname(p);
  296. if not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next2).oper[1]^)) and
  297. not(RegInOp(taicpu(p).oper[1]^.reg,taicpu(next).oper[0]^)) and
  298. RegEndOfLife(taicpu(p).oper[0]^.reg, taicpu(next2)) then
  299. begin
  300. { move %reg0, %tmpreg
  301. op ???, %tmpreg
  302. move %tmpreg, %reg0
  303. to:
  304. op ???, %reg0 }
  305. if MatchOperand(taicpu(p).oper[1]^,taicpu(next).oper[taicpu(next).ops-1]^) then
  306. begin
  307. {
  308. Disabled, because it breaks some tests... :( (KB)
  309. DebugMsg('Optimizer: '+opstr+' + OP + '+opstr+' to OP #1',next);
  310. taicpu(next).loadOper(taicpu(next).ops-1,taicpu(p).oper[0]^);
  311. asml.remove(p);
  312. asml.remove(next2);
  313. p.free;
  314. next2.free;
  315. result:=true;
  316. }
  317. end;
  318. end;
  319. end;
  320. end;
  321. function TCpuAsmOptimizer.OptPass1LEA(var p: tai): Boolean;
  322. var
  323. next: tai;
  324. begin
  325. Result:=false;
  326. { LEA (Ax),Ax is a NOP if src and dest reg is equal, so remove it. }
  327. if not assigned(taicpu(p).oper[0]^.ref^.symbol) and
  328. (((taicpu(p).oper[0]^.ref^.base = taicpu(p).oper[1]^.reg) and
  329. (taicpu(p).oper[0]^.ref^.index = NR_NO)) or
  330. ((taicpu(p).oper[0]^.ref^.index = taicpu(p).oper[1]^.reg) and
  331. (taicpu(p).oper[0]^.ref^.base = NR_NO))) and
  332. (taicpu(p).oper[0]^.ref^.offset = 0) then
  333. begin
  334. DebugMsg('Optimizer: LEA 0(Ax),Ax removed',p);
  335. GetNextInstruction(p,next);
  336. asml.remove(p);
  337. p.free;
  338. p:=next;
  339. result:=true;
  340. exit;
  341. end;
  342. if (taicpu(p).oper[1]^.reg=NR_A7) and
  343. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  344. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  345. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  346. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  347. GetNextInstruction(p,next) and
  348. MatchInstruction(next,A_MOVEM,[S_L]) and
  349. MatchOpType(taicpu(next),top_regset,top_ref) and
  350. ((taicpu(p).oper[0]^.ref^.offset=-(PopCnt(Byte(taicpu(next).oper[0]^.dataregset))+PopCnt(Byte(taicpu(next).oper[0]^.addrregset)))*4)) and
  351. (taicpu(next).oper[1]^.ref^.base=NR_A7) and
  352. (taicpu(next).oper[1]^.ref^.index=NR_NO) and
  353. (taicpu(next).oper[1]^.ref^.symbol=nil) and
  354. (taicpu(next).oper[1]^.ref^.direction=dir_none) and
  355. not (current_settings.cputype in cpu_coldfire) then
  356. begin
  357. DebugMsg('Optimizer: LEA, MOVE(M) to MOVE(M) predecremented',p);
  358. taicpu(next).oper[1]^.ref^.direction:=dir_dec;
  359. asml.remove(p);
  360. p.free;
  361. p:=next;
  362. result:=true;
  363. exit;
  364. end;
  365. end;
  366. function TCpuAsmOptimizer.OptPass1MOVEM(var p: tai): Boolean;
  367. var
  368. next: tai;
  369. begin
  370. Result:=false;
  371. if MatchOpType(taicpu(p),top_ref,top_regset) and
  372. (taicpu(p).oper[0]^.ref^.base=NR_A7) and
  373. (taicpu(p).oper[0]^.ref^.index=NR_NO) and
  374. (taicpu(p).oper[0]^.ref^.symbol=nil) and
  375. (taicpu(p).oper[0]^.ref^.direction=dir_none) and
  376. GetNextInstruction(p,next) and
  377. MatchInstruction(next,A_LEA,[S_L]) and
  378. (taicpu(next).oper[1]^.reg=NR_A7) and
  379. (taicpu(next).oper[0]^.ref^.base=NR_A7) and
  380. (taicpu(next).oper[0]^.ref^.index=NR_NO) and
  381. (taicpu(next).oper[0]^.ref^.symbol=nil) and
  382. (taicpu(next).oper[0]^.ref^.direction=dir_none) and
  383. ((taicpu(next).oper[0]^.ref^.offset=(PopCnt(Byte(taicpu(p).oper[1]^.dataregset))+PopCnt(Byte(taicpu(p).oper[1]^.addrregset)))*4)) and
  384. not (current_settings.cputype in cpu_coldfire) then
  385. begin
  386. DebugMsg('Optimizer: MOVE(M), LEA to MOVE(M) postincremented',p);
  387. taicpu(p).oper[0]^.ref^.direction:=dir_inc;
  388. asml.remove(next);
  389. next.free;
  390. result:=true;
  391. exit;
  392. end;
  393. end;
  394. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  395. var
  396. next: tai;
  397. tmpref: treference;
  398. begin
  399. result:=false;
  400. case p.typ of
  401. ait_instruction:
  402. begin
  403. //asml.insertbefore(tai_comment.Create(strpnew('pass1 called for instr')), p);
  404. case taicpu(p).opcode of
  405. A_MOVE:
  406. result:=TryToOptimizeMove(p);
  407. A_MOVEM:
  408. result:=OptPass1MOVEM(p);
  409. A_LEA:
  410. Result:=OptPass1LEA(p);
  411. { Address register sub/add can be replaced with ADDQ/SUBQ or LEA if the value is in the
  412. SmallInt range, which is shorter to encode and faster to execute on most 68k }
  413. A_SUB,A_SUBA,A_ADD,A_ADDA:
  414. if (taicpu(p).oper[1]^.typ = top_reg) and isaddressregister(taicpu(p).oper[1]^.reg) and
  415. (taicpu(p).oper[0]^.typ = top_const) then
  416. begin
  417. if isvalueforaddqsubq(taicpu(p).oper[0]^.val) then
  418. begin
  419. DebugMsg('Optimizer: SUB/ADD #val,Ax to SUBQ/ADDQ',p);
  420. taicpu(p).opsize:=S_L; // this is safe, because we're targetting an address reg
  421. if taicpu(p).opcode in [A_ADD,A_ADDA] then
  422. taicpu(p).opcode:=A_ADDQ
  423. else
  424. taicpu(p).opcode:=A_SUBQ;
  425. result:=true;
  426. end
  427. else
  428. if isvalue16bit(abs(taicpu(p).oper[0]^.val)) then
  429. begin
  430. DebugMsg('Optimizer: SUB/ADD #val,Ax to LEA val(Ax),Ax',p);
  431. if (taicpu(p).opcode=A_SUB) or (taicpu(p).opcode=A_SUBA) then
  432. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,-taicpu(p).oper[0]^.val,ctempposinvalid,0,[])
  433. else
  434. reference_reset_base(tmpref,taicpu(p).oper[1]^.reg,taicpu(p).oper[0]^.val,ctempposinvalid,0,[]);
  435. taicpu(p).opcode:=A_LEA;
  436. taicpu(p).loadref(0,tmpref);
  437. result:=true;
  438. end;
  439. end;
  440. { MOVEA #0,Ax to SUBA Ax,Ax, because it's shorter }
  441. A_MOVEA:
  442. if (taicpu(p).oper[0]^.typ = top_const) and
  443. (taicpu(p).oper[0]^.val = 0) then
  444. begin
  445. DebugMsg('Optimizer: MOVEA #0,Ax to SUBA Ax,Ax',p);
  446. taicpu(p).opcode:=A_SUBA;
  447. taicpu(p).opsize:=S_L; { otherwise it will be .W -> BOOM }
  448. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  449. result:=true;
  450. end;
  451. { CLR.L Dx on a 68000 is slower than MOVEQ #0,Dx }
  452. A_CLR:
  453. if (current_settings.cputype in [cpu_mc68000]) and
  454. (taicpu(p).oper[0]^.typ = top_reg) and
  455. (taicpu(p).opsize = S_L) and
  456. isintregister(taicpu(p).oper[0]^.reg) then
  457. begin
  458. //DebugMsg('Optimizer: CLR.L Dx to MOVEQ #0,Dx',p);
  459. taicpu(p).opcode:=A_MOVEQ;
  460. taicpu(p).loadoper(1,taicpu(p).oper[0]^);
  461. taicpu(p).loadconst(0,0);
  462. taicpu(p).ops:=2;
  463. result:=true;
  464. end;
  465. A_JSR:
  466. begin
  467. if (cs_opt_level4 in current_settings.optimizerswitches) and
  468. GetNextInstruction(p,next) and
  469. MatchInstruction(next,A_RTS,[S_NO]) and
  470. { play safe: if any parameter is pushed on the stack, we cannot to this optimization
  471. as the bottom stack element might be a parameter and not the return address as it is expected
  472. after a call (which we simulate by a jmp)
  473. Actually, as in this case the stack pointer is no used as a frame pointer and
  474. there will be more instructions to restore the stack frame before jsr, so this
  475. is unlikedly to happen }
  476. (current_procinfo.maxpushedparasize=0) then
  477. begin
  478. DebugMsg('Optimizer: JSR, RTS to JMP',p);
  479. taicpu(p).opcode:=A_JMP;
  480. asml.remove(next);
  481. next.free;
  482. result:=true;
  483. end;
  484. end;
  485. { CMP #0,<ea> equals to TST <ea>, just shorter and TST is more flexible anyway }
  486. A_CMP,A_CMPI:
  487. if (taicpu(p).oper[0]^.typ = top_const) and
  488. (taicpu(p).oper[0]^.val = 0) then
  489. begin
  490. DebugMsg('Optimizer: CMP #0 to TST',p);
  491. taicpu(p).opcode:=A_TST;
  492. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  493. taicpu(p).clearop(1);
  494. taicpu(p).ops:=1;
  495. result:=true;
  496. end;
  497. A_FCMP:
  498. if (taicpu(p).oper[0]^.typ = top_realconst) then
  499. begin
  500. if (taicpu(p).oper[0]^.val_real = 0.0) then
  501. begin
  502. DebugMsg('Optimizer: FCMP #0.0 to FTST',p);
  503. taicpu(p).opcode:=A_FTST;
  504. taicpu(p).opsize:=S_FX;
  505. taicpu(p).loadoper(0,taicpu(p).oper[1]^);
  506. taicpu(p).clearop(1);
  507. taicpu(p).ops:=1;
  508. result:=true;
  509. end
  510. else
  511. result:=result or MaybeRealConstOperSimplify(p);
  512. end;
  513. A_FMOVE,A_FSMOVE,A_FDMOVE,
  514. A_FADD,A_FSADD,A_FDADD,A_FSUB,A_FSSUB,A_FDSUB,
  515. A_FMUL,A_FSMUL,A_FDMUL,A_FDIV,A_FSDIV,A_FDDIV,
  516. A_FSGLMUL,A_FSGLDIV:
  517. begin
  518. if (taicpu(p).opcode = A_FMOVE) and TryToOptimizeMove(p) then
  519. begin
  520. result:=true;
  521. exit;
  522. end;
  523. result:=result or MaybeRealConstOperSimplify(p);
  524. end;
  525. else
  526. ;
  527. end;
  528. end;
  529. else
  530. ;
  531. end;
  532. end;
  533. begin
  534. casmoptimizer:=TCpuAsmOptimizer;
  535. end.