agarmgas.pas 9.1 KB

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  1. {
  2. Copyright (c) 2003 by Florian Klaempfl
  3. This unit implements an asm for the ARM
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. { This unit implements the GNU Assembler writer for the ARM
  18. }
  19. unit agarmgas;
  20. {$i fpcdefs.inc}
  21. interface
  22. uses
  23. globtype,
  24. aasmtai,aasmdata,
  25. aggas,
  26. cpubase;
  27. type
  28. TARMGNUAssembler=class(TGNUassembler)
  29. constructor create(smart: boolean); override;
  30. function MakeCmdLine: TCmdStr; override;
  31. end;
  32. TArmInstrWriter=class(TCPUInstrWriter)
  33. procedure WriteInstruction(hp : tai);override;
  34. end;
  35. TArmAppleGNUAssembler=class(TAppleGNUassembler)
  36. constructor create(smart: boolean); override;
  37. end;
  38. const
  39. gas_shiftmode2str : array[tshiftmode] of string[3] = (
  40. '','lsl','lsr','asr','ror','rrx');
  41. implementation
  42. uses
  43. cutils,globals,verbose,
  44. systems,
  45. assemble,
  46. cpuinfo,aasmcpu,
  47. itcpugas,
  48. cgbase,cgutils;
  49. {****************************************************************************}
  50. { GNU Arm Assembler writer }
  51. {****************************************************************************}
  52. constructor TArmGNUAssembler.create(smart: boolean);
  53. begin
  54. inherited create(smart);
  55. InstrWriter := TArmInstrWriter.create(self);
  56. end;
  57. function TArmGNUAssembler.MakeCmdLine: TCmdStr;
  58. begin
  59. result:=inherited MakeCmdLine;
  60. if (current_settings.fputype = fpu_soft) then
  61. result:='-mfpu=softvfp '+result;
  62. end;
  63. {****************************************************************************}
  64. { GNU/Apple PPC Assembler writer }
  65. {****************************************************************************}
  66. constructor TArmAppleGNUAssembler.create(smart: boolean);
  67. begin
  68. inherited create(smart);
  69. InstrWriter := TArmInstrWriter.create(self);
  70. end;
  71. {****************************************************************************}
  72. { Helper routines for Instruction Writer }
  73. {****************************************************************************}
  74. function getreferencestring(var ref : treference) : string;
  75. var
  76. s : string;
  77. begin
  78. with ref do
  79. begin
  80. {$ifdef extdebug}
  81. // if base=NR_NO then
  82. // internalerror(200308292);
  83. // if ((index<>NR_NO) or (shiftmode<>SM_None)) and ((offset<>0) or (symbol<>nil)) then
  84. // internalerror(200308293);
  85. {$endif extdebug}
  86. if assigned(symbol) then
  87. begin
  88. if (base<>NR_NO) and not(is_pc(base)) then
  89. internalerror(200309011);
  90. s:=symbol.name;
  91. if offset<0 then
  92. s:=s+tostr(offset)
  93. else if offset>0 then
  94. s:=s+'+'+tostr(offset);
  95. end
  96. else
  97. begin
  98. s:='['+gas_regname(base);
  99. if addressmode=AM_POSTINDEXED then
  100. s:=s+']';
  101. if index<>NR_NO then
  102. begin
  103. if signindex<0 then
  104. s:=s+', -'
  105. else
  106. s:=s+', ';
  107. s:=s+gas_regname(index);
  108. if shiftmode<>SM_None then
  109. s:=s+', '+gas_shiftmode2str[shiftmode]+' #'+tostr(shiftimm);
  110. end
  111. else if offset<>0 then
  112. s:=s+', #'+tostr(offset);
  113. case addressmode of
  114. AM_OFFSET:
  115. s:=s+']';
  116. AM_PREINDEXED:
  117. s:=s+']!';
  118. end;
  119. end;
  120. end;
  121. getreferencestring:=s;
  122. end;
  123. const
  124. shiftmode2str: array[tshiftmode] of string[3] = ('','lsl','lsr','asr','ror','rrx');
  125. function getopstr(const o:toper) : string;
  126. var
  127. hs : string;
  128. first : boolean;
  129. r : tsuperregister;
  130. begin
  131. case o.typ of
  132. top_reg:
  133. getopstr:=gas_regname(o.reg);
  134. top_shifterop:
  135. begin
  136. if (o.shifterop^.rs<>NR_NO) and (o.shifterop^.shiftimm=0) then
  137. getopstr:=shiftmode2str[o.shifterop^.shiftmode]+' '+gas_regname(o.shifterop^.rs)
  138. else if (o.shifterop^.rs=NR_NO) then
  139. getopstr:=shiftmode2str[o.shifterop^.shiftmode]+' #'+tostr(o.shifterop^.shiftimm)
  140. else internalerror(200308282);
  141. end;
  142. top_const:
  143. getopstr:='#'+tostr(longint(o.val));
  144. top_regset:
  145. begin
  146. getopstr:='{';
  147. first:=true;
  148. for r:=RS_R0 to RS_R15 do
  149. if r in o.regset^ then
  150. begin
  151. if not(first) then
  152. getopstr:=getopstr+',';
  153. getopstr:=getopstr+gas_regname(newreg(R_INTREGISTER,r,R_SUBWHOLE));
  154. first:=false;
  155. end;
  156. getopstr:=getopstr+'}';
  157. end;
  158. top_ref:
  159. if o.ref^.refaddr=addr_full then
  160. begin
  161. hs:=o.ref^.symbol.name;
  162. if o.ref^.offset>0 then
  163. hs:=hs+'+'+tostr(o.ref^.offset)
  164. else
  165. if o.ref^.offset<0 then
  166. hs:=hs+tostr(o.ref^.offset);
  167. getopstr:=hs;
  168. end
  169. else
  170. getopstr:=getreferencestring(o.ref^);
  171. else
  172. internalerror(2002070604);
  173. end;
  174. end;
  175. Procedure TArmInstrWriter.WriteInstruction(hp : tai);
  176. var op: TAsmOp;
  177. s: string;
  178. i: byte;
  179. sep: string[3];
  180. begin
  181. op:=taicpu(hp).opcode;
  182. s:=#9+gas_op2str[op]+cond2str[taicpu(hp).condition]+oppostfix2str[taicpu(hp).oppostfix];
  183. if taicpu(hp).ops<>0 then
  184. begin
  185. sep:=#9;
  186. for i:=0 to taicpu(hp).ops-1 do
  187. begin
  188. // debug code
  189. // writeln(s);
  190. // writeln(taicpu(hp).fileinfo.line);
  191. { LDM and STM use references as first operand but they are written like a register }
  192. if (i=0) and (op in [A_LDM,A_STM]) then
  193. begin
  194. case taicpu(hp).oper[0]^.typ of
  195. top_ref:
  196. begin
  197. s:=s+sep+gas_regname(taicpu(hp).oper[0]^.ref^.index);
  198. if taicpu(hp).oper[0]^.ref^.addressmode=AM_PREINDEXED then
  199. s:=s+'!';
  200. end;
  201. top_reg:
  202. s:=s+sep+gas_regname(taicpu(hp).oper[0]^.reg);
  203. else
  204. internalerror(200311292);
  205. end;
  206. end
  207. { register count of SFM and LFM is written without # }
  208. else if (i=1) and (op in [A_SFM,A_LFM]) then
  209. begin
  210. case taicpu(hp).oper[1]^.typ of
  211. top_const:
  212. s:=s+sep+tostr(taicpu(hp).oper[1]^.val);
  213. else
  214. internalerror(200311292);
  215. end;
  216. end
  217. else
  218. s:=s+sep+getopstr(taicpu(hp).oper[i]^);
  219. sep:=',';
  220. end;
  221. end;
  222. owner.AsmWriteLn(s);
  223. end;
  224. const
  225. as_arm_gas_info : tasminfo =
  226. (
  227. id : as_gas;
  228. idtxt : 'AS';
  229. asmbin : 'as';
  230. asmcmd : '-o $OBJ $ASM';
  231. supported_targets : [system_arm_linux,system_arm_wince,system_arm_gba,system_arm_palmos,system_arm_nds,system_arm_embedded,system_arm_symbian];
  232. flags : [af_allowdirect,af_needar,af_smartlink_sections];
  233. labelprefix : '.L';
  234. comment : '# ';
  235. );
  236. as_arm_gas_darwin_info : tasminfo =
  237. (
  238. id : as_darwin;
  239. idtxt : 'AS-Darwin';
  240. asmbin : 'as';
  241. asmcmd : '-o $OBJ $ASM -arch arm';
  242. supported_targets : [system_arm_darwin];
  243. flags : [af_allowdirect,af_needar,af_smartlink_sections,af_supports_dwarf];
  244. labelprefix : 'L';
  245. comment : '# ';
  246. );
  247. begin
  248. RegisterAssembler(as_arm_gas_info,TARMGNUAssembler);
  249. RegisterAssembler(as_arm_gas_darwin_info,TArmAppleGNUAssembler);
  250. end.