aoptcpu.pas 15 KB

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  1. {
  2. Copyright (c) 1998-2002 by Jonas Maebe, member of the Free Pascal
  3. Development Team
  4. This unit implements the ARM optimizer object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. Unit aoptcpu;
  19. {$i fpcdefs.inc}
  20. Interface
  21. uses cpubase, aasmtai, aopt, aoptcpub;
  22. Type
  23. TCpuAsmOptimizer = class(TAsmOptimizer)
  24. { uses the same constructor as TAopObj }
  25. function PeepHoleOptPass1Cpu(var p: tai): boolean; override;
  26. procedure PeepHoleOptPass2;override;
  27. End;
  28. Implementation
  29. uses
  30. verbose,
  31. aasmbase,aasmcpu;
  32. function CanBeCond(p : tai) : boolean;
  33. begin
  34. result:=(p.typ=ait_instruction) and (taicpu(p).condition=C_None);
  35. end;
  36. function TCpuAsmOptimizer.PeepHoleOptPass1Cpu(var p: tai): boolean;
  37. var
  38. next1: tai;
  39. hp1: tai;
  40. begin
  41. result := false;
  42. case p.typ of
  43. ait_instruction:
  44. begin
  45. case taicpu(p).opcode of
  46. A_MOV:
  47. begin
  48. { fold
  49. mov reg1,reg0, shift imm1
  50. mov reg1,reg1, shift imm2
  51. to
  52. mov reg1,reg0, shift imm1+imm2
  53. }
  54. if (taicpu(p).ops=3) and
  55. (taicpu(p).oper[0]^.typ = top_reg) and
  56. (taicpu(p).oper[2]^.typ = top_shifterop) and
  57. (taicpu(p).oper[2]^.shifterop^.rs = NR_NO) and
  58. getnextinstruction(p,next1) and
  59. (next1.typ = ait_instruction) and
  60. (taicpu(next1).opcode = A_MOV) and
  61. (taicpu(p).condition=taicpu(next1).condition) and
  62. (taicpu(next1).ops=3) and
  63. (taicpu(next1).oper[0]^.typ = top_reg) and
  64. (taicpu(p).oper[0]^.reg=taicpu(next1).oper[0]^.reg) and
  65. (taicpu(next1).oper[1]^.typ = top_reg) and
  66. (taicpu(p).oper[0]^.reg=taicpu(next1).oper[1]^.reg) and
  67. (taicpu(next1).oper[2]^.typ = top_shifterop) and
  68. (taicpu(next1).oper[2]^.shifterop^.rs = NR_NO) and
  69. (taicpu(p).oper[2]^.shifterop^.shiftmode=taicpu(next1).oper[2]^.shifterop^.shiftmode) then
  70. begin
  71. inc(taicpu(p).oper[2]^.shifterop^.shiftimm,taicpu(next1).oper[2]^.shifterop^.shiftimm);
  72. { avoid overflows }
  73. if taicpu(p).oper[2]^.shifterop^.shiftimm>31 then
  74. case taicpu(p).oper[2]^.shifterop^.shiftmode of
  75. SM_ROR:
  76. taicpu(p).oper[2]^.shifterop^.shiftimm:=taicpu(p).oper[2]^.shifterop^.shiftimm and 31;
  77. SM_ASR:
  78. taicpu(p).oper[2]^.shifterop^.shiftimm:=31;
  79. SM_LSR,
  80. SM_LSL:
  81. begin
  82. hp1:=taicpu.op_reg_const(A_MOV,taicpu(p).oper[0]^.reg,0);
  83. InsertLLItem(p.previous, p.next, hp1);
  84. p.free;
  85. p:=hp1;
  86. end;
  87. else
  88. internalerror(2008072803);
  89. end;
  90. asml.remove(next1);
  91. next1.free;
  92. result := true;
  93. end;
  94. end;
  95. A_AND:
  96. begin
  97. {
  98. change
  99. and reg2,reg1,const1
  100. and reg2,reg2,const2
  101. to
  102. and reg2,reg1,(const1 and const2)
  103. }
  104. if (taicpu(p).oper[0]^.typ = top_reg) and
  105. (taicpu(p).oper[1]^.typ = top_reg) and
  106. (taicpu(p).oper[2]^.typ = top_const) and
  107. GetNextInstruction(p, hp1) and
  108. (tai(hp1).typ = ait_instruction) and
  109. (taicpu(hp1).opcode = A_AND) and
  110. (taicpu(p).condition=taicpu(hp1).condition) and
  111. (taicpu(p).oppostfix=PF_None) and
  112. (taicpu(hp1).oper[0]^.typ = top_reg) and
  113. (taicpu(hp1).oper[1]^.typ = top_reg) and
  114. (taicpu(hp1).oper[2]^.typ = top_const) and
  115. (taicpu(p).oper[0]^.reg = taicpu(hp1).oper[0]^.reg) and
  116. (taicpu(hp1).oper[0]^.reg = taicpu(hp1).oper[1]^.reg) then
  117. begin
  118. taicpu(p).loadConst(2,taicpu(p).oper[2]^.val and taicpu(hp1).oper[2]^.val);
  119. taicpu(p).oppostfix:=taicpu(hp1).oppostfix;
  120. asml.remove(hp1);
  121. hp1.free;
  122. end;
  123. end;
  124. end;
  125. end;
  126. end;
  127. end;
  128. { instructions modifying the CPSR can be only the last instruction }
  129. function MustBeLast(p : tai) : boolean;
  130. begin
  131. Result:=(p.typ=ait_instruction) and
  132. ((taicpu(p).opcode in [A_BL,A_BLX,A_CMP,A_CMN,A_SWI,A_TEQ,A_TST,A_CMF,A_CMFE {,A_MSR}]) or
  133. ((taicpu(p).ops>=1) and (taicpu(p).oper[0]^.typ=top_reg) and (taicpu(p).oper[0]^.reg=NR_PC)) or
  134. (taicpu(p).oppostfix=PF_S));
  135. end;
  136. procedure TCpuAsmOptimizer.PeepHoleOptPass2;
  137. var
  138. p,hp1,hp2: tai;
  139. l : longint;
  140. condition : tasmcond;
  141. hp3: tai;
  142. WasLast: boolean;
  143. { UsedRegs, TmpUsedRegs: TRegSet; }
  144. begin
  145. p := BlockStart;
  146. { UsedRegs := []; }
  147. while (p <> BlockEnd) Do
  148. begin
  149. { UpdateUsedRegs(UsedRegs, tai(p.next)); }
  150. case p.Typ Of
  151. Ait_Instruction:
  152. begin
  153. case taicpu(p).opcode Of
  154. A_B:
  155. if taicpu(p).condition<>C_None then
  156. begin
  157. { check for
  158. Bxx xxx
  159. <several instructions>
  160. xxx:
  161. }
  162. l:=0;
  163. WasLast:=False;
  164. GetNextInstruction(p, hp1);
  165. while assigned(hp1) and
  166. (l<=4) and
  167. CanBeCond(hp1) and
  168. { stop on labels }
  169. not(hp1.typ=ait_label) do
  170. begin
  171. inc(l);
  172. if MustBeLast(hp1) then
  173. begin
  174. WasLast:=True;
  175. GetNextInstruction(hp1,hp1);
  176. break;
  177. end
  178. else
  179. GetNextInstruction(hp1,hp1);
  180. end;
  181. if assigned(hp1) then
  182. begin
  183. if FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol),hp1) then
  184. begin
  185. if (l<=4) and (l>0) then
  186. begin
  187. condition:=inverse_cond(taicpu(p).condition);
  188. hp2:=p;
  189. GetNextInstruction(p,hp1);
  190. p:=hp1;
  191. repeat
  192. if hp1.typ=ait_instruction then
  193. taicpu(hp1).condition:=condition;
  194. if MustBeLast(hp1) then
  195. begin
  196. GetNextInstruction(hp1,hp1);
  197. break;
  198. end
  199. else
  200. GetNextInstruction(hp1,hp1);
  201. until not(assigned(hp1)) or
  202. not(CanBeCond(hp1)) or
  203. (hp1.typ=ait_label);
  204. { wait with removing else GetNextInstruction could
  205. ignore the label if it was the only usage in the
  206. jump moved away }
  207. tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol).decrefs;
  208. asml.remove(hp2);
  209. hp2.free;
  210. continue;
  211. end;
  212. end
  213. else
  214. { do not perform further optimizations if there is inctructon
  215. in block #1 which can not be optimized.
  216. }
  217. if not WasLast then
  218. begin
  219. { check further for
  220. Bcc xxx
  221. <several instructions 1>
  222. B yyy
  223. xxx:
  224. <several instructions 2>
  225. yyy:
  226. }
  227. { hp2 points to jmp yyy }
  228. hp2:=hp1;
  229. { skip hp1 to xxx }
  230. GetNextInstruction(hp1, hp1);
  231. if assigned(hp2) and
  232. assigned(hp1) and
  233. (l<=3) and
  234. (hp2.typ=ait_instruction) and
  235. (taicpu(hp2).is_jmp) and
  236. (taicpu(hp2).condition=C_None) and
  237. { real label and jump, no further references to the
  238. label are allowed }
  239. (tasmlabel(taicpu(p).oper[0]^.ref^.symbol).getrefs=2) and
  240. FindLabel(tasmlabel(taicpu(p).oper[0]^.ref^.symbol),hp1) then
  241. begin
  242. l:=0;
  243. { skip hp1 to <several moves 2> }
  244. GetNextInstruction(hp1, hp1);
  245. while assigned(hp1) and
  246. CanBeCond(hp1) do
  247. begin
  248. inc(l);
  249. GetNextInstruction(hp1, hp1);
  250. end;
  251. { hp1 points to yyy: }
  252. if assigned(hp1) and
  253. FindLabel(tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol),hp1) then
  254. begin
  255. condition:=inverse_cond(taicpu(p).condition);
  256. GetNextInstruction(p,hp1);
  257. hp3:=p;
  258. p:=hp1;
  259. repeat
  260. if hp1.typ=ait_instruction then
  261. taicpu(hp1).condition:=condition;
  262. GetNextInstruction(hp1,hp1);
  263. until not(assigned(hp1)) or
  264. not(CanBeCond(hp1));
  265. { hp2 is still at jmp yyy }
  266. GetNextInstruction(hp2,hp1);
  267. { hp2 is now at xxx: }
  268. condition:=inverse_cond(condition);
  269. GetNextInstruction(hp1,hp1);
  270. { hp1 is now at <several movs 2> }
  271. repeat
  272. taicpu(hp1).condition:=condition;
  273. GetNextInstruction(hp1,hp1);
  274. until not(assigned(hp1)) or
  275. not(CanBeCond(hp1)) or
  276. (hp1.typ=ait_label);
  277. {
  278. asml.remove(hp1.next)
  279. hp1.next.free;
  280. asml.remove(hp1);
  281. hp1.free;
  282. }
  283. { remove Bcc }
  284. tasmlabel(taicpu(hp3).oper[0]^.ref^.symbol).decrefs;
  285. asml.remove(hp3);
  286. hp3.free;
  287. { remove jmp }
  288. tasmlabel(taicpu(hp2).oper[0]^.ref^.symbol).decrefs;
  289. asml.remove(hp2);
  290. hp2.free;
  291. continue;
  292. end;
  293. end;
  294. end;
  295. end;
  296. end;
  297. end;
  298. end;
  299. end;
  300. p := tai(p.next)
  301. end;
  302. end;
  303. begin
  304. casmoptimizer:=TCpuAsmOptimizer;
  305. End.