cgobj.pas 169 KB

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  1. {
  2. Copyright (c) 1998-2005 by Florian Klaempfl
  3. Member of the Free Pascal development team
  4. This unit implements the basic code generator object
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; if not, write to the Free Software
  15. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  16. ****************************************************************************
  17. }
  18. {# @abstract(Abstract code generator unit)
  19. Abstreact code generator unit. This contains the base class
  20. to implement for all new supported processors.
  21. WARNING: None of the routines implemented in these modules,
  22. or their descendants, should use the temp. allocator, as
  23. these routines may be called inside genentrycode, and the
  24. stack frame is already setup!
  25. }
  26. unit cgobj;
  27. {$i fpcdefs.inc}
  28. interface
  29. uses
  30. cclasses,globtype,constexp,
  31. cpubase,cgbase,cgutils,parabase,
  32. aasmbase,aasmtai,aasmdata,aasmcpu,
  33. symconst,symtype,symdef,rgobj
  34. ;
  35. type
  36. talignment = (AM_NATURAL,AM_NONE,AM_2BYTE,AM_4BYTE,AM_8BYTE);
  37. tsubsetloadopt = (SL_REG,SL_REGNOSRCMASK,SL_SETZERO,SL_SETMAX);
  38. {# @abstract(Abstract code generator)
  39. This class implements an abstract instruction generator. Some of
  40. the methods of this class are generic, while others must
  41. be overriden for all new processors which will be supported
  42. by Free Pascal. For 32-bit processors, the base class
  43. sould be @link(tcg64f32) and not @var(tcg).
  44. }
  45. tcg = class
  46. public
  47. { how many times is this current code executed }
  48. executionweight : longint;
  49. alignment : talignment;
  50. rg : array[tregistertype] of trgobj;
  51. {$ifdef flowgraph}
  52. aktflownode:word;
  53. {$endif}
  54. {************************************************}
  55. { basic routines }
  56. constructor create;
  57. {# Initialize the register allocators needed for the codegenerator.}
  58. procedure init_register_allocators;virtual;
  59. {# Clean up the register allocators needed for the codegenerator.}
  60. procedure done_register_allocators;virtual;
  61. {# Set whether live_start or live_end should be updated when allocating registers, needed when e.g. generating initcode after the rest of the code. }
  62. procedure set_regalloc_live_range_direction(dir: TRADirection);
  63. {$ifdef flowgraph}
  64. procedure init_flowgraph;
  65. procedure done_flowgraph;
  66. {$endif}
  67. {# Gets a register suitable to do integer operations on.}
  68. function getintregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  69. {# Gets a register suitable to do integer operations on.}
  70. function getaddressregister(list:TAsmList):Tregister;virtual;
  71. function getfpuregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  72. function getmmregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  73. function getflagregister(list:TAsmList;size:Tcgsize):Tregister;virtual;
  74. {Does the generic cg need SIMD registers, like getmmxregister? Or should
  75. the cpu specific child cg object have such a method?}
  76. procedure add_reg_instruction(instr:Tai;r:tregister);virtual;
  77. procedure add_move_instruction(instr:Taicpu);virtual;
  78. function uses_registers(rt:Tregistertype):boolean;virtual;
  79. {# Get a specific register.}
  80. procedure getcpuregister(list:TAsmList;r:Tregister);virtual;
  81. procedure ungetcpuregister(list:TAsmList;r:Tregister);virtual;
  82. {# Get multiple registers specified.}
  83. procedure alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  84. {# Free multiple registers specified.}
  85. procedure dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);virtual;
  86. procedure allocallcpuregisters(list:TAsmList);virtual;
  87. procedure deallocallcpuregisters(list:TAsmList);virtual;
  88. procedure do_register_allocation(list:TAsmList;headertai:tai);virtual;
  89. procedure translate_register(var reg : tregister);
  90. function makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  91. {# Emit a label to the instruction stream. }
  92. procedure a_label(list : TAsmList;l : tasmlabel);virtual;
  93. {# Allocates register r by inserting a pai_realloc record }
  94. procedure a_reg_alloc(list : TAsmList;r : tregister);
  95. {# Deallocates register r by inserting a pa_regdealloc record}
  96. procedure a_reg_dealloc(list : TAsmList;r : tregister);
  97. { Synchronize register, make sure it is still valid }
  98. procedure a_reg_sync(list : TAsmList;r : tregister);
  99. {# Pass a parameter, which is located in a register, to a routine.
  100. This routine should push/send the parameter to the routine, as
  101. required by the specific processor ABI and routine modifiers.
  102. This must be overriden for each CPU target.
  103. @param(size size of the operand in the register)
  104. @param(r register source of the operand)
  105. @param(cgpara where the parameter will be stored)
  106. }
  107. procedure a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);virtual;
  108. {# Pass a parameter, which is a constant, to a routine.
  109. A generic version is provided. This routine should
  110. be overriden for optimization purposes if the cpu
  111. permits directly sending this type of parameter.
  112. @param(size size of the operand in constant)
  113. @param(a value of constant to send)
  114. @param(cgpara where the parameter will be stored)
  115. }
  116. procedure a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);virtual;
  117. {# Pass the value of a parameter, which is located in memory, to a routine.
  118. A generic version is provided. This routine should
  119. be overriden for optimization purposes if the cpu
  120. permits directly sending this type of parameter.
  121. @param(size size of the operand in constant)
  122. @param(r Memory reference of value to send)
  123. @param(cgpara where the parameter will be stored)
  124. }
  125. procedure a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);virtual;
  126. {# Pass the value of a parameter, which can be located either in a register or memory location,
  127. to a routine.
  128. A generic version is provided.
  129. @param(l location of the operand to send)
  130. @param(nr parameter number (starting from one) of routine (from left to right))
  131. @param(cgpara where the parameter will be stored)
  132. }
  133. procedure a_param_loc(list : TAsmList;const l : tlocation;const cgpara : TCGPara);
  134. {# Pass the address of a reference to a routine. This routine
  135. will calculate the address of the reference, and pass this
  136. calculated address as a parameter.
  137. A generic version is provided. This routine should
  138. be overriden for optimization purposes if the cpu
  139. permits directly sending this type of parameter.
  140. @param(r reference to get address from)
  141. @param(nr parameter number (starting from one) of routine (from left to right))
  142. }
  143. procedure a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);virtual;
  144. { Remarks:
  145. * If a method specifies a size you have only to take care
  146. of that number of bits, i.e. load_const_reg with OP_8 must
  147. only load the lower 8 bit of the specified register
  148. the rest of the register can be undefined
  149. if necessary the compiler will call a method
  150. to zero or sign extend the register
  151. * The a_load_XX_XX with OP_64 needn't to be
  152. implemented for 32 bit
  153. processors, the code generator takes care of that
  154. * the addr size is for work with the natural pointer
  155. size
  156. * the procedures without fpu/mm are only for integer usage
  157. * normally the first location is the source and the
  158. second the destination
  159. }
  160. {# Emits instruction to call the method specified by symbol name.
  161. This routine must be overriden for each new target cpu.
  162. There is no a_call_ref because loading the reference will use
  163. a temp register on most cpu's resulting in conflicts with the
  164. registers used for the parameters (PFV)
  165. }
  166. procedure a_call_name(list : TAsmList;const s : string; weak: boolean);virtual; abstract;
  167. procedure a_call_reg(list : TAsmList;reg : tregister);virtual; abstract;
  168. procedure a_call_ref(list : TAsmList;ref : treference);virtual; abstract;
  169. { same as a_call_name, might be overriden on certain architectures to emit
  170. static calls without usage of a got trampoline }
  171. procedure a_call_name_static(list : TAsmList;const s : string);virtual;
  172. { move instructions }
  173. procedure a_load_const_reg(list : TAsmList;size : tcgsize;a : aint;register : tregister);virtual; abstract;
  174. procedure a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);virtual;
  175. procedure a_load_const_loc(list : TAsmList;a : aint;const loc : tlocation);
  176. procedure a_load_reg_ref(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual; abstract;
  177. procedure a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);virtual;
  178. procedure a_load_reg_reg(list : TAsmList;fromsize,tosize : tcgsize;reg1,reg2 : tregister);virtual; abstract;
  179. procedure a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  180. procedure a_load_ref_reg(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual; abstract;
  181. procedure a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);virtual;
  182. procedure a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);virtual;
  183. procedure a_load_loc_reg(list : TAsmList;tosize: tcgsize; const loc: tlocation; reg : tregister);
  184. procedure a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  185. procedure a_load_loc_subsetreg(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  186. procedure a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  187. procedure a_loadaddr_ref_reg(list : TAsmList;const ref : treference;r : tregister);virtual; abstract;
  188. procedure a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister); virtual;
  189. procedure a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister); virtual;
  190. procedure a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister); virtual;
  191. procedure a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference); virtual;
  192. procedure a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister); virtual;
  193. procedure a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister); virtual;
  194. procedure a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation); virtual;
  195. procedure a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister); virtual;
  196. procedure a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  197. procedure a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference); virtual;
  198. procedure a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference); virtual;
  199. procedure a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference); virtual;
  200. procedure a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference); virtual;
  201. procedure a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation); virtual;
  202. procedure a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister); virtual;
  203. procedure a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference); virtual;
  204. { bit test instructions }
  205. procedure a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister); virtual;
  206. procedure a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister); virtual;
  207. procedure a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister); virtual;
  208. procedure a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister); virtual;
  209. procedure a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister); virtual;
  210. procedure a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  211. procedure a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  212. { bit set/clear instructions }
  213. procedure a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister); virtual;
  214. procedure a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference); virtual;
  215. procedure a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister); virtual;
  216. procedure a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister); virtual;
  217. procedure a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference); virtual;
  218. procedure a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  219. procedure a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  220. { fpu move instructions }
  221. procedure a_loadfpu_reg_reg(list: TAsmList; fromsize, tosize:tcgsize; reg1, reg2: tregister); virtual; abstract;
  222. procedure a_loadfpu_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister); virtual; abstract;
  223. procedure a_loadfpu_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference); virtual; abstract;
  224. procedure a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  225. procedure a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  226. procedure a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  227. procedure a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);virtual;
  228. procedure a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);virtual;
  229. { vector register move instructions }
  230. procedure a_loadmm_reg_reg(list: TAsmList; fromsize, tosize : tcgsize;reg1, reg2: tregister;shuffle : pmmshuffle); virtual;
  231. procedure a_loadmm_ref_reg(list: TAsmList; fromsize, tosize : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  232. procedure a_loadmm_reg_ref(list: TAsmList; fromsize, tosize : tcgsize;reg: tregister; const ref: treference;shuffle : pmmshuffle); virtual;
  233. procedure a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  234. procedure a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  235. procedure a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  236. procedure a_parammm_ref(list: TAsmList; size: tcgsize; const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  237. procedure a_parammm_loc(list: TAsmList; const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle); virtual;
  238. procedure a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size : tcgsize;src,dst: tregister;shuffle : pmmshuffle); virtual;
  239. procedure a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle); virtual;
  240. procedure a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle); virtual;
  241. procedure a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister;const ref: treference; shuffle : pmmshuffle); virtual;
  242. { basic arithmetic operations }
  243. { note: for operators which require only one argument (not, neg), use }
  244. { the op_reg_reg, op_reg_ref or op_reg_loc methods and keep in mind }
  245. { that in this case the *second* operand is used as both source and }
  246. { destination (JM) }
  247. procedure a_op_const_reg(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; reg: TRegister); virtual; abstract;
  248. procedure a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: Aint; const ref: TReference); virtual;
  249. procedure a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister); virtual;
  250. procedure a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference); virtual;
  251. procedure a_op_const_loc(list : TAsmList; Op: TOpCG; a: Aint; const loc: tlocation);
  252. procedure a_op_reg_reg(list : TAsmList; Op: TOpCG; size: TCGSize; reg1, reg2: TRegister); virtual; abstract;
  253. procedure a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize; reg: TRegister; const ref: TReference); virtual;
  254. procedure a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister); virtual;
  255. procedure a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister); virtual;
  256. procedure a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference); virtual;
  257. procedure a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  258. procedure a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  259. { trinary operations for processors that support them, 'emulated' }
  260. { on others. None with "ref" arguments since I don't think there }
  261. { are any processors that support it (JM) }
  262. procedure a_op_const_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister); virtual;
  263. procedure a_op_reg_reg_reg(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister); virtual;
  264. procedure a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  265. procedure a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation); virtual;
  266. { comparison operations }
  267. procedure a_cmp_const_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;reg : tregister;
  268. l : tasmlabel);virtual; abstract;
  269. procedure a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  270. l : tasmlabel); virtual;
  271. procedure a_cmp_const_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; a: aint; const loc: tlocation;
  272. l : tasmlabel);
  273. procedure a_cmp_reg_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg1,reg2 : tregister;l : tasmlabel); virtual; abstract;
  274. procedure a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel); virtual;
  275. procedure a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;reg : tregister; const ref: treference; l : tasmlabel); virtual;
  276. procedure a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel); virtual;
  277. procedure a_cmp_subsetref_reg_label(list : TAsmList; subsetsize, cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel); virtual;
  278. procedure a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  279. procedure a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  280. procedure a_cmp_ref_loc_label(list: TAsmList; size: tcgsize;cmp_op: topcmp; const ref: treference; const loc: tlocation;
  281. l : tasmlabel);
  282. procedure a_jmp_name(list : TAsmList;const s : string); virtual; abstract;
  283. procedure a_jmp_always(list : TAsmList;l: tasmlabel); virtual; abstract;
  284. procedure a_jmp_flags(list : TAsmList;const f : TResFlags;l: tasmlabel); virtual; abstract;
  285. {# Depending on the value to check in the flags, either sets the register reg to one (if the flag is set)
  286. or zero (if the flag is cleared). The size parameter indicates the destination size register.
  287. }
  288. procedure g_flags2reg(list: TAsmList; size: TCgSize; const f: tresflags; reg: TRegister); virtual; abstract;
  289. procedure g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference); virtual;
  290. {
  291. This routine tries to optimize the op_const_reg/ref opcode, and should be
  292. called at the start of a_op_const_reg/ref. It returns the actual opcode
  293. to emit, and the constant value to emit. This function can opcode OP_NONE to
  294. remove the opcode and OP_MOVE to replace it with a simple load
  295. @param(op The opcode to emit, returns the opcode which must be emitted)
  296. @param(a The constant which should be emitted, returns the constant which must
  297. be emitted)
  298. }
  299. procedure optimize_op_const(var op: topcg; var a : aint);virtual;
  300. {#
  301. This routine is used in exception management nodes. It should
  302. save the exception reason currently in the FUNCTION_RETURN_REG. The
  303. save should be done either to a temp (pointed to by href).
  304. or on the stack (pushing the value on the stack).
  305. The size of the value to save is OS_S32. The default version
  306. saves the exception reason to a temp. memory area.
  307. }
  308. procedure g_exception_reason_save(list : TAsmList; const href : treference);virtual;
  309. {#
  310. This routine is used in exception management nodes. It should
  311. save the exception reason constant. The
  312. save should be done either to a temp (pointed to by href).
  313. or on the stack (pushing the value on the stack).
  314. The size of the value to save is OS_S32. The default version
  315. saves the exception reason to a temp. memory area.
  316. }
  317. procedure g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);virtual;
  318. {#
  319. This routine is used in exception management nodes. It should
  320. load the exception reason to the FUNCTION_RETURN_REG. The saved value
  321. should either be in the temp. area (pointed to by href , href should
  322. *NOT* be freed) or on the stack (the value should be popped).
  323. The size of the value to save is OS_S32. The default version
  324. saves the exception reason to a temp. memory area.
  325. }
  326. procedure g_exception_reason_load(list : TAsmList; const href : treference);virtual;
  327. procedure g_maybe_testself(list : TAsmList;reg:tregister);
  328. procedure g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  329. {# This should emit the opcode to copy len bytes from the source
  330. to destination.
  331. It must be overriden for each new target processor.
  332. @param(source Source reference of copy)
  333. @param(dest Destination reference of copy)
  334. }
  335. procedure g_concatcopy(list : TAsmList;const source,dest : treference;len : aint);virtual; abstract;
  336. {# This should emit the opcode to copy len bytes from the an unaligned source
  337. to destination.
  338. It must be overriden for each new target processor.
  339. @param(source Source reference of copy)
  340. @param(dest Destination reference of copy)
  341. }
  342. procedure g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);virtual;
  343. {# This should emit the opcode to a shortrstring from the source
  344. to destination.
  345. @param(source Source reference of copy)
  346. @param(dest Destination reference of copy)
  347. }
  348. procedure g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  349. procedure g_copyvariant(list : TAsmList;const source,dest : treference);
  350. procedure g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  351. procedure g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  352. procedure g_initialize(list : TAsmList;t : tdef;const ref : treference);
  353. procedure g_finalize(list : TAsmList;t : tdef;const ref : treference);
  354. {# Generates range checking code. It is to note
  355. that this routine does not need to be overriden,
  356. as it takes care of everything.
  357. @param(p Node which contains the value to check)
  358. @param(todef Type definition of node to range check)
  359. }
  360. procedure g_rangecheck(list: TAsmList; const l:tlocation; fromdef,todef: tdef); virtual;
  361. {# Generates overflow checking code for a node }
  362. procedure g_overflowcheck(list: TAsmList; const Loc:tlocation; def:tdef); virtual;abstract;
  363. procedure g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);virtual;
  364. procedure g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);virtual;
  365. procedure g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);virtual;
  366. {# Emits instructions when compilation is done in profile
  367. mode (this is set as a command line option). The default
  368. behavior does nothing, should be overriden as required.
  369. }
  370. procedure g_profilecode(list : TAsmList);virtual;
  371. {# Emits instruction for allocating @var(size) bytes at the stackpointer
  372. @param(size Number of bytes to allocate)
  373. }
  374. procedure g_stackpointer_alloc(list : TAsmList;size : longint);virtual; abstract;
  375. {# Emits instruction for allocating the locals in entry
  376. code of a routine. This is one of the first
  377. routine called in @var(genentrycode).
  378. @param(localsize Number of bytes to allocate as locals)
  379. }
  380. procedure g_proc_entry(list : TAsmList;localsize : longint;nostackframe:boolean);virtual; abstract;
  381. {# Emits instructions for returning from a subroutine.
  382. Should also restore the framepointer and stack.
  383. @param(parasize Number of bytes of parameters to deallocate from stack)
  384. }
  385. procedure g_proc_exit(list : TAsmList;parasize:longint;nostackframe:boolean);virtual;abstract;
  386. {# This routine is called when generating the code for the entry point
  387. of a routine. It should save all registers which are not used in this
  388. routine, and which should be declared as saved in the std_saved_registers
  389. set.
  390. This routine is mainly used when linking to code which is generated
  391. by ABI-compliant compilers (like GCC), to make sure that the reserved
  392. registers of that ABI are not clobbered.
  393. @param(usedinproc Registers which are used in the code of this routine)
  394. }
  395. procedure g_save_registers(list:TAsmList);virtual;
  396. {# This routine is called when generating the code for the exit point
  397. of a routine. It should restore all registers which were previously
  398. saved in @var(g_save_standard_registers).
  399. @param(usedinproc Registers which are used in the code of this routine)
  400. }
  401. procedure g_restore_registers(list:TAsmList);virtual;
  402. procedure g_intf_wrapper(list: TAsmList; procdef: tprocdef; const labelname: string; ioffset: longint);virtual;abstract;
  403. procedure g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);virtual;
  404. function g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;virtual;
  405. { generate a stub which only purpose is to pass control the given external method,
  406. setting up any additional environment before doing so (if required).
  407. The default implementation issues a jump instruction to the external name. }
  408. procedure g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string); virtual;
  409. { initialize the pic/got register }
  410. procedure g_maybe_got_init(list: TAsmList); virtual;
  411. protected
  412. procedure get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  413. procedure a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister); virtual;
  414. procedure a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister); virtual;
  415. procedure a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt); virtual;
  416. procedure a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt); virtual;
  417. function get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  418. function get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  419. function get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  420. end;
  421. {$ifndef cpu64bitalu}
  422. {# @abstract(Abstract code generator for 64 Bit operations)
  423. This class implements an abstract code generator class
  424. for 64 Bit operations.
  425. }
  426. tcg64 = class
  427. procedure a_load64_const_ref(list : TAsmList;value : int64;const ref : treference);virtual;abstract;
  428. procedure a_load64_reg_ref(list : TAsmList;reg : tregister64;const ref : treference);virtual;abstract;
  429. procedure a_load64_ref_reg(list : TAsmList;const ref : treference;reg : tregister64);virtual;abstract;
  430. procedure a_load64_reg_reg(list : TAsmList;regsrc,regdst : tregister64);virtual;abstract;
  431. procedure a_load64_const_reg(list : TAsmList;value : int64;reg : tregister64);virtual;abstract;
  432. procedure a_load64_loc_reg(list : TAsmList;const l : tlocation;reg : tregister64);virtual;abstract;
  433. procedure a_load64_loc_ref(list : TAsmList;const l : tlocation;const ref : treference);virtual;abstract;
  434. procedure a_load64_const_loc(list : TAsmList;value : int64;const l : tlocation);virtual;abstract;
  435. procedure a_load64_reg_loc(list : TAsmList;reg : tregister64;const l : tlocation);virtual;abstract;
  436. procedure a_load64_subsetref_reg(list : TAsmList; const sref: tsubsetreference; destreg: tregister64);virtual;abstract;
  437. procedure a_load64_reg_subsetref(list : TAsmList; fromreg: tregister64; const sref: tsubsetreference);virtual;abstract;
  438. procedure a_load64_const_subsetref(list: TAsmlist; a: int64; const sref: tsubsetreference);virtual;abstract;
  439. procedure a_load64_ref_subsetref(list : TAsmList; const fromref: treference; const sref: tsubsetreference);virtual;abstract;
  440. procedure a_load64_subsetref_subsetref(list: TAsmlist; const fromsref, tosref: tsubsetreference); virtual;abstract;
  441. procedure a_load64_subsetref_ref(list : TAsmList; const sref: tsubsetreference; const destref: treference); virtual;abstract;
  442. procedure a_load64_loc_subsetref(list : TAsmList; const l: tlocation; const sref : tsubsetreference);
  443. procedure a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  444. procedure a_load64high_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  445. procedure a_load64low_reg_ref(list : TAsmList;reg : tregister;const ref : treference);virtual;abstract;
  446. procedure a_load64high_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  447. procedure a_load64low_ref_reg(list : TAsmList;const ref : treference;reg : tregister);virtual;abstract;
  448. procedure a_load64high_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  449. procedure a_load64low_loc_reg(list : TAsmList;const l : tlocation;reg : tregister);virtual;abstract;
  450. procedure a_op64_ref_reg(list : TAsmList;op:TOpCG;size : tcgsize;const ref : treference;reg : tregister64);virtual;abstract;
  451. procedure a_op64_reg_reg(list : TAsmList;op:TOpCG;size : tcgsize;regsrc,regdst : tregister64);virtual;abstract;
  452. procedure a_op64_reg_ref(list : TAsmList;op:TOpCG;size : tcgsize;regsrc : tregister64;const ref : treference);virtual;abstract;
  453. procedure a_op64_const_reg(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;regdst : tregister64);virtual;abstract;
  454. procedure a_op64_const_ref(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const ref : treference);virtual;abstract;
  455. procedure a_op64_const_loc(list : TAsmList;op:TOpCG;size : tcgsize;value : int64;const l: tlocation);virtual;abstract;
  456. procedure a_op64_reg_loc(list : TAsmList;op:TOpCG;size : tcgsize;reg : tregister64;const l : tlocation);virtual;abstract;
  457. procedure a_op64_loc_reg(list : TAsmList;op:TOpCG;size : tcgsize;const l : tlocation;reg64 : tregister64);virtual;abstract;
  458. procedure a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64);virtual;
  459. procedure a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);virtual;
  460. procedure a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  461. procedure a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);virtual;
  462. procedure a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  463. procedure a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  464. procedure a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  465. procedure a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  466. procedure a_param64_reg(list : TAsmList;reg64 : tregister64;const loc : TCGPara);virtual;abstract;
  467. procedure a_param64_const(list : TAsmList;value : int64;const loc : TCGPara);virtual;abstract;
  468. procedure a_param64_ref(list : TAsmList;const r : treference;const loc : TCGPara);virtual;abstract;
  469. procedure a_param64_loc(list : TAsmList;const l : tlocation;const loc : TCGPara);virtual;abstract;
  470. {
  471. This routine tries to optimize the const_reg opcode, and should be
  472. called at the start of a_op64_const_reg. It returns the actual opcode
  473. to emit, and the constant value to emit. If this routine returns
  474. TRUE, @var(no) instruction should be emitted (.eg : imul reg by 1 )
  475. @param(op The opcode to emit, returns the opcode which must be emitted)
  476. @param(a The constant which should be emitted, returns the constant which must
  477. be emitted)
  478. @param(reg The register to emit the opcode with, returns the register with
  479. which the opcode will be emitted)
  480. }
  481. function optimize64_op_const_reg(list: TAsmList; var op: topcg; var a : int64; var reg: tregister64): boolean;virtual;abstract;
  482. { override to catch 64bit rangechecks }
  483. procedure g_rangecheck64(list: TAsmList; const l:tlocation; fromdef,todef: tdef);virtual;abstract;
  484. end;
  485. {$endif cpu64bitalu}
  486. var
  487. {# Main code generator class }
  488. cg : tcg;
  489. {$ifndef cpu64bitalu}
  490. {# Code generator class for all operations working with 64-Bit operands }
  491. cg64 : tcg64;
  492. {$endif cpu64bitalu}
  493. implementation
  494. uses
  495. globals,options,systems,
  496. verbose,defutil,paramgr,symsym,
  497. tgobj,cutils,procinfo,
  498. ncgrtti;
  499. {*****************************************************************************
  500. basic functionallity
  501. ******************************************************************************}
  502. constructor tcg.create;
  503. begin
  504. end;
  505. {*****************************************************************************
  506. register allocation
  507. ******************************************************************************}
  508. procedure tcg.init_register_allocators;
  509. begin
  510. fillchar(rg,sizeof(rg),0);
  511. add_reg_instruction_hook:=@add_reg_instruction;
  512. executionweight:=1;
  513. end;
  514. procedure tcg.done_register_allocators;
  515. begin
  516. { Safety }
  517. fillchar(rg,sizeof(rg),0);
  518. add_reg_instruction_hook:=nil;
  519. end;
  520. {$ifdef flowgraph}
  521. procedure Tcg.init_flowgraph;
  522. begin
  523. aktflownode:=0;
  524. end;
  525. procedure Tcg.done_flowgraph;
  526. begin
  527. end;
  528. {$endif}
  529. function tcg.getintregister(list:TAsmList;size:Tcgsize):Tregister;
  530. begin
  531. if not assigned(rg[R_INTREGISTER]) then
  532. internalerror(200312122);
  533. result:=rg[R_INTREGISTER].getregister(list,cgsize2subreg(R_INTREGISTER,size));
  534. end;
  535. function tcg.getfpuregister(list:TAsmList;size:Tcgsize):Tregister;
  536. begin
  537. if not assigned(rg[R_FPUREGISTER]) then
  538. internalerror(200312123);
  539. result:=rg[R_FPUREGISTER].getregister(list,cgsize2subreg(R_FPUREGISTER,size));
  540. end;
  541. function tcg.getmmregister(list:TAsmList;size:Tcgsize):Tregister;
  542. begin
  543. if not assigned(rg[R_MMREGISTER]) then
  544. internalerror(2003121214);
  545. result:=rg[R_MMREGISTER].getregister(list,cgsize2subreg(R_MMREGISTER,size));
  546. end;
  547. function tcg.getaddressregister(list:TAsmList):Tregister;
  548. begin
  549. if assigned(rg[R_ADDRESSREGISTER]) then
  550. result:=rg[R_ADDRESSREGISTER].getregister(list,R_SUBWHOLE)
  551. else
  552. begin
  553. if not assigned(rg[R_INTREGISTER]) then
  554. internalerror(200312121);
  555. result:=rg[R_INTREGISTER].getregister(list,R_SUBWHOLE);
  556. end;
  557. end;
  558. function Tcg.makeregsize(list:TAsmList;reg:Tregister;size:Tcgsize):Tregister;
  559. var
  560. subreg:Tsubregister;
  561. begin
  562. subreg:=cgsize2subreg(getregtype(reg),size);
  563. result:=reg;
  564. setsubreg(result,subreg);
  565. { notify RA }
  566. if result<>reg then
  567. list.concat(tai_regalloc.resize(result));
  568. end;
  569. procedure tcg.getcpuregister(list:TAsmList;r:Tregister);
  570. begin
  571. if not assigned(rg[getregtype(r)]) then
  572. internalerror(200312125);
  573. rg[getregtype(r)].getcpuregister(list,r);
  574. end;
  575. procedure tcg.ungetcpuregister(list:TAsmList;r:Tregister);
  576. begin
  577. if not assigned(rg[getregtype(r)]) then
  578. internalerror(200312126);
  579. rg[getregtype(r)].ungetcpuregister(list,r);
  580. end;
  581. procedure tcg.alloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  582. begin
  583. if assigned(rg[rt]) then
  584. rg[rt].alloccpuregisters(list,r)
  585. else
  586. internalerror(200310092);
  587. end;
  588. procedure tcg.allocallcpuregisters(list:TAsmList);
  589. begin
  590. alloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  591. {$ifndef i386}
  592. alloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  593. {$ifdef cpumm}
  594. alloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  595. {$endif cpumm}
  596. {$endif i386}
  597. end;
  598. procedure tcg.dealloccpuregisters(list:TAsmList;rt:Tregistertype;const r:Tcpuregisterset);
  599. begin
  600. if assigned(rg[rt]) then
  601. rg[rt].dealloccpuregisters(list,r)
  602. else
  603. internalerror(200310093);
  604. end;
  605. procedure tcg.deallocallcpuregisters(list:TAsmList);
  606. begin
  607. dealloccpuregisters(list,R_INTREGISTER,paramanager.get_volatile_registers_int(pocall_default));
  608. {$ifndef i386}
  609. dealloccpuregisters(list,R_FPUREGISTER,paramanager.get_volatile_registers_fpu(pocall_default));
  610. {$ifdef cpumm}
  611. dealloccpuregisters(list,R_MMREGISTER,paramanager.get_volatile_registers_mm(pocall_default));
  612. {$endif cpumm}
  613. {$endif i386}
  614. end;
  615. function tcg.uses_registers(rt:Tregistertype):boolean;
  616. begin
  617. if assigned(rg[rt]) then
  618. result:=rg[rt].uses_registers
  619. else
  620. result:=false;
  621. end;
  622. procedure tcg.add_reg_instruction(instr:Tai;r:tregister);
  623. var
  624. rt : tregistertype;
  625. begin
  626. rt:=getregtype(r);
  627. { Only add it when a register allocator is configured.
  628. No IE can be generated, because the VMT is written
  629. without a valid rg[] }
  630. if assigned(rg[rt]) then
  631. rg[rt].add_reg_instruction(instr,r,cg.executionweight);
  632. end;
  633. procedure tcg.add_move_instruction(instr:Taicpu);
  634. var
  635. rt : tregistertype;
  636. begin
  637. rt:=getregtype(instr.oper[O_MOV_SOURCE]^.reg);
  638. if assigned(rg[rt]) then
  639. rg[rt].add_move_instruction(instr)
  640. else
  641. internalerror(200310095);
  642. end;
  643. procedure tcg.set_regalloc_live_range_direction(dir: TRADirection);
  644. var
  645. rt : tregistertype;
  646. begin
  647. for rt:=low(rg) to high(rg) do
  648. begin
  649. if assigned(rg[rt]) then
  650. rg[rt].live_range_direction:=dir;
  651. end;
  652. end;
  653. procedure tcg.do_register_allocation(list:TAsmList;headertai:tai);
  654. var
  655. rt : tregistertype;
  656. begin
  657. for rt:=R_FPUREGISTER to R_SPECIALREGISTER do
  658. begin
  659. if assigned(rg[rt]) then
  660. rg[rt].do_register_allocation(list,headertai);
  661. end;
  662. { running the other register allocator passes could require addition int/addr. registers
  663. when spilling so run int/addr register allocation at the end }
  664. if assigned(rg[R_INTREGISTER]) then
  665. rg[R_INTREGISTER].do_register_allocation(list,headertai);
  666. if assigned(rg[R_ADDRESSREGISTER]) then
  667. rg[R_ADDRESSREGISTER].do_register_allocation(list,headertai);
  668. end;
  669. procedure tcg.translate_register(var reg : tregister);
  670. begin
  671. rg[getregtype(reg)].translate_register(reg);
  672. end;
  673. procedure tcg.a_reg_alloc(list : TAsmList;r : tregister);
  674. begin
  675. list.concat(tai_regalloc.alloc(r,nil));
  676. end;
  677. procedure tcg.a_reg_dealloc(list : TAsmList;r : tregister);
  678. begin
  679. list.concat(tai_regalloc.dealloc(r,nil));
  680. end;
  681. procedure tcg.a_reg_sync(list : TAsmList;r : tregister);
  682. var
  683. instr : tai;
  684. begin
  685. instr:=tai_regalloc.sync(r);
  686. list.concat(instr);
  687. add_reg_instruction(instr,r);
  688. end;
  689. procedure tcg.a_label(list : TAsmList;l : tasmlabel);
  690. begin
  691. list.concat(tai_label.create(l));
  692. end;
  693. {*****************************************************************************
  694. for better code generation these methods should be overridden
  695. ******************************************************************************}
  696. procedure tcg.a_param_reg(list : TAsmList;size : tcgsize;r : tregister;const cgpara : TCGPara);
  697. var
  698. ref : treference;
  699. begin
  700. cgpara.check_simple_location;
  701. case cgpara.location^.loc of
  702. LOC_REGISTER,LOC_CREGISTER:
  703. a_load_reg_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  704. LOC_REFERENCE,LOC_CREFERENCE:
  705. begin
  706. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  707. a_load_reg_ref(list,size,cgpara.location^.size,r,ref);
  708. end
  709. else
  710. internalerror(2002071004);
  711. end;
  712. end;
  713. procedure tcg.a_param_const(list : TAsmList;size : tcgsize;a : aint;const cgpara : TCGPara);
  714. var
  715. ref : treference;
  716. begin
  717. cgpara.check_simple_location;
  718. case cgpara.location^.loc of
  719. LOC_REGISTER,LOC_CREGISTER:
  720. a_load_const_reg(list,cgpara.location^.size,a,cgpara.location^.register);
  721. LOC_REFERENCE,LOC_CREFERENCE:
  722. begin
  723. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  724. a_load_const_ref(list,cgpara.location^.size,a,ref);
  725. end
  726. else
  727. internalerror(2002071004);
  728. end;
  729. end;
  730. procedure tcg.a_param_ref(list : TAsmList;size : tcgsize;const r : treference;const cgpara : TCGPara);
  731. var
  732. ref : treference;
  733. begin
  734. cgpara.check_simple_location;
  735. case cgpara.location^.loc of
  736. LOC_REGISTER,LOC_CREGISTER:
  737. a_load_ref_reg(list,size,cgpara.location^.size,r,cgpara.location^.register);
  738. LOC_REFERENCE,LOC_CREFERENCE:
  739. begin
  740. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  741. if (size <> OS_NO) and
  742. (tcgsize2size[size] < sizeof(aint)) then
  743. begin
  744. if (cgpara.size = OS_NO) or
  745. assigned(cgpara.location^.next) then
  746. internalerror(2006052401);
  747. a_load_ref_ref(list,size,cgpara.size,r,ref);
  748. end
  749. else
  750. { use concatcopy, because the parameter can be larger than }
  751. { what the OS_* constants can handle }
  752. g_concatcopy(list,r,ref,cgpara.intsize);
  753. end
  754. else
  755. internalerror(2002071004);
  756. end;
  757. end;
  758. procedure tcg.a_param_loc(list : TAsmList;const l:tlocation;const cgpara : TCGPara);
  759. begin
  760. case l.loc of
  761. LOC_REGISTER,
  762. LOC_CREGISTER :
  763. a_param_reg(list,l.size,l.register,cgpara);
  764. LOC_CONSTANT :
  765. a_param_const(list,l.size,l.value,cgpara);
  766. LOC_CREFERENCE,
  767. LOC_REFERENCE :
  768. a_param_ref(list,l.size,l.reference,cgpara);
  769. else
  770. internalerror(2002032211);
  771. end;
  772. end;
  773. procedure tcg.a_paramaddr_ref(list : TAsmList;const r : treference;const cgpara : TCGPara);
  774. var
  775. hr : tregister;
  776. begin
  777. cgpara.check_simple_location;
  778. if cgpara.location^.loc in [LOC_CREGISTER,LOC_REGISTER] then
  779. a_loadaddr_ref_reg(list,r,cgpara.location^.register)
  780. else
  781. begin
  782. hr:=getaddressregister(list);
  783. a_loadaddr_ref_reg(list,r,hr);
  784. a_param_reg(list,OS_ADDR,hr,cgpara);
  785. end;
  786. end;
  787. {****************************************************************************
  788. some generic implementations
  789. ****************************************************************************}
  790. {$ifopt r+}
  791. {$define rangeon}
  792. {$r-}
  793. {$endif}
  794. {$ifopt q+}
  795. {$define overflowon}
  796. {$q-}
  797. {$endif}
  798. procedure tcg.a_load_subsetreg_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; destreg: tregister);
  799. var
  800. bitmask: aword;
  801. tmpreg: tregister;
  802. stopbit: byte;
  803. begin
  804. tmpreg:=getintregister(list,sreg.subsetregsize);
  805. if (subsetsize in [OS_S8..OS_S128]) then
  806. begin
  807. { sign extend in case the value has a bitsize mod 8 <> 0 }
  808. { both instructions will be optimized away if not }
  809. a_op_const_reg_reg(list,OP_SHL,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.startbit-sreg.bitlen,sreg.subsetreg,tmpreg);
  810. a_op_const_reg(list,OP_SAR,sreg.subsetregsize,(tcgsize2size[sreg.subsetregsize]*8)-sreg.bitlen,tmpreg);
  811. end
  812. else
  813. begin
  814. a_op_const_reg_reg(list,OP_SHR,sreg.subsetregsize,sreg.startbit,sreg.subsetreg,tmpreg);
  815. stopbit := sreg.startbit + sreg.bitlen;
  816. // on x86(64), 1 shl 32(64) = 1 instead of 0
  817. // use aword to prevent overflow with 1 shl 31
  818. if (stopbit - sreg.startbit <> AIntBits) then
  819. bitmask := (aword(1) shl (stopbit - sreg.startbit)) - 1
  820. else
  821. bitmask := high(aword);
  822. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),tmpreg);
  823. end;
  824. tmpreg := makeregsize(list,tmpreg,subsetsize);
  825. a_load_reg_reg(list,tcgsize2unsigned[subsetsize],subsetsize,tmpreg,tmpreg);
  826. a_load_reg_reg(list,subsetsize,tosize,tmpreg,destreg);
  827. end;
  828. procedure tcg.a_load_reg_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister);
  829. begin
  830. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,sreg,SL_REG);
  831. end;
  832. procedure tcg.a_load_regconst_subsetreg_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sreg: tsubsetregister; slopt: tsubsetloadopt);
  833. var
  834. bitmask: aword;
  835. tmpreg: tregister;
  836. stopbit: byte;
  837. begin
  838. stopbit := sreg.startbit + sreg.bitlen;
  839. // on x86(64), 1 shl 32(64) = 1 instead of 0
  840. if (stopbit <> AIntBits) then
  841. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  842. else
  843. bitmask := not(high(aword) xor ((aword(1) shl sreg.startbit)-1));
  844. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  845. begin
  846. tmpreg:=getintregister(list,sreg.subsetregsize);
  847. a_load_reg_reg(list,fromsize,sreg.subsetregsize,fromreg,tmpreg);
  848. a_op_const_reg(list,OP_SHL,sreg.subsetregsize,sreg.startbit,tmpreg);
  849. if (slopt <> SL_REGNOSRCMASK) then
  850. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(not(bitmask)),tmpreg);
  851. end;
  852. if (slopt <> SL_SETMAX) then
  853. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  854. case slopt of
  855. SL_SETZERO : ;
  856. SL_SETMAX :
  857. if (sreg.bitlen <> AIntBits) then
  858. a_op_const_reg(list,OP_OR,sreg.subsetregsize,
  859. aint(((aword(1) shl sreg.bitlen)-1) shl sreg.startbit),
  860. sreg.subsetreg)
  861. else
  862. a_load_const_reg(list,sreg.subsetregsize,-1,sreg.subsetreg);
  863. else
  864. a_op_reg_reg(list,OP_OR,sreg.subsetregsize,tmpreg,sreg.subsetreg);
  865. end;
  866. end;
  867. procedure tcg.a_load_subsetreg_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg, tosreg: tsubsetregister);
  868. var
  869. tmpreg: tregister;
  870. bitmask: aword;
  871. stopbit: byte;
  872. begin
  873. if (fromsreg.bitlen >= tosreg.bitlen) then
  874. begin
  875. tmpreg := getintregister(list,tosreg.subsetregsize);
  876. a_load_reg_reg(list,fromsreg.subsetregsize,tosreg.subsetregsize,fromsreg.subsetreg,tmpreg);
  877. if (fromsreg.startbit <= tosreg.startbit) then
  878. a_op_const_reg(list,OP_SHL,tosreg.subsetregsize,tosreg.startbit-fromsreg.startbit,tmpreg)
  879. else
  880. a_op_const_reg(list,OP_SHR,tosreg.subsetregsize,fromsreg.startbit-tosreg.startbit,tmpreg);
  881. stopbit := tosreg.startbit + tosreg.bitlen;
  882. // on x86(64), 1 shl 32(64) = 1 instead of 0
  883. if (stopbit <> AIntBits) then
  884. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl tosreg.startbit)-1))
  885. else
  886. bitmask := (aword(1) shl tosreg.startbit) - 1;
  887. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(bitmask),tosreg.subsetreg);
  888. a_op_const_reg(list,OP_AND,tosreg.subsetregsize,aint(not(bitmask)),tmpreg);
  889. a_op_reg_reg(list,OP_OR,tosreg.subsetregsize,tmpreg,tosreg.subsetreg);
  890. end
  891. else
  892. begin
  893. tmpreg := getintregister(list,tosubsetsize);
  894. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  895. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  896. end;
  897. end;
  898. procedure tcg.a_load_subsetreg_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sreg: tsubsetregister; const destref: treference);
  899. var
  900. tmpreg: tregister;
  901. begin
  902. tmpreg := getintregister(list,tosize);
  903. a_load_subsetreg_reg(list,subsetsize,tosize,sreg,tmpreg);
  904. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  905. end;
  906. procedure tcg.a_load_ref_subsetreg(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sreg: tsubsetregister);
  907. var
  908. tmpreg: tregister;
  909. begin
  910. tmpreg := getintregister(list,subsetsize);
  911. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  912. a_load_reg_subsetreg(list,subsetsize,subsetsize,tmpreg,sreg);
  913. end;
  914. procedure tcg.a_load_const_subsetreg(list: TAsmlist; subsetsize: tcgsize; a: aint; const sreg: tsubsetregister);
  915. var
  916. bitmask: aword;
  917. stopbit: byte;
  918. begin
  919. stopbit := sreg.startbit + sreg.bitlen;
  920. // on x86(64), 1 shl 32(64) = 1 instead of 0
  921. if (stopbit <> AIntBits) then
  922. bitmask := not(((aword(1) shl stopbit)-1) xor ((aword(1) shl sreg.startbit)-1))
  923. else
  924. bitmask := (aword(1) shl sreg.startbit) - 1;
  925. if (((aword(a) shl sreg.startbit) and not bitmask) <> not bitmask) then
  926. a_op_const_reg(list,OP_AND,sreg.subsetregsize,aint(bitmask),sreg.subsetreg);
  927. a_op_const_reg(list,OP_OR,sreg.subsetregsize,aint((aword(a) shl sreg.startbit) and not(bitmask)),sreg.subsetreg);
  928. end;
  929. procedure tcg.a_load_loc_subsetref(list : TAsmList;subsetsize: tcgsize; const loc: tlocation; const sref : tsubsetreference);
  930. begin
  931. case loc.loc of
  932. LOC_REFERENCE,LOC_CREFERENCE:
  933. a_load_ref_subsetref(list,loc.size,subsetsize,loc.reference,sref);
  934. LOC_REGISTER,LOC_CREGISTER:
  935. a_load_reg_subsetref(list,loc.size,subsetsize,loc.register,sref);
  936. LOC_CONSTANT:
  937. a_load_const_subsetref(list,subsetsize,loc.value,sref);
  938. LOC_SUBSETREG,LOC_CSUBSETREG:
  939. a_load_subsetreg_subsetref(list,loc.size,subsetsize,loc.sreg,sref);
  940. LOC_SUBSETREF,LOC_CSUBSETREF:
  941. a_load_subsetref_subsetref(list,loc.size,subsetsize,loc.sref,sref);
  942. else
  943. internalerror(200608053);
  944. end;
  945. end;
  946. (*
  947. Subsetrefs are used for (bit)packed arrays and (bit)packed records stored
  948. in memory. They are like a regular reference, but contain an extra bit
  949. offset (either constant -startbit- or variable -bitindexreg-, always OS_INT)
  950. and a bit length (always constant).
  951. Bit packed values are stored differently in memory depending on whether we
  952. are on a big or a little endian system (compatible with at least GPC). The
  953. size of the basic working unit is always the smallest power-of-2 byte size
  954. which can contain the bit value (so 1..8 bits -> 1 byte, 9..16 bits -> 2
  955. bytes, 17..32 bits -> 4 bytes etc).
  956. On a big endian, 5-bit: values are stored like this:
  957. 11111222 22333334 44445555 56666677 77788888
  958. The leftmost bit of each 5-bit value corresponds to the most significant
  959. bit.
  960. On little endian, it goes like this:
  961. 22211111 43333322 55554444 77666665 88888777
  962. In this case, per byte the left-most bit is more significant than those on
  963. the right, but the bits in the next byte are all more significant than
  964. those in the previous byte (e.g., the 222 in the first byte are the low
  965. three bits of that value, while the 22 in the second byte are the upper
  966. two bits.
  967. Big endian, 9 bit values:
  968. 11111111 12222222 22333333 33344444 ...
  969. Little endian, 9 bit values:
  970. 11111111 22222221 33333322 44444333 ...
  971. This is memory representation and the 16 bit values are byteswapped.
  972. Similarly as in the previous case, the 2222222 string contains the lower
  973. bits of value 2 and the 22 string contains the upper bits. Once loaded into
  974. registers (two 16 bit registers in the current implementation, although a
  975. single 32 bit register would be possible too, in particular if 32 bit
  976. alignment can be guaranteed), this becomes:
  977. 22222221 11111111 44444333 33333322 ...
  978. (l)ow u l l u l u
  979. The startbit/bitindex in a subsetreference always refers to
  980. a) on big endian: the most significant bit of the value
  981. (bits counted from left to right, both memory an registers)
  982. b) on little endian: the least significant bit when the value
  983. is loaded in a register (bit counted from right to left)
  984. Although a) results in more complex code for big endian systems, it's
  985. needed for compatibility both with GPC and with e.g. bitpacked arrays in
  986. Apple's universal interfaces which depend on these layout differences).
  987. Note: when changing the loadsize calculated in get_subsetref_load_info,
  988. make sure the appropriate alignment is guaranteed, at least in case of
  989. {$defined cpurequiresproperalignment}.
  990. *)
  991. procedure tcg.get_subsetref_load_info(const sref: tsubsetreference; out loadsize: tcgsize; out extra_load: boolean);
  992. var
  993. intloadsize: aint;
  994. begin
  995. intloadsize := packedbitsloadsize(sref.bitlen);
  996. if (intloadsize = 0) then
  997. internalerror(2006081310);
  998. if (intloadsize > sizeof(aint)) then
  999. intloadsize := sizeof(aint);
  1000. loadsize := int_cgsize(intloadsize);
  1001. if (loadsize = OS_NO) then
  1002. internalerror(2006081311);
  1003. if (sref.bitlen > sizeof(aint)*8) then
  1004. internalerror(2006081312);
  1005. extra_load :=
  1006. (sref.bitlen <> 1) and
  1007. ((sref.bitindexreg <> NR_NO) or
  1008. (byte(sref.startbit+sref.bitlen) > byte(intloadsize*8)));
  1009. end;
  1010. procedure tcg.a_load_subsetref_regs_noindex(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg, extra_value_reg: tregister);
  1011. var
  1012. restbits: byte;
  1013. begin
  1014. if (target_info.endian = endian_big) then
  1015. begin
  1016. { valuereg contains the upper bits, extra_value_reg the lower }
  1017. restbits := (sref.bitlen - (loadbitsize - sref.startbit));
  1018. if (subsetsize in [OS_S8..OS_S128]) then
  1019. begin
  1020. { sign extend }
  1021. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize+sref.startbit,valuereg);
  1022. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1023. end
  1024. else
  1025. begin
  1026. a_op_const_reg(list,OP_SHL,OS_INT,restbits,valuereg);
  1027. { mask other bits }
  1028. if (sref.bitlen <> AIntBits) then
  1029. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1030. end;
  1031. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-restbits,extra_value_reg)
  1032. end
  1033. else
  1034. begin
  1035. { valuereg contains the lower bits, extra_value_reg the upper }
  1036. a_op_const_reg(list,OP_SHR,OS_INT,sref.startbit,valuereg);
  1037. if (subsetsize in [OS_S8..OS_S128]) then
  1038. begin
  1039. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen+loadbitsize-sref.startbit,extra_value_reg);
  1040. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,extra_value_reg);
  1041. end
  1042. else
  1043. begin
  1044. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.startbit,extra_value_reg);
  1045. { mask other bits }
  1046. if (sref.bitlen <> AIntBits) then
  1047. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),extra_value_reg);
  1048. end;
  1049. end;
  1050. { merge }
  1051. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1052. end;
  1053. procedure tcg.a_load_subsetref_regs_index(list: TAsmList; subsetsize: tcgsize; loadbitsize: byte; const sref: tsubsetreference; valuereg: tregister);
  1054. var
  1055. hl: tasmlabel;
  1056. tmpref: treference;
  1057. extra_value_reg,
  1058. tmpreg: tregister;
  1059. begin
  1060. tmpreg := getintregister(list,OS_INT);
  1061. tmpref := sref.ref;
  1062. inc(tmpref.offset,loadbitsize div 8);
  1063. extra_value_reg := getintregister(list,OS_INT);
  1064. if (target_info.endian = endian_big) then
  1065. begin
  1066. { since this is a dynamic index, it's possible that the value }
  1067. { is entirely in valuereg. }
  1068. { get the data in valuereg in the right place }
  1069. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1070. if (subsetsize in [OS_S8..OS_S128]) then
  1071. begin
  1072. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1073. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg)
  1074. end
  1075. else
  1076. begin
  1077. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1078. if (loadbitsize <> AIntBits) then
  1079. { mask left over bits }
  1080. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1081. end;
  1082. tmpreg := getintregister(list,OS_INT);
  1083. { ensure we don't load anything past the end of the array }
  1084. current_asmdata.getjumplabel(hl);
  1085. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1086. { the bits in extra_value_reg (if any) start at the most significant bit => }
  1087. { extra_value_reg must be shr by (loadbitsize-sref.bitlen)+(loadsize-sref.bitindex) }
  1088. { => = -(sref.bitindex+(sref.bitlen-2*loadbitsize)) }
  1089. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpreg);
  1090. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1091. { load next "loadbitsize" bits of the array }
  1092. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1093. a_op_reg_reg(list,OP_SHR,OS_INT,tmpreg,extra_value_reg);
  1094. { if there are no bits in extra_value_reg, then sref.bitindex was }
  1095. { < loadsize-sref.bitlen, and therefore tmpreg will now be >= loadsize }
  1096. { => extra_value_reg is now 0 }
  1097. { merge }
  1098. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1099. { no need to mask, necessary masking happened earlier on }
  1100. a_label(list,hl);
  1101. end
  1102. else
  1103. begin
  1104. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1105. { ensure we don't load anything past the end of the array }
  1106. current_asmdata.getjumplabel(hl);
  1107. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1108. { Y-x = -(Y-x) }
  1109. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpreg);
  1110. a_op_reg_reg(list,OP_NEG,OS_INT,tmpreg,tmpreg);
  1111. { load next "loadbitsize" bits of the array }
  1112. a_load_ref_reg(list,int_cgsize(loadbitsize div 8),OS_INT,tmpref,extra_value_reg);
  1113. { tmpreg is in the range 1..<cpu_bitsize>-1 -> always ok }
  1114. a_op_reg_reg(list,OP_SHL,OS_INT,tmpreg,extra_value_reg);
  1115. { merge }
  1116. a_op_reg_reg(list,OP_OR,OS_INT,extra_value_reg,valuereg);
  1117. a_label(list,hl);
  1118. { sign extend or mask other bits }
  1119. if (subsetsize in [OS_S8..OS_S128]) then
  1120. begin
  1121. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1122. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1123. end
  1124. else
  1125. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1126. end;
  1127. end;
  1128. procedure tcg.a_load_subsetref_reg(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; destreg: tregister);
  1129. var
  1130. tmpref: treference;
  1131. valuereg,extra_value_reg: tregister;
  1132. tosreg: tsubsetregister;
  1133. loadsize: tcgsize;
  1134. loadbitsize: byte;
  1135. extra_load: boolean;
  1136. begin
  1137. get_subsetref_load_info(sref,loadsize,extra_load);
  1138. loadbitsize := tcgsize2size[loadsize]*8;
  1139. { load the (first part) of the bit sequence }
  1140. valuereg := getintregister(list,OS_INT);
  1141. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1142. if not extra_load then
  1143. begin
  1144. { everything is guaranteed to be in a single register of loadsize }
  1145. if (sref.bitindexreg = NR_NO) then
  1146. begin
  1147. { use subsetreg routine, it may have been overridden with an optimized version }
  1148. tosreg.subsetreg := valuereg;
  1149. tosreg.subsetregsize := OS_INT;
  1150. { subsetregs always count bits from right to left }
  1151. if (target_info.endian = endian_big) then
  1152. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1153. else
  1154. tosreg.startbit := sref.startbit;
  1155. tosreg.bitlen := sref.bitlen;
  1156. a_load_subsetreg_reg(list,subsetsize,tosize,tosreg,destreg);
  1157. exit;
  1158. end
  1159. else
  1160. begin
  1161. if (sref.startbit <> 0) then
  1162. internalerror(2006081510);
  1163. if (target_info.endian = endian_big) then
  1164. begin
  1165. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,valuereg);
  1166. if (subsetsize in [OS_S8..OS_S128]) then
  1167. begin
  1168. { sign extend to entire register }
  1169. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-loadbitsize,valuereg);
  1170. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1171. end
  1172. else
  1173. a_op_const_reg(list,OP_SHR,OS_INT,loadbitsize-sref.bitlen,valuereg);
  1174. end
  1175. else
  1176. begin
  1177. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,valuereg);
  1178. if (subsetsize in [OS_S8..OS_S128]) then
  1179. begin
  1180. a_op_const_reg(list,OP_SHL,OS_INT,AIntBits-sref.bitlen,valuereg);
  1181. a_op_const_reg(list,OP_SAR,OS_INT,AIntBits-sref.bitlen,valuereg);
  1182. end
  1183. end;
  1184. { mask other bits/sign extend }
  1185. if not(subsetsize in [OS_S8..OS_S128]) then
  1186. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),valuereg);
  1187. end
  1188. end
  1189. else
  1190. begin
  1191. { load next value as well }
  1192. extra_value_reg := getintregister(list,OS_INT);
  1193. if (sref.bitindexreg = NR_NO) then
  1194. begin
  1195. tmpref := sref.ref;
  1196. inc(tmpref.offset,loadbitsize div 8);
  1197. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1198. { can be overridden to optimize }
  1199. a_load_subsetref_regs_noindex(list,subsetsize,loadbitsize,sref,valuereg,extra_value_reg)
  1200. end
  1201. else
  1202. begin
  1203. if (sref.startbit <> 0) then
  1204. internalerror(2006080610);
  1205. a_load_subsetref_regs_index(list,subsetsize,loadbitsize,sref,valuereg);
  1206. end;
  1207. end;
  1208. { store in destination }
  1209. { avoid unnecessary sign extension and zeroing }
  1210. valuereg := makeregsize(list,valuereg,OS_INT);
  1211. destreg := makeregsize(list,destreg,OS_INT);
  1212. a_load_reg_reg(list,OS_INT,OS_INT,valuereg,destreg);
  1213. destreg := makeregsize(list,destreg,tosize);
  1214. end;
  1215. procedure tcg.a_load_reg_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference);
  1216. begin
  1217. a_load_regconst_subsetref_intern(list,fromsize,subsetsize,fromreg,sref,SL_REG);
  1218. end;
  1219. procedure tcg.a_load_regconst_subsetref_intern(list : TAsmList; fromsize, subsetsize: tcgsize; fromreg: tregister; const sref: tsubsetreference; slopt: tsubsetloadopt);
  1220. var
  1221. hl: tasmlabel;
  1222. tmpreg, tmpindexreg, valuereg, extra_value_reg, maskreg: tregister;
  1223. tosreg, fromsreg: tsubsetregister;
  1224. tmpref: treference;
  1225. bitmask: aword;
  1226. loadsize: tcgsize;
  1227. loadbitsize: byte;
  1228. extra_load: boolean;
  1229. begin
  1230. { the register must be able to contain the requested value }
  1231. if (tcgsize2size[fromsize]*8 < sref.bitlen) then
  1232. internalerror(2006081613);
  1233. get_subsetref_load_info(sref,loadsize,extra_load);
  1234. loadbitsize := tcgsize2size[loadsize]*8;
  1235. { load the (first part) of the bit sequence }
  1236. valuereg := getintregister(list,OS_INT);
  1237. a_load_ref_reg(list,loadsize,OS_INT,sref.ref,valuereg);
  1238. { constant offset of bit sequence? }
  1239. if not extra_load then
  1240. begin
  1241. if (sref.bitindexreg = NR_NO) then
  1242. begin
  1243. { use subsetreg routine, it may have been overridden with an optimized version }
  1244. tosreg.subsetreg := valuereg;
  1245. tosreg.subsetregsize := OS_INT;
  1246. { subsetregs always count bits from right to left }
  1247. if (target_info.endian = endian_big) then
  1248. tosreg.startbit := loadbitsize - (sref.startbit+sref.bitlen)
  1249. else
  1250. tosreg.startbit := sref.startbit;
  1251. tosreg.bitlen := sref.bitlen;
  1252. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1253. end
  1254. else
  1255. begin
  1256. if (sref.startbit <> 0) then
  1257. internalerror(2006081710);
  1258. { should be handled by normal code and will give wrong result }
  1259. { on x86 for the '1 shl bitlen' below }
  1260. if (sref.bitlen = AIntBits) then
  1261. internalerror(2006081711);
  1262. { zero the bits we have to insert }
  1263. if (slopt <> SL_SETMAX) then
  1264. begin
  1265. maskreg := getintregister(list,OS_INT);
  1266. if (target_info.endian = endian_big) then
  1267. begin
  1268. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen),maskreg);
  1269. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1270. end
  1271. else
  1272. begin
  1273. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1274. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1275. end;
  1276. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1277. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1278. end;
  1279. { insert the value }
  1280. if (slopt <> SL_SETZERO) then
  1281. begin
  1282. tmpreg := getintregister(list,OS_INT);
  1283. if (slopt <> SL_SETMAX) then
  1284. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1285. else if (sref.bitlen <> AIntBits) then
  1286. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1287. else
  1288. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1289. if (target_info.endian = endian_big) then
  1290. begin
  1291. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1292. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1293. begin
  1294. if (loadbitsize <> AIntBits) then
  1295. bitmask := (((aword(1) shl loadbitsize)-1) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1))
  1296. else
  1297. bitmask := (high(aword) xor ((aword(1) shl (loadbitsize-sref.bitlen))-1));
  1298. a_op_const_reg(list,OP_AND,OS_INT,bitmask,tmpreg);
  1299. end;
  1300. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1301. end
  1302. else
  1303. begin
  1304. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1305. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1306. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1307. end;
  1308. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1309. end;
  1310. end;
  1311. { store back to memory }
  1312. valuereg := makeregsize(list,valuereg,loadsize);
  1313. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1314. exit;
  1315. end
  1316. else
  1317. begin
  1318. { load next value }
  1319. extra_value_reg := getintregister(list,OS_INT);
  1320. tmpref := sref.ref;
  1321. inc(tmpref.offset,loadbitsize div 8);
  1322. { should maybe be taken out too, can be done more efficiently }
  1323. { on e.g. i386 with shld/shrd }
  1324. if (sref.bitindexreg = NR_NO) then
  1325. begin
  1326. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1327. fromsreg.subsetreg := fromreg;
  1328. fromsreg.subsetregsize := fromsize;
  1329. tosreg.subsetreg := valuereg;
  1330. tosreg.subsetregsize := OS_INT;
  1331. { transfer first part }
  1332. fromsreg.bitlen := loadbitsize-sref.startbit;
  1333. tosreg.bitlen := fromsreg.bitlen;
  1334. if (target_info.endian = endian_big) then
  1335. begin
  1336. { valuereg must contain the upper bits of the value at bits [0..loadbitsize-startbit] }
  1337. { upper bits of the value ... }
  1338. fromsreg.startbit := sref.bitlen-(loadbitsize-sref.startbit);
  1339. { ... to bit 0 }
  1340. tosreg.startbit := 0
  1341. end
  1342. else
  1343. begin
  1344. { valuereg must contain the lower bits of the value at bits [startbit..loadbitsize] }
  1345. { lower bits of the value ... }
  1346. fromsreg.startbit := 0;
  1347. { ... to startbit }
  1348. tosreg.startbit := sref.startbit;
  1349. end;
  1350. case slopt of
  1351. SL_SETZERO,
  1352. SL_SETMAX:
  1353. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1354. else
  1355. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1356. end;
  1357. valuereg := makeregsize(list,valuereg,loadsize);
  1358. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1359. { transfer second part }
  1360. if (target_info.endian = endian_big) then
  1361. begin
  1362. { extra_value_reg must contain the lower bits of the value at bits }
  1363. { [(loadbitsize-(bitlen-(loadbitsize-startbit)))..loadbitsize] }
  1364. { (loadbitsize-(bitlen-(loadbitsize-startbit))) = 2*loadbitsize }
  1365. { - bitlen - startbit }
  1366. fromsreg.startbit := 0;
  1367. tosreg.startbit := 2*loadbitsize - sref.bitlen - sref.startbit
  1368. end
  1369. else
  1370. begin
  1371. { extra_value_reg must contain the upper bits of the value at bits [0..bitlen-(loadbitsize-startbit)] }
  1372. fromsreg.startbit := fromsreg.bitlen;
  1373. tosreg.startbit := 0;
  1374. end;
  1375. tosreg.subsetreg := extra_value_reg;
  1376. fromsreg.bitlen := sref.bitlen-fromsreg.bitlen;
  1377. tosreg.bitlen := fromsreg.bitlen;
  1378. case slopt of
  1379. SL_SETZERO,
  1380. SL_SETMAX:
  1381. a_load_regconst_subsetreg_intern(list,fromsize,subsetsize,fromreg,tosreg,slopt);
  1382. else
  1383. a_load_subsetreg_subsetreg(list,subsetsize,subsetsize,fromsreg,tosreg);
  1384. end;
  1385. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1386. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1387. exit;
  1388. end
  1389. else
  1390. begin
  1391. if (sref.startbit <> 0) then
  1392. internalerror(2006081812);
  1393. { should be handled by normal code and will give wrong result }
  1394. { on x86 for the '1 shl bitlen' below }
  1395. if (sref.bitlen = AIntBits) then
  1396. internalerror(2006081713);
  1397. { generate mask to zero the bits we have to insert }
  1398. if (slopt <> SL_SETMAX) then
  1399. begin
  1400. maskreg := getintregister(list,OS_INT);
  1401. if (target_info.endian = endian_big) then
  1402. begin
  1403. a_load_const_reg(list,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),maskreg);
  1404. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,maskreg);
  1405. end
  1406. else
  1407. begin
  1408. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1409. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,maskreg);
  1410. end;
  1411. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1412. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,valuereg);
  1413. end;
  1414. { insert the value }
  1415. if (slopt <> SL_SETZERO) then
  1416. begin
  1417. tmpreg := getintregister(list,OS_INT);
  1418. if (slopt <> SL_SETMAX) then
  1419. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1420. else if (sref.bitlen <> AIntBits) then
  1421. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1422. else
  1423. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1424. if (target_info.endian = endian_big) then
  1425. begin
  1426. a_op_const_reg(list,OP_SHL,OS_INT,loadbitsize-sref.bitlen,tmpreg);
  1427. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1428. { mask left over bits }
  1429. a_op_const_reg(list,OP_AND,OS_INT,aint(((aword(1) shl sref.bitlen)-1) shl (loadbitsize-sref.bitlen)),tmpreg);
  1430. a_op_reg_reg(list,OP_SHR,OS_INT,sref.bitindexreg,tmpreg);
  1431. end
  1432. else
  1433. begin
  1434. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1435. { mask left over bits }
  1436. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1437. a_op_reg_reg(list,OP_SHL,OS_INT,sref.bitindexreg,tmpreg);
  1438. end;
  1439. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,valuereg);
  1440. end;
  1441. valuereg := makeregsize(list,valuereg,loadsize);
  1442. a_load_reg_ref(list,loadsize,loadsize,valuereg,sref.ref);
  1443. { make sure we do not read/write past the end of the array }
  1444. current_asmdata.getjumplabel(hl);
  1445. a_cmp_const_reg_label(list,OS_INT,OC_BE,loadbitsize-sref.bitlen,sref.bitindexreg,hl);
  1446. a_load_ref_reg(list,loadsize,OS_INT,tmpref,extra_value_reg);
  1447. tmpindexreg := getintregister(list,OS_INT);
  1448. { load current array value }
  1449. if (slopt <> SL_SETZERO) then
  1450. begin
  1451. tmpreg := getintregister(list,OS_INT);
  1452. if (slopt <> SL_SETMAX) then
  1453. a_load_reg_reg(list,fromsize,OS_INT,fromreg,tmpreg)
  1454. else if (sref.bitlen <> AIntBits) then
  1455. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen) - 1), tmpreg)
  1456. else
  1457. a_load_const_reg(list,OS_INT,-1,tmpreg);
  1458. end;
  1459. { generate mask to zero the bits we have to insert }
  1460. if (slopt <> SL_SETMAX) then
  1461. begin
  1462. maskreg := getintregister(list,OS_INT);
  1463. if (target_info.endian = endian_big) then
  1464. begin
  1465. a_op_const_reg_reg(list,OP_ADD,OS_INT,sref.bitlen-2*loadbitsize,sref.bitindexreg,tmpindexreg);
  1466. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1467. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1468. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,maskreg);
  1469. end
  1470. else
  1471. begin
  1472. { Y-x = -(Y-x) }
  1473. a_op_const_reg_reg(list,OP_SUB,OS_INT,loadbitsize,sref.bitindexreg,tmpindexreg);
  1474. a_op_reg_reg(list,OP_NEG,OS_INT,tmpindexreg,tmpindexreg);
  1475. a_load_const_reg(list,OS_INT,aint((aword(1) shl sref.bitlen)-1),maskreg);
  1476. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,maskreg);
  1477. end;
  1478. a_op_reg_reg(list,OP_NOT,OS_INT,maskreg,maskreg);
  1479. a_op_reg_reg(list,OP_AND,OS_INT,maskreg,extra_value_reg);
  1480. end;
  1481. if (slopt <> SL_SETZERO) then
  1482. begin
  1483. if (target_info.endian = endian_big) then
  1484. a_op_reg_reg(list,OP_SHL,OS_INT,tmpindexreg,tmpreg)
  1485. else
  1486. begin
  1487. if not(slopt in [SL_REGNOSRCMASK,SL_SETMAX]) then
  1488. a_op_const_reg(list,OP_AND,OS_INT,aint((aword(1) shl sref.bitlen)-1),tmpreg);
  1489. a_op_reg_reg(list,OP_SHR,OS_INT,tmpindexreg,tmpreg);
  1490. end;
  1491. a_op_reg_reg(list,OP_OR,OS_INT,tmpreg,extra_value_reg);
  1492. end;
  1493. extra_value_reg := makeregsize(list,extra_value_reg,loadsize);
  1494. a_load_reg_ref(list,loadsize,loadsize,extra_value_reg,tmpref);
  1495. a_label(list,hl);
  1496. end;
  1497. end;
  1498. end;
  1499. procedure tcg.a_load_subsetref_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref, tosref: tsubsetreference);
  1500. var
  1501. tmpreg: tregister;
  1502. begin
  1503. tmpreg := getintregister(list,tosubsetsize);
  1504. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1505. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1506. end;
  1507. procedure tcg.a_load_subsetref_ref(list : TAsmList; subsetsize, tosize: tcgsize; const sref: tsubsetreference; const destref: treference);
  1508. var
  1509. tmpreg: tregister;
  1510. begin
  1511. tmpreg := getintregister(list,tosize);
  1512. a_load_subsetref_reg(list,subsetsize,tosize,sref,tmpreg);
  1513. a_load_reg_ref(list,tosize,tosize,tmpreg,destref);
  1514. end;
  1515. procedure tcg.a_load_ref_subsetref(list : TAsmList; fromsize, subsetsize: tcgsize; const fromref: treference; const sref: tsubsetreference);
  1516. var
  1517. tmpreg: tregister;
  1518. begin
  1519. tmpreg := getintregister(list,subsetsize);
  1520. a_load_ref_reg(list,fromsize,subsetsize,fromref,tmpreg);
  1521. a_load_reg_subsetref(list,subsetsize,subsetsize,tmpreg,sref);
  1522. end;
  1523. procedure tcg.a_load_const_subsetref(list: TAsmlist; subsetsize: tcgsize; a: aint; const sref: tsubsetreference);
  1524. var
  1525. tmpreg: tregister;
  1526. slopt: tsubsetloadopt;
  1527. begin
  1528. { perform masking of the source value in advance }
  1529. slopt := SL_REGNOSRCMASK;
  1530. if (sref.bitlen <> AIntBits) then
  1531. aword(a) := aword(a) and ((aword(1) shl sref.bitlen) -1);
  1532. if (
  1533. { broken x86 "x shl regbitsize = x" }
  1534. ((sref.bitlen <> AIntBits) and
  1535. ((aword(a) and ((aword(1) shl sref.bitlen) -1)) = (aword(1) shl sref.bitlen) -1)) or
  1536. ((sref.bitlen = AIntBits) and
  1537. (a = -1))
  1538. ) then
  1539. slopt := SL_SETMAX
  1540. else if (a = 0) then
  1541. slopt := SL_SETZERO;
  1542. tmpreg := getintregister(list,subsetsize);
  1543. if not(slopt in [SL_SETZERO,SL_SETMAX]) then
  1544. a_load_const_reg(list,subsetsize,a,tmpreg);
  1545. a_load_regconst_subsetref_intern(list,subsetsize,subsetsize,tmpreg,sref,slopt);
  1546. end;
  1547. procedure tcg.a_load_subsetref_loc(list: TAsmlist; subsetsize: tcgsize; const sref: tsubsetreference; const loc: tlocation);
  1548. begin
  1549. case loc.loc of
  1550. LOC_REFERENCE,LOC_CREFERENCE:
  1551. a_load_subsetref_ref(list,subsetsize,loc.size,sref,loc.reference);
  1552. LOC_REGISTER,LOC_CREGISTER:
  1553. a_load_subsetref_reg(list,subsetsize,loc.size,sref,loc.register);
  1554. LOC_SUBSETREG,LOC_CSUBSETREG:
  1555. a_load_subsetref_subsetreg(list,subsetsize,loc.size,sref,loc.sreg);
  1556. LOC_SUBSETREF,LOC_CSUBSETREF:
  1557. a_load_subsetref_subsetref(list,subsetsize,loc.size,sref,loc.sref);
  1558. else
  1559. internalerror(200608054);
  1560. end;
  1561. end;
  1562. procedure tcg.a_load_subsetref_subsetreg(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsref: tsubsetreference; const tosreg: tsubsetregister);
  1563. var
  1564. tmpreg: tregister;
  1565. begin
  1566. tmpreg := getintregister(list,tosubsetsize);
  1567. a_load_subsetref_reg(list,fromsubsetsize,tosubsetsize,fromsref,tmpreg);
  1568. a_load_reg_subsetreg(list,tosubsetsize,tosubsetsize,tmpreg,tosreg);
  1569. end;
  1570. procedure tcg.a_load_subsetreg_subsetref(list: TAsmlist; fromsubsetsize, tosubsetsize : tcgsize; const fromsreg: tsubsetregister; const tosref: tsubsetreference);
  1571. var
  1572. tmpreg: tregister;
  1573. begin
  1574. tmpreg := getintregister(list,tosubsetsize);
  1575. a_load_subsetreg_reg(list,fromsubsetsize,tosubsetsize,fromsreg,tmpreg);
  1576. a_load_reg_subsetref(list,tosubsetsize,tosubsetsize,tmpreg,tosref);
  1577. end;
  1578. {$ifdef rangeon}
  1579. {$r+}
  1580. {$undef rangeon}
  1581. {$endif}
  1582. {$ifdef overflowon}
  1583. {$q+}
  1584. {$undef overflowon}
  1585. {$endif}
  1586. { generic bit address calculation routines }
  1587. function tcg.get_bit_const_ref_sref(bitnumber: aint; const ref: treference): tsubsetreference;
  1588. begin
  1589. result.ref:=ref;
  1590. inc(result.ref.offset,bitnumber div 8);
  1591. result.bitindexreg:=NR_NO;
  1592. result.startbit:=bitnumber mod 8;
  1593. result.bitlen:=1;
  1594. end;
  1595. function tcg.get_bit_const_reg_sreg(setregsize: tcgsize; bitnumber: aint; setreg: tregister): tsubsetregister;
  1596. begin
  1597. result.subsetreg:=setreg;
  1598. result.subsetregsize:=setregsize;
  1599. { subsetregs always count from the least significant to the most significant bit }
  1600. if (target_info.endian=endian_big) then
  1601. result.startbit:=(tcgsize2size[setregsize]*8)-bitnumber-1
  1602. else
  1603. result.startbit:=bitnumber;
  1604. result.bitlen:=1;
  1605. end;
  1606. function tcg.get_bit_reg_ref_sref(list: TAsmList; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference): tsubsetreference;
  1607. var
  1608. tmpreg,
  1609. tmpaddrreg: tregister;
  1610. begin
  1611. result.ref:=ref;
  1612. result.startbit:=0;
  1613. result.bitlen:=1;
  1614. tmpreg:=getintregister(list,bitnumbersize);
  1615. a_op_const_reg_reg(list,OP_SHR,bitnumbersize,3,bitnumber,tmpreg);
  1616. tmpaddrreg:=getaddressregister(list);
  1617. a_load_reg_reg(list,bitnumbersize,OS_ADDR,tmpreg,tmpaddrreg);
  1618. if (result.ref.base=NR_NO) then
  1619. result.ref.base:=tmpaddrreg
  1620. else if (result.ref.index=NR_NO) then
  1621. result.ref.index:=tmpaddrreg
  1622. else
  1623. begin
  1624. a_op_reg_reg(list,OP_ADD,OS_ADDR,result.ref.index,tmpaddrreg);
  1625. result.ref.index:=tmpaddrreg;
  1626. end;
  1627. tmpreg:=getintregister(list,OS_INT);
  1628. a_op_const_reg_reg(list,OP_AND,OS_INT,7,bitnumber,tmpreg);
  1629. result.bitindexreg:=tmpreg;
  1630. end;
  1631. { bit testing routines }
  1632. procedure tcg.a_bit_test_reg_reg_reg(list : TAsmList; bitnumbersize,valuesize,destsize: tcgsize;bitnumber,value,destreg: tregister);
  1633. var
  1634. tmpvalue: tregister;
  1635. begin
  1636. tmpvalue:=getintregister(list,valuesize);
  1637. if (target_info.endian=endian_little) then
  1638. begin
  1639. { rotate value register "bitnumber" bits to the right }
  1640. a_op_reg_reg_reg(list,OP_SHR,valuesize,bitnumber,value,tmpvalue);
  1641. { extract the bit we want }
  1642. a_op_const_reg(list,OP_AND,valuesize,1,tmpvalue);
  1643. end
  1644. else
  1645. begin
  1646. { highest (leftmost) bit = bit 0 -> shl bitnumber results in wanted }
  1647. { bit in uppermost position, then move it to the lowest position }
  1648. { "and" is not necessary since combination of shl/shr will clear }
  1649. { all other bits }
  1650. a_op_reg_reg_reg(list,OP_SHL,valuesize,bitnumber,value,tmpvalue);
  1651. a_op_const_reg(list,OP_SHR,valuesize,tcgsize2size[valuesize]*8-1,tmpvalue);
  1652. end;
  1653. a_load_reg_reg(list,valuesize,destsize,tmpvalue,destreg);
  1654. end;
  1655. procedure tcg.a_bit_test_const_ref_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const ref: treference; destreg: tregister);
  1656. begin
  1657. a_load_subsetref_reg(list,OS_8,destsize,get_bit_const_ref_sref(bitnumber,ref),destreg);
  1658. end;
  1659. procedure tcg.a_bit_test_const_reg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; setreg, destreg: tregister);
  1660. begin
  1661. a_load_subsetreg_reg(list,setregsize,destsize,get_bit_const_reg_sreg(setregsize,bitnumber,setreg),destreg);
  1662. end;
  1663. procedure tcg.a_bit_test_const_subsetreg_reg(list: TAsmList; setregsize, destsize: tcgsize; bitnumber: aint; const setreg: tsubsetregister; destreg: tregister);
  1664. var
  1665. tmpsreg: tsubsetregister;
  1666. begin
  1667. { the first parameter is used to calculate the bit offset in }
  1668. { case of big endian, and therefore must be the size of the }
  1669. { set and not of the whole subsetreg }
  1670. tmpsreg:=get_bit_const_reg_sreg(setregsize,bitnumber,setreg.subsetreg);
  1671. { now fix the size of the subsetreg }
  1672. tmpsreg.subsetregsize:=setreg.subsetregsize;
  1673. { correct offset of the set in the subsetreg }
  1674. inc(tmpsreg.startbit,setreg.startbit);
  1675. a_load_subsetreg_reg(list,setregsize,destsize,tmpsreg,destreg);
  1676. end;
  1677. procedure tcg.a_bit_test_reg_ref_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const ref: treference; destreg: tregister);
  1678. begin
  1679. a_load_subsetref_reg(list,OS_8,destsize,get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref),destreg);
  1680. end;
  1681. procedure tcg.a_bit_test_reg_loc_reg(list: TAsmList; bitnumbersize, destsize: tcgsize; bitnumber: tregister; const loc: tlocation; destreg: tregister);
  1682. var
  1683. tmpreg: tregister;
  1684. begin
  1685. case loc.loc of
  1686. LOC_REFERENCE,LOC_CREFERENCE:
  1687. a_bit_test_reg_ref_reg(list,bitnumbersize,destsize,bitnumber,loc.reference,destreg);
  1688. LOC_REGISTER,LOC_CREGISTER,
  1689. LOC_SUBSETREG,LOC_CSUBSETREG,
  1690. LOC_CONSTANT:
  1691. begin
  1692. case loc.loc of
  1693. LOC_REGISTER,LOC_CREGISTER:
  1694. tmpreg:=loc.register;
  1695. LOC_SUBSETREG,LOC_CSUBSETREG:
  1696. begin
  1697. tmpreg:=getintregister(list,loc.size);
  1698. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1699. end;
  1700. LOC_CONSTANT:
  1701. begin
  1702. tmpreg:=getintregister(list,loc.size);
  1703. a_load_const_reg(list,loc.size,loc.value,tmpreg);
  1704. end;
  1705. end;
  1706. a_bit_test_reg_reg_reg(list,bitnumbersize,loc.size,destsize,bitnumber,tmpreg,destreg);
  1707. end;
  1708. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1709. else
  1710. internalerror(2007051701);
  1711. end;
  1712. end;
  1713. procedure tcg.a_bit_test_const_loc_reg(list: TAsmList; destsize: tcgsize; bitnumber: aint; const loc: tlocation; destreg: tregister);
  1714. begin
  1715. case loc.loc of
  1716. LOC_REFERENCE,LOC_CREFERENCE:
  1717. a_bit_test_const_ref_reg(list,destsize,bitnumber,loc.reference,destreg);
  1718. LOC_REGISTER,LOC_CREGISTER:
  1719. a_bit_test_const_reg_reg(list,loc.size,destsize,bitnumber,loc.register,destreg);
  1720. LOC_SUBSETREG,LOC_CSUBSETREG:
  1721. a_bit_test_const_subsetreg_reg(list,loc.size,destsize,bitnumber,loc.sreg,destreg);
  1722. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1723. else
  1724. internalerror(2007051702);
  1725. end;
  1726. end;
  1727. { bit setting/clearing routines }
  1728. procedure tcg.a_bit_set_reg_reg(list : TAsmList; doset: boolean; bitnumbersize, destsize: tcgsize; bitnumber,dest: tregister);
  1729. var
  1730. tmpvalue: tregister;
  1731. begin
  1732. tmpvalue:=getintregister(list,destsize);
  1733. if (target_info.endian=endian_little) then
  1734. begin
  1735. a_load_const_reg(list,destsize,1,tmpvalue);
  1736. { rotate bit "bitnumber" bits to the left }
  1737. a_op_reg_reg(list,OP_SHL,destsize,bitnumber,tmpvalue);
  1738. end
  1739. else
  1740. begin
  1741. { highest (leftmost) bit = bit 0 -> "$80/$8000/$80000000/ ... }
  1742. { shr bitnumber" results in correct mask }
  1743. a_load_const_reg(list,destsize,1 shl (tcgsize2size[destsize]*8-1),tmpvalue);
  1744. a_op_reg_reg(list,OP_SHR,destsize,bitnumber,tmpvalue);
  1745. end;
  1746. { set/clear the bit we want }
  1747. if (doset) then
  1748. a_op_reg_reg(list,OP_OR,destsize,tmpvalue,dest)
  1749. else
  1750. begin
  1751. a_op_reg_reg(list,OP_NOT,destsize,tmpvalue,tmpvalue);
  1752. a_op_reg_reg(list,OP_AND,destsize,tmpvalue,dest)
  1753. end;
  1754. end;
  1755. procedure tcg.a_bit_set_const_ref(list: TAsmList; doset: boolean;destsize: tcgsize; bitnumber: aint; const ref: treference);
  1756. begin
  1757. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_const_ref_sref(bitnumber,ref));
  1758. end;
  1759. procedure tcg.a_bit_set_const_reg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; destreg: tregister);
  1760. begin
  1761. a_load_const_subsetreg(list,OS_8,ord(doset),get_bit_const_reg_sreg(destsize,bitnumber,destreg));
  1762. end;
  1763. procedure tcg.a_bit_set_const_subsetreg(list: TAsmList; doset: boolean; destsize: tcgsize; bitnumber: aint; const destreg: tsubsetregister);
  1764. var
  1765. tmpsreg: tsubsetregister;
  1766. begin
  1767. { the first parameter is used to calculate the bit offset in }
  1768. { case of big endian, and therefore must be the size of the }
  1769. { set and not of the whole subsetreg }
  1770. tmpsreg:=get_bit_const_reg_sreg(destsize,bitnumber,destreg.subsetreg);
  1771. { now fix the size of the subsetreg }
  1772. tmpsreg.subsetregsize:=destreg.subsetregsize;
  1773. { correct offset of the set in the subsetreg }
  1774. inc(tmpsreg.startbit,destreg.startbit);
  1775. a_load_const_subsetreg(list,OS_8,ord(doset),tmpsreg);
  1776. end;
  1777. procedure tcg.a_bit_set_reg_ref(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const ref: treference);
  1778. begin
  1779. a_load_const_subsetref(list,OS_8,ord(doset),get_bit_reg_ref_sref(list,bitnumbersize,bitnumber,ref));
  1780. end;
  1781. procedure tcg.a_bit_set_reg_loc(list: TAsmList; doset: boolean; bitnumbersize: tcgsize; bitnumber: tregister; const loc: tlocation);
  1782. var
  1783. tmpreg: tregister;
  1784. begin
  1785. case loc.loc of
  1786. LOC_REFERENCE:
  1787. a_bit_set_reg_ref(list,doset,bitnumbersize,bitnumber,loc.reference);
  1788. LOC_CREGISTER:
  1789. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,loc.register);
  1790. { e.g. a 2-byte set in a record regvar }
  1791. LOC_CSUBSETREG:
  1792. begin
  1793. { hard to do in-place in a generic way, so operate on a copy }
  1794. tmpreg:=getintregister(list,loc.size);
  1795. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  1796. a_bit_set_reg_reg(list,doset,bitnumbersize,loc.size,bitnumber,tmpreg);
  1797. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  1798. end;
  1799. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1800. else
  1801. internalerror(2007051703)
  1802. end;
  1803. end;
  1804. procedure tcg.a_bit_set_const_loc(list: TAsmList; doset: boolean; bitnumber: aint; const loc: tlocation);
  1805. begin
  1806. case loc.loc of
  1807. LOC_REFERENCE:
  1808. a_bit_set_const_ref(list,doset,loc.size,bitnumber,loc.reference);
  1809. LOC_CREGISTER:
  1810. a_bit_set_const_reg(list,doset,loc.size,bitnumber,loc.register);
  1811. LOC_CSUBSETREG:
  1812. a_bit_set_const_subsetreg(list,doset,loc.size,bitnumber,loc.sreg);
  1813. { LOC_SUBSETREF is not possible, because sets are not (yet) bitpacked }
  1814. else
  1815. internalerror(2007051704)
  1816. end;
  1817. end;
  1818. { memory/register loading }
  1819. procedure tcg.a_load_reg_ref_unaligned(list : TAsmList;fromsize,tosize : tcgsize;register : tregister;const ref : treference);
  1820. var
  1821. tmpref : treference;
  1822. tmpreg : tregister;
  1823. i : longint;
  1824. begin
  1825. if ref.alignment<tcgsize2size[fromsize] then
  1826. begin
  1827. tmpref:=ref;
  1828. { we take care of the alignment now }
  1829. tmpref.alignment:=0;
  1830. case FromSize of
  1831. OS_16,OS_S16:
  1832. begin
  1833. tmpreg:=getintregister(list,OS_16);
  1834. a_load_reg_reg(list,fromsize,OS_16,register,tmpreg);
  1835. if target_info.endian=endian_big then
  1836. inc(tmpref.offset);
  1837. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1838. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1839. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1840. a_op_const_reg(list,OP_SHR,OS_16,8,tmpreg);
  1841. if target_info.endian=endian_big then
  1842. dec(tmpref.offset)
  1843. else
  1844. inc(tmpref.offset);
  1845. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1846. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1847. end;
  1848. OS_32,OS_S32:
  1849. begin
  1850. { could add an optimised case for ref.alignment=2 }
  1851. tmpreg:=getintregister(list,OS_32);
  1852. a_load_reg_reg(list,fromsize,OS_32,register,tmpreg);
  1853. if target_info.endian=endian_big then
  1854. inc(tmpref.offset,3);
  1855. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1856. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1857. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1858. for i:=1 to 3 do
  1859. begin
  1860. a_op_const_reg(list,OP_SHR,OS_32,8,tmpreg);
  1861. if target_info.endian=endian_big then
  1862. dec(tmpref.offset)
  1863. else
  1864. inc(tmpref.offset);
  1865. tmpreg:=makeregsize(list,tmpreg,OS_8);
  1866. a_load_reg_ref(list,OS_8,OS_8,tmpreg,tmpref);
  1867. tmpreg:=makeregsize(list,tmpreg,OS_32);
  1868. end;
  1869. end
  1870. else
  1871. a_load_reg_ref(list,fromsize,tosize,register,tmpref);
  1872. end;
  1873. end
  1874. else
  1875. a_load_reg_ref(list,fromsize,tosize,register,ref);
  1876. end;
  1877. procedure tcg.a_load_ref_reg_unaligned(list : TAsmList;fromsize,tosize : tcgsize;const ref : treference;register : tregister);
  1878. var
  1879. tmpref : treference;
  1880. tmpreg,
  1881. tmpreg2 : tregister;
  1882. i : longint;
  1883. begin
  1884. if ref.alignment in [1,2] then
  1885. begin
  1886. tmpref:=ref;
  1887. { we take care of the alignment now }
  1888. tmpref.alignment:=0;
  1889. case FromSize of
  1890. OS_16,OS_S16:
  1891. if ref.alignment=2 then
  1892. a_load_ref_reg(list,fromsize,tosize,tmpref,register)
  1893. else
  1894. begin
  1895. { first load in tmpreg, because the target register }
  1896. { may be used in ref as well }
  1897. if target_info.endian=endian_little then
  1898. inc(tmpref.offset);
  1899. tmpreg:=getintregister(list,OS_8);
  1900. a_load_ref_reg(list,OS_8,OS_8,tmpref,tmpreg);
  1901. tmpreg:=makeregsize(list,tmpreg,OS_16);
  1902. a_op_const_reg(list,OP_SHL,OS_16,8,tmpreg);
  1903. if target_info.endian=endian_little then
  1904. dec(tmpref.offset)
  1905. else
  1906. inc(tmpref.offset);
  1907. a_load_ref_reg(list,OS_8,OS_16,tmpref,register);
  1908. a_op_reg_reg(list,OP_OR,OS_16,tmpreg,register);
  1909. end;
  1910. OS_32,OS_S32:
  1911. if ref.alignment=2 then
  1912. begin
  1913. if target_info.endian=endian_little then
  1914. inc(tmpref.offset,2);
  1915. tmpreg:=getintregister(list,OS_32);
  1916. a_load_ref_reg(list,OS_16,OS_32,tmpref,tmpreg);
  1917. a_op_const_reg(list,OP_SHL,OS_32,16,tmpreg);
  1918. if target_info.endian=endian_little then
  1919. dec(tmpref.offset,2)
  1920. else
  1921. inc(tmpref.offset,2);
  1922. a_load_ref_reg(list,OS_16,OS_32,tmpref,register);
  1923. a_op_reg_reg(list,OP_OR,OS_32,tmpreg,register);
  1924. end
  1925. else
  1926. begin
  1927. if target_info.endian=endian_little then
  1928. inc(tmpref.offset,3);
  1929. tmpreg:=getintregister(list,OS_32);
  1930. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg);
  1931. tmpreg2:=getintregister(list,OS_32);
  1932. for i:=1 to 3 do
  1933. begin
  1934. a_op_const_reg(list,OP_SHL,OS_32,8,tmpreg);
  1935. if target_info.endian=endian_little then
  1936. dec(tmpref.offset)
  1937. else
  1938. inc(tmpref.offset);
  1939. a_load_ref_reg(list,OS_8,OS_32,tmpref,tmpreg2);
  1940. a_op_reg_reg(list,OP_OR,OS_32,tmpreg2,tmpreg);
  1941. end;
  1942. a_load_reg_reg(list,OS_32,OS_32,tmpreg,register);
  1943. end
  1944. else
  1945. a_load_ref_reg(list,fromsize,tosize,tmpref,register);
  1946. end;
  1947. end
  1948. else
  1949. a_load_ref_reg(list,fromsize,tosize,ref,register);
  1950. end;
  1951. procedure tcg.a_load_ref_ref(list : TAsmList;fromsize,tosize : tcgsize;const sref : treference;const dref : treference);
  1952. var
  1953. tmpreg: tregister;
  1954. begin
  1955. { verify if we have the same reference }
  1956. if references_equal(sref,dref) then
  1957. exit;
  1958. tmpreg:=getintregister(list,tosize);
  1959. a_load_ref_reg(list,fromsize,tosize,sref,tmpreg);
  1960. a_load_reg_ref(list,tosize,tosize,tmpreg,dref);
  1961. end;
  1962. procedure tcg.a_load_const_ref(list : TAsmList;size : tcgsize;a : aint;const ref : treference);
  1963. var
  1964. tmpreg: tregister;
  1965. begin
  1966. tmpreg:=getintregister(list,size);
  1967. a_load_const_reg(list,size,a,tmpreg);
  1968. a_load_reg_ref(list,size,size,tmpreg,ref);
  1969. end;
  1970. procedure tcg.a_load_const_loc(list : TAsmList;a : aint;const loc: tlocation);
  1971. begin
  1972. case loc.loc of
  1973. LOC_REFERENCE,LOC_CREFERENCE:
  1974. a_load_const_ref(list,loc.size,a,loc.reference);
  1975. LOC_REGISTER,LOC_CREGISTER:
  1976. a_load_const_reg(list,loc.size,a,loc.register);
  1977. LOC_SUBSETREG,LOC_CSUBSETREG:
  1978. a_load_const_subsetreg(list,loc.size,a,loc.sreg);
  1979. LOC_SUBSETREF,LOC_CSUBSETREF:
  1980. a_load_const_subsetref(list,loc.size,a,loc.sref);
  1981. else
  1982. internalerror(200203272);
  1983. end;
  1984. end;
  1985. procedure tcg.a_load_reg_loc(list : TAsmList;fromsize : tcgsize;reg : tregister;const loc: tlocation);
  1986. begin
  1987. case loc.loc of
  1988. LOC_REFERENCE,LOC_CREFERENCE:
  1989. a_load_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  1990. LOC_REGISTER,LOC_CREGISTER:
  1991. a_load_reg_reg(list,fromsize,loc.size,reg,loc.register);
  1992. LOC_SUBSETREG,LOC_CSUBSETREG:
  1993. a_load_reg_subsetreg(list,fromsize,loc.size,reg,loc.sreg);
  1994. LOC_SUBSETREF,LOC_CSUBSETREF:
  1995. a_load_reg_subsetref(list,fromsize,loc.size,reg,loc.sref);
  1996. else
  1997. internalerror(200203271);
  1998. end;
  1999. end;
  2000. procedure tcg.a_load_loc_reg(list : TAsmList; tosize: tcgsize; const loc: tlocation; reg : tregister);
  2001. begin
  2002. case loc.loc of
  2003. LOC_REFERENCE,LOC_CREFERENCE:
  2004. a_load_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2005. LOC_REGISTER,LOC_CREGISTER:
  2006. a_load_reg_reg(list,loc.size,tosize,loc.register,reg);
  2007. LOC_CONSTANT:
  2008. a_load_const_reg(list,tosize,loc.value,reg);
  2009. LOC_SUBSETREG,LOC_CSUBSETREG:
  2010. a_load_subsetreg_reg(list,loc.size,tosize,loc.sreg,reg);
  2011. LOC_SUBSETREF,LOC_CSUBSETREF:
  2012. a_load_subsetref_reg(list,loc.size,tosize,loc.sref,reg);
  2013. else
  2014. internalerror(200109092);
  2015. end;
  2016. end;
  2017. procedure tcg.a_load_loc_ref(list : TAsmList;tosize: tcgsize; const loc: tlocation; const ref : treference);
  2018. begin
  2019. case loc.loc of
  2020. LOC_REFERENCE,LOC_CREFERENCE:
  2021. a_load_ref_ref(list,loc.size,tosize,loc.reference,ref);
  2022. LOC_REGISTER,LOC_CREGISTER:
  2023. a_load_reg_ref(list,loc.size,tosize,loc.register,ref);
  2024. LOC_CONSTANT:
  2025. a_load_const_ref(list,tosize,loc.value,ref);
  2026. LOC_SUBSETREG,LOC_CSUBSETREG:
  2027. a_load_subsetreg_ref(list,loc.size,tosize,loc.sreg,ref);
  2028. LOC_SUBSETREF,LOC_CSUBSETREF:
  2029. a_load_subsetref_ref(list,loc.size,tosize,loc.sref,ref);
  2030. else
  2031. internalerror(200109302);
  2032. end;
  2033. end;
  2034. procedure tcg.a_load_loc_subsetreg(list : TAsmList; subsetsize: tcgsize; const loc: tlocation; const sreg : tsubsetregister);
  2035. begin
  2036. case loc.loc of
  2037. LOC_REFERENCE,LOC_CREFERENCE:
  2038. a_load_ref_subsetreg(list,loc.size,subsetsize,loc.reference,sreg);
  2039. LOC_REGISTER,LOC_CREGISTER:
  2040. a_load_reg_subsetreg(list,loc.size,subsetsize,loc.register,sreg);
  2041. LOC_CONSTANT:
  2042. a_load_const_subsetreg(list,subsetsize,loc.value,sreg);
  2043. LOC_SUBSETREG,LOC_CSUBSETREG:
  2044. a_load_subsetreg_subsetreg(list,loc.size,subsetsize,loc.sreg,sreg);
  2045. LOC_SUBSETREF,LOC_CSUBSETREF:
  2046. a_load_subsetref_subsetreg(list,loc.size,subsetsize,loc.sref,sreg);
  2047. else
  2048. internalerror(2006052310);
  2049. end;
  2050. end;
  2051. procedure tcg.a_load_subsetreg_loc(list: TAsmlist; subsetsize: tcgsize; const sreg: tsubsetregister; const loc: tlocation);
  2052. begin
  2053. case loc.loc of
  2054. LOC_REFERENCE,LOC_CREFERENCE:
  2055. a_load_subsetreg_ref(list,subsetsize,loc.size,sreg,loc.reference);
  2056. LOC_REGISTER,LOC_CREGISTER:
  2057. a_load_subsetreg_reg(list,subsetsize,loc.size,sreg,loc.register);
  2058. LOC_SUBSETREG,LOC_CSUBSETREG:
  2059. a_load_subsetreg_subsetreg(list,subsetsize,loc.size,sreg,loc.sreg);
  2060. LOC_SUBSETREF,LOC_CSUBSETREF:
  2061. a_load_subsetreg_subsetref(list,subsetsize,loc.size,sreg,loc.sref);
  2062. else
  2063. internalerror(2006051510);
  2064. end;
  2065. end;
  2066. procedure tcg.optimize_op_const(var op: topcg; var a : aint);
  2067. var
  2068. powerval : longint;
  2069. begin
  2070. case op of
  2071. OP_OR :
  2072. begin
  2073. { or with zero returns same result }
  2074. if a = 0 then
  2075. op:=OP_NONE
  2076. else
  2077. { or with max returns max }
  2078. if a = -1 then
  2079. op:=OP_MOVE;
  2080. end;
  2081. OP_AND :
  2082. begin
  2083. { and with max returns same result }
  2084. if (a = -1) then
  2085. op:=OP_NONE
  2086. else
  2087. { and with 0 returns 0 }
  2088. if a=0 then
  2089. op:=OP_MOVE;
  2090. end;
  2091. OP_DIV :
  2092. begin
  2093. { division by 1 returns result }
  2094. if a = 1 then
  2095. op:=OP_NONE
  2096. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2097. begin
  2098. a := powerval;
  2099. op:= OP_SHR;
  2100. end;
  2101. end;
  2102. OP_IDIV:
  2103. begin
  2104. if a = 1 then
  2105. op:=OP_NONE;
  2106. end;
  2107. OP_MUL,OP_IMUL:
  2108. begin
  2109. if a = 1 then
  2110. op:=OP_NONE
  2111. else
  2112. if a=0 then
  2113. op:=OP_MOVE
  2114. else if ispowerof2(int64(a), powerval) and not(cs_check_overflow in current_settings.localswitches) then
  2115. begin
  2116. a := powerval;
  2117. op:= OP_SHL;
  2118. end;
  2119. end;
  2120. OP_ADD,OP_SUB:
  2121. begin
  2122. if a = 0 then
  2123. op:=OP_NONE;
  2124. end;
  2125. OP_SAR,OP_SHL,OP_SHR,OP_ROL,OP_ROR:
  2126. begin
  2127. if a = 0 then
  2128. op:=OP_NONE;
  2129. end;
  2130. end;
  2131. end;
  2132. procedure tcg.a_loadfpu_loc_reg(list: TAsmList; tosize: tcgsize; const loc: tlocation; const reg: tregister);
  2133. begin
  2134. case loc.loc of
  2135. LOC_REFERENCE, LOC_CREFERENCE:
  2136. a_loadfpu_ref_reg(list,loc.size,tosize,loc.reference,reg);
  2137. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2138. a_loadfpu_reg_reg(list,loc.size,tosize,loc.register,reg);
  2139. else
  2140. internalerror(200203301);
  2141. end;
  2142. end;
  2143. procedure tcg.a_loadfpu_reg_loc(list: TAsmList; fromsize: tcgsize; const reg: tregister; const loc: tlocation);
  2144. begin
  2145. case loc.loc of
  2146. LOC_REFERENCE, LOC_CREFERENCE:
  2147. a_loadfpu_reg_ref(list,fromsize,loc.size,reg,loc.reference);
  2148. LOC_FPUREGISTER, LOC_CFPUREGISTER:
  2149. a_loadfpu_reg_reg(list,fromsize,loc.size,reg,loc.register);
  2150. else
  2151. internalerror(48991);
  2152. end;
  2153. end;
  2154. procedure tcg.a_loadfpu_ref_ref(list: TAsmList; fromsize, tosize: tcgsize; const ref1,ref2: treference);
  2155. var
  2156. reg: tregister;
  2157. regsize: tcgsize;
  2158. begin
  2159. if (fromsize>=tosize) then
  2160. regsize:=fromsize
  2161. else
  2162. regsize:=tosize;
  2163. reg:=getfpuregister(list,regsize);
  2164. a_loadfpu_ref_reg(list,fromsize,regsize,ref1,reg);
  2165. a_loadfpu_reg_ref(list,regsize,tosize,reg,ref2);
  2166. end;
  2167. procedure tcg.a_paramfpu_reg(list : TAsmList;size : tcgsize;const r : tregister;const cgpara : TCGPara);
  2168. var
  2169. ref : treference;
  2170. begin
  2171. case cgpara.location^.loc of
  2172. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2173. begin
  2174. cgpara.check_simple_location;
  2175. a_loadfpu_reg_reg(list,size,size,r,cgpara.location^.register);
  2176. end;
  2177. LOC_REFERENCE,LOC_CREFERENCE:
  2178. begin
  2179. cgpara.check_simple_location;
  2180. reference_reset_base(ref,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2181. a_loadfpu_reg_ref(list,size,size,r,ref);
  2182. end;
  2183. LOC_REGISTER,LOC_CREGISTER:
  2184. begin
  2185. { paramfpu_ref does the check_simpe_location check here if necessary }
  2186. tg.GetTemp(list,TCGSize2Size[size],TCGSize2Size[size],tt_normal,ref);
  2187. a_loadfpu_reg_ref(list,size,size,r,ref);
  2188. a_paramfpu_ref(list,size,ref,cgpara);
  2189. tg.Ungettemp(list,ref);
  2190. end;
  2191. else
  2192. internalerror(2002071004);
  2193. end;
  2194. end;
  2195. procedure tcg.a_paramfpu_ref(list : TAsmList;size : tcgsize;const ref : treference;const cgpara : TCGPara);
  2196. var
  2197. href : treference;
  2198. begin
  2199. cgpara.check_simple_location;
  2200. case cgpara.location^.loc of
  2201. LOC_FPUREGISTER,LOC_CFPUREGISTER:
  2202. a_loadfpu_ref_reg(list,size,size,ref,cgpara.location^.register);
  2203. LOC_REFERENCE,LOC_CREFERENCE:
  2204. begin
  2205. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2206. { concatcopy should choose the best way to copy the data }
  2207. g_concatcopy(list,ref,href,tcgsize2size[size]);
  2208. end;
  2209. else
  2210. internalerror(200402201);
  2211. end;
  2212. end;
  2213. procedure tcg.a_op_const_ref(list : TAsmList; Op: TOpCG; size: TCGSize; a: aint; const ref: TReference);
  2214. var
  2215. tmpreg : tregister;
  2216. begin
  2217. tmpreg:=getintregister(list,size);
  2218. a_load_ref_reg(list,size,size,ref,tmpreg);
  2219. a_op_const_reg(list,op,size,a,tmpreg);
  2220. a_load_reg_ref(list,size,size,tmpreg,ref);
  2221. end;
  2222. procedure tcg.a_op_const_subsetreg(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sreg: tsubsetregister);
  2223. var
  2224. tmpreg: tregister;
  2225. begin
  2226. tmpreg := getintregister(list, size);
  2227. a_load_subsetreg_reg(list,subsetsize,size,sreg,tmpreg);
  2228. a_op_const_reg(list,op,size,a,tmpreg);
  2229. a_load_reg_subsetreg(list,size,subsetsize,tmpreg,sreg);
  2230. end;
  2231. procedure tcg.a_op_const_subsetref(list : TAsmList; Op : TOpCG; size, subsetsize : TCGSize; a : aint; const sref: tsubsetreference);
  2232. var
  2233. tmpreg: tregister;
  2234. begin
  2235. tmpreg := getintregister(list, size);
  2236. a_load_subsetref_reg(list,subsetsize,size,sref,tmpreg);
  2237. a_op_const_reg(list,op,size,a,tmpreg);
  2238. a_load_reg_subsetref(list,size,subsetsize,tmpreg,sref);
  2239. end;
  2240. procedure tcg.a_op_const_loc(list : TAsmList; Op: TOpCG; a: aint; const loc: tlocation);
  2241. begin
  2242. case loc.loc of
  2243. LOC_REGISTER, LOC_CREGISTER:
  2244. a_op_const_reg(list,op,loc.size,a,loc.register);
  2245. LOC_REFERENCE, LOC_CREFERENCE:
  2246. a_op_const_ref(list,op,loc.size,a,loc.reference);
  2247. LOC_SUBSETREG, LOC_CSUBSETREG:
  2248. a_op_const_subsetreg(list,op,loc.size,loc.size,a,loc.sreg);
  2249. LOC_SUBSETREF, LOC_CSUBSETREF:
  2250. a_op_const_subsetref(list,op,loc.size,loc.size,a,loc.sref);
  2251. else
  2252. internalerror(200109061);
  2253. end;
  2254. end;
  2255. procedure tcg.a_op_reg_ref(list : TAsmList; Op: TOpCG; size: TCGSize;reg: TRegister; const ref: TReference);
  2256. var
  2257. tmpreg : tregister;
  2258. begin
  2259. tmpreg:=getintregister(list,size);
  2260. a_load_ref_reg(list,size,size,ref,tmpreg);
  2261. a_op_reg_reg(list,op,size,reg,tmpreg);
  2262. a_load_reg_ref(list,size,size,tmpreg,ref);
  2263. end;
  2264. procedure tcg.a_op_ref_reg(list : TAsmList; Op: TOpCG; size: TCGSize; const ref: TReference; reg: TRegister);
  2265. var
  2266. tmpreg: tregister;
  2267. begin
  2268. case op of
  2269. OP_NOT,OP_NEG:
  2270. { handle it as "load ref,reg; op reg" }
  2271. begin
  2272. a_load_ref_reg(list,size,size,ref,reg);
  2273. a_op_reg_reg(list,op,size,reg,reg);
  2274. end;
  2275. else
  2276. begin
  2277. tmpreg:=getintregister(list,size);
  2278. a_load_ref_reg(list,size,size,ref,tmpreg);
  2279. a_op_reg_reg(list,op,size,tmpreg,reg);
  2280. end;
  2281. end;
  2282. end;
  2283. procedure tcg.a_op_reg_subsetreg(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sreg: tsubsetregister);
  2284. var
  2285. tmpreg: tregister;
  2286. begin
  2287. tmpreg := getintregister(list, opsize);
  2288. a_load_subsetreg_reg(list,subsetsize,opsize,sreg,tmpreg);
  2289. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2290. a_load_reg_subsetreg(list,opsize,subsetsize,tmpreg,sreg);
  2291. end;
  2292. procedure tcg.a_op_reg_subsetref(list : TAsmList; Op : TOpCG; opsize, subsetsize : TCGSize; reg: TRegister; const sref: tsubsetreference);
  2293. var
  2294. tmpreg: tregister;
  2295. begin
  2296. tmpreg := getintregister(list, opsize);
  2297. a_load_subsetref_reg(list,subsetsize,opsize,sref,tmpreg);
  2298. a_op_reg_reg(list,op,opsize,reg,tmpreg);
  2299. a_load_reg_subsetref(list,opsize,subsetsize,tmpreg,sref);
  2300. end;
  2301. procedure tcg.a_op_reg_loc(list : TAsmList; Op: TOpCG; reg: tregister; const loc: tlocation);
  2302. begin
  2303. case loc.loc of
  2304. LOC_REGISTER, LOC_CREGISTER:
  2305. a_op_reg_reg(list,op,loc.size,reg,loc.register);
  2306. LOC_REFERENCE, LOC_CREFERENCE:
  2307. a_op_reg_ref(list,op,loc.size,reg,loc.reference);
  2308. LOC_SUBSETREG, LOC_CSUBSETREG:
  2309. a_op_reg_subsetreg(list,op,loc.size,loc.size,reg,loc.sreg);
  2310. LOC_SUBSETREF, LOC_CSUBSETREF:
  2311. a_op_reg_subsetref(list,op,loc.size,loc.size,reg,loc.sref);
  2312. else
  2313. internalerror(200109061);
  2314. end;
  2315. end;
  2316. procedure tcg.a_op_ref_loc(list : TAsmList; Op: TOpCG; const ref: TReference; const loc: tlocation);
  2317. var
  2318. tmpreg: tregister;
  2319. begin
  2320. case loc.loc of
  2321. LOC_REGISTER,LOC_CREGISTER:
  2322. a_op_ref_reg(list,op,loc.size,ref,loc.register);
  2323. LOC_REFERENCE,LOC_CREFERENCE:
  2324. begin
  2325. tmpreg:=getintregister(list,loc.size);
  2326. a_load_ref_reg(list,loc.size,loc.size,ref,tmpreg);
  2327. a_op_reg_ref(list,op,loc.size,tmpreg,loc.reference);
  2328. end;
  2329. LOC_SUBSETREG, LOC_CSUBSETREG:
  2330. begin
  2331. tmpreg:=getintregister(list,loc.size);
  2332. a_load_subsetreg_reg(list,loc.size,loc.size,loc.sreg,tmpreg);
  2333. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2334. a_load_reg_subsetreg(list,loc.size,loc.size,tmpreg,loc.sreg);
  2335. end;
  2336. LOC_SUBSETREF, LOC_CSUBSETREF:
  2337. begin
  2338. tmpreg:=getintregister(list,loc.size);
  2339. a_load_subsetreF_reg(list,loc.size,loc.size,loc.sref,tmpreg);
  2340. a_op_ref_reg(list,op,loc.size,ref,tmpreg);
  2341. a_load_reg_subsetref(list,loc.size,loc.size,tmpreg,loc.sref);
  2342. end;
  2343. else
  2344. internalerror(200109061);
  2345. end;
  2346. end;
  2347. procedure Tcg.a_op_const_reg_reg(list:TAsmList;op:Topcg;size:Tcgsize;
  2348. a:aint;src,dst:Tregister);
  2349. begin
  2350. a_load_reg_reg(list,size,size,src,dst);
  2351. a_op_const_reg(list,op,size,a,dst);
  2352. end;
  2353. procedure tcg.a_op_reg_reg_reg(list: TAsmList; op: TOpCg;
  2354. size: tcgsize; src1, src2, dst: tregister);
  2355. var
  2356. tmpreg: tregister;
  2357. begin
  2358. if (dst<>src1) then
  2359. begin
  2360. a_load_reg_reg(list,size,size,src2,dst);
  2361. a_op_reg_reg(list,op,size,src1,dst);
  2362. end
  2363. else
  2364. begin
  2365. { can we do a direct operation on the target register ? }
  2366. if op in [OP_ADD,OP_MUL,OP_AND,OP_MOVE,OP_XOR,OP_IMUL,OP_OR] then
  2367. a_op_reg_reg(list,op,size,src2,dst)
  2368. else
  2369. begin
  2370. tmpreg:=getintregister(list,size);
  2371. a_load_reg_reg(list,size,size,src2,tmpreg);
  2372. a_op_reg_reg(list,op,size,src1,tmpreg);
  2373. a_load_reg_reg(list,size,size,tmpreg,dst);
  2374. end;
  2375. end;
  2376. end;
  2377. procedure tcg.a_op_const_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; a: aint; src, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2378. begin
  2379. a_op_const_reg_reg(list,op,size,a,src,dst);
  2380. ovloc.loc:=LOC_VOID;
  2381. end;
  2382. procedure tcg.a_op_reg_reg_reg_checkoverflow(list: TAsmList; op: TOpCg; size: tcgsize; src1, src2, dst: tregister;setflags : boolean;var ovloc : tlocation);
  2383. begin
  2384. a_op_reg_reg_reg(list,op,size,src1,src2,dst);
  2385. ovloc.loc:=LOC_VOID;
  2386. end;
  2387. procedure tcg.a_cmp_const_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const ref : treference;
  2388. l : tasmlabel);
  2389. var
  2390. tmpreg: tregister;
  2391. begin
  2392. tmpreg:=getintregister(list,size);
  2393. a_load_ref_reg(list,size,size,ref,tmpreg);
  2394. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2395. end;
  2396. procedure tcg.a_cmp_const_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;a : aint;const loc : tlocation;
  2397. l : tasmlabel);
  2398. var
  2399. tmpreg : tregister;
  2400. begin
  2401. case loc.loc of
  2402. LOC_REGISTER,LOC_CREGISTER:
  2403. a_cmp_const_reg_label(list,size,cmp_op,a,loc.register,l);
  2404. LOC_REFERENCE,LOC_CREFERENCE:
  2405. a_cmp_const_ref_label(list,size,cmp_op,a,loc.reference,l);
  2406. LOC_SUBSETREG, LOC_CSUBSETREG:
  2407. begin
  2408. tmpreg:=getintregister(list,size);
  2409. a_load_subsetreg_reg(list,loc.size,size,loc.sreg,tmpreg);
  2410. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2411. end;
  2412. LOC_SUBSETREF, LOC_CSUBSETREF:
  2413. begin
  2414. tmpreg:=getintregister(list,size);
  2415. a_load_subsetref_reg(list,loc.size,size,loc.sref,tmpreg);
  2416. a_cmp_const_reg_label(list,size,cmp_op,a,tmpreg,l);
  2417. end;
  2418. else
  2419. internalerror(200109061);
  2420. end;
  2421. end;
  2422. procedure tcg.a_cmp_ref_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const ref: treference; reg : tregister; l : tasmlabel);
  2423. var
  2424. tmpreg: tregister;
  2425. begin
  2426. tmpreg:=getintregister(list,size);
  2427. a_load_ref_reg(list,size,size,ref,tmpreg);
  2428. a_cmp_reg_reg_label(list,size,cmp_op,tmpreg,reg,l);
  2429. end;
  2430. procedure tcg.a_cmp_reg_ref_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg : tregister; const ref: treference; l : tasmlabel);
  2431. var
  2432. tmpreg: tregister;
  2433. begin
  2434. tmpreg:=getintregister(list,size);
  2435. a_load_ref_reg(list,size,size,ref,tmpreg);
  2436. a_cmp_reg_reg_label(list,size,cmp_op,reg,tmpreg,l);
  2437. end;
  2438. procedure tcg.a_cmp_reg_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; reg: tregister; const loc: tlocation; l : tasmlabel);
  2439. begin
  2440. a_cmp_loc_reg_label(list,size,swap_opcmp(cmp_op),loc,reg,l);
  2441. end;
  2442. procedure tcg.a_cmp_loc_reg_label(list : TAsmList;size : tcgsize;cmp_op : topcmp; const loc: tlocation; reg : tregister; l : tasmlabel);
  2443. begin
  2444. case loc.loc of
  2445. LOC_REGISTER,
  2446. LOC_CREGISTER:
  2447. a_cmp_reg_reg_label(list,size,cmp_op,loc.register,reg,l);
  2448. LOC_REFERENCE,
  2449. LOC_CREFERENCE :
  2450. a_cmp_ref_reg_label(list,size,cmp_op,loc.reference,reg,l);
  2451. LOC_CONSTANT:
  2452. a_cmp_const_reg_label(list,size,cmp_op,loc.value,reg,l);
  2453. LOC_SUBSETREG,
  2454. LOC_CSUBSETREG:
  2455. a_cmp_subsetreg_reg_label(list,loc.size,size,cmp_op,loc.sreg,reg,l);
  2456. LOC_SUBSETREF,
  2457. LOC_CSUBSETREF:
  2458. a_cmp_subsetref_reg_label(list,loc.size,size,cmp_op,loc.sref,reg,l);
  2459. else
  2460. internalerror(200203231);
  2461. end;
  2462. end;
  2463. procedure tcg.a_cmp_subsetreg_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sreg: tsubsetregister; reg : tregister; l : tasmlabel);
  2464. var
  2465. tmpreg: tregister;
  2466. begin
  2467. tmpreg:=getintregister(list, cmpsize);
  2468. a_load_subsetreg_reg(list,subsetsize,cmpsize,sreg,tmpreg);
  2469. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2470. end;
  2471. procedure tcg.a_cmp_subsetref_reg_label(list : TAsmList; subsetsize : tcgsize; cmpsize : tcgsize; cmp_op : topcmp; const sref: tsubsetreference; reg : tregister; l : tasmlabel);
  2472. var
  2473. tmpreg: tregister;
  2474. begin
  2475. tmpreg:=getintregister(list, cmpsize);
  2476. a_load_subsetref_reg(list,subsetsize,cmpsize,sref,tmpreg);
  2477. a_cmp_reg_reg_label(list,cmpsize,cmp_op,tmpreg,reg,l);
  2478. end;
  2479. procedure tcg.a_cmp_ref_loc_label(list : TAsmList;size : tcgsize;cmp_op : topcmp;const ref: treference;const loc : tlocation;
  2480. l : tasmlabel);
  2481. var
  2482. tmpreg: tregister;
  2483. begin
  2484. case loc.loc of
  2485. LOC_REGISTER,LOC_CREGISTER:
  2486. a_cmp_ref_reg_label(list,size,cmp_op,ref,loc.register,l);
  2487. LOC_REFERENCE,LOC_CREFERENCE:
  2488. begin
  2489. tmpreg:=getintregister(list,size);
  2490. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2491. a_cmp_ref_reg_label(list,size,cmp_op,ref,tmpreg,l);
  2492. end;
  2493. LOC_SUBSETREG, LOC_CSUBSETREG:
  2494. begin
  2495. tmpreg:=getintregister(list, size);
  2496. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2497. a_cmp_subsetreg_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sreg,tmpreg,l);
  2498. end;
  2499. LOC_SUBSETREF, LOC_CSUBSETREF:
  2500. begin
  2501. tmpreg:=getintregister(list, size);
  2502. a_load_ref_reg(list,size,size,loc.reference,tmpreg);
  2503. a_cmp_subsetref_reg_label(list,loc.size,size,swap_opcmp(cmp_op),loc.sref,tmpreg,l);
  2504. end;
  2505. else
  2506. internalerror(200109061);
  2507. end;
  2508. end;
  2509. procedure tcg.a_loadmm_loc_reg(list: TAsmList; size: tcgsize; const loc: tlocation; const reg: tregister;shuffle : pmmshuffle);
  2510. begin
  2511. case loc.loc of
  2512. LOC_MMREGISTER,LOC_CMMREGISTER:
  2513. a_loadmm_reg_reg(list,loc.size,size,loc.register,reg,shuffle);
  2514. LOC_REFERENCE,LOC_CREFERENCE:
  2515. a_loadmm_ref_reg(list,loc.size,size,loc.reference,reg,shuffle);
  2516. else
  2517. internalerror(200310121);
  2518. end;
  2519. end;
  2520. procedure tcg.a_loadmm_reg_loc(list: TAsmList; size: tcgsize; const reg: tregister; const loc: tlocation;shuffle : pmmshuffle);
  2521. begin
  2522. case loc.loc of
  2523. LOC_MMREGISTER,LOC_CMMREGISTER:
  2524. a_loadmm_reg_reg(list,size,loc.size,reg,loc.register,shuffle);
  2525. LOC_REFERENCE,LOC_CREFERENCE:
  2526. a_loadmm_reg_ref(list,size,loc.size,reg,loc.reference,shuffle);
  2527. else
  2528. internalerror(200310122);
  2529. end;
  2530. end;
  2531. procedure tcg.a_parammm_reg(list: TAsmList; size: tcgsize; reg: tregister;const cgpara : TCGPara;shuffle : pmmshuffle);
  2532. var
  2533. href : treference;
  2534. begin
  2535. cgpara.check_simple_location;
  2536. case cgpara.location^.loc of
  2537. LOC_MMREGISTER,LOC_CMMREGISTER:
  2538. a_loadmm_reg_reg(list,size,cgpara.location^.size,reg,cgpara.location^.register,shuffle);
  2539. LOC_REFERENCE,LOC_CREFERENCE:
  2540. begin
  2541. reference_reset_base(href,cgpara.location^.reference.index,cgpara.location^.reference.offset,cgpara.alignment);
  2542. a_loadmm_reg_ref(list,size,cgpara.location^.size,reg,href,shuffle);
  2543. end
  2544. else
  2545. internalerror(200310123);
  2546. end;
  2547. end;
  2548. procedure tcg.a_parammm_ref(list: TAsmList; size: tcgsize;const ref: treference;const cgpara : TCGPara;shuffle : pmmshuffle);
  2549. var
  2550. hr : tregister;
  2551. hs : tmmshuffle;
  2552. begin
  2553. cgpara.check_simple_location;
  2554. hr:=getmmregister(list,cgpara.location^.size);
  2555. a_loadmm_ref_reg(list,size,cgpara.location^.size,ref,hr,shuffle);
  2556. if realshuffle(shuffle) then
  2557. begin
  2558. hs:=shuffle^;
  2559. removeshuffles(hs);
  2560. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,@hs);
  2561. end
  2562. else
  2563. a_parammm_reg(list,cgpara.location^.size,hr,cgpara,shuffle);
  2564. end;
  2565. procedure tcg.a_parammm_loc(list: TAsmList;const loc: tlocation; const cgpara : TCGPara;shuffle : pmmshuffle);
  2566. begin
  2567. case loc.loc of
  2568. LOC_MMREGISTER,LOC_CMMREGISTER:
  2569. a_parammm_reg(list,loc.size,loc.register,cgpara,shuffle);
  2570. LOC_REFERENCE,LOC_CREFERENCE:
  2571. a_parammm_ref(list,loc.size,loc.reference,cgpara,shuffle);
  2572. else
  2573. internalerror(200310123);
  2574. end;
  2575. end;
  2576. procedure tcg.a_opmm_ref_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const ref: treference; reg: tregister;shuffle : pmmshuffle);
  2577. var
  2578. hr : tregister;
  2579. hs : tmmshuffle;
  2580. begin
  2581. hr:=getmmregister(list,size);
  2582. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2583. if realshuffle(shuffle) then
  2584. begin
  2585. hs:=shuffle^;
  2586. removeshuffles(hs);
  2587. a_opmm_reg_reg(list,op,size,hr,reg,@hs);
  2588. end
  2589. else
  2590. a_opmm_reg_reg(list,op,size,hr,reg,shuffle);
  2591. end;
  2592. procedure tcg.a_opmm_reg_ref(list: TAsmList; Op: TOpCG; size : tcgsize;reg: tregister; const ref: treference; shuffle : pmmshuffle);
  2593. var
  2594. hr : tregister;
  2595. hs : tmmshuffle;
  2596. begin
  2597. hr:=getmmregister(list,size);
  2598. a_loadmm_ref_reg(list,size,size,ref,hr,shuffle);
  2599. if realshuffle(shuffle) then
  2600. begin
  2601. hs:=shuffle^;
  2602. removeshuffles(hs);
  2603. a_opmm_reg_reg(list,op,size,reg,hr,@hs);
  2604. a_loadmm_reg_ref(list,size,size,hr,ref,@hs);
  2605. end
  2606. else
  2607. begin
  2608. a_opmm_reg_reg(list,op,size,reg,hr,shuffle);
  2609. a_loadmm_reg_ref(list,size,size,hr,ref,shuffle);
  2610. end;
  2611. end;
  2612. procedure tcg.a_opmm_loc_reg(list: TAsmList; Op: TOpCG; size : tcgsize;const loc: tlocation; reg: tregister;shuffle : pmmshuffle);
  2613. begin
  2614. case loc.loc of
  2615. LOC_CMMREGISTER,LOC_MMREGISTER:
  2616. a_opmm_reg_reg(list,op,size,loc.register,reg,shuffle);
  2617. LOC_CREFERENCE,LOC_REFERENCE:
  2618. a_opmm_ref_reg(list,op,size,loc.reference,reg,shuffle);
  2619. else
  2620. internalerror(200312232);
  2621. end;
  2622. end;
  2623. procedure tcg.g_concatcopy_unaligned(list : TAsmList;const source,dest : treference;len : aint);
  2624. begin
  2625. g_concatcopy(list,source,dest,len);
  2626. end;
  2627. procedure tcg.g_copyshortstring(list : TAsmList;const source,dest : treference;len:byte);
  2628. var
  2629. cgpara1,cgpara2,cgpara3 : TCGPara;
  2630. begin
  2631. cgpara1.init;
  2632. cgpara2.init;
  2633. cgpara3.init;
  2634. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2635. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2636. paramanager.getintparaloc(pocall_default,3,cgpara3);
  2637. paramanager.allocparaloc(list,cgpara3);
  2638. a_paramaddr_ref(list,dest,cgpara3);
  2639. paramanager.allocparaloc(list,cgpara2);
  2640. a_paramaddr_ref(list,source,cgpara2);
  2641. paramanager.allocparaloc(list,cgpara1);
  2642. a_param_const(list,OS_INT,len,cgpara1);
  2643. paramanager.freeparaloc(list,cgpara3);
  2644. paramanager.freeparaloc(list,cgpara2);
  2645. paramanager.freeparaloc(list,cgpara1);
  2646. allocallcpuregisters(list);
  2647. a_call_name(list,'FPC_SHORTSTR_ASSIGN',false);
  2648. deallocallcpuregisters(list);
  2649. cgpara3.done;
  2650. cgpara2.done;
  2651. cgpara1.done;
  2652. end;
  2653. procedure tcg.g_copyvariant(list : TAsmList;const source,dest : treference);
  2654. var
  2655. cgpara1,cgpara2 : TCGPara;
  2656. begin
  2657. cgpara1.init;
  2658. cgpara2.init;
  2659. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2660. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2661. paramanager.allocparaloc(list,cgpara2);
  2662. a_paramaddr_ref(list,dest,cgpara2);
  2663. paramanager.allocparaloc(list,cgpara1);
  2664. a_paramaddr_ref(list,source,cgpara1);
  2665. paramanager.freeparaloc(list,cgpara2);
  2666. paramanager.freeparaloc(list,cgpara1);
  2667. allocallcpuregisters(list);
  2668. a_call_name(list,'FPC_VARIANT_COPY_OVERWRITE',false);
  2669. deallocallcpuregisters(list);
  2670. cgpara2.done;
  2671. cgpara1.done;
  2672. end;
  2673. procedure tcg.g_incrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2674. var
  2675. href : treference;
  2676. incrfunc : string;
  2677. cgpara1,cgpara2 : TCGPara;
  2678. begin
  2679. cgpara1.init;
  2680. cgpara2.init;
  2681. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2682. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2683. if is_interfacecom(t) then
  2684. incrfunc:='FPC_INTF_INCR_REF'
  2685. else if is_ansistring(t) then
  2686. incrfunc:='FPC_ANSISTR_INCR_REF'
  2687. else if is_widestring(t) then
  2688. incrfunc:='FPC_WIDESTR_INCR_REF'
  2689. else if is_unicodestring(t) then
  2690. incrfunc:='FPC_UNICODESTR_INCR_REF'
  2691. else if is_dynamic_array(t) then
  2692. incrfunc:='FPC_DYNARRAY_INCR_REF'
  2693. else
  2694. incrfunc:='';
  2695. { call the special incr function or the generic addref }
  2696. if incrfunc<>'' then
  2697. begin
  2698. paramanager.allocparaloc(list,cgpara1);
  2699. { widestrings aren't ref. counted on all platforms so we need the address
  2700. to create a real copy }
  2701. if is_widestring(t) then
  2702. a_paramaddr_ref(list,ref,cgpara1)
  2703. else
  2704. { these functions get the pointer by value }
  2705. a_param_ref(list,OS_ADDR,ref,cgpara1);
  2706. paramanager.freeparaloc(list,cgpara1);
  2707. allocallcpuregisters(list);
  2708. a_call_name(list,incrfunc,false);
  2709. deallocallcpuregisters(list);
  2710. end
  2711. else
  2712. begin
  2713. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2714. paramanager.allocparaloc(list,cgpara2);
  2715. a_paramaddr_ref(list,href,cgpara2);
  2716. paramanager.allocparaloc(list,cgpara1);
  2717. a_paramaddr_ref(list,ref,cgpara1);
  2718. paramanager.freeparaloc(list,cgpara1);
  2719. paramanager.freeparaloc(list,cgpara2);
  2720. allocallcpuregisters(list);
  2721. a_call_name(list,'FPC_ADDREF',false);
  2722. deallocallcpuregisters(list);
  2723. end;
  2724. cgpara2.done;
  2725. cgpara1.done;
  2726. end;
  2727. procedure tcg.g_decrrefcount(list : TAsmList;t: tdef; const ref: treference);
  2728. var
  2729. href : treference;
  2730. decrfunc : string;
  2731. needrtti : boolean;
  2732. cgpara1,cgpara2 : TCGPara;
  2733. tempreg1,tempreg2 : TRegister;
  2734. begin
  2735. cgpara1.init;
  2736. cgpara2.init;
  2737. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2738. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2739. needrtti:=false;
  2740. if is_interfacecom(t) then
  2741. decrfunc:='FPC_INTF_DECR_REF'
  2742. else if is_ansistring(t) then
  2743. decrfunc:='FPC_ANSISTR_DECR_REF'
  2744. else if is_widestring(t) then
  2745. decrfunc:='FPC_WIDESTR_DECR_REF'
  2746. else if is_unicodestring(t) then
  2747. decrfunc:='FPC_UNICODESTR_DECR_REF'
  2748. else if is_dynamic_array(t) then
  2749. begin
  2750. decrfunc:='FPC_DYNARRAY_DECR_REF';
  2751. needrtti:=true;
  2752. end
  2753. else
  2754. decrfunc:='';
  2755. { call the special decr function or the generic decref }
  2756. if decrfunc<>'' then
  2757. begin
  2758. if needrtti then
  2759. begin
  2760. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2761. tempreg2:=getaddressregister(list);
  2762. a_loadaddr_ref_reg(list,href,tempreg2);
  2763. end;
  2764. tempreg1:=getaddressregister(list);
  2765. a_loadaddr_ref_reg(list,ref,tempreg1);
  2766. if needrtti then
  2767. begin
  2768. paramanager.allocparaloc(list,cgpara2);
  2769. a_param_reg(list,OS_ADDR,tempreg2,cgpara2);
  2770. paramanager.freeparaloc(list,cgpara2);
  2771. end;
  2772. paramanager.allocparaloc(list,cgpara1);
  2773. a_param_reg(list,OS_ADDR,tempreg1,cgpara1);
  2774. paramanager.freeparaloc(list,cgpara1);
  2775. allocallcpuregisters(list);
  2776. a_call_name(list,decrfunc,false);
  2777. deallocallcpuregisters(list);
  2778. end
  2779. else
  2780. begin
  2781. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2782. paramanager.allocparaloc(list,cgpara2);
  2783. a_paramaddr_ref(list,href,cgpara2);
  2784. paramanager.allocparaloc(list,cgpara1);
  2785. a_paramaddr_ref(list,ref,cgpara1);
  2786. paramanager.freeparaloc(list,cgpara1);
  2787. paramanager.freeparaloc(list,cgpara2);
  2788. allocallcpuregisters(list);
  2789. a_call_name(list,'FPC_DECREF',false);
  2790. deallocallcpuregisters(list);
  2791. end;
  2792. cgpara2.done;
  2793. cgpara1.done;
  2794. end;
  2795. procedure tcg.g_initialize(list : TAsmList;t : tdef;const ref : treference);
  2796. var
  2797. href : treference;
  2798. cgpara1,cgpara2 : TCGPara;
  2799. begin
  2800. cgpara1.init;
  2801. cgpara2.init;
  2802. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2803. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2804. if is_ansistring(t) or
  2805. is_widestring(t) or
  2806. is_unicodestring(t) or
  2807. is_interfacecom(t) or
  2808. is_dynamic_array(t) then
  2809. a_load_const_ref(list,OS_ADDR,0,ref)
  2810. else
  2811. begin
  2812. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2813. paramanager.allocparaloc(list,cgpara2);
  2814. a_paramaddr_ref(list,href,cgpara2);
  2815. paramanager.allocparaloc(list,cgpara1);
  2816. a_paramaddr_ref(list,ref,cgpara1);
  2817. paramanager.freeparaloc(list,cgpara1);
  2818. paramanager.freeparaloc(list,cgpara2);
  2819. allocallcpuregisters(list);
  2820. a_call_name(list,'FPC_INITIALIZE',false);
  2821. deallocallcpuregisters(list);
  2822. end;
  2823. cgpara1.done;
  2824. cgpara2.done;
  2825. end;
  2826. procedure tcg.g_finalize(list : TAsmList;t : tdef;const ref : treference);
  2827. var
  2828. href : treference;
  2829. cgpara1,cgpara2 : TCGPara;
  2830. begin
  2831. cgpara1.init;
  2832. cgpara2.init;
  2833. paramanager.getintparaloc(pocall_default,1,cgpara1);
  2834. paramanager.getintparaloc(pocall_default,2,cgpara2);
  2835. if is_ansistring(t) or
  2836. is_widestring(t) or
  2837. is_unicodestring(t) or
  2838. is_interfacecom(t) then
  2839. begin
  2840. g_decrrefcount(list,t,ref);
  2841. a_load_const_ref(list,OS_ADDR,0,ref);
  2842. end
  2843. else
  2844. begin
  2845. reference_reset_symbol(href,RTTIWriter.get_rtti_label(t,initrtti),0,sizeof(pint));
  2846. paramanager.allocparaloc(list,cgpara2);
  2847. a_paramaddr_ref(list,href,cgpara2);
  2848. paramanager.allocparaloc(list,cgpara1);
  2849. a_paramaddr_ref(list,ref,cgpara1);
  2850. paramanager.freeparaloc(list,cgpara1);
  2851. paramanager.freeparaloc(list,cgpara2);
  2852. allocallcpuregisters(list);
  2853. a_call_name(list,'FPC_FINALIZE',false);
  2854. deallocallcpuregisters(list);
  2855. end;
  2856. cgpara1.done;
  2857. cgpara2.done;
  2858. end;
  2859. procedure tcg.g_rangecheck(list: TAsmList; const l:tlocation;fromdef,todef: tdef);
  2860. { generate range checking code for the value at location p. The type }
  2861. { type used is checked against todefs ranges. fromdef (p.resultdef) }
  2862. { is the original type used at that location. When both defs are equal }
  2863. { the check is also insert (needed for succ,pref,inc,dec) }
  2864. const
  2865. aintmax=high(aint);
  2866. var
  2867. neglabel : tasmlabel;
  2868. hreg : tregister;
  2869. lto,hto,
  2870. lfrom,hfrom : TConstExprInt;
  2871. fromsize, tosize: cardinal;
  2872. from_signed, to_signed: boolean;
  2873. begin
  2874. { range checking on and range checkable value? }
  2875. if not(cs_check_range in current_settings.localswitches) or
  2876. not(fromdef.typ in [orddef,enumdef]) or
  2877. { C-style booleans can't really fail range checks, }
  2878. { all values are always valid }
  2879. is_cbool(todef) then
  2880. exit;
  2881. {$ifndef cpu64bitalu}
  2882. { handle 64bit rangechecks separate for 32bit processors }
  2883. if is_64bit(fromdef) or is_64bit(todef) then
  2884. begin
  2885. cg64.g_rangecheck64(list,l,fromdef,todef);
  2886. exit;
  2887. end;
  2888. {$endif cpu64bitalu}
  2889. { only check when assigning to scalar, subranges are different, }
  2890. { when todef=fromdef then the check is always generated }
  2891. getrange(fromdef,lfrom,hfrom);
  2892. getrange(todef,lto,hto);
  2893. from_signed := is_signed(fromdef);
  2894. to_signed := is_signed(todef);
  2895. { check the rangedef of the array, not the array itself }
  2896. { (only change now, since getrange needs the arraydef) }
  2897. if (todef.typ = arraydef) then
  2898. todef := tarraydef(todef).rangedef;
  2899. { no range check if from and to are equal and are both longint/dword }
  2900. { (if we have a 32bit processor) or int64/qword, since such }
  2901. { operations can at most cause overflows (JM) }
  2902. { Note that these checks are mostly processor independent, they only }
  2903. { have to be changed once we introduce 64bit subrange types }
  2904. {$ifdef cpu64bitalu}
  2905. if (fromdef = todef) and
  2906. (fromdef.typ=orddef) and
  2907. (((((torddef(fromdef).ordtype = s64bit) and
  2908. (lfrom = low(int64)) and
  2909. (hfrom = high(int64))) or
  2910. ((torddef(fromdef).ordtype = u64bit) and
  2911. (lfrom = low(qword)) and
  2912. (hfrom = high(qword))) or
  2913. ((torddef(fromdef).ordtype = scurrency) and
  2914. (lfrom = low(int64)) and
  2915. (hfrom = high(int64)))))) then
  2916. exit;
  2917. {$else cpu64bitalu}
  2918. if (fromdef = todef) and
  2919. (fromdef.typ=orddef) and
  2920. (((((torddef(fromdef).ordtype = s32bit) and
  2921. (lfrom = int64(low(longint))) and
  2922. (hfrom = int64(high(longint)))) or
  2923. ((torddef(fromdef).ordtype = u32bit) and
  2924. (lfrom = low(cardinal)) and
  2925. (hfrom = high(cardinal)))))) then
  2926. exit;
  2927. {$endif cpu64bitalu}
  2928. { optimize some range checks away in safe cases }
  2929. fromsize := fromdef.size;
  2930. tosize := todef.size;
  2931. if ((from_signed = to_signed) or
  2932. (not from_signed)) and
  2933. (lto<=lfrom) and (hto>=hfrom) and
  2934. (fromsize <= tosize) then
  2935. begin
  2936. { if fromsize < tosize, and both have the same signed-ness or }
  2937. { fromdef is unsigned, then all bit patterns from fromdef are }
  2938. { valid for todef as well }
  2939. if (fromsize < tosize) then
  2940. exit;
  2941. if (fromsize = tosize) and
  2942. (from_signed = to_signed) then
  2943. { only optimize away if all bit patterns which fit in fromsize }
  2944. { are valid for the todef }
  2945. begin
  2946. {$ifopt Q+}
  2947. {$define overflowon}
  2948. {$Q-}
  2949. {$endif}
  2950. if to_signed then
  2951. begin
  2952. { calculation of the low/high ranges must not overflow 64 bit
  2953. otherwise we end up comparing with zero for 64 bit data types on
  2954. 64 bit processors }
  2955. if (lto = (int64(-1) << (tosize * 8 - 1))) and
  2956. (hto = (-((int64(-1) << (tosize * 8 - 1))+1))) then
  2957. exit
  2958. end
  2959. else
  2960. begin
  2961. { calculation of the low/high ranges must not overflow 64 bit
  2962. otherwise we end up having all zeros for 64 bit data types on
  2963. 64 bit processors }
  2964. if (lto = 0) and
  2965. (qword(hto) = (qword(-1) >> (64-(tosize * 8))) ) then
  2966. exit
  2967. end;
  2968. {$ifdef overflowon}
  2969. {$Q+}
  2970. {$undef overflowon}
  2971. {$endif}
  2972. end
  2973. end;
  2974. { generate the rangecheck code for the def where we are going to }
  2975. { store the result }
  2976. { use the trick that }
  2977. { a <= x <= b <=> 0 <= x-a <= b-a <=> unsigned(x-a) <= unsigned(b-a) }
  2978. { To be able to do that, we have to make sure however that either }
  2979. { fromdef and todef are both signed or unsigned, or that we leave }
  2980. { the parts < 0 and > maxlongint out }
  2981. if from_signed xor to_signed then
  2982. begin
  2983. if from_signed then
  2984. { from is signed, to is unsigned }
  2985. begin
  2986. { if high(from) < 0 -> always range error }
  2987. if (hfrom < 0) or
  2988. { if low(to) > maxlongint also range error }
  2989. (lto > aintmax) then
  2990. begin
  2991. a_call_name(list,'FPC_RANGEERROR',false);
  2992. exit
  2993. end;
  2994. { from is signed and to is unsigned -> when looking at to }
  2995. { as an signed value, it must be < maxaint (otherwise }
  2996. { it will become negative, which is invalid since "to" is unsigned) }
  2997. if hto > aintmax then
  2998. hto := aintmax;
  2999. end
  3000. else
  3001. { from is unsigned, to is signed }
  3002. begin
  3003. if (lfrom > aintmax) or
  3004. (hto < 0) then
  3005. begin
  3006. a_call_name(list,'FPC_RANGEERROR',false);
  3007. exit
  3008. end;
  3009. { from is unsigned and to is signed -> when looking at to }
  3010. { as an unsigned value, it must be >= 0 (since negative }
  3011. { values are the same as values > maxlongint) }
  3012. if lto < 0 then
  3013. lto := 0;
  3014. end;
  3015. end;
  3016. hreg:=getintregister(list,OS_INT);
  3017. a_load_loc_reg(list,OS_INT,l,hreg);
  3018. a_op_const_reg(list,OP_SUB,OS_INT,aint(int64(lto)),hreg);
  3019. current_asmdata.getjumplabel(neglabel);
  3020. {
  3021. if from_signed then
  3022. a_cmp_const_reg_label(list,OS_INT,OC_GTE,aint(hto-lto),hreg,neglabel)
  3023. else
  3024. }
  3025. {$ifdef cpu64bitalu}
  3026. if qword(hto-lto)>qword(aintmax) then
  3027. a_cmp_const_reg_label(list,OS_INT,OC_BE,aintmax,hreg,neglabel)
  3028. else
  3029. {$endif cpu64bitalu}
  3030. a_cmp_const_reg_label(list,OS_INT,OC_BE,aint(int64(hto-lto)),hreg,neglabel);
  3031. a_call_name(list,'FPC_RANGEERROR',false);
  3032. a_label(list,neglabel);
  3033. end;
  3034. procedure tcg.g_overflowCheck_loc(List:TAsmList;const Loc:TLocation;def:TDef;ovloc : tlocation);
  3035. begin
  3036. g_overflowCheck(list,loc,def);
  3037. end;
  3038. procedure tcg.g_flags2ref(list: TAsmList; size: TCgSize; const f: tresflags; const ref:TReference);
  3039. var
  3040. tmpreg : tregister;
  3041. begin
  3042. tmpreg:=getintregister(list,size);
  3043. g_flags2reg(list,size,f,tmpreg);
  3044. a_load_reg_ref(list,size,size,tmpreg,ref);
  3045. end;
  3046. procedure tcg.g_maybe_testself(list : TAsmList;reg:tregister);
  3047. var
  3048. OKLabel : tasmlabel;
  3049. cgpara1 : TCGPara;
  3050. begin
  3051. if (cs_check_object in current_settings.localswitches) or
  3052. (cs_check_range in current_settings.localswitches) then
  3053. begin
  3054. current_asmdata.getjumplabel(oklabel);
  3055. a_cmp_const_reg_label(list,OS_ADDR,OC_NE,0,reg,oklabel);
  3056. cgpara1.init;
  3057. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3058. paramanager.allocparaloc(list,cgpara1);
  3059. a_param_const(list,OS_INT,210,cgpara1);
  3060. paramanager.freeparaloc(list,cgpara1);
  3061. a_call_name(list,'FPC_HANDLEERROR',false);
  3062. a_label(list,oklabel);
  3063. cgpara1.done;
  3064. end;
  3065. end;
  3066. procedure tcg.g_maybe_testvmt(list : TAsmList;reg:tregister;objdef:tobjectdef);
  3067. var
  3068. hrefvmt : treference;
  3069. cgpara1,cgpara2 : TCGPara;
  3070. begin
  3071. cgpara1.init;
  3072. cgpara2.init;
  3073. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3074. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3075. if (cs_check_object in current_settings.localswitches) then
  3076. begin
  3077. reference_reset_symbol(hrefvmt,current_asmdata.RefAsmSymbol(objdef.vmt_mangledname),0,sizeof(pint));
  3078. paramanager.allocparaloc(list,cgpara2);
  3079. a_paramaddr_ref(list,hrefvmt,cgpara2);
  3080. paramanager.allocparaloc(list,cgpara1);
  3081. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3082. paramanager.freeparaloc(list,cgpara1);
  3083. paramanager.freeparaloc(list,cgpara2);
  3084. allocallcpuregisters(list);
  3085. a_call_name(list,'FPC_CHECK_OBJECT_EXT',false);
  3086. deallocallcpuregisters(list);
  3087. end
  3088. else
  3089. if (cs_check_range in current_settings.localswitches) then
  3090. begin
  3091. paramanager.allocparaloc(list,cgpara1);
  3092. a_param_reg(list,OS_ADDR,reg,cgpara1);
  3093. paramanager.freeparaloc(list,cgpara1);
  3094. allocallcpuregisters(list);
  3095. a_call_name(list,'FPC_CHECK_OBJECT',false);
  3096. deallocallcpuregisters(list);
  3097. end;
  3098. cgpara1.done;
  3099. cgpara2.done;
  3100. end;
  3101. {*****************************************************************************
  3102. Entry/Exit Code Functions
  3103. *****************************************************************************}
  3104. procedure tcg.g_copyvaluepara_openarray(list : TAsmList;const ref:treference;const lenloc:tlocation;elesize:aint;destreg:tregister);
  3105. var
  3106. sizereg,sourcereg,lenreg : tregister;
  3107. cgpara1,cgpara2,cgpara3 : TCGPara;
  3108. begin
  3109. { because some abis don't support dynamic stack allocation properly
  3110. open array value parameters are copied onto the heap
  3111. }
  3112. { calculate necessary memory }
  3113. { read/write operations on one register make the life of the register allocator hard }
  3114. if not(lenloc.loc in [LOC_REGISTER,LOC_CREGISTER]) then
  3115. begin
  3116. lenreg:=getintregister(list,OS_INT);
  3117. a_load_loc_reg(list,OS_INT,lenloc,lenreg);
  3118. end
  3119. else
  3120. lenreg:=lenloc.register;
  3121. sizereg:=getintregister(list,OS_INT);
  3122. a_op_const_reg_reg(list,OP_ADD,OS_INT,1,lenreg,sizereg);
  3123. a_op_const_reg(list,OP_IMUL,OS_INT,elesize,sizereg);
  3124. { load source }
  3125. sourcereg:=getaddressregister(list);
  3126. a_loadaddr_ref_reg(list,ref,sourcereg);
  3127. { do getmem call }
  3128. cgpara1.init;
  3129. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3130. paramanager.allocparaloc(list,cgpara1);
  3131. a_param_reg(list,OS_INT,sizereg,cgpara1);
  3132. paramanager.freeparaloc(list,cgpara1);
  3133. allocallcpuregisters(list);
  3134. a_call_name(list,'FPC_GETMEM',false);
  3135. deallocallcpuregisters(list);
  3136. cgpara1.done;
  3137. { return the new address }
  3138. a_load_reg_reg(list,OS_ADDR,OS_ADDR,NR_FUNCTION_RESULT_REG,destreg);
  3139. { do move call }
  3140. cgpara1.init;
  3141. cgpara2.init;
  3142. cgpara3.init;
  3143. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3144. paramanager.getintparaloc(pocall_default,2,cgpara2);
  3145. paramanager.getintparaloc(pocall_default,3,cgpara3);
  3146. { load size }
  3147. paramanager.allocparaloc(list,cgpara3);
  3148. a_param_reg(list,OS_INT,sizereg,cgpara3);
  3149. { load destination }
  3150. paramanager.allocparaloc(list,cgpara2);
  3151. a_param_reg(list,OS_ADDR,destreg,cgpara2);
  3152. { load source }
  3153. paramanager.allocparaloc(list,cgpara1);
  3154. a_param_reg(list,OS_ADDR,sourcereg,cgpara1);
  3155. paramanager.freeparaloc(list,cgpara3);
  3156. paramanager.freeparaloc(list,cgpara2);
  3157. paramanager.freeparaloc(list,cgpara1);
  3158. allocallcpuregisters(list);
  3159. a_call_name(list,'FPC_MOVE',false);
  3160. deallocallcpuregisters(list);
  3161. cgpara3.done;
  3162. cgpara2.done;
  3163. cgpara1.done;
  3164. end;
  3165. procedure tcg.g_releasevaluepara_openarray(list : TAsmList;const l:tlocation);
  3166. var
  3167. cgpara1 : TCGPara;
  3168. begin
  3169. { do move call }
  3170. cgpara1.init;
  3171. paramanager.getintparaloc(pocall_default,1,cgpara1);
  3172. { load source }
  3173. paramanager.allocparaloc(list,cgpara1);
  3174. a_param_loc(list,l,cgpara1);
  3175. paramanager.freeparaloc(list,cgpara1);
  3176. allocallcpuregisters(list);
  3177. a_call_name(list,'FPC_FREEMEM',false);
  3178. deallocallcpuregisters(list);
  3179. cgpara1.done;
  3180. end;
  3181. procedure tcg.g_save_registers(list:TAsmList);
  3182. var
  3183. href : treference;
  3184. size : longint;
  3185. r : integer;
  3186. begin
  3187. { calculate temp. size }
  3188. size:=0;
  3189. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3190. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3191. inc(size,sizeof(aint));
  3192. { mm registers }
  3193. if uses_registers(R_MMREGISTER) then
  3194. begin
  3195. { Make sure we reserve enough space to do the alignment based on the offset
  3196. later on. We can't use the size for this, because the alignment of the start
  3197. of the temp is smaller than needed for an OS_VECTOR }
  3198. inc(size,tcgsize2size[OS_VECTOR]);
  3199. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3200. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3201. inc(size,tcgsize2size[OS_VECTOR]);
  3202. end;
  3203. if size>0 then
  3204. begin
  3205. tg.GetTemp(list,size,sizeof(aint),tt_noreuse,current_procinfo.save_regs_ref);
  3206. include(current_procinfo.flags,pi_has_saved_regs);
  3207. { Copy registers to temp }
  3208. href:=current_procinfo.save_regs_ref;
  3209. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3210. begin
  3211. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3212. begin
  3213. a_load_reg_ref(list,OS_ADDR,OS_ADDR,newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE),href);
  3214. inc(href.offset,sizeof(aint));
  3215. end;
  3216. include(rg[R_INTREGISTER].preserved_by_proc,saved_standard_registers[r]);
  3217. end;
  3218. if uses_registers(R_MMREGISTER) then
  3219. begin
  3220. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3221. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3222. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3223. begin
  3224. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3225. begin
  3226. a_loadmm_reg_ref(list,OS_VECTOR,OS_VECTOR,newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE),href,nil);
  3227. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3228. end;
  3229. include(rg[R_MMREGISTER].preserved_by_proc,saved_mm_registers[r]);
  3230. end;
  3231. end;
  3232. end;
  3233. end;
  3234. procedure tcg.g_restore_registers(list:TAsmList);
  3235. var
  3236. href : treference;
  3237. r : integer;
  3238. hreg : tregister;
  3239. begin
  3240. if not(pi_has_saved_regs in current_procinfo.flags) then
  3241. exit;
  3242. { Copy registers from temp }
  3243. href:=current_procinfo.save_regs_ref;
  3244. for r:=low(saved_standard_registers) to high(saved_standard_registers) do
  3245. if saved_standard_registers[r] in rg[R_INTREGISTER].used_in_proc then
  3246. begin
  3247. hreg:=newreg(R_INTREGISTER,saved_standard_registers[r],R_SUBWHOLE);
  3248. { Allocate register so the optimizer does not remove the load }
  3249. a_reg_alloc(list,hreg);
  3250. a_load_ref_reg(list,OS_ADDR,OS_ADDR,href,hreg);
  3251. inc(href.offset,sizeof(aint));
  3252. end;
  3253. if uses_registers(R_MMREGISTER) then
  3254. begin
  3255. if (href.offset mod tcgsize2size[OS_VECTOR])<>0 then
  3256. inc(href.offset,tcgsize2size[OS_VECTOR]-(href.offset mod tcgsize2size[OS_VECTOR]));
  3257. for r:=low(saved_mm_registers) to high(saved_mm_registers) do
  3258. begin
  3259. if saved_mm_registers[r] in rg[R_MMREGISTER].used_in_proc then
  3260. begin
  3261. hreg:=newreg(R_MMREGISTER,saved_mm_registers[r],R_SUBNONE);
  3262. { Allocate register so the optimizer does not remove the load }
  3263. a_reg_alloc(list,hreg);
  3264. a_loadmm_ref_reg(list,OS_VECTOR,OS_VECTOR,href,hreg,nil);
  3265. inc(href.offset,tcgsize2size[OS_VECTOR]);
  3266. end;
  3267. end;
  3268. end;
  3269. tg.UnGetTemp(list,current_procinfo.save_regs_ref);
  3270. end;
  3271. procedure tcg.g_profilecode(list : TAsmList);
  3272. begin
  3273. end;
  3274. procedure tcg.g_exception_reason_save(list : TAsmList; const href : treference);
  3275. begin
  3276. a_load_reg_ref(list, OS_INT, OS_INT, NR_FUNCTION_RESULT_REG, href);
  3277. end;
  3278. procedure tcg.g_exception_reason_save_const(list : TAsmList; const href : treference; a: aint);
  3279. begin
  3280. a_load_const_ref(list, OS_INT, a, href);
  3281. end;
  3282. procedure tcg.g_exception_reason_load(list : TAsmList; const href : treference);
  3283. begin
  3284. cg.a_reg_alloc(list,NR_FUNCTION_RESULT_REG);
  3285. a_load_ref_reg(list, OS_INT, OS_INT, href, NR_FUNCTION_RESULT_REG);
  3286. end;
  3287. procedure tcg.g_adjust_self_value(list:TAsmList;procdef: tprocdef;ioffset: aint);
  3288. var
  3289. hsym : tsym;
  3290. href : treference;
  3291. paraloc : Pcgparalocation;
  3292. begin
  3293. { calculate the parameter info for the procdef }
  3294. if not procdef.has_paraloc_info then
  3295. begin
  3296. procdef.requiredargarea:=paramanager.create_paraloc_info(procdef,callerside);
  3297. procdef.has_paraloc_info:=true;
  3298. end;
  3299. hsym:=tsym(procdef.parast.Find('self'));
  3300. if not(assigned(hsym) and
  3301. (hsym.typ=paravarsym)) then
  3302. internalerror(200305251);
  3303. paraloc:=tparavarsym(hsym).paraloc[callerside].location;
  3304. while paraloc<>nil do
  3305. with paraloc^ do
  3306. begin
  3307. case loc of
  3308. LOC_REGISTER:
  3309. a_op_const_reg(list,OP_SUB,size,ioffset,register);
  3310. LOC_REFERENCE:
  3311. begin
  3312. { offset in the wrapper needs to be adjusted for the stored
  3313. return address }
  3314. reference_reset_base(href,reference.index,reference.offset+sizeof(pint),sizeof(pint));
  3315. a_op_const_ref(list,OP_SUB,size,ioffset,href);
  3316. end
  3317. else
  3318. internalerror(200309189);
  3319. end;
  3320. paraloc:=next;
  3321. end;
  3322. end;
  3323. procedure tcg.g_external_wrapper(list : TAsmList; procdef: tprocdef; const externalname: string);
  3324. begin
  3325. a_jmp_name(list,externalname);
  3326. end;
  3327. procedure tcg.a_call_name_static(list : TAsmList;const s : string);
  3328. begin
  3329. a_call_name(list,s,false);
  3330. end;
  3331. function tcg.g_indirect_sym_load(list:TAsmList;const symname: string; weak: boolean): tregister;
  3332. var
  3333. l: tasmsymbol;
  3334. ref: treference;
  3335. begin
  3336. result := NR_NO;
  3337. case target_info.system of
  3338. system_powerpc_darwin,
  3339. system_i386_darwin,
  3340. system_powerpc64_darwin,
  3341. system_arm_darwin:
  3342. begin
  3343. l:=current_asmdata.getasmsymbol('L'+symname+'$non_lazy_ptr');
  3344. if not(assigned(l)) then
  3345. begin
  3346. l:=current_asmdata.DefineAsmSymbol('L'+symname+'$non_lazy_ptr',AB_LOCAL,AT_DATA);
  3347. current_asmdata.asmlists[al_picdata].concat(tai_symbol.create(l,0));
  3348. if not(weak) then
  3349. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.RefAsmSymbol(symname)))
  3350. else
  3351. current_asmdata.asmlists[al_picdata].concat(tai_const.create_indirect_sym(current_asmdata.WeakRefAsmSymbol(symname)));
  3352. {$ifdef cpu64bitaddr}
  3353. current_asmdata.asmlists[al_picdata].concat(tai_const.create_64bit(0));
  3354. {$else cpu64bitaddr}
  3355. current_asmdata.asmlists[al_picdata].concat(tai_const.create_32bit(0));
  3356. {$endif cpu64bitaddr}
  3357. end;
  3358. result := getaddressregister(list);
  3359. reference_reset_symbol(ref,l,0,sizeof(pint));
  3360. { a_load_ref_reg will turn this into a pic-load if needed }
  3361. a_load_ref_reg(list,OS_ADDR,OS_ADDR,ref,result);
  3362. end;
  3363. end;
  3364. end;
  3365. procedure tcg.g_maybe_got_init(list: TAsmList);
  3366. begin
  3367. end;
  3368. procedure tcg.a_loadmm_reg_reg(list: TAsmList; fromsize, tosize: tcgsize; reg1, reg2: tregister; shuffle: pmmshuffle);
  3369. begin
  3370. internalerror(200807231);
  3371. end;
  3372. procedure tcg.a_loadmm_ref_reg(list: TAsmList; fromsize, tosize: tcgsize; const ref: treference; reg: tregister; shuffle: pmmshuffle);
  3373. begin
  3374. internalerror(200807232);
  3375. end;
  3376. procedure tcg.a_loadmm_reg_ref(list: TAsmList; fromsize, tosize: tcgsize; reg: tregister; const ref: treference; shuffle: pmmshuffle);
  3377. begin
  3378. internalerror(200807233);
  3379. end;
  3380. procedure tcg.a_opmm_reg_reg(list: TAsmList; Op: TOpCG; size: tcgsize; src, dst: tregister; shuffle: pmmshuffle);
  3381. begin
  3382. internalerror(200807234);
  3383. end;
  3384. function tcg.getflagregister(list: TAsmList; size: Tcgsize): Tregister;
  3385. begin
  3386. Result:=TRegister(0);
  3387. internalerror(200807238);
  3388. end;
  3389. {*****************************************************************************
  3390. TCG64
  3391. *****************************************************************************}
  3392. {$ifndef cpu64bitalu}
  3393. procedure tcg64.a_op64_const_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;value : int64; regsrc,regdst : tregister64);
  3394. begin
  3395. a_load64_reg_reg(list,regsrc,regdst);
  3396. a_op64_const_reg(list,op,size,value,regdst);
  3397. end;
  3398. procedure tcg64.a_op64_reg_reg_reg(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64);
  3399. var
  3400. tmpreg64 : tregister64;
  3401. begin
  3402. { when src1=dst then we need to first create a temp to prevent
  3403. overwriting src1 with src2 }
  3404. if (regsrc1.reghi=regdst.reghi) or
  3405. (regsrc1.reglo=regdst.reghi) or
  3406. (regsrc1.reghi=regdst.reglo) or
  3407. (regsrc1.reglo=regdst.reglo) then
  3408. begin
  3409. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3410. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3411. a_load64_reg_reg(list,regsrc2,tmpreg64);
  3412. a_op64_reg_reg(list,op,size,regsrc1,tmpreg64);
  3413. a_load64_reg_reg(list,tmpreg64,regdst);
  3414. end
  3415. else
  3416. begin
  3417. a_load64_reg_reg(list,regsrc2,regdst);
  3418. a_op64_reg_reg(list,op,size,regsrc1,regdst);
  3419. end;
  3420. end;
  3421. procedure tcg64.a_op64_const_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; a : int64; const sref: tsubsetreference);
  3422. var
  3423. tmpreg64 : tregister64;
  3424. begin
  3425. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3426. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3427. a_load64_subsetref_reg(list,sref,tmpreg64);
  3428. a_op64_const_reg(list,op,size,a,tmpreg64);
  3429. a_load64_reg_subsetref(list,tmpreg64,sref);
  3430. end;
  3431. procedure tcg64.a_op64_reg_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; reg: tregister64; const sref: tsubsetreference);
  3432. var
  3433. tmpreg64 : tregister64;
  3434. begin
  3435. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3436. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3437. a_load64_subsetref_reg(list,sref,tmpreg64);
  3438. a_op64_reg_reg(list,op,size,reg,tmpreg64);
  3439. a_load64_reg_subsetref(list,tmpreg64,sref);
  3440. end;
  3441. procedure tcg64.a_op64_ref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ref: treference; const sref: tsubsetreference);
  3442. var
  3443. tmpreg64 : tregister64;
  3444. begin
  3445. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3446. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3447. a_load64_subsetref_reg(list,sref,tmpreg64);
  3448. a_op64_ref_reg(list,op,size,ref,tmpreg64);
  3449. a_load64_reg_subsetref(list,tmpreg64,sref);
  3450. end;
  3451. procedure tcg64.a_op64_subsetref_subsetref(list : TAsmList; Op : TOpCG; size : TCGSize; const ssref,dsref: tsubsetreference);
  3452. var
  3453. tmpreg64 : tregister64;
  3454. begin
  3455. tmpreg64.reglo:=cg.getintregister(list,OS_32);
  3456. tmpreg64.reghi:=cg.getintregister(list,OS_32);
  3457. a_load64_subsetref_reg(list,ssref,tmpreg64);
  3458. a_op64_reg_subsetref(list,op,size,tmpreg64,dsref);
  3459. end;
  3460. procedure tcg64.a_op64_const_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;value : int64;regsrc,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3461. begin
  3462. a_op64_const_reg_reg(list,op,size,value,regsrc,regdst);
  3463. ovloc.loc:=LOC_VOID;
  3464. end;
  3465. procedure tcg64.a_op64_reg_reg_reg_checkoverflow(list: TAsmList;op:TOpCG;size : tcgsize;regsrc1,regsrc2,regdst : tregister64;setflags : boolean;var ovloc : tlocation);
  3466. begin
  3467. a_op64_reg_reg_reg(list,op,size,regsrc1,regsrc2,regdst);
  3468. ovloc.loc:=LOC_VOID;
  3469. end;
  3470. procedure tcg64.a_load64_loc_subsetref(list : TAsmList;const l: tlocation; const sref : tsubsetreference);
  3471. begin
  3472. case l.loc of
  3473. LOC_REFERENCE, LOC_CREFERENCE:
  3474. a_load64_ref_subsetref(list,l.reference,sref);
  3475. LOC_REGISTER,LOC_CREGISTER:
  3476. a_load64_reg_subsetref(list,l.register64,sref);
  3477. LOC_CONSTANT :
  3478. a_load64_const_subsetref(list,l.value64,sref);
  3479. LOC_SUBSETREF,LOC_CSUBSETREF:
  3480. a_load64_subsetref_subsetref(list,l.sref,sref);
  3481. else
  3482. internalerror(2006082210);
  3483. end;
  3484. end;
  3485. procedure tcg64.a_load64_subsetref_loc(list: TAsmlist; const sref: tsubsetreference; const l: tlocation);
  3486. begin
  3487. case l.loc of
  3488. LOC_REFERENCE, LOC_CREFERENCE:
  3489. a_load64_subsetref_ref(list,sref,l.reference);
  3490. LOC_REGISTER,LOC_CREGISTER:
  3491. a_load64_subsetref_reg(list,sref,l.register64);
  3492. LOC_SUBSETREF,LOC_CSUBSETREF:
  3493. a_load64_subsetref_subsetref(list,sref,l.sref);
  3494. else
  3495. internalerror(2006082211);
  3496. end;
  3497. end;
  3498. {$endif cpu64bitalu}
  3499. initialization
  3500. ;
  3501. finalization
  3502. cg.free;
  3503. {$ifndef cpu64bitalu}
  3504. cg64.free;
  3505. {$endif cpu64bitalu}
  3506. end.