ncpucnv.pas 15 KB

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  1. {
  2. Copyright (c) 1998-2002 by Florian Klaempfl
  3. Generate SPARC assembler for type converting nodes
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************}
  16. unit ncpucnv;
  17. {$i fpcdefs.inc}
  18. interface
  19. uses
  20. node,ncnv,ncgcnv,defcmp;
  21. type
  22. tsparctypeconvnode = class(TCgTypeConvNode)
  23. protected
  24. { procedure second_int_to_int;override; }
  25. { procedure second_string_to_string;override; }
  26. { procedure second_cstring_to_pchar;override; }
  27. { procedure second_string_to_chararray;override; }
  28. { procedure second_array_to_pointer;override; }
  29. function first_int_to_real: tnode; override;
  30. { procedure second_pointer_to_array;override; }
  31. { procedure second_chararray_to_string;override; }
  32. { procedure second_char_to_string;override; }
  33. procedure second_int_to_real;override;
  34. { procedure second_real_to_real;override; }
  35. { procedure second_cord_to_pointer;override; }
  36. { procedure second_proc_to_procvar;override; }
  37. { procedure second_bool_to_int;override; }
  38. procedure second_int_to_bool;override;
  39. { procedure second_load_smallset;override; }
  40. { procedure second_ansistring_to_pchar;override; }
  41. { procedure second_pchar_to_string;override; }
  42. { procedure second_class_to_intf;override; }
  43. { procedure second_char_to_char;override; }
  44. end;
  45. implementation
  46. uses
  47. verbose,globals,systems,globtype,
  48. symconst,symdef,aasmbase,aasmtai,aasmdata,
  49. defutil,
  50. cgbase,cgutils,pass_1,pass_2,
  51. ncon,ncal,procinfo,
  52. ncgutil,
  53. cpubase,aasmcpu,
  54. tgobj,cgobj;
  55. {*****************************************************************************
  56. FirstTypeConv
  57. *****************************************************************************}
  58. function tsparctypeconvnode.first_int_to_real: tnode;
  59. var
  60. fname: string[19];
  61. begin
  62. { converting a 64bit integer to a float requires a helper }
  63. if is_64bitint(left.resultdef) or
  64. is_currency(left.resultdef) then
  65. begin
  66. result:=inherited first_int_to_real;
  67. exit;
  68. end
  69. else
  70. { other integers are supposed to be 32 bit }
  71. begin
  72. if is_signed(left.resultdef) then
  73. inserttypeconv(left,s32inttype)
  74. else
  75. inserttypeconv(left,u32inttype);
  76. firstpass(left);
  77. end;
  78. result := nil;
  79. expectloc:=LOC_FPUREGISTER;
  80. end;
  81. {*****************************************************************************
  82. SecondTypeConv
  83. *****************************************************************************}
  84. procedure tsparctypeconvnode.second_int_to_real;
  85. procedure loadsigned;
  86. begin
  87. location_force_mem(current_asmdata.CurrAsmList,left.location);
  88. { Load memory in fpu register }
  89. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
  90. tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
  91. { Convert value in fpu register from integer to float }
  92. case tfloatdef(resultdef).floattype of
  93. s32real:
  94. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOs,location.register,location.register));
  95. s64real:
  96. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOd,location.register,location.register));
  97. s128real:
  98. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOq,location.register,location.register));
  99. else
  100. internalerror(200408011);
  101. end;
  102. end;
  103. var
  104. href : treference;
  105. hregister : tregister;
  106. l1,l2 : tasmlabel;
  107. begin
  108. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  109. if is_signed(left.resultdef) then
  110. begin
  111. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  112. loadsigned;
  113. end
  114. else
  115. begin
  116. current_asmdata.getdatalabel(l1);
  117. current_asmdata.getjumplabel(l2);
  118. reference_reset_symbol(href,l1,0,8);
  119. hregister:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  120. cg.a_load_loc_reg(current_asmdata.CurrAsmList,OS_32,left.location,hregister);
  121. { here we need always an 64 bit register }
  122. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
  123. location_force_mem(current_asmdata.CurrAsmList,left.location);
  124. { Load memory in fpu register }
  125. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F32,OS_F32,left.location.reference,location.register);
  126. tg.ungetiftemp(current_asmdata.CurrAsmList,left.location.reference);
  127. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FiTOd,location.register,location.register));
  128. current_asmdata.CurrAsmList.concat(Taicpu.op_reg_reg(A_CMP,hregister,NR_G0));
  129. cg.a_jmp_flags(current_asmdata.CurrAsmList,F_GE,l2);
  130. case tfloatdef(resultdef).floattype of
  131. { converting dword to s64real first and cut off at the end avoids precision loss }
  132. s32real,
  133. s64real:
  134. begin
  135. hregister:=cg.getfpuregister(current_asmdata.CurrAsmList,OS_F64);
  136. new_section(current_asmdata.asmlists[al_typedconsts],sec_rodata_norel,l1.name,const_align(8));
  137. current_asmdata.asmlists[al_typedconsts].concat(Tai_label.Create(l1));
  138. { I got this constant from a test program (FK) }
  139. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit($41f00000));
  140. current_asmdata.asmlists[al_typedconsts].concat(Tai_const.Create_32bit(0));
  141. cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList,OS_F64,OS_F64,href,hregister);
  142. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_FADDD,location.register,hregister,location.register));
  143. cg.a_label(current_asmdata.CurrAsmList,l2);
  144. { cut off if we should convert to single }
  145. if tfloatdef(resultdef).floattype=s32real then
  146. begin
  147. hregister:=location.register;
  148. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  149. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(A_FDTOS,hregister,location.register));
  150. end;
  151. end;
  152. else
  153. internalerror(200410031);
  154. end;
  155. end;
  156. end;
  157. (*
  158. procedure tsparctypeconvnode.second_real_to_real;
  159. const
  160. conv_op : array[tfloattype,tfloattype] of tasmop = (
  161. { from: s32 s64 s80 sc80 c64 cur f128 }
  162. { s32 } ( A_FMOVS,A_FDTOS,A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  163. { s64 } ( A_FSTOD,A_FMOVD,A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  164. { s80 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  165. { sc80 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  166. { c64 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  167. { cur } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE ),
  168. { f128 } ( A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE, A_NONE )
  169. );
  170. var
  171. op : tasmop;
  172. begin
  173. location_reset(location,LOC_FPUREGISTER,def_cgsize(resultdef));
  174. location_force_fpureg(current_asmdata.CurrAsmList,left.location,false);
  175. { Convert value in fpu register from integer to float }
  176. op:=conv_op[tfloatdef(resultdef).floattype,tfloatdef(left.resultdef).floattype];
  177. if op=A_NONE then
  178. internalerror(200401121);
  179. location.register:=cg.getfpuregister(current_asmdata.CurrAsmList,location.size);
  180. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(op,left.location.register,location.register));
  181. end;
  182. *)
  183. procedure tsparctypeconvnode.second_int_to_bool;
  184. var
  185. href: treference;
  186. hreg1,hreg2 : tregister;
  187. resflags : tresflags;
  188. opsize : tcgsize;
  189. hlabel,oldTrueLabel,oldFalseLabel : tasmlabel;
  190. newsize : tcgsize;
  191. begin
  192. oldTrueLabel:=current_procinfo.CurrTrueLabel;
  193. oldFalseLabel:=current_procinfo.CurrFalseLabel;
  194. current_asmdata.getjumplabel(current_procinfo.CurrTrueLabel);
  195. current_asmdata.getjumplabel(current_procinfo.CurrFalseLabel);
  196. secondpass(left);
  197. if codegenerror then
  198. exit;
  199. { Explicit typecasts from any ordinal type to a boolean type }
  200. { must not change the ordinal value }
  201. if (nf_explicit in flags) and
  202. not(left.location.loc in [LOC_FLAGS,LOC_JUMP]) then
  203. begin
  204. location_copy(location,left.location);
  205. newsize:=def_cgsize(resultdef);
  206. { change of size? change sign only if location is LOC_(C)REGISTER? Then we have to sign/zero-extend }
  207. if (tcgsize2size[newsize]<>tcgsize2size[left.location.size]) or
  208. ((newsize<>left.location.size) and (location.loc in [LOC_REGISTER,LOC_CREGISTER])) then
  209. location_force_reg(current_asmdata.CurrAsmList,location,newsize,true)
  210. else
  211. location.size:=newsize;
  212. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  213. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  214. exit;
  215. end;
  216. location_reset(location,LOC_REGISTER,def_cgsize(resultdef));
  217. opsize:=def_cgsize(left.resultdef);
  218. case left.location.loc of
  219. LOC_CREFERENCE,LOC_REFERENCE,LOC_REGISTER,LOC_CREGISTER:
  220. begin
  221. if left.location.loc in [LOC_CREFERENCE,LOC_REFERENCE] then
  222. begin
  223. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  224. {$ifndef cpu64bitalu}
  225. if left.location.size in [OS_64,OS_S64] then
  226. begin
  227. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,left.location.reference,hreg2);
  228. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  229. href:=left.location.reference;
  230. inc(href.offset,4);
  231. cg.a_load_ref_reg(current_asmdata.CurrAsmList,OS_INT,OS_INT,href,hreg1);
  232. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,hreg1,hreg2,hreg2);
  233. end
  234. else
  235. {$endif not cpu64bitalu}
  236. cg.a_load_ref_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.reference,hreg2);
  237. end
  238. else
  239. begin
  240. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  241. {$ifndef cpu64bitalu}
  242. if left.location.size in [OS_64,OS_S64] then
  243. begin
  244. hreg2:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  245. cg.a_op_reg_reg_reg(current_asmdata.CurrAsmList,OP_OR,OS_32,left.location.register64.reghi,left.location.register64.reglo,hreg2);
  246. end
  247. else
  248. {$endif not cpu64bitalu}
  249. cg.a_load_reg_reg(current_asmdata.CurrAsmList,opsize,opsize,left.location.register,hreg2);
  250. end;
  251. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,opsize);
  252. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBCC,NR_G0,hreg2,NR_G0));
  253. if is_pasbool(resultdef) then
  254. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_ADDX,NR_G0,NR_G0,hreg1))
  255. else
  256. current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg_reg(A_SUBX,NR_G0,NR_G0,hreg1));
  257. end;
  258. LOC_FLAGS :
  259. begin
  260. hreg1:=cg.GetIntRegister(current_asmdata.CurrAsmList,location.size);
  261. resflags:=left.location.resflags;
  262. cg.g_flags2reg(current_asmdata.CurrAsmList,location.size,resflags,hreg1);
  263. if (is_cbool(resultdef)) then
  264. cg.a_op_reg_reg(current_asmdata.CurrAsmList,OP_NEG,location.size,hreg1,hreg1);
  265. end;
  266. LOC_JUMP :
  267. begin
  268. hreg1:=cg.getintregister(current_asmdata.CurrAsmList,OS_INT);
  269. current_asmdata.getjumplabel(hlabel);
  270. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrTrueLabel);
  271. if not(is_cbool(resultdef)) then
  272. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,1,hreg1)
  273. else
  274. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,-1,hreg1);
  275. cg.a_jmp_always(current_asmdata.CurrAsmList,hlabel);
  276. cg.a_label(current_asmdata.CurrAsmList,current_procinfo.CurrFalseLabel);
  277. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_INT,0,hreg1);
  278. cg.a_label(current_asmdata.CurrAsmList,hlabel);
  279. end;
  280. else
  281. internalerror(10062);
  282. end;
  283. {$ifndef cpu64bitalu}
  284. if (location.size in [OS_64,OS_S64]) then
  285. begin
  286. location.register64.reglo:=hreg1;
  287. location.register64.reghi:=cg.getintregister(current_asmdata.CurrAsmList,OS_32);
  288. if (is_cbool(resultdef)) then
  289. { reglo is either 0 or -1 -> reghi has to become the same }
  290. cg.a_load_reg_reg(current_asmdata.CurrAsmList,OS_32,OS_32,location.register64.reglo,location.register64.reghi)
  291. else
  292. { unsigned }
  293. cg.a_load_const_reg(current_asmdata.CurrAsmList,OS_32,0,location.register64.reghi);
  294. end
  295. else
  296. {$endif not cpu64bitalu}
  297. location.register:=hreg1;
  298. current_procinfo.CurrTrueLabel:=oldTrueLabel;
  299. current_procinfo.CurrFalseLabel:=oldFalseLabel;
  300. end;
  301. begin
  302. ctypeconvnode:=tsparctypeconvnode;
  303. end.