rax86.pas 23 KB

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  1. {
  2. Copyright (c) 1998-2002 by Carl Eric Codere and Peter Vreman
  3. Handles the common x86 assembler reader routines
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. ****************************************************************************
  16. }
  17. {
  18. Contains the common x86 (i386 and x86-64) assembler reader routines.
  19. }
  20. unit rax86;
  21. {$i fpcdefs.inc}
  22. interface
  23. uses
  24. aasmbase,aasmtai,aasmdata,aasmcpu,
  25. cpubase,rautils,cclasses;
  26. { Parser helpers }
  27. function is_prefix(t:tasmop):boolean;
  28. function is_override(t:tasmop):boolean;
  29. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  30. Function CheckOverride(overrideop,op:tasmop): Boolean;
  31. Procedure FWaitWarning;
  32. type
  33. Tx86Operand=class(TOperand)
  34. opsize : topsize;
  35. Procedure SetSize(_size:longint;force:boolean);override;
  36. Procedure SetCorrectSize(opcode:tasmop);override;
  37. Function CheckOperand: boolean; override;
  38. end;
  39. Tx86Instruction=class(TInstruction)
  40. OpOrder : TOperandOrder;
  41. opsize : topsize;
  42. constructor Create(optype : tcoperand);override;
  43. { Operand sizes }
  44. procedure AddReferenceSizes;
  45. procedure SetInstructionOpsize;
  46. procedure CheckOperandSizes;
  47. procedure CheckNonCommutativeOpcodes;
  48. procedure SwapOperands;
  49. { Additional actions required by specific reader }
  50. procedure FixupOpcode;virtual;
  51. { opcode adding }
  52. function ConcatInstruction(p : TAsmList) : tai;override;
  53. end;
  54. const
  55. AsmPrefixes = 6;
  56. AsmPrefix : array[0..AsmPrefixes-1] of TasmOP =(
  57. A_LOCK,A_REP,A_REPE,A_REPNE,A_REPNZ,A_REPZ
  58. );
  59. AsmOverrides = 6;
  60. AsmOverride : array[0..AsmOverrides-1] of TasmOP =(
  61. A_SEGCS,A_SEGES,A_SEGDS,A_SEGFS,A_SEGGS,A_SEGSS
  62. );
  63. CondAsmOps=3;
  64. CondAsmOp:array[0..CondAsmOps-1] of TasmOp=(
  65. A_CMOVcc, A_Jcc, A_SETcc
  66. );
  67. CondAsmOpStr:array[0..CondAsmOps-1] of string[4]=(
  68. 'CMOV','J','SET'
  69. );
  70. implementation
  71. uses
  72. globtype,globals,systems,verbose,
  73. procinfo,
  74. cpuinfo,cgbase,cgutils,
  75. itcpugas,cgx86;
  76. {*****************************************************************************
  77. Parser Helpers
  78. *****************************************************************************}
  79. function is_prefix(t:tasmop):boolean;
  80. var
  81. i : longint;
  82. Begin
  83. is_prefix:=false;
  84. for i:=1 to AsmPrefixes do
  85. if t=AsmPrefix[i-1] then
  86. begin
  87. is_prefix:=true;
  88. exit;
  89. end;
  90. end;
  91. function is_override(t:tasmop):boolean;
  92. var
  93. i : longint;
  94. Begin
  95. is_override:=false;
  96. for i:=1 to AsmOverrides do
  97. if t=AsmOverride[i-1] then
  98. begin
  99. is_override:=true;
  100. exit;
  101. end;
  102. end;
  103. Function CheckPrefix(prefixop,op:tasmop): Boolean;
  104. { Checks if the prefix is valid with the following opcode }
  105. { return false if not, otherwise true }
  106. Begin
  107. CheckPrefix := TRUE;
  108. (* Case prefix of
  109. A_REP,A_REPNE,A_REPE:
  110. Case opcode Of
  111. A_SCASB,A_SCASW,A_SCASD,
  112. A_INS,A_OUTS,A_MOVS,A_CMPS,A_LODS,A_STOS:;
  113. Else
  114. Begin
  115. CheckPrefix := FALSE;
  116. exit;
  117. end;
  118. end; { case }
  119. A_LOCK:
  120. Case opcode Of
  121. A_BT,A_BTS,A_BTR,A_BTC,A_XCHG,A_ADD,A_OR,A_ADC,A_SBB,A_AND,A_SUB,
  122. A_XOR,A_NOT,A_NEG,A_INC,A_DEC:;
  123. Else
  124. Begin
  125. CheckPrefix := FALSE;
  126. Exit;
  127. end;
  128. end; { case }
  129. A_NONE: exit; { no prefix here }
  130. else
  131. CheckPrefix := FALSE;
  132. end; { end case } *)
  133. end;
  134. Function CheckOverride(overrideop,op:tasmop): Boolean;
  135. { Check if the override is valid, and if so then }
  136. { update the instr variable accordingly. }
  137. Begin
  138. CheckOverride := true;
  139. { Case instr.getinstruction of
  140. A_MOVS,A_XLAT,A_CMPS:
  141. Begin
  142. CheckOverride := TRUE;
  143. Message(assem_e_segment_override_not_supported);
  144. end
  145. end }
  146. end;
  147. Procedure FWaitWarning;
  148. begin
  149. if (target_info.system=system_i386_GO32V2) and (cs_fp_emulation in current_settings.moduleswitches) then
  150. Message(asmr_w_fwait_emu_prob);
  151. end;
  152. {*****************************************************************************
  153. TX86Operand
  154. *****************************************************************************}
  155. Procedure Tx86Operand.SetSize(_size:longint;force:boolean);
  156. begin
  157. inherited SetSize(_size,force);
  158. { OS_64 will be set to S_L and be fixed later
  159. in SetCorrectSize }
  160. opsize:=TCGSize2Opsize[size];
  161. end;
  162. Procedure Tx86Operand.SetCorrectSize(opcode:tasmop);
  163. begin
  164. if gas_needsuffix[opcode]=attsufFPU then
  165. begin
  166. case size of
  167. OS_32 : opsize:=S_FS;
  168. OS_64 : opsize:=S_FL;
  169. end;
  170. end
  171. else if gas_needsuffix[opcode]=attsufFPUint then
  172. begin
  173. case size of
  174. OS_16 : opsize:=S_IS;
  175. OS_32 : opsize:=S_IL;
  176. OS_64 : opsize:=S_IQ;
  177. end;
  178. end
  179. else
  180. begin
  181. if size=OS_64 then
  182. opsize:=S_Q;
  183. end;
  184. end;
  185. Function Tx86Operand.CheckOperand: boolean;
  186. begin
  187. result:=true;
  188. if (opr.typ=OPR_Reference) then
  189. begin
  190. if not hasvar then
  191. begin
  192. if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset>0) then
  193. begin
  194. if current_procinfo.procdef.proccalloption=pocall_register then
  195. message(asmr_w_no_direct_ebp_for_parameter)
  196. else
  197. message(asmr_w_direct_ebp_for_parameter_regcall);
  198. end
  199. else if (getsupreg(opr.ref.base)=RS_EBP) and (opr.ref.offset<0) then
  200. message(asmr_w_direct_ebp_neg_offset)
  201. else if (getsupreg(opr.ref.base)=RS_ESP) and (opr.ref.offset<0) then
  202. message(asmr_w_direct_esp_neg_offset);
  203. end;
  204. if (cs_create_pic in current_settings.moduleswitches) and
  205. assigned(opr.ref.symbol) and
  206. not assigned(opr.ref.relsymbol) and
  207. not(opr.ref.refaddr in [addr_pic,addr_pic_no_got]) then
  208. begin
  209. if (opr.ref.symbol.name <> '_GLOBAL_OFFSET_TABLE_') then
  210. begin
  211. message(asmr_e_need_pic_ref);
  212. result:=false;
  213. end
  214. else
  215. opr.ref.refaddr:=addr_pic;
  216. end;
  217. end;
  218. end;
  219. {*****************************************************************************
  220. T386Instruction
  221. *****************************************************************************}
  222. constructor Tx86Instruction.Create(optype : tcoperand);
  223. begin
  224. inherited Create(optype);
  225. Opsize:=S_NO;
  226. end;
  227. procedure Tx86Instruction.SwapOperands;
  228. begin
  229. Inherited SwapOperands;
  230. { mark the correct order }
  231. if OpOrder=op_intel then
  232. OpOrder:=op_att
  233. else
  234. OpOrder:=op_intel;
  235. end;
  236. procedure Tx86Instruction.AddReferenceSizes;
  237. { this will add the sizes for references like [esi] which do not
  238. have the size set yet, it will take only the size if the other
  239. operand is a register }
  240. var
  241. operand2,i : longint;
  242. s : tasmsymbol;
  243. so : aint;
  244. begin
  245. for i:=1 to ops do
  246. begin
  247. operands[i].SetCorrectSize(opcode);
  248. if tx86operand(operands[i]).opsize=S_NO then
  249. begin
  250. {$ifdef x86_64}
  251. if (opcode=A_MOVQ) and
  252. (ops=2) and
  253. (operands[1].opr.typ=OPR_CONSTANT) then
  254. opsize:=S_Q
  255. else
  256. {$endif x86_64}
  257. case operands[i].Opr.Typ of
  258. OPR_LOCAL,
  259. OPR_REFERENCE :
  260. begin
  261. { for 3-operand opcodes, operand #1 (in ATT order) is always an immediate,
  262. don't consider it. }
  263. if i=ops then
  264. operand2:=i-1
  265. else
  266. operand2:=i+1;
  267. if operand2>0 then
  268. begin
  269. { Only allow register as operand to take the size from }
  270. if operands[operand2].opr.typ=OPR_REGISTER then
  271. begin
  272. if ((opcode<>A_MOVD) and
  273. (opcode<>A_CVTSI2SS)) then
  274. tx86operand(operands[i]).opsize:=tx86operand(operands[operand2]).opsize;
  275. end
  276. else
  277. begin
  278. { if no register then take the opsize (which is available with ATT),
  279. if not availble then give an error }
  280. if opsize<>S_NO then
  281. tx86operand(operands[i]).opsize:=opsize
  282. else
  283. begin
  284. if (m_delphi in current_settings.modeswitches) then
  285. Message(asmr_w_unable_to_determine_reference_size_using_dword)
  286. else
  287. Message(asmr_e_unable_to_determine_reference_size);
  288. { recovery }
  289. tx86operand(operands[i]).opsize:=S_L;
  290. end;
  291. end;
  292. end
  293. else
  294. begin
  295. if opsize<>S_NO then
  296. tx86operand(operands[i]).opsize:=opsize
  297. end;
  298. end;
  299. OPR_SYMBOL :
  300. begin
  301. { Fix lea which need a reference }
  302. if opcode=A_LEA then
  303. begin
  304. s:=operands[i].opr.symbol;
  305. so:=operands[i].opr.symofs;
  306. operands[i].opr.typ:=OPR_REFERENCE;
  307. Fillchar(operands[i].opr.ref,sizeof(treference),0);
  308. operands[i].opr.ref.symbol:=s;
  309. operands[i].opr.ref.offset:=so;
  310. end;
  311. {$ifdef x86_64}
  312. tx86operand(operands[i]).opsize:=S_Q;
  313. {$else x86_64}
  314. tx86operand(operands[i]).opsize:=S_L;
  315. {$endif x86_64}
  316. end;
  317. end;
  318. end;
  319. end;
  320. end;
  321. procedure Tx86Instruction.SetInstructionOpsize;
  322. begin
  323. if opsize<>S_NO then
  324. exit;
  325. if (OpOrder=op_intel) then
  326. SwapOperands;
  327. case ops of
  328. 0 : ;
  329. 1 :
  330. begin
  331. { "push es" must be stored as a long PM }
  332. if ((opcode=A_PUSH) or
  333. (opcode=A_POP)) and
  334. (operands[1].opr.typ=OPR_REGISTER) and
  335. is_segment_reg(operands[1].opr.reg) then
  336. opsize:=S_L
  337. else
  338. opsize:=tx86operand(operands[1]).opsize;
  339. end;
  340. 2 :
  341. begin
  342. case opcode of
  343. A_MOVZX,A_MOVSX :
  344. begin
  345. if tx86operand(operands[1]).opsize=S_NO then
  346. begin
  347. tx86operand(operands[1]).opsize:=S_B;
  348. if (m_delphi in current_settings.modeswitches) then
  349. Message(asmr_w_unable_to_determine_reference_size_using_byte)
  350. else
  351. Message(asmr_e_unable_to_determine_reference_size);
  352. end;
  353. case tx86operand(operands[1]).opsize of
  354. S_W :
  355. case tx86operand(operands[2]).opsize of
  356. S_L :
  357. opsize:=S_WL;
  358. end;
  359. S_B :
  360. begin
  361. case tx86operand(operands[2]).opsize of
  362. S_W :
  363. opsize:=S_BW;
  364. S_L :
  365. opsize:=S_BL;
  366. end;
  367. end;
  368. end;
  369. end;
  370. A_MOVD : { movd is a move from a mmx register to a
  371. 32 bit register or memory, so no opsize is correct here PM }
  372. exit;
  373. A_MOVQ :
  374. opsize:=S_IQ;
  375. A_OUT :
  376. opsize:=tx86operand(operands[1]).opsize;
  377. else
  378. opsize:=tx86operand(operands[2]).opsize;
  379. end;
  380. end;
  381. 3 :
  382. opsize:=tx86operand(operands[3]).opsize;
  383. end;
  384. end;
  385. procedure Tx86Instruction.CheckOperandSizes;
  386. var
  387. sizeerr : boolean;
  388. i : longint;
  389. begin
  390. { Check only the most common opcodes here, the others are done in
  391. the assembler pass }
  392. case opcode of
  393. A_PUSH,A_POP,A_DEC,A_INC,A_NOT,A_NEG,
  394. A_CMP,A_MOV,
  395. A_ADD,A_SUB,A_ADC,A_SBB,
  396. A_AND,A_OR,A_TEST,A_XOR: ;
  397. else
  398. exit;
  399. end;
  400. { Handle the BW,BL,WL separatly }
  401. sizeerr:=false;
  402. { special push/pop selector case }
  403. if ((opcode=A_PUSH) or
  404. (opcode=A_POP)) and
  405. (operands[1].opr.typ=OPR_REGISTER) and
  406. is_segment_reg(operands[1].opr.reg) then
  407. exit;
  408. if opsize in [S_BW,S_BL,S_WL] then
  409. begin
  410. if ops<>2 then
  411. sizeerr:=true
  412. else
  413. begin
  414. case opsize of
  415. S_BW :
  416. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_W);
  417. S_BL :
  418. sizeerr:=(tx86operand(operands[1]).opsize<>S_B) or (tx86operand(operands[2]).opsize<>S_L);
  419. S_WL :
  420. sizeerr:=(tx86operand(operands[1]).opsize<>S_W) or (tx86operand(operands[2]).opsize<>S_L);
  421. end;
  422. end;
  423. end
  424. else
  425. begin
  426. for i:=1 to ops do
  427. begin
  428. if (operands[i].opr.typ<>OPR_CONSTANT) and
  429. (tx86operand(operands[i]).opsize in [S_B,S_W,S_L]) and
  430. (tx86operand(operands[i]).opsize<>opsize) then
  431. sizeerr:=true;
  432. end;
  433. end;
  434. if sizeerr then
  435. begin
  436. { if range checks are on then generate an error }
  437. if (cs_compilesystem in current_settings.moduleswitches) or
  438. not (cs_check_range in current_settings.localswitches) then
  439. Message(asmr_w_size_suffix_and_dest_dont_match)
  440. else
  441. Message(asmr_e_size_suffix_and_dest_dont_match);
  442. end;
  443. end;
  444. { This check must be done with the operand in ATT order
  445. i.e.after swapping in the intel reader
  446. but before swapping in the NASM and TASM writers PM }
  447. procedure Tx86Instruction.CheckNonCommutativeOpcodes;
  448. begin
  449. if (OpOrder=op_intel) then
  450. SwapOperands;
  451. if (
  452. (ops=2) and
  453. (operands[1].opr.typ=OPR_REGISTER) and
  454. (operands[2].opr.typ=OPR_REGISTER) and
  455. { if the first is ST and the second is also a register
  456. it is necessarily ST1 .. ST7 }
  457. ((operands[1].opr.reg=NR_ST) or
  458. (operands[1].opr.reg=NR_ST0))
  459. ) or
  460. (ops=0) then
  461. if opcode=A_FSUBR then
  462. opcode:=A_FSUB
  463. else if opcode=A_FSUB then
  464. opcode:=A_FSUBR
  465. else if opcode=A_FDIVR then
  466. opcode:=A_FDIV
  467. else if opcode=A_FDIV then
  468. opcode:=A_FDIVR
  469. else if opcode=A_FSUBRP then
  470. opcode:=A_FSUBP
  471. else if opcode=A_FSUBP then
  472. opcode:=A_FSUBRP
  473. else if opcode=A_FDIVRP then
  474. opcode:=A_FDIVP
  475. else if opcode=A_FDIVP then
  476. opcode:=A_FDIVRP;
  477. if (
  478. (ops=1) and
  479. (operands[1].opr.typ=OPR_REGISTER) and
  480. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  481. (operands[1].opr.reg<>NR_ST) and
  482. (operands[1].opr.reg<>NR_ST0)
  483. ) then
  484. if opcode=A_FSUBRP then
  485. opcode:=A_FSUBP
  486. else if opcode=A_FSUBP then
  487. opcode:=A_FSUBRP
  488. else if opcode=A_FDIVRP then
  489. opcode:=A_FDIVP
  490. else if opcode=A_FDIVP then
  491. opcode:=A_FDIVRP;
  492. end;
  493. procedure Tx86Instruction.FixupOpcode;
  494. begin
  495. { does nothing by default }
  496. end;
  497. {*****************************************************************************
  498. opcode Adding
  499. *****************************************************************************}
  500. function Tx86Instruction.ConcatInstruction(p : TAsmList) : tai;
  501. var
  502. siz : topsize;
  503. i,asize : longint;
  504. ai : taicpu;
  505. begin
  506. if (OpOrder=op_intel) then
  507. SwapOperands;
  508. ai:=nil;
  509. for i:=1 to Ops do
  510. if not operands[i].CheckOperand then
  511. exit;
  512. { Get Opsize }
  513. if (opsize<>S_NO) or (Ops=0) then
  514. siz:=opsize
  515. else
  516. begin
  517. if (Ops=2) and (operands[1].opr.typ=OPR_REGISTER) then
  518. siz:=tx86operand(operands[1]).opsize
  519. else
  520. siz:=tx86operand(operands[Ops]).opsize;
  521. { MOVD should be of size S_LQ or S_QL, but these do not exist PM }
  522. if (ops=2) and
  523. (tx86operand(operands[1]).opsize<>S_NO) and
  524. (tx86operand(operands[2]).opsize<>S_NO) and
  525. (tx86operand(operands[1]).opsize<>tx86operand(operands[2]).opsize) then
  526. siz:=S_NO;
  527. end;
  528. if ((opcode=A_MOVD)or
  529. (opcode=A_CVTSI2SS)) and
  530. ((tx86operand(operands[1]).opsize=S_NO) or
  531. (tx86operand(operands[2]).opsize=S_NO)) then
  532. siz:=S_NO;
  533. { NASM does not support FADD without args
  534. as alias of FADDP
  535. and GNU AS interprets FADD without operand differently
  536. for version 2.9.1 and 2.9.5 !! }
  537. if (ops=0) and
  538. ((opcode=A_FADD) or
  539. (opcode=A_FMUL) or
  540. (opcode=A_FSUB) or
  541. (opcode=A_FSUBR) or
  542. (opcode=A_FDIV) or
  543. (opcode=A_FDIVR)) then
  544. begin
  545. if opcode=A_FADD then
  546. opcode:=A_FADDP
  547. else if opcode=A_FMUL then
  548. opcode:=A_FMULP
  549. else if opcode=A_FSUB then
  550. opcode:=A_FSUBP
  551. else if opcode=A_FSUBR then
  552. opcode:=A_FSUBRP
  553. else if opcode=A_FDIV then
  554. opcode:=A_FDIVP
  555. else if opcode=A_FDIVR then
  556. opcode:=A_FDIVRP;
  557. message1(asmr_w_fadd_to_faddp,std_op2str[opcode]);
  558. end;
  559. {It is valid to specify some instructions without operand size.}
  560. if siz=S_NO then
  561. begin
  562. if (ops=1) and (opcode=A_INT) then
  563. siz:=S_B;
  564. if (ops=1) and (opcode=A_RET) or (opcode=A_RETN) or (opcode=A_RETF) then
  565. siz:=S_W;
  566. if (ops=1) and (opcode=A_PUSH) then
  567. begin
  568. {We are a 32 compiler, assume 32-bit by default. This is Delphi
  569. compatible but bad coding practise.}
  570. siz:=S_L;
  571. message(asmr_w_unable_to_determine_reference_size_using_dword);
  572. end;
  573. if (opcode=A_JMP) or (opcode=A_JCC) or (opcode=A_CALL) then
  574. if ops=1 then
  575. siz:=S_NEAR
  576. else
  577. siz:=S_FAR;
  578. end;
  579. { GNU AS interprets FDIV without operand differently
  580. for version 2.9.1 and 2.10
  581. we add explicit args to it !! }
  582. if (ops=0) and
  583. ((opcode=A_FSUBP) or
  584. (opcode=A_FSUBRP) or
  585. (opcode=A_FDIVP) or
  586. (opcode=A_FDIVRP) or
  587. (opcode=A_FSUB) or
  588. (opcode=A_FSUBR) or
  589. (opcode=A_FADD) or
  590. (opcode=A_FADDP) or
  591. (opcode=A_FDIV) or
  592. (opcode=A_FDIVR)) then
  593. begin
  594. message1(asmr_w_adding_explicit_args_fXX,std_op2str[opcode]);
  595. ops:=2;
  596. operands[1].opr.typ:=OPR_REGISTER;
  597. operands[2].opr.typ:=OPR_REGISTER;
  598. operands[1].opr.reg:=NR_ST0;
  599. operands[2].opr.reg:=NR_ST1;
  600. end;
  601. if (ops=1) and
  602. (
  603. (operands[1].opr.typ=OPR_REGISTER) and
  604. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  605. (operands[1].opr.reg<>NR_ST) and
  606. (operands[1].opr.reg<>NR_ST0)
  607. ) and
  608. (
  609. (opcode=A_FSUBP) or
  610. (opcode=A_FSUBRP) or
  611. (opcode=A_FDIVP) or
  612. (opcode=A_FDIVRP) or
  613. (opcode=A_FADDP) or
  614. (opcode=A_FMULP)
  615. ) then
  616. begin
  617. message1(asmr_w_adding_explicit_first_arg_fXX,std_op2str[opcode]);
  618. ops:=2;
  619. operands[2].opr.typ:=OPR_REGISTER;
  620. operands[2].opr.reg:=operands[1].opr.reg;
  621. operands[1].opr.reg:=NR_ST0;
  622. end;
  623. if (ops=1) and
  624. (
  625. (operands[1].opr.typ=OPR_REGISTER) and
  626. (getregtype(operands[1].opr.reg)=R_FPUREGISTER) and
  627. (operands[1].opr.reg<>NR_ST) and
  628. (operands[1].opr.reg<>NR_ST0)
  629. ) and
  630. (
  631. (opcode=A_FSUB) or
  632. (opcode=A_FSUBR) or
  633. (opcode=A_FDIV) or
  634. (opcode=A_FDIVR) or
  635. (opcode=A_FADD) or
  636. (opcode=A_FMUL)
  637. ) then
  638. begin
  639. message1(asmr_w_adding_explicit_second_arg_fXX,std_op2str[opcode]);
  640. ops:=2;
  641. operands[2].opr.typ:=OPR_REGISTER;
  642. operands[2].opr.reg:=NR_ST0;
  643. end;
  644. { I tried to convince Linus Torvalds to add
  645. code to support ENTER instruction
  646. (when raising a stack page fault)
  647. but he replied that ENTER is a bad instruction and
  648. Linux does not need to support it
  649. So I think its at least a good idea to add a warning
  650. if someone uses this in assembler code
  651. FPC itself does not use it at all PM }
  652. if (opcode=A_ENTER) and
  653. (target_info.system in [system_i386_linux,system_i386_FreeBSD]) then
  654. Message(asmr_w_enter_not_supported_by_linux);
  655. ai:=taicpu.op_none(opcode,siz);
  656. ai.SetOperandOrder(OpOrder);
  657. ai.Ops:=Ops;
  658. ai.Allocate_oper(Ops);
  659. for i:=1 to Ops do
  660. case operands[i].opr.typ of
  661. OPR_CONSTANT :
  662. ai.loadconst(i-1,operands[i].opr.val);
  663. OPR_REGISTER:
  664. ai.loadreg(i-1,operands[i].opr.reg);
  665. OPR_SYMBOL:
  666. ai.loadsymbol(i-1,operands[i].opr.symbol,operands[i].opr.symofs);
  667. OPR_LOCAL :
  668. with operands[i].opr do
  669. ai.loadlocal(i-1,localsym,localsymofs,localindexreg,
  670. localscale,localgetoffset,localforceref);
  671. OPR_REFERENCE:
  672. begin
  673. ai.loadref(i-1,operands[i].opr.ref);
  674. if operands[i].size<>OS_NO then
  675. begin
  676. asize:=0;
  677. case operands[i].size of
  678. OS_8,OS_S8 :
  679. asize:=OT_BITS8;
  680. OS_16,OS_S16 :
  681. asize:=OT_BITS16;
  682. OS_32,OS_S32,OS_F32 :
  683. asize:=OT_BITS32;
  684. OS_64,OS_S64:
  685. begin
  686. { Only FPU operations know about 64bit values, for all
  687. integer operations it is seen as 32bit
  688. this applies only to i386, see tw16622}
  689. if gas_needsuffix[opcode] in [attsufFPU,attsufFPUint] then
  690. asize:=OT_BITS64
  691. {$ifdef i386}
  692. else
  693. asize:=OT_BITS32
  694. {$endif i386}
  695. ;
  696. end;
  697. OS_F64,OS_C64 :
  698. asize:=OT_BITS64;
  699. OS_F80 :
  700. asize:=OT_BITS80;
  701. end;
  702. if asize<>0 then
  703. ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
  704. end;
  705. end;
  706. end;
  707. { Condition ? }
  708. if condition<>C_None then
  709. ai.SetCondition(condition);
  710. { Set is_jmp, it enables asmwriter to emit short jumps if appropriate }
  711. if (opcode=A_JMP) or (opcode=A_JCC) then
  712. ai.is_jmp := True;
  713. { Concat the opcode or give an error }
  714. if assigned(ai) then
  715. p.concat(ai)
  716. else
  717. Message(asmr_e_invalid_opcode_and_operand);
  718. result:=ai;
  719. end;
  720. end.