Jonas Maebe decff7ad16 * merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support 9 years ago
..
aasmcpu.pas d540d56908 * unified internal errors 10 years ago
agx86att.pas decff7ad16 * merged the fixes_3_0-relevant parts of r31808, r31830, r31879: add support 9 years ago
agx86int.pas 7cfd7a66cd + create a special 'heap' segment with reserved space equal to heapsize (i.e. 11 years ago
agx86nsm.pas dd67fa8c5c * fixed DFA warnings for i8086 11 years ago
cga.pas d88d644925 + support for FMA intrinsic: if there is no hardware support, the compiler throws an error. 11 years ago
cgx86.pas 185b9a216d --- Merging r29639 into '.': 10 years ago
cpubase.pas 07e90aaa24 + Implemented IEEE 754-compliant checking for unordered results of floating-point compares on x86 targets. Mantis #9362. 11 years ago
hlcgx86.pas 71deda6f50 + added interface to ncgutil.gen_load_loc_cgpara() to hlcgobj + generic 14 years ago
itcpugas.pas 926dd1b41e * command line compilation of i8086 fixed 12 years ago
itx86int.pas 0e41df598e * merge i8086 branch by Nikolay Nikolov 12 years ago
ni86mem.pas 4a79481c51 * isolated segment-related functionality of tabsolutevarsym into i386/i8086- 11 years ago
nx86add.pas 249a60b28b x86: fix a variable op not initialized warning. This hopefully fixes our x86 testsuite run. 11 years ago
nx86cal.pas 9c1f917e3a * a_call_ref functionality cannot be implemented efficiently at code generator level, because references need specific preparations at earlier points. Moved this support to tcgcallnode and its x86 descendants, and got rid of all ifdef's around. 11 years ago
nx86cnv.pas d613ab8578 * x86: improve x87 qword to float conversion, using single-precision constants saves space and removes need in separate load on FPU stack. No precision loss occurs because 2**64 is representable exactly even in single precision. 11 years ago
nx86con.pas 45f60bc4b5 * small changes (copyright, typo, readability) 12 years ago
nx86inl.pas 8207e0ef22 + make use of vfnmsub*/vfmsub*/vfnmadd* instructions if possible 11 years ago
nx86mat.pas 29d4037a9c * make integer division instruction (div/idiv) on x86 dependent on the 10 years ago
nx86mem.pas 198960b17c * preserve the segment of the reference in tx86vecnode.update_reference_reg_mul 11 years ago
nx86set.pas 5e8f8f4755 * Use GOT-relative constants for i386 PIC jump tables, they don't need runtime relocations. Now almost ABI-compliant on Linux/BSD (Darwin targets unchanged). Also clean up i8086-specific stuff: using tai_const.create_type_sym(aitconst_ptr,...) generates near pointers on i8086, which is the desired goal. 11 years ago
rax86.pas 42d251da1c - x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability. 10 years ago
rax86att.pas 42d251da1c - x86 assembler readers: cleaned out operand swapping code. Operands of TInstruction are kept in AT&T order, Intel reader attaches operands right-to-left. It was effectively the same way before the change (except Intel reader attaching operands left-to-right, followed by a single swap), operand order checks all over the place were just reducing readability. 10 years ago
rax86int.pas 475a9e1617 * Asm readers: allow using procedure symbols in references, resolves #22376. 10 years ago
rgx86.pas e7cd5319f0 * Put under {$ifndef x86_64} more cases of instructions that do not exist in 64-bit mode. 11 years ago
symi86.pas fc71081b74 * i8086 and i386-specific code from tabstractprocdef.is_pushleftright moved to 11 years ago
symx86.pas 94bcb9878a * reimplemented r28329 in a different way, as suggested by Jonas 11 years ago
x86ins.dat 842e027a9f + prove of concept how FMA4 could be supported in inline assembler 11 years ago
x86reg.dat 5af873ee5b * x86 targets: Profiling shows that quite a bit of time is spent in findreg_by_number(), despite it uses binary search. Worse, it is repeated for every piece of register information. Trying to get rid of some of these calls: rearranged registers so that their "opcode" matches 3 LSBs of superregister number (with a few exceptions described at the beginning of x86reg.dat). This allows to lookup opcodes in regval() with O(1) complexity, and removes need in rXXXop.inc files. 12 years ago