Károly Balogh d561e8ab57 m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction 11 lat temu
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aasmcpu.pas d561e8ab57 m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction 11 lat temu
ag68kgas.pas 6d4a9aad66 pass new asm extra opt using -ao option 11 lat temu
aoptcpu.pas df7af34de9 m68k: very early optimizer implementation experiments 11 lat temu
aoptcpub.pas 2f5ce095ce * RefsHaveIndexReg -> cpurefshaveindexreg 13 lat temu
aoptcpud.pas 790a4fe2d3 * log and id tags removed 20 lat temu
cgcpu.pas d561e8ab57 m68k: generate smarter shifting/rotation code on 68k, for example by utilizing the SWAP instruction 11 lat temu
cpubase.pas c79cd3beca * m68k: fixed/completed the inverse_cond function. 11 lat temu
cpuinfo.pas f91ae2700c m68k: added CPUM68K_HAS_ROLROR capability flag 11 lat temu
cpunode.pas 519094055c m68k: cleaned up and fixed cgcpu/fixref for coldfire at least; also enabled n68kmem node, so addressing with scaling is generated now 11 lat temu
cpupara.pas b7da785688 * m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk. 11 lat temu
cpupi.pas 786e814d49 Use the correct frame pointer register: A6 on Unixes and A5 on everything else. The only 13 lat temu
cputarg.pas df7af34de9 m68k: very early optimizer implementation experiments 11 lat temu
hlcgcpu.pas 72e9cfee24 * create/destroy also the high level code generator for all architectures, 14 lat temu
itcpugas.pas fe3d11118c add string version of the new instructions to the right place. removed one more duplicate table. 12 lat temu
m68kreg.dat 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
n68kadd.pas 392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 11 lat temu
n68kcal.pas b7da785688 * m68k: support stack cleanup at caller side, fixed calculation of pushed parameters size and offsets and cleaned out another pile of junk. 11 lat temu
n68kcnv.pas 01febdd7f3 plain 68000 also doesn't support 123(dX) 11 lat temu
n68kmat.pas 01c8ee158d - removed unused variables 11 lat temu
n68kmem.pas 2881bc81b1 m68k: tweaks and fixes in n68kmem. the node is still disabled, needs further fixes in cgcpu/fixref to work properly 11 lat temu
r68kcon.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
r68kgas.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
r68kgri.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
r68knor.inc b19572b41d + gas registers 21 lat temu
r68knum.inc 2555cc8496 * register numbers for address registers fixed 21 lat temu
r68krni.inc b19572b41d + gas registers 21 lat temu
r68ksri.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
r68ksta.inc 2555cc8496 * register numbers for address registers fixed 21 lat temu
r68kstd.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
r68ksup.inc 7ee09b9620 instead of supporting SP only, have register A7 defined, and have SP as an alias 11 lat temu
ra68k.pas 392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 11 lat temu
ra68kmot.pas 392da9e43f * fix warnings when compiling the compiler with DFA optimizer enabled on m68k 11 lat temu
rgcpu.pas ccc9bc0941 m68k: plain 68000 also needs extra handling for large offsets 11 lat temu
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". 11 lat temu