ring 057660d636 Replaced controller specific unit files with new automatically created version plus fixed wrong addressing of devcfg memory in linkerscript пре 11 година
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aasmcpu.pas 4e2fb9d28b * MIPS: fixed O_MOVE_SOURCE and O_MOVE_DEST constants (they were swapped, amazing that it ever worked with such a mistake). пре 11 година
aoptcpu.pas 3ede5ec99b * MIPS peephole: refactored/simplified and added (another) couple of optimizations. пре 11 година
aoptcpub.pas 93e0dd9c2f * Patch from Fuxin Zhang: other mips and mipsel CPUs changes пре 13 година
aoptcpud.pas 0c8546f94c * more MIPS code of David Zhang integrated пре 16 година
cgcpu.pas ac64c4600f + MIPS: make use of instructions MUL,SEB and SEH that are available in modern cores. пре 11 година
cpubase.pas c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
cpuelf.pas d22dc68fda * fixed DFA warnings for MIPS and AVR пре 11 година
cpugas.pas 244f65525b * MIPS: dropped gas_std_regname, its functionality merged into std_regname. This fixes register names in non-instructions (reg. allocation information, variable locations, etc.) and makes assembler listings more readable. пре 11 година
cpuinfo.pas 057660d636 Replaced controller specific unit files with new automatically created version plus fixed wrong addressing of devcfg memory in linkerscript пре 11 година
cpunode.pas b57c95043f + support overriding tdef/tsym methods with target-specific functionality: пре 11 година
cpupara.pas c3350d13f9 * MIPS: floating point parameters on stack should be loaded to/from FPU registers directly, without using temp. пре 12 година
cpupi.pas 96dd464bf2 * Moved fixup_jmps to target-specific classes for powerpc,powerpc64 and MIPS, cleaned out remaining $ifdef's. A slight functionality change is that fixup_jmps is now called before adding the procedure end symbol, not after, but that should not matter. пре 11 година
cputarg.pas b2b26f84cf * partially merged the mips-embedded branch of Michael Ring: пре 11 година
hlcgcpu.pas 54df3e3f37 Initial version of mipsel-embedded Target for pic32mx chips. пре 12 година
itcpugas.pas 3d2a27c66c * fix fpu register type пре 13 година
mipsreg.dat e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. пре 11 година
ncpuadd.pas d9a7d28838 + MIPS: support floating point conditions in its emulated flags, on MIPS4+ convert such flags to registers using conditional move instructions (i.e. without branching). For older cores generated code remains the same. пре 11 година
ncpucall.pas 87684e1cf1 * MIPS: clean up пре 11 година
ncpucnv.pas 5655baa23a * MIPS: optimized conversion of unsigned 32-bit integers to float, now uses one integer register instead of two and does not generate redundant move. пре 11 година
ncpuinln.pas 4065483a50 * completed thlcgobj.location_force_fpureg(), use it everywhere and removed пре 11 година
ncpuld.pas 4b820a1ca5 - Removed tcgloadnode.generate_picvaraccess, it is never used and is not necessary because PIC stuff is handled at lower levels. пре 12 година
ncpumat.pas cd27d64cd5 + Support (as target-independent as possible) optimization of division by constants: пре 11 година
ncpuset.pas e163a2c813 * MIPS and SPARC: determine whether case expression is in range using a single unsigned comparison (like it is done on other targets). пре 11 година
opcode.inc 4e7c908b0d + MIPS: added movn and movz instructions. пре 11 година
racpugas.pas e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. пре 11 година
rgcpu.pas 3b06465322 + MIPS: support replacement spilling for mov.s, mov.d and (partially) mtc1 instructions. пре 11 година
rmipscon.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. пре 11 година
rmipsdwf.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsgas.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsgri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsgss.inc f58fcdf401 + basic mips stuff пре 20 година
rmipsnor.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsnum.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsrni.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipssri.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipssta.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipsstd.inc c260879439 * MIPS: updated registers, dropped special registers not recognized by GAS (actually, "pc" is recognized, but it is used only for MIPS16 mode, so it is easier to add back if/when this mode is supported), added FPU condition code registers ($fcc0..$fcc7). пре 11 година
rmipssup.inc e367ccc0ee * MIPS: changed superregister number for $fcc0..$fcc7 to start from 32, so that range 0..31 can be used without translating into symbolic names. пре 11 година
strinst.inc 4e7c908b0d + MIPS: added movn and movz instructions. пре 11 година
symcpu.pas 02495c17bd Fix a typo. The CPU specific version of "ttypesym" should be called "tcputypesym" and not "tcpuypesym". пре 11 година