cpuinfo.pas 3.5 KB

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  1. {
  2. Copyright (c) 1998-2002 by the Free Pascal development team
  3. Basic Processor information for the ARM
  4. See the file COPYING.FPC, included in this distribution,
  5. for details about the copyright.
  6. This program is distributed in the hope that it will be useful,
  7. but WITHOUT ANY WARRANTY; without even the implied warranty of
  8. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  9. **********************************************************************}
  10. Unit CPUInfo;
  11. Interface
  12. uses
  13. globtype;
  14. Type
  15. bestreal = double;
  16. ts32real = single;
  17. ts64real = double;
  18. ts80real = type double;
  19. ts128real = type double;
  20. ts64comp = comp;
  21. pbestreal=^bestreal;
  22. { possible supported processors for this target }
  23. tcputype =
  24. (cpu_none,
  25. cpu_mips_default,
  26. cpu_mips1,
  27. cpu_mis2,
  28. cpu_mips3,
  29. cpu_mips4,
  30. cpu_mips5,
  31. cpu_mips32,
  32. cpu_mips32r2
  33. );
  34. tfputype =(fpu_none,fpu_soft,fpu_mips2,fpu_mips3);
  35. tabitype =
  36. (
  37. abi_none,
  38. abi_default,
  39. abi_o32,
  40. abi_n32,
  41. abi_o64,
  42. abi_n64,
  43. abi_eabi
  44. );
  45. Const
  46. {# Size of native extended floating point type }
  47. extended_size = 8;
  48. {# Size of a multimedia register }
  49. mmreg_size = 0;
  50. { target cpu string (used by compiler options) }
  51. {$ifdef MIPSEL}
  52. target_cpu_string = 'mipsel';
  53. {$else MIPSEL}
  54. target_cpu_string = 'mips';
  55. {$endif MIPSEL}
  56. { calling conventions supported by the code generator }
  57. supported_calling_conventions : tproccalloptions = [
  58. pocall_internproc,
  59. pocall_stdcall,
  60. { same as stdcall only different name mangling }
  61. pocall_cdecl,
  62. { same as stdcall only different name mangling }
  63. pocall_cppdecl
  64. ];
  65. { cpu strings as accepted by
  66. GNU assembler in -arch=XXX option }
  67. cputypestr : array[tcputype] of string[8] = ('',
  68. { cpu_mips_default } 'mips2',
  69. { cpu_mips1 } 'mips1',
  70. { cpu_mips2 } 'mips2',
  71. { cpu_mips3 } 'mips3',
  72. { cpu_mips4 } 'mips4',
  73. { cpu_mips5 } 'mips5',
  74. { cpu_mips32 } 'mips32',
  75. { cpu_mips32r2 } 'mips32r2'
  76. );
  77. mips_cpu : tcputype = cpu_mips_default;
  78. fputypestr : array[tfputype] of string[9] = ('',
  79. 'SOFT',
  80. 'FPU_MIPS2','FPU_MIPS3'
  81. );
  82. { abi strings as accepted by
  83. GNU assembler in -abi=XXX option }
  84. abitypestr : array[tabitype] of string[4] =
  85. ({ abi_none } '',
  86. { abi_default } '32',
  87. { abi_o32 } '32',
  88. { abi_n32 } 'n32',
  89. { abi_o64 } 'o64',
  90. { abi_n64 } '64',
  91. { abi_eabi } 'eabi'
  92. );
  93. mips_abi : tabitype = abi_default;
  94. { Supported optimizations, only used for information }
  95. supported_optimizerswitches = [cs_opt_regvar,cs_opt_loopunroll,cs_opt_nodecse,
  96. cs_opt_reorder_fields,cs_opt_fastmath];
  97. level1optimizerswitches = [];
  98. level2optimizerswitches = level1optimizerswitches + [cs_opt_regvar,cs_opt_stackframe,cs_opt_nodecse];
  99. level3optimizerswitches = level2optimizerswitches + [cs_opt_loopunroll];
  100. level4optimizerswitches = genericlevel4optimizerswitches + level3optimizerswitches + [];
  101. function SetMipsABIType(const s : string) : boolean;
  102. Implementation
  103. uses
  104. cutils;
  105. function SetMipsABIType(const s : string) : boolean;
  106. var
  107. abi : tabitype;
  108. begin
  109. SetMipsABIType:=false;
  110. for abi := low(tabitype) to high(tabitype) do
  111. if (lower(s)=abitypestr[abi]) then
  112. begin
  113. mips_abi:=abi;
  114. SetMipsABIType:=true;
  115. break;
  116. end;
  117. end;
  118. end.