SDL_cpuinfo.c 32 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067
  1. /*
  2. Simple DirectMedia Layer
  3. Copyright (C) 1997-2020 Sam Lantinga <[email protected]>
  4. This software is provided 'as-is', without any express or implied
  5. warranty. In no event will the authors be held liable for any damages
  6. arising from the use of this software.
  7. Permission is granted to anyone to use this software for any purpose,
  8. including commercial applications, and to alter it and redistribute it
  9. freely, subject to the following restrictions:
  10. 1. The origin of this software must not be misrepresented; you must not
  11. claim that you wrote the original software. If you use this software
  12. in a product, an acknowledgment in the product documentation would be
  13. appreciated but is not required.
  14. 2. Altered source versions must be plainly marked as such, and must not be
  15. misrepresented as being the original software.
  16. 3. This notice may not be removed or altered from any source distribution.
  17. */
  18. #ifdef TEST_MAIN
  19. #include "SDL_config.h"
  20. #else
  21. #include "../SDL_internal.h"
  22. #endif
  23. #if defined(__WIN32__) || defined(__WINRT__)
  24. #include "../core/windows/SDL_windows.h"
  25. #endif
  26. #if defined(__OS2__)
  27. #undef HAVE_SYSCTLBYNAME
  28. #define INCL_DOS
  29. #include <os2.h>
  30. #ifndef QSV_NUMPROCESSORS
  31. #define QSV_NUMPROCESSORS 26
  32. #endif
  33. #endif
  34. /* CPU feature detection for SDL */
  35. #include "SDL_cpuinfo.h"
  36. #include "SDL_assert.h"
  37. #ifdef HAVE_SYSCONF
  38. #include <unistd.h>
  39. #endif
  40. #ifdef HAVE_SYSCTLBYNAME
  41. #include <sys/types.h>
  42. #include <sys/sysctl.h>
  43. #endif
  44. #if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
  45. #include <sys/sysctl.h> /* For AltiVec check */
  46. #elif (defined(__OpenBSD__) || defined(__FreeBSD__)) && defined(__powerpc__)
  47. #include <sys/param.h>
  48. #include <sys/sysctl.h> /* For AltiVec check */
  49. #include <machine/cpu.h>
  50. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  51. #include <signal.h>
  52. #include <setjmp.h>
  53. #endif
  54. #if defined(__QNXNTO__)
  55. #include <sys/syspage.h>
  56. #endif
  57. #if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
  58. /*#include <asm/hwcap.h>*/
  59. #ifndef AT_HWCAP
  60. #define AT_HWCAP 16
  61. #endif
  62. #ifndef AT_PLATFORM
  63. #define AT_PLATFORM 15
  64. #endif
  65. /* Prevent compilation error when including elf.h would also try to define AT_* as an enum */
  66. #ifndef AT_NULL
  67. #define AT_NULL 0
  68. #endif
  69. #ifndef HWCAP_NEON
  70. #define HWCAP_NEON (1 << 12)
  71. #endif
  72. #if defined HAVE_GETAUXVAL
  73. #include <sys/auxv.h>
  74. #else
  75. #include <fcntl.h>
  76. #endif
  77. #endif
  78. #if defined(__ANDROID__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
  79. #if __ARM_ARCH < 8
  80. #include <cpu-features.h>
  81. #endif
  82. #endif
  83. #if defined(HAVE_ELF_AUX_INFO)
  84. #include <sys/auxv.h>
  85. #endif
  86. #ifdef __RISCOS__
  87. #include <kernel.h>
  88. #include <swis.h>
  89. #endif
  90. #define CPU_HAS_RDTSC (1 << 0)
  91. #define CPU_HAS_ALTIVEC (1 << 1)
  92. #define CPU_HAS_MMX (1 << 2)
  93. #define CPU_HAS_3DNOW (1 << 3)
  94. #define CPU_HAS_SSE (1 << 4)
  95. #define CPU_HAS_SSE2 (1 << 5)
  96. #define CPU_HAS_SSE3 (1 << 6)
  97. #define CPU_HAS_SSE41 (1 << 7)
  98. #define CPU_HAS_SSE42 (1 << 8)
  99. #define CPU_HAS_AVX (1 << 9)
  100. #define CPU_HAS_AVX2 (1 << 10)
  101. #define CPU_HAS_NEON (1 << 11)
  102. #define CPU_HAS_AVX512F (1 << 12)
  103. #define CPU_HAS_ARM_SIMD (1 << 13)
  104. #if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
  105. /* This is the brute force way of detecting instruction sets...
  106. the idea is borrowed from the libmpeg2 library - thanks!
  107. */
  108. static jmp_buf jmpbuf;
  109. static void
  110. illegal_instruction(int sig)
  111. {
  112. longjmp(jmpbuf, 1);
  113. }
  114. #endif /* HAVE_SETJMP */
  115. static int
  116. CPU_haveCPUID(void)
  117. {
  118. int has_CPUID = 0;
  119. /* *INDENT-OFF* */
  120. #ifndef SDL_CPUINFO_DISABLED
  121. #if defined(__GNUC__) && defined(i386)
  122. __asm__ (
  123. " pushfl # Get original EFLAGS \n"
  124. " popl %%eax \n"
  125. " movl %%eax,%%ecx \n"
  126. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  127. " pushl %%eax # Save new EFLAGS value on stack \n"
  128. " popfl # Replace current EFLAGS value \n"
  129. " pushfl # Get new EFLAGS \n"
  130. " popl %%eax # Store new EFLAGS in EAX \n"
  131. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  132. " jz 1f # Processor=80486 \n"
  133. " movl $1,%0 # We have CPUID support \n"
  134. "1: \n"
  135. : "=m" (has_CPUID)
  136. :
  137. : "%eax", "%ecx"
  138. );
  139. #elif defined(__GNUC__) && defined(__x86_64__)
  140. /* Technically, if this is being compiled under __x86_64__ then it has
  141. CPUid by definition. But it's nice to be able to prove it. :) */
  142. __asm__ (
  143. " pushfq # Get original EFLAGS \n"
  144. " popq %%rax \n"
  145. " movq %%rax,%%rcx \n"
  146. " xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
  147. " pushq %%rax # Save new EFLAGS value on stack \n"
  148. " popfq # Replace current EFLAGS value \n"
  149. " pushfq # Get new EFLAGS \n"
  150. " popq %%rax # Store new EFLAGS in EAX \n"
  151. " xorl %%ecx,%%eax # Can not toggle ID bit, \n"
  152. " jz 1f # Processor=80486 \n"
  153. " movl $1,%0 # We have CPUID support \n"
  154. "1: \n"
  155. : "=m" (has_CPUID)
  156. :
  157. : "%rax", "%rcx"
  158. );
  159. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  160. __asm {
  161. pushfd ; Get original EFLAGS
  162. pop eax
  163. mov ecx, eax
  164. xor eax, 200000h ; Flip ID bit in EFLAGS
  165. push eax ; Save new EFLAGS value on stack
  166. popfd ; Replace current EFLAGS value
  167. pushfd ; Get new EFLAGS
  168. pop eax ; Store new EFLAGS in EAX
  169. xor eax, ecx ; Can not toggle ID bit,
  170. jz done ; Processor=80486
  171. mov has_CPUID,1 ; We have CPUID support
  172. done:
  173. }
  174. #elif defined(_MSC_VER) && defined(_M_X64)
  175. has_CPUID = 1;
  176. #elif defined(__sun) && defined(__i386)
  177. __asm (
  178. " pushfl \n"
  179. " popl %eax \n"
  180. " movl %eax,%ecx \n"
  181. " xorl $0x200000,%eax \n"
  182. " pushl %eax \n"
  183. " popfl \n"
  184. " pushfl \n"
  185. " popl %eax \n"
  186. " xorl %ecx,%eax \n"
  187. " jz 1f \n"
  188. " movl $1,-8(%ebp) \n"
  189. "1: \n"
  190. );
  191. #elif defined(__sun) && defined(__amd64)
  192. __asm (
  193. " pushfq \n"
  194. " popq %rax \n"
  195. " movq %rax,%rcx \n"
  196. " xorl $0x200000,%eax \n"
  197. " pushq %rax \n"
  198. " popfq \n"
  199. " pushfq \n"
  200. " popq %rax \n"
  201. " xorl %ecx,%eax \n"
  202. " jz 1f \n"
  203. " movl $1,-8(%rbp) \n"
  204. "1: \n"
  205. );
  206. #endif
  207. #endif
  208. /* *INDENT-ON* */
  209. return has_CPUID;
  210. }
  211. #if defined(__GNUC__) && defined(i386)
  212. #define cpuid(func, a, b, c, d) \
  213. __asm__ __volatile__ ( \
  214. " pushl %%ebx \n" \
  215. " xorl %%ecx,%%ecx \n" \
  216. " cpuid \n" \
  217. " movl %%ebx, %%esi \n" \
  218. " popl %%ebx \n" : \
  219. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  220. #elif defined(__GNUC__) && defined(__x86_64__)
  221. #define cpuid(func, a, b, c, d) \
  222. __asm__ __volatile__ ( \
  223. " pushq %%rbx \n" \
  224. " xorq %%rcx,%%rcx \n" \
  225. " cpuid \n" \
  226. " movq %%rbx, %%rsi \n" \
  227. " popq %%rbx \n" : \
  228. "=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
  229. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  230. #define cpuid(func, a, b, c, d) \
  231. __asm { \
  232. __asm mov eax, func \
  233. __asm xor ecx, ecx \
  234. __asm cpuid \
  235. __asm mov a, eax \
  236. __asm mov b, ebx \
  237. __asm mov c, ecx \
  238. __asm mov d, edx \
  239. }
  240. #elif defined(_MSC_VER) && defined(_M_X64)
  241. #define cpuid(func, a, b, c, d) \
  242. { \
  243. int CPUInfo[4]; \
  244. __cpuid(CPUInfo, func); \
  245. a = CPUInfo[0]; \
  246. b = CPUInfo[1]; \
  247. c = CPUInfo[2]; \
  248. d = CPUInfo[3]; \
  249. }
  250. #else
  251. #define cpuid(func, a, b, c, d) \
  252. do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
  253. #endif
  254. static int CPU_CPUIDFeatures[4];
  255. static int CPU_CPUIDMaxFunction = 0;
  256. static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
  257. static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
  258. static void
  259. CPU_calcCPUIDFeatures(void)
  260. {
  261. static SDL_bool checked = SDL_FALSE;
  262. if (!checked) {
  263. checked = SDL_TRUE;
  264. if (CPU_haveCPUID()) {
  265. int a, b, c, d;
  266. cpuid(0, a, b, c, d);
  267. CPU_CPUIDMaxFunction = a;
  268. if (CPU_CPUIDMaxFunction >= 1) {
  269. cpuid(1, a, b, c, d);
  270. CPU_CPUIDFeatures[0] = a;
  271. CPU_CPUIDFeatures[1] = b;
  272. CPU_CPUIDFeatures[2] = c;
  273. CPU_CPUIDFeatures[3] = d;
  274. /* Check to make sure we can call xgetbv */
  275. if (c & 0x08000000) {
  276. /* Call xgetbv to see if YMM (etc) register state is saved */
  277. #if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
  278. __asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
  279. #elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
  280. a = (int)_xgetbv(0);
  281. #elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
  282. __asm
  283. {
  284. xor ecx, ecx
  285. _asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
  286. mov a, eax
  287. }
  288. #endif
  289. CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
  290. CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
  291. }
  292. }
  293. }
  294. }
  295. }
  296. static int
  297. CPU_haveAltiVec(void)
  298. {
  299. volatile int altivec = 0;
  300. #ifndef SDL_CPUINFO_DISABLED
  301. #if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__)) || (defined(__FreeBSD__) && defined(__powerpc__))
  302. #ifdef __OpenBSD__
  303. int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
  304. #elif defined(__FreeBSD__)
  305. int selectors[2] = { CTL_HW, PPC_FEATURE_HAS_ALTIVEC };
  306. #else
  307. int selectors[2] = { CTL_HW, HW_VECTORUNIT };
  308. #endif
  309. int hasVectorUnit = 0;
  310. size_t length = sizeof(hasVectorUnit);
  311. int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
  312. if (0 == error)
  313. altivec = (hasVectorUnit != 0);
  314. #elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
  315. void (*handler) (int sig);
  316. handler = signal(SIGILL, illegal_instruction);
  317. if (setjmp(jmpbuf) == 0) {
  318. asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
  319. altivec = 1;
  320. }
  321. signal(SIGILL, handler);
  322. #endif
  323. #endif
  324. return altivec;
  325. }
  326. #if defined(__ARM_ARCH) && (__ARM_ARCH >= 6)
  327. static int
  328. CPU_haveARMSIMD(void)
  329. {
  330. return 1;
  331. }
  332. #elif !defined(__arm__)
  333. static int
  334. CPU_haveARMSIMD(void)
  335. {
  336. return 0;
  337. }
  338. #elif defined(__LINUX__)
  339. #include <unistd.h>
  340. #include <sys/types.h>
  341. #include <sys/stat.h>
  342. #include <fcntl.h>
  343. #include <elf.h>
  344. static int
  345. CPU_haveARMSIMD(void)
  346. {
  347. int arm_simd = 0;
  348. int fd;
  349. fd = open("/proc/self/auxv", O_RDONLY);
  350. if (fd >= 0)
  351. {
  352. Elf32_auxv_t aux;
  353. while (read(fd, &aux, sizeof aux) == sizeof aux)
  354. {
  355. if (aux.a_type == AT_PLATFORM)
  356. {
  357. const char *plat = (const char *) aux.a_un.a_val;
  358. if (plat) {
  359. arm_simd = strncmp(plat, "v6l", 3) == 0 ||
  360. strncmp(plat, "v7l", 3) == 0;
  361. }
  362. }
  363. }
  364. close(fd);
  365. }
  366. return arm_simd;
  367. }
  368. #elif defined(__RISCOS__)
  369. static int
  370. CPU_haveARMSIMD(void)
  371. {
  372. _kernel_swi_regs regs;
  373. regs.r[0] = 0;
  374. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  375. return 0;
  376. if (!(regs.r[0] & (1<<31)))
  377. return 0;
  378. regs.r[0] = 34;
  379. regs.r[1] = 29;
  380. if (_kernel_swi(OS_PlatformFeatures, &regs, &regs) != NULL)
  381. return 0;
  382. return regs.r[0];
  383. }
  384. #else
  385. static int
  386. CPU_haveARMSIMD(void)
  387. {
  388. #warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
  389. return 0;
  390. }
  391. #endif
  392. #if defined(__LINUX__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
  393. static int
  394. readProcAuxvForNeon(void)
  395. {
  396. int neon = 0;
  397. int kv[2];
  398. const int fd = open("/proc/self/auxv", O_RDONLY);
  399. if (fd != -1) {
  400. while (read(fd, kv, sizeof (kv)) == sizeof (kv)) {
  401. if (kv[0] == AT_HWCAP) {
  402. neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
  403. break;
  404. }
  405. }
  406. close(fd);
  407. }
  408. return neon;
  409. }
  410. #endif
  411. static int
  412. CPU_haveNEON(void)
  413. {
  414. /* The way you detect NEON is a privileged instruction on ARM, so you have
  415. query the OS kernel in a platform-specific way. :/ */
  416. #if defined(SDL_CPUINFO_DISABLED)
  417. return 0; /* disabled */
  418. #elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
  419. /* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
  420. /* Seems to have been removed */
  421. # if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
  422. # define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
  423. # endif
  424. /* All WinRT ARM devices are required to support NEON, but just in case. */
  425. return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
  426. #elif defined(__ARM_ARCH) && (__ARM_ARCH >= 8)
  427. return 1; /* ARMv8 always has non-optional NEON support. */
  428. #elif defined(__APPLE__) && defined(__ARM_ARCH) && (__ARM_ARCH >= 7)
  429. /* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
  430. return 1; /* all Apple ARMv7 chips and later have NEON. */
  431. #elif defined(__APPLE__)
  432. return 0; /* assume anything else from Apple doesn't have NEON. */
  433. #elif defined(__OpenBSD__)
  434. return 1; /* OpenBSD only supports ARMv7 CPUs that have NEON. */
  435. #elif defined(HAVE_ELF_AUX_INFO) && defined(HWCAP_NEON)
  436. unsigned long hasneon = 0;
  437. if (elf_aux_info(AT_HWCAP, (void *)&hasneon, (int)sizeof(hasneon)) != 0)
  438. return 0;
  439. return ((hasneon & HWCAP_NEON) == HWCAP_NEON);
  440. #elif !defined(__arm__)
  441. return 0; /* not an ARM CPU at all. */
  442. #elif defined(__QNXNTO__)
  443. return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
  444. #elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
  445. return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
  446. #elif defined(__LINUX__)
  447. return readProcAuxvForNeon();
  448. #elif defined(__ANDROID__)
  449. /* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
  450. {
  451. AndroidCpuFamily cpu_family = android_getCpuFamily();
  452. if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
  453. uint64_t cpu_features = android_getCpuFeatures();
  454. if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
  455. return 1;
  456. }
  457. }
  458. return 0;
  459. }
  460. #elif defined(__RISCOS__)
  461. /* Use the VFPSupport_Features SWI to access the MVFR registers */
  462. {
  463. _kernel_swi_regs regs;
  464. regs.r[0] = 0;
  465. if (_kernel_swi(VFPSupport_Features, &regs, &regs) == NULL) {
  466. if ((regs.r[2] & 0xFFF000) == 0x111000) {
  467. return 1;
  468. }
  469. }
  470. return 0;
  471. }
  472. #else
  473. #warning SDL_HasNEON is not implemented for this ARM platform. Write me.
  474. return 0;
  475. #endif
  476. }
  477. static int
  478. CPU_have3DNow(void)
  479. {
  480. if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
  481. int a, b, c, d;
  482. cpuid(0x80000000, a, b, c, d);
  483. if (a >= 0x80000001) {
  484. cpuid(0x80000001, a, b, c, d);
  485. return (d & 0x80000000);
  486. }
  487. }
  488. return 0;
  489. }
  490. #define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
  491. #define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
  492. #define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
  493. #define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
  494. #define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
  495. #define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
  496. #define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
  497. #define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
  498. static int
  499. CPU_haveAVX2(void)
  500. {
  501. if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
  502. int a, b, c, d;
  503. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  504. cpuid(7, a, b, c, d);
  505. return (b & 0x00000020);
  506. }
  507. return 0;
  508. }
  509. static int
  510. CPU_haveAVX512F(void)
  511. {
  512. if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
  513. int a, b, c, d;
  514. (void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
  515. cpuid(7, a, b, c, d);
  516. return (b & 0x00010000);
  517. }
  518. return 0;
  519. }
  520. static int SDL_CPUCount = 0;
  521. int
  522. SDL_GetCPUCount(void)
  523. {
  524. if (!SDL_CPUCount) {
  525. #ifndef SDL_CPUINFO_DISABLED
  526. #if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
  527. if (SDL_CPUCount <= 0) {
  528. SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
  529. }
  530. #endif
  531. #ifdef HAVE_SYSCTLBYNAME
  532. if (SDL_CPUCount <= 0) {
  533. size_t size = sizeof(SDL_CPUCount);
  534. sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
  535. }
  536. #endif
  537. #ifdef __WIN32__
  538. if (SDL_CPUCount <= 0) {
  539. SYSTEM_INFO info;
  540. GetSystemInfo(&info);
  541. SDL_CPUCount = info.dwNumberOfProcessors;
  542. }
  543. #endif
  544. #ifdef __OS2__
  545. if (SDL_CPUCount <= 0) {
  546. DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
  547. &SDL_CPUCount, sizeof(SDL_CPUCount) );
  548. }
  549. #endif
  550. #endif
  551. /* There has to be at least 1, right? :) */
  552. if (SDL_CPUCount <= 0) {
  553. SDL_CPUCount = 1;
  554. }
  555. }
  556. return SDL_CPUCount;
  557. }
  558. /* Oh, such a sweet sweet trick, just not very useful. :) */
  559. static const char *
  560. SDL_GetCPUType(void)
  561. {
  562. static char SDL_CPUType[13];
  563. if (!SDL_CPUType[0]) {
  564. int i = 0;
  565. CPU_calcCPUIDFeatures();
  566. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  567. int a, b, c, d;
  568. cpuid(0x00000000, a, b, c, d);
  569. (void) a;
  570. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  571. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  572. SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
  573. SDL_CPUType[i++] = (char)(b & 0xff);
  574. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  575. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  576. SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
  577. SDL_CPUType[i++] = (char)(d & 0xff);
  578. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  579. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  580. SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
  581. SDL_CPUType[i++] = (char)(c & 0xff);
  582. }
  583. if (!SDL_CPUType[0]) {
  584. SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
  585. }
  586. }
  587. return SDL_CPUType;
  588. }
  589. #ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
  590. static const char *
  591. SDL_GetCPUName(void)
  592. {
  593. static char SDL_CPUName[48];
  594. if (!SDL_CPUName[0]) {
  595. int i = 0;
  596. int a, b, c, d;
  597. CPU_calcCPUIDFeatures();
  598. if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
  599. cpuid(0x80000000, a, b, c, d);
  600. if (a >= 0x80000004) {
  601. cpuid(0x80000002, a, b, c, d);
  602. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  603. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  604. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  605. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  606. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  607. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  608. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  609. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  610. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  611. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  612. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  613. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  614. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  615. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  616. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  617. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  618. cpuid(0x80000003, a, b, c, d);
  619. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  620. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  621. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  622. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  623. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  624. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  625. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  626. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  627. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  628. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  629. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  630. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  631. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  632. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  633. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  634. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  635. cpuid(0x80000004, a, b, c, d);
  636. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  637. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  638. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  639. SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
  640. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  641. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  642. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  643. SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
  644. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  645. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  646. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  647. SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
  648. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  649. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  650. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  651. SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
  652. }
  653. }
  654. if (!SDL_CPUName[0]) {
  655. SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
  656. }
  657. }
  658. return SDL_CPUName;
  659. }
  660. #endif
  661. int
  662. SDL_GetCPUCacheLineSize(void)
  663. {
  664. const char *cpuType = SDL_GetCPUType();
  665. int a, b, c, d;
  666. (void) a; (void) b; (void) c; (void) d;
  667. if (SDL_strcmp(cpuType, "GenuineIntel") == 0 || SDL_strcmp(cpuType, "CentaurHauls") == 0 || SDL_strcmp(cpuType, " Shanghai ") == 0) {
  668. cpuid(0x00000001, a, b, c, d);
  669. return (((b >> 8) & 0xff) * 8);
  670. } else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
  671. cpuid(0x80000005, a, b, c, d);
  672. return (c & 0xff);
  673. } else {
  674. /* Just make a guess here... */
  675. return SDL_CACHELINE_SIZE;
  676. }
  677. }
  678. static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
  679. static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
  680. static Uint32
  681. SDL_GetCPUFeatures(void)
  682. {
  683. if (SDL_CPUFeatures == 0xFFFFFFFF) {
  684. CPU_calcCPUIDFeatures();
  685. SDL_CPUFeatures = 0;
  686. SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
  687. if (CPU_haveRDTSC()) {
  688. SDL_CPUFeatures |= CPU_HAS_RDTSC;
  689. }
  690. if (CPU_haveAltiVec()) {
  691. SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
  692. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  693. }
  694. if (CPU_haveMMX()) {
  695. SDL_CPUFeatures |= CPU_HAS_MMX;
  696. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  697. }
  698. if (CPU_have3DNow()) {
  699. SDL_CPUFeatures |= CPU_HAS_3DNOW;
  700. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
  701. }
  702. if (CPU_haveSSE()) {
  703. SDL_CPUFeatures |= CPU_HAS_SSE;
  704. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  705. }
  706. if (CPU_haveSSE2()) {
  707. SDL_CPUFeatures |= CPU_HAS_SSE2;
  708. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  709. }
  710. if (CPU_haveSSE3()) {
  711. SDL_CPUFeatures |= CPU_HAS_SSE3;
  712. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  713. }
  714. if (CPU_haveSSE41()) {
  715. SDL_CPUFeatures |= CPU_HAS_SSE41;
  716. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  717. }
  718. if (CPU_haveSSE42()) {
  719. SDL_CPUFeatures |= CPU_HAS_SSE42;
  720. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  721. }
  722. if (CPU_haveAVX()) {
  723. SDL_CPUFeatures |= CPU_HAS_AVX;
  724. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  725. }
  726. if (CPU_haveAVX2()) {
  727. SDL_CPUFeatures |= CPU_HAS_AVX2;
  728. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
  729. }
  730. if (CPU_haveAVX512F()) {
  731. SDL_CPUFeatures |= CPU_HAS_AVX512F;
  732. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
  733. }
  734. if (CPU_haveARMSIMD()) {
  735. SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
  736. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  737. }
  738. if (CPU_haveNEON()) {
  739. SDL_CPUFeatures |= CPU_HAS_NEON;
  740. SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
  741. }
  742. }
  743. return SDL_CPUFeatures;
  744. }
  745. #define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
  746. SDL_bool SDL_HasRDTSC(void)
  747. {
  748. return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
  749. }
  750. SDL_bool
  751. SDL_HasAltiVec(void)
  752. {
  753. return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
  754. }
  755. SDL_bool
  756. SDL_HasMMX(void)
  757. {
  758. return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
  759. }
  760. SDL_bool
  761. SDL_Has3DNow(void)
  762. {
  763. return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
  764. }
  765. SDL_bool
  766. SDL_HasSSE(void)
  767. {
  768. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
  769. }
  770. SDL_bool
  771. SDL_HasSSE2(void)
  772. {
  773. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
  774. }
  775. SDL_bool
  776. SDL_HasSSE3(void)
  777. {
  778. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
  779. }
  780. SDL_bool
  781. SDL_HasSSE41(void)
  782. {
  783. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
  784. }
  785. SDL_bool
  786. SDL_HasSSE42(void)
  787. {
  788. return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
  789. }
  790. SDL_bool
  791. SDL_HasAVX(void)
  792. {
  793. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
  794. }
  795. SDL_bool
  796. SDL_HasAVX2(void)
  797. {
  798. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
  799. }
  800. SDL_bool
  801. SDL_HasAVX512F(void)
  802. {
  803. return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
  804. }
  805. SDL_bool
  806. SDL_HasARMSIMD(void)
  807. {
  808. return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
  809. }
  810. SDL_bool
  811. SDL_HasNEON(void)
  812. {
  813. return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
  814. }
  815. static int SDL_SystemRAM = 0;
  816. int
  817. SDL_GetSystemRAM(void)
  818. {
  819. if (!SDL_SystemRAM) {
  820. #ifndef SDL_CPUINFO_DISABLED
  821. #if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
  822. if (SDL_SystemRAM <= 0) {
  823. SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
  824. }
  825. #endif
  826. #ifdef HAVE_SYSCTLBYNAME
  827. if (SDL_SystemRAM <= 0) {
  828. #if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__)
  829. #ifdef HW_REALMEM
  830. int mib[2] = {CTL_HW, HW_REALMEM};
  831. #else
  832. /* might only report up to 2 GiB */
  833. int mib[2] = {CTL_HW, HW_PHYSMEM};
  834. #endif /* HW_REALMEM */
  835. #else
  836. int mib[2] = {CTL_HW, HW_MEMSIZE};
  837. #endif /* __FreeBSD__ || __FreeBSD_kernel__ */
  838. Uint64 memsize = 0;
  839. size_t len = sizeof(memsize);
  840. if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
  841. SDL_SystemRAM = (int)(memsize / (1024*1024));
  842. }
  843. }
  844. #endif
  845. #ifdef __WIN32__
  846. if (SDL_SystemRAM <= 0) {
  847. MEMORYSTATUSEX stat;
  848. stat.dwLength = sizeof(stat);
  849. if (GlobalMemoryStatusEx(&stat)) {
  850. SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
  851. }
  852. }
  853. #endif
  854. #ifdef __OS2__
  855. if (SDL_SystemRAM <= 0) {
  856. Uint32 sysram = 0;
  857. DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
  858. SDL_SystemRAM = (int) (sysram / 0x100000U);
  859. }
  860. #endif
  861. #ifdef __RISCOS__
  862. if (SDL_SystemRAM <= 0) {
  863. _kernel_swi_regs regs;
  864. regs.r[0] = 0x108;
  865. if (_kernel_swi(OS_Memory, &regs, &regs) == NULL) {
  866. SDL_SystemRAM = (int)(regs.r[1] * regs.r[2] / (1024 * 1024));
  867. }
  868. }
  869. #endif
  870. #endif
  871. }
  872. return SDL_SystemRAM;
  873. }
  874. size_t
  875. SDL_SIMDGetAlignment(void)
  876. {
  877. if (SDL_SIMDAlignment == 0xFFFFFFFF) {
  878. SDL_GetCPUFeatures(); /* make sure this has been calculated */
  879. }
  880. SDL_assert(SDL_SIMDAlignment != 0);
  881. return SDL_SIMDAlignment;
  882. }
  883. void *
  884. SDL_SIMDAlloc(const size_t len)
  885. {
  886. const size_t alignment = SDL_SIMDGetAlignment();
  887. const size_t padding = alignment - (len % alignment);
  888. const size_t padded = (padding != alignment) ? (len + padding) : len;
  889. Uint8 *retval = NULL;
  890. Uint8 *ptr = (Uint8 *) SDL_malloc(padded + alignment + sizeof (void *));
  891. if (ptr) {
  892. /* store the actual malloc pointer right before our aligned pointer. */
  893. retval = ptr + sizeof (void *);
  894. retval += alignment - (((size_t) retval) % alignment);
  895. *(((void **) retval) - 1) = ptr;
  896. }
  897. return retval;
  898. }
  899. void *
  900. SDL_SIMDRealloc(void *mem, const size_t len)
  901. {
  902. const size_t alignment = SDL_SIMDGetAlignment();
  903. const size_t padding = alignment - (len % alignment);
  904. const size_t padded = (padding != alignment) ? (len + padding) : len;
  905. Uint8 *retval = (Uint8*) mem;
  906. void *oldmem = mem;
  907. size_t memdiff = 0, ptrdiff;
  908. Uint8 *ptr;
  909. if (mem) {
  910. void **realptr = (void **) mem;
  911. realptr--;
  912. mem = *(((void **) mem) - 1);
  913. /* Check the delta between the real pointer and user pointer */
  914. memdiff = ((size_t) oldmem) - ((size_t) mem);
  915. }
  916. ptr = (Uint8 *) SDL_realloc(mem, padded + alignment + sizeof (void *));
  917. if (ptr == mem) {
  918. return retval; /* Pointer didn't change, nothing to do */
  919. }
  920. if (ptr == NULL) {
  921. return NULL; /* Out of memory, bail! */
  922. }
  923. /* Store the actual malloc pointer right before our aligned pointer. */
  924. retval = ptr + sizeof (void *);
  925. retval += alignment - (((size_t) retval) % alignment);
  926. /* Make sure the delta is the same! */
  927. if (mem) {
  928. ptrdiff = ((size_t) retval) - ((size_t) ptr);
  929. if (memdiff != ptrdiff) { /* Delta has changed, copy to new offset! */
  930. oldmem = (void*) (((size_t) ptr) + memdiff);
  931. /* Even though the data past the old `len` is undefined, this is the
  932. * only length value we have, and it guarantees that we copy all the
  933. * previous memory anyhow.
  934. */
  935. SDL_memmove(retval, oldmem, len);
  936. }
  937. }
  938. /* Actually store the malloc pointer, finally. */
  939. *(((void **) retval) - 1) = ptr;
  940. return retval;
  941. }
  942. void
  943. SDL_SIMDFree(void *ptr)
  944. {
  945. if (ptr) {
  946. void **realptr = (void **) ptr;
  947. realptr--;
  948. SDL_free(*(((void **) ptr) - 1));
  949. }
  950. }
  951. #ifdef TEST_MAIN
  952. #include <stdio.h>
  953. int
  954. main()
  955. {
  956. printf("CPU count: %d\n", SDL_GetCPUCount());
  957. printf("CPU type: %s\n", SDL_GetCPUType());
  958. printf("CPU name: %s\n", SDL_GetCPUName());
  959. printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
  960. printf("RDTSC: %d\n", SDL_HasRDTSC());
  961. printf("Altivec: %d\n", SDL_HasAltiVec());
  962. printf("MMX: %d\n", SDL_HasMMX());
  963. printf("3DNow: %d\n", SDL_Has3DNow());
  964. printf("SSE: %d\n", SDL_HasSSE());
  965. printf("SSE2: %d\n", SDL_HasSSE2());
  966. printf("SSE3: %d\n", SDL_HasSSE3());
  967. printf("SSE4.1: %d\n", SDL_HasSSE41());
  968. printf("SSE4.2: %d\n", SDL_HasSSE42());
  969. printf("AVX: %d\n", SDL_HasAVX());
  970. printf("AVX2: %d\n", SDL_HasAVX2());
  971. printf("AVX-512F: %d\n", SDL_HasAVX512F());
  972. printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
  973. printf("NEON: %d\n", SDL_HasNEON());
  974. printf("RAM: %d MB\n", SDL_GetSystemRAM());
  975. return 0;
  976. }
  977. #endif /* TEST_MAIN */
  978. /* vi: set ts=4 sw=4 expandtab: */