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@@ -27,6 +27,10 @@
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*/
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/* ChangeLog for this library:
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+ *
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+ * NDK r10e?: Add MIPS MSA feature.
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+ *
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+ * NDK r10: Support for 64-bit CPUs (Intel, ARM & MIPS).
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*
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* NDK r8d: Add android_setCpu().
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*
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@@ -57,20 +61,17 @@
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* NDK r4: Initial release
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*/
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-#if defined(__le32__)
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-
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-// When users enter this, we should only provide interface and
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-// libportable will give the implementations.
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-
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-#else // !__le32__
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+#include "cpu-features.h"
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-#include <sys/system_properties.h>
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+#include <dlfcn.h>
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+#include <errno.h>
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+#include <fcntl.h>
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#include <pthread.h>
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-#include "cpu-features.h"
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#include <stdio.h>
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#include <stdlib.h>
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-#include <fcntl.h>
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-#include <errno.h>
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+#include <string.h>
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+#include <sys/system_properties.h>
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+#include <unistd.h>
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static pthread_once_t g_once;
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static int g_inited;
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@@ -82,15 +83,7 @@ static int g_cpuCount;
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static uint32_t g_cpuIdArm;
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#endif
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-static const int android_cpufeatures_debug = 0;
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-
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-#ifdef __arm__
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-# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_ARM
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-#elif defined __i386__
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-# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_X86
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-#else
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-# define DEFAULT_CPU_FAMILY ANDROID_CPU_FAMILY_UNKNOWN
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-#endif
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+static const int android_cpufeatures_debug = 0;
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#define D(...) \
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do { \
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@@ -118,6 +111,25 @@ static __inline__ void x86_cpuid(int func, int values[4])
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values[2] = c;
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values[3] = d;
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}
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+#elif defined(__x86_64__)
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+static __inline__ void x86_cpuid(int func, int values[4])
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+{
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+ int64_t a, b, c, d;
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+ /* We need to preserve ebx since we're compiling PIC code */
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+ /* this means we can't use "=b" for the second output register */
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+ __asm__ __volatile__ ( \
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+ "push %%rbx\n"
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+ "cpuid\n" \
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+ "mov %%rbx, %1\n"
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+ "pop %%rbx\n"
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+ : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
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+ : "a" (func) \
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+ );
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+ values[0] = a;
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+ values[1] = b;
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+ values[2] = c;
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+ values[3] = d;
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+}
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#endif
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/* Get the size of a file by reading it until the end. This is needed
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@@ -127,7 +139,8 @@ static __inline__ void x86_cpuid(int func, int values[4])
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static int
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get_file_size(const char* pathname)
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{
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- int fd, result = 0;
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+
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+ int fd, result = 0;
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char buffer[256];
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fd = open(pathname, O_RDONLY);
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@@ -187,6 +200,7 @@ read_file(const char* pathname, char* buffer, size_t buffsize)
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return count;
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}
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+#ifdef __arm__
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/* Extract the content of a the first occurence of a given field in
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* the content of /proc/cpuinfo and return it as a heap-allocated
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* string that must be freed by the caller.
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@@ -199,7 +213,7 @@ extract_cpuinfo_field(const char* buffer, int buflen, const char* field)
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int fieldlen = strlen(field);
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const char* bufend = buffer + buflen;
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char* result = NULL;
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- int len, ignore;
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+ int len;
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const char *p, *q;
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/* Look for first field occurence, and ensures it starts the line. */
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@@ -272,6 +286,7 @@ has_list_item(const char* list, const char* item)
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}
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return 0;
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}
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+#endif /* __arm__ */
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/* Parse a number starting from 'input', but not going further
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* than 'limit'. Return the value into '*result'.
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@@ -316,11 +331,13 @@ parse_decimal(const char* input, const char* limit, int* result)
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return parse_number(input, limit, 10, result);
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}
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+#ifdef __arm__
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static const char*
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parse_hexadecimal(const char* input, const char* limit, int* result)
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{
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return parse_number(input, limit, 16, result);
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}
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+#endif /* __arm__ */
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/* This small data type is used to represent a CPU list / mask, as read
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* from sysfs on Linux. See http://www.kernel.org/doc/Documentation/cputopology.txt
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@@ -432,6 +449,18 @@ cpulist_read_from(CpuList* list, const char* filename)
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cpulist_parse(list, file, filelen);
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}
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+#if defined(__aarch64__)
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+// see <uapi/asm/hwcap.h> kernel header
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+#define HWCAP_FP (1 << 0)
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+#define HWCAP_ASIMD (1 << 1)
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+#define HWCAP_AES (1 << 3)
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+#define HWCAP_PMULL (1 << 4)
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+#define HWCAP_SHA1 (1 << 5)
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+#define HWCAP_SHA2 (1 << 6)
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+#define HWCAP_CRC32 (1 << 7)
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+#endif
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+
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+#if defined(__arm__)
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// See <asm/hwcap.h> kernel header.
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#define HWCAP_VFP (1 << 6)
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@@ -443,27 +472,84 @@ cpulist_read_from(CpuList* list, const char* filename)
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#define HWCAP_IDIVA (1 << 17)
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#define HWCAP_IDIVT (1 << 18)
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+// see <uapi/asm/hwcap.h> kernel header
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+#define HWCAP2_AES (1 << 0)
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+#define HWCAP2_PMULL (1 << 1)
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+#define HWCAP2_SHA1 (1 << 2)
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+#define HWCAP2_SHA2 (1 << 3)
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+#define HWCAP2_CRC32 (1 << 4)
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+
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+// This is the list of 32-bit ARMv7 optional features that are _always_
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+// supported by ARMv8 CPUs, as mandated by the ARM Architecture Reference
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+// Manual.
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+#define HWCAP_SET_FOR_ARMV8 \
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+ ( HWCAP_VFP | \
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+ HWCAP_NEON | \
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+ HWCAP_VFPv3 | \
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+ HWCAP_VFPv4 | \
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+ HWCAP_IDIVA | \
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+ HWCAP_IDIVT )
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+#endif
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+
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+#if defined(__mips__)
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+// see <uapi/asm/hwcap.h> kernel header
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+#define HWCAP_MIPS_R6 (1 << 0)
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+#define HWCAP_MIPS_MSA (1 << 1)
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+#endif
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+
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+#if defined(__arm__) || defined(__aarch64__) || defined(__mips__)
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+
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#define AT_HWCAP 16
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+#define AT_HWCAP2 26
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+
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+// Probe the system's C library for a 'getauxval' function and call it if
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+// it exits, or return 0 for failure. This function is available since API
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+// level 20.
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+//
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+// This code does *NOT* check for '__ANDROID_API__ >= 20' to support the
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+// edge case where some NDK developers use headers for a platform that is
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+// newer than the one really targetted by their application.
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+// This is typically done to use newer native APIs only when running on more
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+// recent Android versions, and requires careful symbol management.
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+//
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+// Note that getauxval() can't really be re-implemented here, because
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+// its implementation does not parse /proc/self/auxv. Instead it depends
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+// on values that are passed by the kernel at process-init time to the
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+// C runtime initialization layer.
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+static uint32_t
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+get_elf_hwcap_from_getauxval(int hwcap_type) {
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+ typedef unsigned long getauxval_func_t(unsigned long);
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+
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+ dlerror();
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+ void* libc_handle = dlopen("libc.so", RTLD_NOW);
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+ if (!libc_handle) {
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+ D("Could not dlopen() C library: %s\n", dlerror());
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+ return 0;
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+ }
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+
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+ uint32_t ret = 0;
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+ getauxval_func_t* func = (getauxval_func_t*)
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+ dlsym(libc_handle, "getauxval");
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+ if (!func) {
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+ D("Could not find getauxval() in C library\n");
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+ } else {
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+ // Note: getauxval() returns 0 on failure. Doesn't touch errno.
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+ ret = (uint32_t)(*func)(hwcap_type);
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+ }
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+ dlclose(libc_handle);
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+ return ret;
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+}
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+#endif
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#if defined(__arm__)
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-/* Compute the ELF HWCAP flags.
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- */
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+// Parse /proc/self/auxv to extract the ELF HW capabilities bitmap for the
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+// current CPU. Note that this file is not accessible from regular
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+// application processes on some Android platform releases.
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+// On success, return new ELF hwcaps, or 0 on failure.
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static uint32_t
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-get_elf_hwcap(const char* cpuinfo, int cpuinfo_len)
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-{
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- /* IMPORTANT:
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- * Accessing /proc/self/auxv doesn't work anymore on all
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- * platform versions. More specifically, when running inside
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- * a regular application process, most of /proc/self/ will be
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- * non-readable, including /proc/self/auxv. This doesn't
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- * happen however if the application is debuggable, or when
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- * running under the "shell" UID, which is why this was not
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- * detected appropriately.
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- */
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-#if 0
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- uint32_t result = 0;
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+get_elf_hwcap_from_proc_self_auxv(void) {
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const char filepath[] = "/proc/self/auxv";
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- int fd = open(filepath, O_RDONLY);
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+ int fd = TEMP_FAILURE_RETRY(open(filepath, O_RDONLY));
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if (fd < 0) {
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D("Could not open %s: %s\n", filepath, strerror(errno));
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return 0;
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@@ -471,11 +557,10 @@ get_elf_hwcap(const char* cpuinfo, int cpuinfo_len)
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struct { uint32_t tag; uint32_t value; } entry;
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+ uint32_t result = 0;
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for (;;) {
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- int ret = read(fd, (char*)&entry, sizeof entry);
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+ int ret = TEMP_FAILURE_RETRY(read(fd, (char*)&entry, sizeof entry));
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if (ret < 0) {
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- if (errno == EINTR)
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- continue;
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D("Error while reading %s: %s\n", filepath, strerror(errno));
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break;
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}
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@@ -489,12 +574,33 @@ get_elf_hwcap(const char* cpuinfo, int cpuinfo_len)
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}
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close(fd);
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return result;
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-#else
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- // Recreate ELF hwcaps by parsing /proc/cpuinfo Features tag.
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+}
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+
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+/* Compute the ELF HWCAP flags from the content of /proc/cpuinfo.
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+ * This works by parsing the 'Features' line, which lists which optional
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+ * features the device's CPU supports, on top of its reference
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+ * architecture.
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+ */
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+static uint32_t
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+get_elf_hwcap_from_proc_cpuinfo(const char* cpuinfo, int cpuinfo_len) {
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uint32_t hwcaps = 0;
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+ long architecture = 0;
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+ char* cpuArch = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "CPU architecture");
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+ if (cpuArch) {
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+ architecture = strtol(cpuArch, NULL, 10);
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+ free(cpuArch);
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+
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+ if (architecture >= 8L) {
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+ // This is a 32-bit ARM binary running on a 64-bit ARM64 kernel.
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+ // The 'Features' line only lists the optional features that the
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+ // device's CPU supports, compared to its reference architecture
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+ // which are of no use for this process.
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+ D("Faking 32-bit ARM HWCaps on ARMv%ld CPU\n", architecture);
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+ return HWCAP_SET_FOR_ARMV8;
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+ }
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+ }
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char* cpuFeatures = extract_cpuinfo_field(cpuinfo, cpuinfo_len, "Features");
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-
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if (cpuFeatures != NULL) {
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D("Found cpuFeatures = '%s'\n", cpuFeatures);
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@@ -520,7 +626,6 @@ get_elf_hwcap(const char* cpuinfo, int cpuinfo_len)
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free(cpuFeatures);
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}
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return hwcaps;
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-#endif
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}
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#endif /* __arm__ */
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@@ -609,9 +714,6 @@ android_cpuInit(void)
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#ifdef __arm__
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{
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- char* features = NULL;
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- char* architecture = NULL;
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-
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/* Extract architecture from the "CPU Architecture" field.
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* The list is well-known, unlike the the output of
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* the 'Processor' field which can vary greatly.
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@@ -632,10 +734,7 @@ android_cpuInit(void)
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/* read the initial decimal number, ignore the rest */
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archNumber = strtol(cpuArch, &end, 10);
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- /* Here we assume that ARMv8 will be upwards compatible with v7
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- * in the future. Unfortunately, there is no 'Features' field to
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- * indicate that Thumb-2 is supported.
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- */
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+ /* Note that ARMv8 is upwards compatible with ARMv7. */
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if (end > cpuArch && archNumber >= 7) {
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hasARMv7 = 1;
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}
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@@ -676,7 +775,19 @@ android_cpuInit(void)
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}
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/* Extract the list of CPU features from ELF hwcaps */
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- uint32_t hwcaps = get_elf_hwcap(cpuinfo, cpuinfo_len);
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+ uint32_t hwcaps = 0;
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+ hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
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+ if (!hwcaps) {
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+ D("Parsing /proc/self/auxv to extract ELF hwcaps!\n");
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+ hwcaps = get_elf_hwcap_from_proc_self_auxv();
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+ }
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+ if (!hwcaps) {
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+ // Parsing /proc/self/auxv will fail from regular application
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+ // processes on some Android platform versions, when this happens
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+ // parse proc/cpuinfo instead.
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+ D("Parsing /proc/cpuinfo to extract ELF hwcaps!\n");
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+ hwcaps = get_elf_hwcap_from_proc_cpuinfo(cpuinfo, cpuinfo_len);
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+ }
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if (hwcaps != 0) {
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int has_vfp = (hwcaps & HWCAP_VFP);
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@@ -737,6 +848,27 @@ android_cpuInit(void)
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g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_iWMMXt;
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}
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+ /* Extract the list of CPU features from ELF hwcaps2 */
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+ uint32_t hwcaps2 = 0;
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+ hwcaps2 = get_elf_hwcap_from_getauxval(AT_HWCAP2);
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+ if (hwcaps2 != 0) {
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+ int has_aes = (hwcaps2 & HWCAP2_AES);
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+ int has_pmull = (hwcaps2 & HWCAP2_PMULL);
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+ int has_sha1 = (hwcaps2 & HWCAP2_SHA1);
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+ int has_sha2 = (hwcaps2 & HWCAP2_SHA2);
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+ int has_crc32 = (hwcaps2 & HWCAP2_CRC32);
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+
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+ if (has_aes)
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+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_AES;
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+ if (has_pmull)
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+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_PMULL;
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+ if (has_sha1)
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+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA1;
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+ if (has_sha2)
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+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_SHA2;
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+ if (has_crc32)
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+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_CRC32;
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+ }
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/* Extract the cpuid value from various fields */
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// The CPUID value is broken up in several entries in /proc/cpuinfo.
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// This table is used to rebuild it from the entries.
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|
@@ -806,10 +938,64 @@ android_cpuInit(void)
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g_cpuFeatures |= entry->or_flags;
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}
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+ // Special case: The emulator-specific Android 4.2 kernel fails
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+ // to report support for the 32-bit ARM IDIV instruction.
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+ // Technically, this is a feature of the virtual CPU implemented
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+ // by the emulator. Note that it could also support Thumb IDIV
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+ // in the future, and this will have to be slightly updated.
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+ char* hardware = extract_cpuinfo_field(cpuinfo,
|
|
|
+ cpuinfo_len,
|
|
|
+ "Hardware");
|
|
|
+ if (hardware) {
|
|
|
+ if (!strcmp(hardware, "Goldfish") &&
|
|
|
+ g_cpuIdArm == 0x4100c080 &&
|
|
|
+ (g_cpuFamily & ANDROID_CPU_ARM_FEATURE_ARMv7) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM_FEATURE_IDIV_ARM;
|
|
|
+ }
|
|
|
+ free(hardware);
|
|
|
+ }
|
|
|
}
|
|
|
#endif /* __arm__ */
|
|
|
+#ifdef __aarch64__
|
|
|
+ {
|
|
|
+ /* Extract the list of CPU features from ELF hwcaps */
|
|
|
+ uint32_t hwcaps = 0;
|
|
|
+ hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
|
|
|
+ if (hwcaps != 0) {
|
|
|
+ int has_fp = (hwcaps & HWCAP_FP);
|
|
|
+ int has_asimd = (hwcaps & HWCAP_ASIMD);
|
|
|
+ int has_aes = (hwcaps & HWCAP_AES);
|
|
|
+ int has_pmull = (hwcaps & HWCAP_PMULL);
|
|
|
+ int has_sha1 = (hwcaps & HWCAP_SHA1);
|
|
|
+ int has_sha2 = (hwcaps & HWCAP_SHA2);
|
|
|
+ int has_crc32 = (hwcaps & HWCAP_CRC32);
|
|
|
+
|
|
|
+ if(has_fp == 0) {
|
|
|
+ D("ERROR: Floating-point unit missing, but is required by Android on AArch64 CPUs\n");
|
|
|
+ }
|
|
|
+ if(has_asimd == 0) {
|
|
|
+ D("ERROR: ASIMD unit missing, but is required by Android on AArch64 CPUs\n");
|
|
|
+ }
|
|
|
|
|
|
-#ifdef __i386__
|
|
|
+ if (has_fp)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_FP;
|
|
|
+ if (has_asimd)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_ASIMD;
|
|
|
+ if (has_aes)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_AES;
|
|
|
+ if (has_pmull)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_PMULL;
|
|
|
+ if (has_sha1)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA1;
|
|
|
+ if (has_sha2)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_SHA2;
|
|
|
+ if (has_crc32)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_ARM64_FEATURE_CRC32;
|
|
|
+ }
|
|
|
+ }
|
|
|
+#endif /* __aarch64__ */
|
|
|
+
|
|
|
+#if defined(__i386__) || defined(__x86_64__)
|
|
|
int regs[4];
|
|
|
|
|
|
/* According to http://en.wikipedia.org/wiki/CPUID */
|
|
|
@@ -829,10 +1015,50 @@ android_cpuInit(void)
|
|
|
if ((regs[2] & (1 << 23)) != 0) {
|
|
|
g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_POPCNT;
|
|
|
}
|
|
|
+ if ((regs[2] & (1 << 19)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_1;
|
|
|
+ }
|
|
|
+ if ((regs[2] & (1 << 20)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SSE4_2;
|
|
|
+ }
|
|
|
if (vendorIsIntel && (regs[2] & (1 << 22)) != 0) {
|
|
|
g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_MOVBE;
|
|
|
}
|
|
|
+ if ((regs[2] & (1 << 25)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AES_NI;
|
|
|
+ }
|
|
|
+ if ((regs[2] & (1 << 28)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX;
|
|
|
+ }
|
|
|
+ if ((regs[2] & (1 << 30)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_RDRAND;
|
|
|
+ }
|
|
|
+
|
|
|
+ x86_cpuid(7, regs);
|
|
|
+ if ((regs[1] & (1 << 5)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_AVX2;
|
|
|
+ }
|
|
|
+ if ((regs[1] & (1 << 29)) != 0) {
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_X86_FEATURE_SHA_NI;
|
|
|
+ }
|
|
|
+
|
|
|
+
|
|
|
#endif
|
|
|
+#if defined( __mips__)
|
|
|
+ { /* MIPS and MIPS64 */
|
|
|
+ /* Extract the list of CPU features from ELF hwcaps */
|
|
|
+ uint32_t hwcaps = 0;
|
|
|
+ hwcaps = get_elf_hwcap_from_getauxval(AT_HWCAP);
|
|
|
+ if (hwcaps != 0) {
|
|
|
+ int has_r6 = (hwcaps & HWCAP_MIPS_R6);
|
|
|
+ int has_msa = (hwcaps & HWCAP_MIPS_MSA);
|
|
|
+ if (has_r6)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_R6;
|
|
|
+ if (has_msa)
|
|
|
+ g_cpuFeatures |= ANDROID_CPU_MIPS_FEATURE_MSA;
|
|
|
+ }
|
|
|
+ }
|
|
|
+#endif /* __mips__ */
|
|
|
|
|
|
free(cpuinfo);
|
|
|
}
|
|
|
@@ -1085,5 +1311,3 @@ android_setCpuArm(int cpu_count, uint64_t cpu_features, uint32_t cpu_id)
|
|
|
* ARCH_NEON_FP16 (+EXT_FP16)
|
|
|
*
|
|
|
*/
|
|
|
-
|
|
|
-#endif // defined(__le32__)
|
Rémi Verschelde