Merge pull request #9608 from RandomShaper/more-atomics

Implement more atomic ops

core/safe_refcount.cpp

@@ -33,7 +33,10 @@
 
 #ifdef NO_THREADS
 
-uint32_t atomic_conditional_increment(register uint32_t *pw) {
+/* Bogus implementation unaware of multiprocessing */
+
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_conditional_increment_impl(register T *pw) {
 
 	if (*pw == 0)
 		return 0;
@@ -43,74 +46,202 @@ uint32_t atomic_conditional_increment(register uint32_t *pw) {
 	return *pw;
 }
 
-uint32_t atomic_increment(register uint32_t *pw) {
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_decrement_impl(register T *pw) {
+
+	(*pw)--;
+
+	return *pw;
+}
+
+template <class T>
+static _ALWAYS_INLINE_T _atomic_increment_impl(register T *pw) {
 
 	(*pw)++;
 
 	return *pw;
 }
 
-uint32_t atomic_decrement(register uint32_t *pw) {
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_sub_impl(register T *pw, register T val) {
 
-	(*pw)--;
+	(*pw) -= val;
 
 	return *pw;
 }
 
-#else
+template <class T>
+static _ALWAYS_INLINE_T _atomic_add_impl(register T *pw, register T val) {
 
-#ifdef _MSC_VER
+	(*pw) += val;
 
-// don't pollute my namespace!
-#include <windows.h>
-uint32_t atomic_conditional_increment(register uint32_t *pw) {
+	return *pw;
+}
+
+#elif defined(__GNUC__)
+
+/* Implementation for GCC & Clang */
+
+// GCC guarantees atomic intrinsics for sizes of 1, 2, 4 and 8 bytes.
+// Clang states it supports GCC atomic builtins.
 
-	/* try to increment until it actually works */
-	// taken from boost
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_conditional_increment_impl(register T *pw) {
 
 	while (true) {
-		uint32_t tmp = static_cast<uint32_t const volatile &>(*pw);
+		T tmp = static_cast<T const volatile &>(*pw);
 		if (tmp == 0)
 			return 0; // if zero, can't add to it anymore
-		if (InterlockedCompareExchange((LONG volatile *)pw, tmp + 1, tmp) == tmp)
+		if (__sync_val_compare_and_swap(pw, tmp, tmp + 1) == tmp)
 			return tmp + 1;
 	}
 }
 
-uint32_t atomic_decrement(register uint32_t *pw) {
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_decrement_impl(register T *pw) {
+
+	return __sync_sub_and_fetch(pw, 1);
+}
+
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_increment_impl(register T *pw) {
+
+	return __sync_add_and_fetch(pw, 1);
+}
+
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_sub_impl(register T *pw, register T val) {
+
+	return __sync_sub_and_fetch(pw, val);
+}
+
+template <class T>
+static _ALWAYS_INLINE_ T _atomic_add_impl(register T *pw, register T val) {
+
+	return __sync_add_and_fetch(pw, val);
+}
+
+#elif defined(_MSC_VER)
+
+/* Implementation for MSVC-Windows */
+
+// don't pollute my namespace!
+#include <windows.h>
+
+#define ATOMIC_CONDITIONAL_INCREMENT_BODY(m_pw, m_win_type, m_win_cmpxchg, m_cpp_type) \
+	/* try to increment until it actually works */                                     \
+	/* taken from boost */                                                             \
+	while (true) {                                                                     \
+		m_cpp_type tmp = static_cast<m_cpp_type const volatile &>(*(m_pw));            \
+		if (tmp == 0)                                                                  \
+			return 0; /* if zero, can't add to it anymore */                           \
+		if (m_win_cmpxchg((m_win_type volatile *)(m_pw), tmp + 1, tmp) == tmp)         \
+			return tmp + 1;                                                            \
+	}
+
+static _ALWAYS_INLINE_ uint32_t _atomic_conditional_increment_impl(register uint32_t *pw) {
+
+	ATOMIC_CONDITIONAL_INCREMENT_BODY(pw, LONG, InterlockedCompareExchange, uint32_t)
+}
+
+static _ALWAYS_INLINE_ uint32_t _atomic_decrement_impl(register uint32_t *pw) {
+
 	return InterlockedDecrement((LONG volatile *)pw);
 }
 
-uint32_t atomic_increment(register uint32_t *pw) {
+static _ALWAYS_INLINE_ uint32_t _atomic_increment_impl(register uint32_t *pw) {
+
 	return InterlockedIncrement((LONG volatile *)pw);
 }
-#elif defined(__GNUC__)
 
-uint32_t atomic_conditional_increment(register uint32_t *pw) {
+static _ALWAYS_INLINE_ uint32_t _atomic_sub_impl(register uint32_t *pw, register uint32_t val) {
 
-	while (true) {
-		uint32_t tmp = static_cast<uint32_t const volatile &>(*pw);
-		if (tmp == 0)
-			return 0; // if zero, can't add to it anymore
-		if (__sync_val_compare_and_swap(pw, tmp, tmp + 1) == tmp)
-			return tmp + 1;
-	}
+#if _WIN32_WINNT >= 0x0601 // Windows 7+
+	return InterlockedExchangeSubtract(pw, val) - val;
+#else
+	return InterlockedExchangeAdd((LONG volatile *)pw, -(int32_t)val) - val;
+#endif
 }
 
-uint32_t atomic_decrement(register uint32_t *pw) {
+static _ALWAYS_INLINE_ uint32_t _atomic_add_impl(register uint32_t *pw, register uint32_t val) {
 
-	return __sync_sub_and_fetch(pw, 1);
+	return InterlockedAdd((LONG volatile *)pw, val);
 }
 
-uint32_t atomic_increment(register uint32_t *pw) {
+static _ALWAYS_INLINE_ uint64_t _atomic_conditional_increment_impl(register uint64_t *pw) {
 
-	return __sync_add_and_fetch(pw, 1);
+	ATOMIC_CONDITIONAL_INCREMENT_BODY(pw, LONGLONG, InterlockedCompareExchange64, uint64_t)
+}
+
+static _ALWAYS_INLINE_ uint64_t _atomic_decrement_impl(register uint64_t *pw) {
+
+	return InterlockedDecrement64((LONGLONG volatile *)pw);
+}
+
+static _ALWAYS_INLINE_ uint64_t _atomic_increment_impl(register uint64_t *pw) {
+
+	return InterlockedIncrement64((LONGLONG volatile *)pw);
+}
+
+static _ALWAYS_INLINE_ uint64_t _atomic_sub_impl(register uint64_t *pw, register uint64_t val) {
+
+#if _WIN32_WINNT >= 0x0601 // Windows 7+
+	return InterlockedExchangeSubtract64(pw, val) - val;
+#else
+	return InterlockedExchangeAdd64((LONGLONG volatile *)pw, -(int64_t)val) - val;
+#endif
+}
+
+static _ALWAYS_INLINE_ uint64_t _atomic_add_impl(register uint64_t *pw, register uint64_t val) {
+
+	return InterlockedAdd64((LONGLONG volatile *)pw, val);
 }
 
 #else
+
 //no threads supported?
 #error Must provide atomic functions for this platform or compiler!
 
 #endif
 
-#endif
+// The actual advertised functions; they'll call the right implementation
+
+uint32_t atomic_conditional_increment(register uint32_t *counter) {
+	return _atomic_conditional_increment_impl(counter);
+}
+
+uint32_t atomic_decrement(register uint32_t *pw) {
+	return _atomic_decrement_impl(pw);
+}
+
+uint32_t atomic_increment(register uint32_t *pw) {
+	return _atomic_increment_impl(pw);
+}
+
+uint32_t atomic_sub(register uint32_t *pw, register uint32_t val) {
+	return _atomic_sub_impl(pw, val);
+}
+
+uint32_t atomic_add(register uint32_t *pw, register uint32_t val) {
+	return _atomic_add_impl(pw, val);
+}
+
+uint64_t atomic_conditional_increment(register uint64_t *counter) {
+	return _atomic_conditional_increment_impl(counter);
+}
+
+uint64_t atomic_decrement(register uint64_t *pw) {
+	return _atomic_decrement_impl(pw);
+}
+
+uint64_t atomic_increment(register uint64_t *pw) {
+	return _atomic_increment_impl(pw);
+}
+
+uint64_t atomic_sub(register uint64_t *pw, register uint64_t val) {
+	return _atomic_sub_impl(pw, val);
+}
+
+uint64_t atomic_add(register uint64_t *pw, register uint64_t val) {
+	return _atomic_add_impl(pw, val);
+}

core/safe_refcount.h

@@ -39,6 +39,14 @@
 uint32_t atomic_conditional_increment(register uint32_t *counter);
 uint32_t atomic_decrement(register uint32_t *pw);
 uint32_t atomic_increment(register uint32_t *pw);
+uint32_t atomic_sub(register uint32_t *pw, register uint32_t val);
+uint32_t atomic_add(register uint32_t *pw, register uint32_t val);
+
+uint64_t atomic_conditional_increment(register uint64_t *counter);
+uint64_t atomic_decrement(register uint64_t *pw);
+uint64_t atomic_increment(register uint64_t *pw);
+uint64_t atomic_sub(register uint64_t *pw, register uint64_t val);
+uint64_t atomic_add(register uint64_t *pw, register uint64_t val);
 
 struct SafeRefCount {