rendering_device.h 51 KB

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  1. /**************************************************************************/
  2. /* rendering_device.h */
  3. /**************************************************************************/
  4. /* This file is part of: */
  5. /* GODOT ENGINE */
  6. /* https://godotengine.org */
  7. /**************************************************************************/
  8. /* Copyright (c) 2014-present Godot Engine contributors (see AUTHORS.md). */
  9. /* Copyright (c) 2007-2014 Juan Linietsky, Ariel Manzur. */
  10. /* */
  11. /* Permission is hereby granted, free of charge, to any person obtaining */
  12. /* a copy of this software and associated documentation files (the */
  13. /* "Software"), to deal in the Software without restriction, including */
  14. /* without limitation the rights to use, copy, modify, merge, publish, */
  15. /* distribute, sublicense, and/or sell copies of the Software, and to */
  16. /* permit persons to whom the Software is furnished to do so, subject to */
  17. /* the following conditions: */
  18. /* */
  19. /* The above copyright notice and this permission notice shall be */
  20. /* included in all copies or substantial portions of the Software. */
  21. /* */
  22. /* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
  23. /* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
  24. /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. */
  25. /* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
  26. /* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
  27. /* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
  28. /* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
  29. /**************************************************************************/
  30. #ifndef RENDERING_DEVICE_H
  31. #define RENDERING_DEVICE_H
  32. #include "core/object/class_db.h"
  33. #include "core/variant/typed_array.h"
  34. #include "servers/display_server.h"
  35. class RDTextureFormat;
  36. class RDTextureView;
  37. class RDAttachmentFormat;
  38. class RDSamplerState;
  39. class RDVertexAttribute;
  40. class RDShaderSource;
  41. class RDShaderSPIRV;
  42. class RDUniform;
  43. class RDPipelineRasterizationState;
  44. class RDPipelineMultisampleState;
  45. class RDPipelineDepthStencilState;
  46. class RDPipelineColorBlendState;
  47. class RDFramebufferPass;
  48. class RDPipelineSpecializationConstant;
  49. class RenderingDevice : public Object {
  50. GDCLASS(RenderingDevice, Object)
  51. public:
  52. enum DeviceFamily {
  53. DEVICE_UNKNOWN,
  54. DEVICE_OPENGL,
  55. DEVICE_VULKAN,
  56. DEVICE_DIRECTX
  57. };
  58. // This enum matches VkPhysicalDeviceType (except for `DEVICE_TYPE_MAX`).
  59. // Unlike VkPhysicalDeviceType, DeviceType is exposed to the scripting API.
  60. enum DeviceType {
  61. DEVICE_TYPE_OTHER,
  62. DEVICE_TYPE_INTEGRATED_GPU,
  63. DEVICE_TYPE_DISCRETE_GPU,
  64. DEVICE_TYPE_VIRTUAL_GPU,
  65. DEVICE_TYPE_CPU,
  66. DEVICE_TYPE_MAX,
  67. };
  68. enum DriverResource {
  69. DRIVER_RESOURCE_VULKAN_DEVICE = 0,
  70. DRIVER_RESOURCE_VULKAN_PHYSICAL_DEVICE,
  71. DRIVER_RESOURCE_VULKAN_INSTANCE,
  72. DRIVER_RESOURCE_VULKAN_QUEUE,
  73. DRIVER_RESOURCE_VULKAN_QUEUE_FAMILY_INDEX,
  74. DRIVER_RESOURCE_VULKAN_IMAGE,
  75. DRIVER_RESOURCE_VULKAN_IMAGE_VIEW,
  76. DRIVER_RESOURCE_VULKAN_IMAGE_NATIVE_TEXTURE_FORMAT,
  77. DRIVER_RESOURCE_VULKAN_SAMPLER,
  78. DRIVER_RESOURCE_VULKAN_DESCRIPTOR_SET,
  79. DRIVER_RESOURCE_VULKAN_BUFFER,
  80. DRIVER_RESOURCE_VULKAN_COMPUTE_PIPELINE,
  81. DRIVER_RESOURCE_VULKAN_RENDER_PIPELINE,
  82. //next driver continue enum from 1000 to keep order
  83. };
  84. enum ShaderStage {
  85. SHADER_STAGE_VERTEX,
  86. SHADER_STAGE_FRAGMENT,
  87. SHADER_STAGE_TESSELATION_CONTROL,
  88. SHADER_STAGE_TESSELATION_EVALUATION,
  89. SHADER_STAGE_COMPUTE,
  90. SHADER_STAGE_MAX,
  91. SHADER_STAGE_VERTEX_BIT = (1 << SHADER_STAGE_VERTEX),
  92. SHADER_STAGE_FRAGMENT_BIT = (1 << SHADER_STAGE_FRAGMENT),
  93. SHADER_STAGE_TESSELATION_CONTROL_BIT = (1 << SHADER_STAGE_TESSELATION_CONTROL),
  94. SHADER_STAGE_TESSELATION_EVALUATION_BIT = (1 << SHADER_STAGE_TESSELATION_EVALUATION),
  95. SHADER_STAGE_COMPUTE_BIT = (1 << SHADER_STAGE_COMPUTE),
  96. };
  97. enum ShaderLanguage {
  98. SHADER_LANGUAGE_GLSL,
  99. SHADER_LANGUAGE_HLSL
  100. };
  101. enum SubgroupOperations {
  102. SUBGROUP_BASIC_BIT = 1,
  103. SUBGROUP_VOTE_BIT = 2,
  104. SUBGROUP_ARITHMETIC_BIT = 4,
  105. SUBGROUP_BALLOT_BIT = 8,
  106. SUBGROUP_SHUFFLE_BIT = 16,
  107. SUBGROUP_SHUFFLE_RELATIVE_BIT = 32,
  108. SUBGROUP_CLUSTERED_BIT = 64,
  109. SUBGROUP_QUAD_BIT = 128,
  110. };
  111. struct Capabilities {
  112. // main device info
  113. DeviceFamily device_family = DEVICE_UNKNOWN;
  114. uint32_t version_major = 1.0;
  115. uint32_t version_minor = 0.0;
  116. };
  117. typedef String (*ShaderSPIRVGetCacheKeyFunction)(const RenderingDevice *p_render_device);
  118. typedef Vector<uint8_t> (*ShaderCompileToSPIRVFunction)(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language, String *r_error, const RenderingDevice *p_render_device);
  119. typedef Vector<uint8_t> (*ShaderCacheFunction)(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language);
  120. typedef void (*InvalidationCallback)(void *);
  121. private:
  122. static ShaderCompileToSPIRVFunction compile_to_spirv_function;
  123. static ShaderCacheFunction cache_function;
  124. static ShaderSPIRVGetCacheKeyFunction get_spirv_cache_key_function;
  125. static RenderingDevice *singleton;
  126. protected:
  127. static void _bind_methods();
  128. Capabilities device_capabilities;
  129. public:
  130. //base numeric ID for all types
  131. enum {
  132. INVALID_ID = -1,
  133. INVALID_FORMAT_ID = -1
  134. };
  135. /*****************/
  136. /**** GENERIC ****/
  137. /*****************/
  138. enum CompareOperator {
  139. COMPARE_OP_NEVER,
  140. COMPARE_OP_LESS,
  141. COMPARE_OP_EQUAL,
  142. COMPARE_OP_LESS_OR_EQUAL,
  143. COMPARE_OP_GREATER,
  144. COMPARE_OP_NOT_EQUAL,
  145. COMPARE_OP_GREATER_OR_EQUAL,
  146. COMPARE_OP_ALWAYS,
  147. COMPARE_OP_MAX //not an actual operator, just the amount of operators :D
  148. };
  149. enum DataFormat {
  150. DATA_FORMAT_R4G4_UNORM_PACK8,
  151. DATA_FORMAT_R4G4B4A4_UNORM_PACK16,
  152. DATA_FORMAT_B4G4R4A4_UNORM_PACK16,
  153. DATA_FORMAT_R5G6B5_UNORM_PACK16,
  154. DATA_FORMAT_B5G6R5_UNORM_PACK16,
  155. DATA_FORMAT_R5G5B5A1_UNORM_PACK16,
  156. DATA_FORMAT_B5G5R5A1_UNORM_PACK16,
  157. DATA_FORMAT_A1R5G5B5_UNORM_PACK16,
  158. DATA_FORMAT_R8_UNORM,
  159. DATA_FORMAT_R8_SNORM,
  160. DATA_FORMAT_R8_USCALED,
  161. DATA_FORMAT_R8_SSCALED,
  162. DATA_FORMAT_R8_UINT,
  163. DATA_FORMAT_R8_SINT,
  164. DATA_FORMAT_R8_SRGB,
  165. DATA_FORMAT_R8G8_UNORM,
  166. DATA_FORMAT_R8G8_SNORM,
  167. DATA_FORMAT_R8G8_USCALED,
  168. DATA_FORMAT_R8G8_SSCALED,
  169. DATA_FORMAT_R8G8_UINT,
  170. DATA_FORMAT_R8G8_SINT,
  171. DATA_FORMAT_R8G8_SRGB,
  172. DATA_FORMAT_R8G8B8_UNORM,
  173. DATA_FORMAT_R8G8B8_SNORM,
  174. DATA_FORMAT_R8G8B8_USCALED,
  175. DATA_FORMAT_R8G8B8_SSCALED,
  176. DATA_FORMAT_R8G8B8_UINT,
  177. DATA_FORMAT_R8G8B8_SINT,
  178. DATA_FORMAT_R8G8B8_SRGB,
  179. DATA_FORMAT_B8G8R8_UNORM,
  180. DATA_FORMAT_B8G8R8_SNORM,
  181. DATA_FORMAT_B8G8R8_USCALED,
  182. DATA_FORMAT_B8G8R8_SSCALED,
  183. DATA_FORMAT_B8G8R8_UINT,
  184. DATA_FORMAT_B8G8R8_SINT,
  185. DATA_FORMAT_B8G8R8_SRGB,
  186. DATA_FORMAT_R8G8B8A8_UNORM,
  187. DATA_FORMAT_R8G8B8A8_SNORM,
  188. DATA_FORMAT_R8G8B8A8_USCALED,
  189. DATA_FORMAT_R8G8B8A8_SSCALED,
  190. DATA_FORMAT_R8G8B8A8_UINT,
  191. DATA_FORMAT_R8G8B8A8_SINT,
  192. DATA_FORMAT_R8G8B8A8_SRGB,
  193. DATA_FORMAT_B8G8R8A8_UNORM,
  194. DATA_FORMAT_B8G8R8A8_SNORM,
  195. DATA_FORMAT_B8G8R8A8_USCALED,
  196. DATA_FORMAT_B8G8R8A8_SSCALED,
  197. DATA_FORMAT_B8G8R8A8_UINT,
  198. DATA_FORMAT_B8G8R8A8_SINT,
  199. DATA_FORMAT_B8G8R8A8_SRGB,
  200. DATA_FORMAT_A8B8G8R8_UNORM_PACK32,
  201. DATA_FORMAT_A8B8G8R8_SNORM_PACK32,
  202. DATA_FORMAT_A8B8G8R8_USCALED_PACK32,
  203. DATA_FORMAT_A8B8G8R8_SSCALED_PACK32,
  204. DATA_FORMAT_A8B8G8R8_UINT_PACK32,
  205. DATA_FORMAT_A8B8G8R8_SINT_PACK32,
  206. DATA_FORMAT_A8B8G8R8_SRGB_PACK32,
  207. DATA_FORMAT_A2R10G10B10_UNORM_PACK32,
  208. DATA_FORMAT_A2R10G10B10_SNORM_PACK32,
  209. DATA_FORMAT_A2R10G10B10_USCALED_PACK32,
  210. DATA_FORMAT_A2R10G10B10_SSCALED_PACK32,
  211. DATA_FORMAT_A2R10G10B10_UINT_PACK32,
  212. DATA_FORMAT_A2R10G10B10_SINT_PACK32,
  213. DATA_FORMAT_A2B10G10R10_UNORM_PACK32,
  214. DATA_FORMAT_A2B10G10R10_SNORM_PACK32,
  215. DATA_FORMAT_A2B10G10R10_USCALED_PACK32,
  216. DATA_FORMAT_A2B10G10R10_SSCALED_PACK32,
  217. DATA_FORMAT_A2B10G10R10_UINT_PACK32,
  218. DATA_FORMAT_A2B10G10R10_SINT_PACK32,
  219. DATA_FORMAT_R16_UNORM,
  220. DATA_FORMAT_R16_SNORM,
  221. DATA_FORMAT_R16_USCALED,
  222. DATA_FORMAT_R16_SSCALED,
  223. DATA_FORMAT_R16_UINT,
  224. DATA_FORMAT_R16_SINT,
  225. DATA_FORMAT_R16_SFLOAT,
  226. DATA_FORMAT_R16G16_UNORM,
  227. DATA_FORMAT_R16G16_SNORM,
  228. DATA_FORMAT_R16G16_USCALED,
  229. DATA_FORMAT_R16G16_SSCALED,
  230. DATA_FORMAT_R16G16_UINT,
  231. DATA_FORMAT_R16G16_SINT,
  232. DATA_FORMAT_R16G16_SFLOAT,
  233. DATA_FORMAT_R16G16B16_UNORM,
  234. DATA_FORMAT_R16G16B16_SNORM,
  235. DATA_FORMAT_R16G16B16_USCALED,
  236. DATA_FORMAT_R16G16B16_SSCALED,
  237. DATA_FORMAT_R16G16B16_UINT,
  238. DATA_FORMAT_R16G16B16_SINT,
  239. DATA_FORMAT_R16G16B16_SFLOAT,
  240. DATA_FORMAT_R16G16B16A16_UNORM,
  241. DATA_FORMAT_R16G16B16A16_SNORM,
  242. DATA_FORMAT_R16G16B16A16_USCALED,
  243. DATA_FORMAT_R16G16B16A16_SSCALED,
  244. DATA_FORMAT_R16G16B16A16_UINT,
  245. DATA_FORMAT_R16G16B16A16_SINT,
  246. DATA_FORMAT_R16G16B16A16_SFLOAT,
  247. DATA_FORMAT_R32_UINT,
  248. DATA_FORMAT_R32_SINT,
  249. DATA_FORMAT_R32_SFLOAT,
  250. DATA_FORMAT_R32G32_UINT,
  251. DATA_FORMAT_R32G32_SINT,
  252. DATA_FORMAT_R32G32_SFLOAT,
  253. DATA_FORMAT_R32G32B32_UINT,
  254. DATA_FORMAT_R32G32B32_SINT,
  255. DATA_FORMAT_R32G32B32_SFLOAT,
  256. DATA_FORMAT_R32G32B32A32_UINT,
  257. DATA_FORMAT_R32G32B32A32_SINT,
  258. DATA_FORMAT_R32G32B32A32_SFLOAT,
  259. DATA_FORMAT_R64_UINT,
  260. DATA_FORMAT_R64_SINT,
  261. DATA_FORMAT_R64_SFLOAT,
  262. DATA_FORMAT_R64G64_UINT,
  263. DATA_FORMAT_R64G64_SINT,
  264. DATA_FORMAT_R64G64_SFLOAT,
  265. DATA_FORMAT_R64G64B64_UINT,
  266. DATA_FORMAT_R64G64B64_SINT,
  267. DATA_FORMAT_R64G64B64_SFLOAT,
  268. DATA_FORMAT_R64G64B64A64_UINT,
  269. DATA_FORMAT_R64G64B64A64_SINT,
  270. DATA_FORMAT_R64G64B64A64_SFLOAT,
  271. DATA_FORMAT_B10G11R11_UFLOAT_PACK32,
  272. DATA_FORMAT_E5B9G9R9_UFLOAT_PACK32,
  273. DATA_FORMAT_D16_UNORM,
  274. DATA_FORMAT_X8_D24_UNORM_PACK32,
  275. DATA_FORMAT_D32_SFLOAT,
  276. DATA_FORMAT_S8_UINT,
  277. DATA_FORMAT_D16_UNORM_S8_UINT,
  278. DATA_FORMAT_D24_UNORM_S8_UINT,
  279. DATA_FORMAT_D32_SFLOAT_S8_UINT,
  280. DATA_FORMAT_BC1_RGB_UNORM_BLOCK,
  281. DATA_FORMAT_BC1_RGB_SRGB_BLOCK,
  282. DATA_FORMAT_BC1_RGBA_UNORM_BLOCK,
  283. DATA_FORMAT_BC1_RGBA_SRGB_BLOCK,
  284. DATA_FORMAT_BC2_UNORM_BLOCK,
  285. DATA_FORMAT_BC2_SRGB_BLOCK,
  286. DATA_FORMAT_BC3_UNORM_BLOCK,
  287. DATA_FORMAT_BC3_SRGB_BLOCK,
  288. DATA_FORMAT_BC4_UNORM_BLOCK,
  289. DATA_FORMAT_BC4_SNORM_BLOCK,
  290. DATA_FORMAT_BC5_UNORM_BLOCK,
  291. DATA_FORMAT_BC5_SNORM_BLOCK,
  292. DATA_FORMAT_BC6H_UFLOAT_BLOCK,
  293. DATA_FORMAT_BC6H_SFLOAT_BLOCK,
  294. DATA_FORMAT_BC7_UNORM_BLOCK,
  295. DATA_FORMAT_BC7_SRGB_BLOCK,
  296. DATA_FORMAT_ETC2_R8G8B8_UNORM_BLOCK,
  297. DATA_FORMAT_ETC2_R8G8B8_SRGB_BLOCK,
  298. DATA_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK,
  299. DATA_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK,
  300. DATA_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK,
  301. DATA_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK,
  302. DATA_FORMAT_EAC_R11_UNORM_BLOCK,
  303. DATA_FORMAT_EAC_R11_SNORM_BLOCK,
  304. DATA_FORMAT_EAC_R11G11_UNORM_BLOCK,
  305. DATA_FORMAT_EAC_R11G11_SNORM_BLOCK,
  306. DATA_FORMAT_ASTC_4x4_UNORM_BLOCK,
  307. DATA_FORMAT_ASTC_4x4_SRGB_BLOCK,
  308. DATA_FORMAT_ASTC_5x4_UNORM_BLOCK,
  309. DATA_FORMAT_ASTC_5x4_SRGB_BLOCK,
  310. DATA_FORMAT_ASTC_5x5_UNORM_BLOCK,
  311. DATA_FORMAT_ASTC_5x5_SRGB_BLOCK,
  312. DATA_FORMAT_ASTC_6x5_UNORM_BLOCK,
  313. DATA_FORMAT_ASTC_6x5_SRGB_BLOCK,
  314. DATA_FORMAT_ASTC_6x6_UNORM_BLOCK,
  315. DATA_FORMAT_ASTC_6x6_SRGB_BLOCK,
  316. DATA_FORMAT_ASTC_8x5_UNORM_BLOCK,
  317. DATA_FORMAT_ASTC_8x5_SRGB_BLOCK,
  318. DATA_FORMAT_ASTC_8x6_UNORM_BLOCK,
  319. DATA_FORMAT_ASTC_8x6_SRGB_BLOCK,
  320. DATA_FORMAT_ASTC_8x8_UNORM_BLOCK,
  321. DATA_FORMAT_ASTC_8x8_SRGB_BLOCK,
  322. DATA_FORMAT_ASTC_10x5_UNORM_BLOCK,
  323. DATA_FORMAT_ASTC_10x5_SRGB_BLOCK,
  324. DATA_FORMAT_ASTC_10x6_UNORM_BLOCK,
  325. DATA_FORMAT_ASTC_10x6_SRGB_BLOCK,
  326. DATA_FORMAT_ASTC_10x8_UNORM_BLOCK,
  327. DATA_FORMAT_ASTC_10x8_SRGB_BLOCK,
  328. DATA_FORMAT_ASTC_10x10_UNORM_BLOCK,
  329. DATA_FORMAT_ASTC_10x10_SRGB_BLOCK,
  330. DATA_FORMAT_ASTC_12x10_UNORM_BLOCK,
  331. DATA_FORMAT_ASTC_12x10_SRGB_BLOCK,
  332. DATA_FORMAT_ASTC_12x12_UNORM_BLOCK,
  333. DATA_FORMAT_ASTC_12x12_SRGB_BLOCK,
  334. DATA_FORMAT_G8B8G8R8_422_UNORM,
  335. DATA_FORMAT_B8G8R8G8_422_UNORM,
  336. DATA_FORMAT_G8_B8_R8_3PLANE_420_UNORM,
  337. DATA_FORMAT_G8_B8R8_2PLANE_420_UNORM,
  338. DATA_FORMAT_G8_B8_R8_3PLANE_422_UNORM,
  339. DATA_FORMAT_G8_B8R8_2PLANE_422_UNORM,
  340. DATA_FORMAT_G8_B8_R8_3PLANE_444_UNORM,
  341. DATA_FORMAT_R10X6_UNORM_PACK16,
  342. DATA_FORMAT_R10X6G10X6_UNORM_2PACK16,
  343. DATA_FORMAT_R10X6G10X6B10X6A10X6_UNORM_4PACK16,
  344. DATA_FORMAT_G10X6B10X6G10X6R10X6_422_UNORM_4PACK16,
  345. DATA_FORMAT_B10X6G10X6R10X6G10X6_422_UNORM_4PACK16,
  346. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_420_UNORM_3PACK16,
  347. DATA_FORMAT_G10X6_B10X6R10X6_2PLANE_420_UNORM_3PACK16,
  348. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_422_UNORM_3PACK16,
  349. DATA_FORMAT_G10X6_B10X6R10X6_2PLANE_422_UNORM_3PACK16,
  350. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_444_UNORM_3PACK16,
  351. DATA_FORMAT_R12X4_UNORM_PACK16,
  352. DATA_FORMAT_R12X4G12X4_UNORM_2PACK16,
  353. DATA_FORMAT_R12X4G12X4B12X4A12X4_UNORM_4PACK16,
  354. DATA_FORMAT_G12X4B12X4G12X4R12X4_422_UNORM_4PACK16,
  355. DATA_FORMAT_B12X4G12X4R12X4G12X4_422_UNORM_4PACK16,
  356. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_420_UNORM_3PACK16,
  357. DATA_FORMAT_G12X4_B12X4R12X4_2PLANE_420_UNORM_3PACK16,
  358. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_422_UNORM_3PACK16,
  359. DATA_FORMAT_G12X4_B12X4R12X4_2PLANE_422_UNORM_3PACK16,
  360. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_444_UNORM_3PACK16,
  361. DATA_FORMAT_G16B16G16R16_422_UNORM,
  362. DATA_FORMAT_B16G16R16G16_422_UNORM,
  363. DATA_FORMAT_G16_B16_R16_3PLANE_420_UNORM,
  364. DATA_FORMAT_G16_B16R16_2PLANE_420_UNORM,
  365. DATA_FORMAT_G16_B16_R16_3PLANE_422_UNORM,
  366. DATA_FORMAT_G16_B16R16_2PLANE_422_UNORM,
  367. DATA_FORMAT_G16_B16_R16_3PLANE_444_UNORM,
  368. DATA_FORMAT_MAX
  369. };
  370. /*****************/
  371. /**** BARRIER ****/
  372. /*****************/
  373. enum BarrierMask {
  374. BARRIER_MASK_RASTER = 1,
  375. BARRIER_MASK_COMPUTE = 2,
  376. BARRIER_MASK_TRANSFER = 4,
  377. BARRIER_MASK_ALL_BARRIERS = BARRIER_MASK_RASTER | BARRIER_MASK_COMPUTE | BARRIER_MASK_TRANSFER, // 7
  378. BARRIER_MASK_NO_BARRIER = 8,
  379. };
  380. /*****************/
  381. /**** TEXTURE ****/
  382. /*****************/
  383. enum TextureType {
  384. TEXTURE_TYPE_1D,
  385. TEXTURE_TYPE_2D,
  386. TEXTURE_TYPE_3D,
  387. TEXTURE_TYPE_CUBE,
  388. TEXTURE_TYPE_1D_ARRAY,
  389. TEXTURE_TYPE_2D_ARRAY,
  390. TEXTURE_TYPE_CUBE_ARRAY,
  391. TEXTURE_TYPE_MAX
  392. };
  393. enum TextureSamples {
  394. TEXTURE_SAMPLES_1,
  395. TEXTURE_SAMPLES_2,
  396. TEXTURE_SAMPLES_4,
  397. TEXTURE_SAMPLES_8,
  398. TEXTURE_SAMPLES_16,
  399. TEXTURE_SAMPLES_32,
  400. TEXTURE_SAMPLES_64,
  401. TEXTURE_SAMPLES_MAX
  402. };
  403. enum TextureUsageBits {
  404. TEXTURE_USAGE_SAMPLING_BIT = (1 << 0),
  405. TEXTURE_USAGE_COLOR_ATTACHMENT_BIT = (1 << 1),
  406. TEXTURE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT = (1 << 2),
  407. TEXTURE_USAGE_STORAGE_BIT = (1 << 3),
  408. TEXTURE_USAGE_STORAGE_ATOMIC_BIT = (1 << 4),
  409. TEXTURE_USAGE_CPU_READ_BIT = (1 << 5),
  410. TEXTURE_USAGE_CAN_UPDATE_BIT = (1 << 6),
  411. TEXTURE_USAGE_CAN_COPY_FROM_BIT = (1 << 7),
  412. TEXTURE_USAGE_CAN_COPY_TO_BIT = (1 << 8),
  413. TEXTURE_USAGE_INPUT_ATTACHMENT_BIT = (1 << 9),
  414. TEXTURE_USAGE_VRS_ATTACHMENT_BIT = (1 << 10),
  415. };
  416. enum TextureSwizzle {
  417. TEXTURE_SWIZZLE_IDENTITY,
  418. TEXTURE_SWIZZLE_ZERO,
  419. TEXTURE_SWIZZLE_ONE,
  420. TEXTURE_SWIZZLE_R,
  421. TEXTURE_SWIZZLE_G,
  422. TEXTURE_SWIZZLE_B,
  423. TEXTURE_SWIZZLE_A,
  424. TEXTURE_SWIZZLE_MAX
  425. };
  426. struct TextureFormat {
  427. DataFormat format;
  428. uint32_t width;
  429. uint32_t height;
  430. uint32_t depth;
  431. uint32_t array_layers;
  432. uint32_t mipmaps;
  433. TextureType texture_type;
  434. TextureSamples samples;
  435. uint32_t usage_bits;
  436. Vector<DataFormat> shareable_formats;
  437. bool is_resolve_buffer = false;
  438. bool operator==(const TextureFormat &b) const {
  439. if (format != b.format) {
  440. return false;
  441. } else if (width != b.width) {
  442. return false;
  443. } else if (height != b.height) {
  444. return false;
  445. } else if (depth != b.depth) {
  446. return false;
  447. } else if (array_layers != b.array_layers) {
  448. return false;
  449. } else if (mipmaps != b.mipmaps) {
  450. return false;
  451. } else if (texture_type != b.texture_type) {
  452. return false;
  453. } else if (samples != b.samples) {
  454. return false;
  455. } else if (usage_bits != b.usage_bits) {
  456. return false;
  457. } else if (shareable_formats != b.shareable_formats) {
  458. return false;
  459. } else {
  460. return true;
  461. }
  462. }
  463. TextureFormat() {
  464. format = DATA_FORMAT_R8_UNORM;
  465. width = 1;
  466. height = 1;
  467. depth = 1;
  468. array_layers = 1;
  469. mipmaps = 1;
  470. texture_type = TEXTURE_TYPE_2D;
  471. samples = TEXTURE_SAMPLES_1;
  472. usage_bits = 0;
  473. }
  474. };
  475. struct TextureView {
  476. DataFormat format_override;
  477. TextureSwizzle swizzle_r;
  478. TextureSwizzle swizzle_g;
  479. TextureSwizzle swizzle_b;
  480. TextureSwizzle swizzle_a;
  481. TextureView() {
  482. format_override = DATA_FORMAT_MAX; //means, use same as format
  483. swizzle_r = TEXTURE_SWIZZLE_R;
  484. swizzle_g = TEXTURE_SWIZZLE_G;
  485. swizzle_b = TEXTURE_SWIZZLE_B;
  486. swizzle_a = TEXTURE_SWIZZLE_A;
  487. }
  488. };
  489. virtual RID texture_create(const TextureFormat &p_format, const TextureView &p_view, const Vector<Vector<uint8_t>> &p_data = Vector<Vector<uint8_t>>()) = 0;
  490. virtual RID texture_create_shared(const TextureView &p_view, RID p_with_texture) = 0;
  491. virtual RID texture_create_from_extension(TextureType p_type, DataFormat p_format, TextureSamples p_samples, uint64_t p_flags, uint64_t p_image, uint64_t p_width, uint64_t p_height, uint64_t p_depth, uint64_t p_layers) = 0;
  492. enum TextureSliceType {
  493. TEXTURE_SLICE_2D,
  494. TEXTURE_SLICE_CUBEMAP,
  495. TEXTURE_SLICE_3D,
  496. TEXTURE_SLICE_2D_ARRAY,
  497. };
  498. virtual RID texture_create_shared_from_slice(const TextureView &p_view, RID p_with_texture, uint32_t p_layer, uint32_t p_mipmap, uint32_t p_mipmaps = 1, TextureSliceType p_slice_type = TEXTURE_SLICE_2D, uint32_t p_layers = 0) = 0;
  499. virtual Error texture_update(RID p_texture, uint32_t p_layer, const Vector<uint8_t> &p_data, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  500. virtual Vector<uint8_t> texture_get_data(RID p_texture, uint32_t p_layer) = 0; // CPU textures will return immediately, while GPU textures will most likely force a flush
  501. virtual bool texture_is_format_supported_for_usage(DataFormat p_format, BitField<RenderingDevice::TextureUsageBits> p_usage) const = 0;
  502. virtual bool texture_is_shared(RID p_texture) = 0;
  503. virtual bool texture_is_valid(RID p_texture) = 0;
  504. virtual Size2i texture_size(RID p_texture) = 0;
  505. virtual Error texture_copy(RID p_from_texture, RID p_to_texture, const Vector3 &p_from, const Vector3 &p_to, const Vector3 &p_size, uint32_t p_src_mipmap, uint32_t p_dst_mipmap, uint32_t p_src_layer, uint32_t p_dst_layer, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  506. virtual Error texture_clear(RID p_texture, const Color &p_color, uint32_t p_base_mipmap, uint32_t p_mipmaps, uint32_t p_base_layer, uint32_t p_layers, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  507. virtual Error texture_resolve_multisample(RID p_from_texture, RID p_to_texture, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  508. /*********************/
  509. /**** FRAMEBUFFER ****/
  510. /*********************/
  511. struct AttachmentFormat {
  512. enum { UNUSED_ATTACHMENT = 0xFFFFFFFF };
  513. DataFormat format;
  514. TextureSamples samples;
  515. uint32_t usage_flags;
  516. AttachmentFormat() {
  517. format = DATA_FORMAT_R8G8B8A8_UNORM;
  518. samples = TEXTURE_SAMPLES_1;
  519. usage_flags = 0;
  520. }
  521. };
  522. typedef int64_t FramebufferFormatID;
  523. // This ID is warranted to be unique for the same formats, does not need to be freed
  524. virtual FramebufferFormatID framebuffer_format_create(const Vector<AttachmentFormat> &p_format, uint32_t p_view_count = 1) = 0;
  525. struct FramebufferPass {
  526. enum {
  527. ATTACHMENT_UNUSED = -1
  528. };
  529. Vector<int32_t> color_attachments;
  530. Vector<int32_t> input_attachments;
  531. Vector<int32_t> resolve_attachments;
  532. Vector<int32_t> preserve_attachments;
  533. int32_t depth_attachment = ATTACHMENT_UNUSED;
  534. int32_t vrs_attachment = ATTACHMENT_UNUSED; // density map for VRS, only used if supported
  535. };
  536. virtual FramebufferFormatID framebuffer_format_create_multipass(const Vector<AttachmentFormat> &p_attachments, const Vector<FramebufferPass> &p_passes, uint32_t p_view_count = 1) = 0;
  537. virtual FramebufferFormatID framebuffer_format_create_empty(TextureSamples p_samples = TEXTURE_SAMPLES_1) = 0;
  538. virtual TextureSamples framebuffer_format_get_texture_samples(FramebufferFormatID p_format, uint32_t p_pass = 0) = 0;
  539. virtual RID framebuffer_create(const Vector<RID> &p_texture_attachments, FramebufferFormatID p_format_check = INVALID_ID, uint32_t p_view_count = 1) = 0;
  540. virtual RID framebuffer_create_multipass(const Vector<RID> &p_texture_attachments, const Vector<FramebufferPass> &p_passes, FramebufferFormatID p_format_check = INVALID_ID, uint32_t p_view_count = 1) = 0;
  541. virtual RID framebuffer_create_empty(const Size2i &p_size, TextureSamples p_samples = TEXTURE_SAMPLES_1, FramebufferFormatID p_format_check = INVALID_ID) = 0;
  542. virtual bool framebuffer_is_valid(RID p_framebuffer) const = 0;
  543. virtual void framebuffer_set_invalidation_callback(RID p_framebuffer, InvalidationCallback p_callback, void *p_userdata) = 0;
  544. virtual FramebufferFormatID framebuffer_get_format(RID p_framebuffer) = 0;
  545. /*****************/
  546. /**** SAMPLER ****/
  547. /*****************/
  548. enum SamplerFilter {
  549. SAMPLER_FILTER_NEAREST,
  550. SAMPLER_FILTER_LINEAR,
  551. };
  552. enum SamplerRepeatMode {
  553. SAMPLER_REPEAT_MODE_REPEAT,
  554. SAMPLER_REPEAT_MODE_MIRRORED_REPEAT,
  555. SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE,
  556. SAMPLER_REPEAT_MODE_CLAMP_TO_BORDER,
  557. SAMPLER_REPEAT_MODE_MIRROR_CLAMP_TO_EDGE,
  558. SAMPLER_REPEAT_MODE_MAX
  559. };
  560. enum SamplerBorderColor {
  561. SAMPLER_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK,
  562. SAMPLER_BORDER_COLOR_INT_TRANSPARENT_BLACK,
  563. SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_BLACK,
  564. SAMPLER_BORDER_COLOR_INT_OPAQUE_BLACK,
  565. SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_WHITE,
  566. SAMPLER_BORDER_COLOR_INT_OPAQUE_WHITE,
  567. SAMPLER_BORDER_COLOR_MAX
  568. };
  569. struct SamplerState {
  570. SamplerFilter mag_filter;
  571. SamplerFilter min_filter;
  572. SamplerFilter mip_filter;
  573. SamplerRepeatMode repeat_u;
  574. SamplerRepeatMode repeat_v;
  575. SamplerRepeatMode repeat_w;
  576. float lod_bias;
  577. bool use_anisotropy;
  578. float anisotropy_max;
  579. bool enable_compare;
  580. CompareOperator compare_op;
  581. float min_lod;
  582. float max_lod;
  583. SamplerBorderColor border_color;
  584. bool unnormalized_uvw;
  585. SamplerState() {
  586. mag_filter = SAMPLER_FILTER_NEAREST;
  587. min_filter = SAMPLER_FILTER_NEAREST;
  588. mip_filter = SAMPLER_FILTER_NEAREST;
  589. repeat_u = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  590. repeat_v = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  591. repeat_w = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  592. lod_bias = 0;
  593. use_anisotropy = false;
  594. anisotropy_max = 1.0;
  595. enable_compare = false;
  596. compare_op = COMPARE_OP_ALWAYS;
  597. min_lod = 0;
  598. max_lod = 1e20; //something very large should do
  599. border_color = SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_BLACK;
  600. unnormalized_uvw = false;
  601. }
  602. };
  603. virtual RID sampler_create(const SamplerState &p_state) = 0;
  604. /**********************/
  605. /**** VERTEX ARRAY ****/
  606. /**********************/
  607. enum VertexFrequency {
  608. VERTEX_FREQUENCY_VERTEX,
  609. VERTEX_FREQUENCY_INSTANCE,
  610. };
  611. struct VertexAttribute {
  612. uint32_t location; //shader location
  613. uint32_t offset;
  614. DataFormat format;
  615. uint32_t stride;
  616. VertexFrequency frequency;
  617. VertexAttribute() {
  618. location = 0;
  619. offset = 0;
  620. stride = 0;
  621. format = DATA_FORMAT_MAX;
  622. frequency = VERTEX_FREQUENCY_VERTEX;
  623. }
  624. };
  625. virtual RID vertex_buffer_create(uint32_t p_size_bytes, const Vector<uint8_t> &p_data = Vector<uint8_t>(), bool p_use_as_storage = false) = 0;
  626. typedef int64_t VertexFormatID;
  627. // This ID is warranted to be unique for the same formats, does not need to be freed
  628. virtual VertexFormatID vertex_format_create(const Vector<VertexAttribute> &p_vertex_formats) = 0;
  629. virtual RID vertex_array_create(uint32_t p_vertex_count, VertexFormatID p_vertex_format, const Vector<RID> &p_src_buffers, const Vector<uint64_t> &p_offsets = Vector<uint64_t>()) = 0;
  630. enum IndexBufferFormat {
  631. INDEX_BUFFER_FORMAT_UINT16,
  632. INDEX_BUFFER_FORMAT_UINT32,
  633. };
  634. virtual RID index_buffer_create(uint32_t p_size_indices, IndexBufferFormat p_format, const Vector<uint8_t> &p_data = Vector<uint8_t>(), bool p_use_restart_indices = false) = 0;
  635. virtual RID index_array_create(RID p_index_buffer, uint32_t p_index_offset, uint32_t p_index_count) = 0;
  636. /****************/
  637. /**** SHADER ****/
  638. /****************/
  639. const Capabilities *get_device_capabilities() const { return &device_capabilities; };
  640. enum Features {
  641. SUPPORTS_MULTIVIEW,
  642. SUPPORTS_FSR_HALF_FLOAT,
  643. SUPPORTS_ATTACHMENT_VRS,
  644. };
  645. virtual bool has_feature(const Features p_feature) const = 0;
  646. virtual Vector<uint8_t> shader_compile_spirv_from_source(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language = SHADER_LANGUAGE_GLSL, String *r_error = nullptr, bool p_allow_cache = true);
  647. virtual String shader_get_spirv_cache_key() const;
  648. static void shader_set_compile_to_spirv_function(ShaderCompileToSPIRVFunction p_function);
  649. static void shader_set_spirv_cache_function(ShaderCacheFunction p_function);
  650. static void shader_set_get_cache_key_function(ShaderSPIRVGetCacheKeyFunction p_function);
  651. struct ShaderStageSPIRVData {
  652. ShaderStage shader_stage;
  653. Vector<uint8_t> spir_v;
  654. ShaderStageSPIRVData() {
  655. shader_stage = SHADER_STAGE_VERTEX;
  656. }
  657. };
  658. virtual String shader_get_binary_cache_key() const = 0;
  659. virtual Vector<uint8_t> shader_compile_binary_from_spirv(const Vector<ShaderStageSPIRVData> &p_spirv, const String &p_shader_name = "") = 0;
  660. virtual RID shader_create_from_spirv(const Vector<ShaderStageSPIRVData> &p_spirv, const String &p_shader_name = "");
  661. virtual RID shader_create_from_bytecode(const Vector<uint8_t> &p_shader_binary) = 0;
  662. virtual uint32_t shader_get_vertex_input_attribute_mask(RID p_shader) = 0;
  663. /******************/
  664. /**** UNIFORMS ****/
  665. /******************/
  666. enum UniformType {
  667. UNIFORM_TYPE_SAMPLER, //for sampling only (sampler GLSL type)
  668. UNIFORM_TYPE_SAMPLER_WITH_TEXTURE, // for sampling only, but includes a texture, (samplerXX GLSL type), first a sampler then a texture
  669. UNIFORM_TYPE_TEXTURE, //only texture, (textureXX GLSL type)
  670. UNIFORM_TYPE_IMAGE, // storage image (imageXX GLSL type), for compute mostly
  671. UNIFORM_TYPE_TEXTURE_BUFFER, // buffer texture (or TBO, textureBuffer type)
  672. UNIFORM_TYPE_SAMPLER_WITH_TEXTURE_BUFFER, // buffer texture with a sampler(or TBO, samplerBuffer type)
  673. UNIFORM_TYPE_IMAGE_BUFFER, //texel buffer, (imageBuffer type), for compute mostly
  674. UNIFORM_TYPE_UNIFORM_BUFFER, //regular uniform buffer (or UBO).
  675. UNIFORM_TYPE_STORAGE_BUFFER, //storage buffer ("buffer" qualifier) like UBO, but supports storage, for compute mostly
  676. UNIFORM_TYPE_INPUT_ATTACHMENT, //used for sub-pass read/write, for mobile mostly
  677. UNIFORM_TYPE_MAX
  678. };
  679. enum StorageBufferUsage {
  680. STORAGE_BUFFER_USAGE_DISPATCH_INDIRECT = 1,
  681. };
  682. virtual RID uniform_buffer_create(uint32_t p_size_bytes, const Vector<uint8_t> &p_data = Vector<uint8_t>()) = 0;
  683. virtual RID storage_buffer_create(uint32_t p_size, const Vector<uint8_t> &p_data = Vector<uint8_t>(), BitField<StorageBufferUsage> p_usage = 0) = 0;
  684. virtual RID texture_buffer_create(uint32_t p_size_elements, DataFormat p_format, const Vector<uint8_t> &p_data = Vector<uint8_t>()) = 0;
  685. struct Uniform {
  686. UniformType uniform_type;
  687. int binding; // Binding index as specified in shader.
  688. private:
  689. // In most cases only one ID is provided per binding, so avoid allocating memory unnecessarily for performance.
  690. RID id; // If only one is provided, this is used.
  691. Vector<RID> ids; // If multiple ones are provided, this is used instead.
  692. public:
  693. _FORCE_INLINE_ uint32_t get_id_count() const {
  694. return (id.is_valid() ? 1 : ids.size());
  695. }
  696. _FORCE_INLINE_ RID get_id(uint32_t p_idx) const {
  697. if (id.is_valid()) {
  698. ERR_FAIL_COND_V(p_idx != 0, RID());
  699. return id;
  700. } else {
  701. return ids[p_idx];
  702. }
  703. }
  704. _FORCE_INLINE_ void set_id(uint32_t p_idx, RID p_id) {
  705. if (id.is_valid()) {
  706. ERR_FAIL_COND(p_idx != 0);
  707. id = p_id;
  708. } else {
  709. ids.write[p_idx] = p_id;
  710. }
  711. }
  712. _FORCE_INLINE_ void append_id(RID p_id) {
  713. if (ids.is_empty()) {
  714. if (id == RID()) {
  715. id = p_id;
  716. } else {
  717. ids.push_back(id);
  718. ids.push_back(p_id);
  719. id = RID();
  720. }
  721. } else {
  722. ids.push_back(p_id);
  723. }
  724. }
  725. _FORCE_INLINE_ void clear_ids() {
  726. id = RID();
  727. ids.clear();
  728. }
  729. _FORCE_INLINE_ Uniform(UniformType p_type, int p_binding, RID p_id) {
  730. uniform_type = p_type;
  731. binding = p_binding;
  732. id = p_id;
  733. }
  734. _FORCE_INLINE_ Uniform(UniformType p_type, int p_binding, const Vector<RID> &p_ids) {
  735. uniform_type = p_type;
  736. binding = p_binding;
  737. ids = p_ids;
  738. }
  739. _FORCE_INLINE_ Uniform() {
  740. uniform_type = UNIFORM_TYPE_IMAGE;
  741. binding = 0;
  742. }
  743. };
  744. virtual RID uniform_set_create(const Vector<Uniform> &p_uniforms, RID p_shader, uint32_t p_shader_set) = 0;
  745. virtual bool uniform_set_is_valid(RID p_uniform_set) = 0;
  746. virtual void uniform_set_set_invalidation_callback(RID p_uniform_set, InvalidationCallback p_callback, void *p_userdata) = 0;
  747. virtual Error buffer_update(RID p_buffer, uint32_t p_offset, uint32_t p_size, const void *p_data, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  748. virtual Error buffer_clear(RID p_buffer, uint32_t p_offset, uint32_t p_size, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  749. virtual Vector<uint8_t> buffer_get_data(RID p_buffer, uint32_t p_offset = 0, uint32_t p_size = 0) = 0; // This causes stall, only use to retrieve large buffers for saving.
  750. /******************************************/
  751. /**** PIPELINE SPECIALIZATION CONSTANT ****/
  752. /******************************************/
  753. enum PipelineSpecializationConstantType {
  754. PIPELINE_SPECIALIZATION_CONSTANT_TYPE_BOOL,
  755. PIPELINE_SPECIALIZATION_CONSTANT_TYPE_INT,
  756. PIPELINE_SPECIALIZATION_CONSTANT_TYPE_FLOAT,
  757. };
  758. struct PipelineSpecializationConstant {
  759. PipelineSpecializationConstantType type;
  760. uint32_t constant_id;
  761. union {
  762. uint32_t int_value;
  763. float float_value;
  764. bool bool_value;
  765. };
  766. PipelineSpecializationConstant() {
  767. type = PIPELINE_SPECIALIZATION_CONSTANT_TYPE_BOOL;
  768. constant_id = 0;
  769. int_value = 0;
  770. }
  771. };
  772. /*************************/
  773. /**** RENDER PIPELINE ****/
  774. /*************************/
  775. enum RenderPrimitive {
  776. RENDER_PRIMITIVE_POINTS,
  777. RENDER_PRIMITIVE_LINES,
  778. RENDER_PRIMITIVE_LINES_WITH_ADJACENCY,
  779. RENDER_PRIMITIVE_LINESTRIPS,
  780. RENDER_PRIMITIVE_LINESTRIPS_WITH_ADJACENCY,
  781. RENDER_PRIMITIVE_TRIANGLES,
  782. RENDER_PRIMITIVE_TRIANGLES_WITH_ADJACENCY,
  783. RENDER_PRIMITIVE_TRIANGLE_STRIPS,
  784. RENDER_PRIMITIVE_TRIANGLE_STRIPS_WITH_AJACENCY,
  785. RENDER_PRIMITIVE_TRIANGLE_STRIPS_WITH_RESTART_INDEX,
  786. RENDER_PRIMITIVE_TESSELATION_PATCH,
  787. RENDER_PRIMITIVE_MAX
  788. };
  789. //disable optimization, tessellate control points
  790. enum PolygonCullMode {
  791. POLYGON_CULL_DISABLED,
  792. POLYGON_CULL_FRONT,
  793. POLYGON_CULL_BACK,
  794. };
  795. enum PolygonFrontFace {
  796. POLYGON_FRONT_FACE_CLOCKWISE,
  797. POLYGON_FRONT_FACE_COUNTER_CLOCKWISE,
  798. };
  799. enum StencilOperation {
  800. STENCIL_OP_KEEP,
  801. STENCIL_OP_ZERO,
  802. STENCIL_OP_REPLACE,
  803. STENCIL_OP_INCREMENT_AND_CLAMP,
  804. STENCIL_OP_DECREMENT_AND_CLAMP,
  805. STENCIL_OP_INVERT,
  806. STENCIL_OP_INCREMENT_AND_WRAP,
  807. STENCIL_OP_DECREMENT_AND_WRAP,
  808. STENCIL_OP_MAX //not an actual operator, just the amount of operators :D
  809. };
  810. enum LogicOperation {
  811. LOGIC_OP_CLEAR,
  812. LOGIC_OP_AND,
  813. LOGIC_OP_AND_REVERSE,
  814. LOGIC_OP_COPY,
  815. LOGIC_OP_AND_INVERTED,
  816. LOGIC_OP_NO_OP,
  817. LOGIC_OP_XOR,
  818. LOGIC_OP_OR,
  819. LOGIC_OP_NOR,
  820. LOGIC_OP_EQUIVALENT,
  821. LOGIC_OP_INVERT,
  822. LOGIC_OP_OR_REVERSE,
  823. LOGIC_OP_COPY_INVERTED,
  824. LOGIC_OP_OR_INVERTED,
  825. LOGIC_OP_NAND,
  826. LOGIC_OP_SET,
  827. LOGIC_OP_MAX //not an actual operator, just the amount of operators :D
  828. };
  829. enum BlendFactor {
  830. BLEND_FACTOR_ZERO,
  831. BLEND_FACTOR_ONE,
  832. BLEND_FACTOR_SRC_COLOR,
  833. BLEND_FACTOR_ONE_MINUS_SRC_COLOR,
  834. BLEND_FACTOR_DST_COLOR,
  835. BLEND_FACTOR_ONE_MINUS_DST_COLOR,
  836. BLEND_FACTOR_SRC_ALPHA,
  837. BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
  838. BLEND_FACTOR_DST_ALPHA,
  839. BLEND_FACTOR_ONE_MINUS_DST_ALPHA,
  840. BLEND_FACTOR_CONSTANT_COLOR,
  841. BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR,
  842. BLEND_FACTOR_CONSTANT_ALPHA,
  843. BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
  844. BLEND_FACTOR_SRC_ALPHA_SATURATE,
  845. BLEND_FACTOR_SRC1_COLOR,
  846. BLEND_FACTOR_ONE_MINUS_SRC1_COLOR,
  847. BLEND_FACTOR_SRC1_ALPHA,
  848. BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA,
  849. BLEND_FACTOR_MAX
  850. };
  851. enum BlendOperation {
  852. BLEND_OP_ADD,
  853. BLEND_OP_SUBTRACT,
  854. BLEND_OP_REVERSE_SUBTRACT,
  855. BLEND_OP_MINIMUM,
  856. BLEND_OP_MAXIMUM, //yes this one is an actual operator
  857. BLEND_OP_MAX //not an actual operator, just the amount of operators :D
  858. };
  859. struct PipelineRasterizationState {
  860. bool enable_depth_clamp;
  861. bool discard_primitives;
  862. bool wireframe;
  863. PolygonCullMode cull_mode;
  864. PolygonFrontFace front_face;
  865. bool depth_bias_enabled;
  866. float depth_bias_constant_factor;
  867. float depth_bias_clamp;
  868. float depth_bias_slope_factor;
  869. float line_width;
  870. uint32_t patch_control_points;
  871. PipelineRasterizationState() {
  872. enable_depth_clamp = false;
  873. discard_primitives = false;
  874. wireframe = false;
  875. cull_mode = POLYGON_CULL_DISABLED;
  876. front_face = POLYGON_FRONT_FACE_CLOCKWISE;
  877. depth_bias_enabled = false;
  878. depth_bias_constant_factor = 0;
  879. depth_bias_clamp = 0;
  880. depth_bias_slope_factor = 0;
  881. line_width = 1.0;
  882. patch_control_points = 1;
  883. }
  884. };
  885. struct PipelineMultisampleState {
  886. TextureSamples sample_count;
  887. bool enable_sample_shading;
  888. float min_sample_shading;
  889. Vector<uint32_t> sample_mask;
  890. bool enable_alpha_to_coverage;
  891. bool enable_alpha_to_one;
  892. PipelineMultisampleState() {
  893. sample_count = TEXTURE_SAMPLES_1;
  894. enable_sample_shading = false;
  895. min_sample_shading = 0;
  896. enable_alpha_to_coverage = false;
  897. enable_alpha_to_one = false;
  898. }
  899. };
  900. struct PipelineDepthStencilState {
  901. bool enable_depth_test;
  902. bool enable_depth_write;
  903. CompareOperator depth_compare_operator;
  904. bool enable_depth_range;
  905. float depth_range_min;
  906. float depth_range_max;
  907. bool enable_stencil;
  908. struct StencilOperationState {
  909. StencilOperation fail;
  910. StencilOperation pass;
  911. StencilOperation depth_fail;
  912. CompareOperator compare;
  913. uint32_t compare_mask;
  914. uint32_t write_mask;
  915. uint32_t reference;
  916. StencilOperationState() {
  917. fail = STENCIL_OP_ZERO;
  918. pass = STENCIL_OP_ZERO;
  919. depth_fail = STENCIL_OP_ZERO;
  920. compare = COMPARE_OP_ALWAYS;
  921. compare_mask = 0;
  922. write_mask = 0;
  923. reference = 0;
  924. }
  925. };
  926. StencilOperationState front_op;
  927. StencilOperationState back_op;
  928. PipelineDepthStencilState() {
  929. enable_depth_test = false;
  930. enable_depth_write = false;
  931. depth_compare_operator = COMPARE_OP_ALWAYS;
  932. enable_depth_range = false;
  933. depth_range_min = 0;
  934. depth_range_max = 0;
  935. enable_stencil = false;
  936. }
  937. };
  938. struct PipelineColorBlendState {
  939. bool enable_logic_op;
  940. LogicOperation logic_op;
  941. struct Attachment {
  942. bool enable_blend;
  943. BlendFactor src_color_blend_factor;
  944. BlendFactor dst_color_blend_factor;
  945. BlendOperation color_blend_op;
  946. BlendFactor src_alpha_blend_factor;
  947. BlendFactor dst_alpha_blend_factor;
  948. BlendOperation alpha_blend_op;
  949. bool write_r;
  950. bool write_g;
  951. bool write_b;
  952. bool write_a;
  953. Attachment() {
  954. enable_blend = false;
  955. src_color_blend_factor = BLEND_FACTOR_ZERO;
  956. dst_color_blend_factor = BLEND_FACTOR_ZERO;
  957. color_blend_op = BLEND_OP_ADD;
  958. src_alpha_blend_factor = BLEND_FACTOR_ZERO;
  959. dst_alpha_blend_factor = BLEND_FACTOR_ZERO;
  960. alpha_blend_op = BLEND_OP_ADD;
  961. write_r = true;
  962. write_g = true;
  963. write_b = true;
  964. write_a = true;
  965. }
  966. };
  967. static PipelineColorBlendState create_disabled(int p_attachments = 1) {
  968. PipelineColorBlendState bs;
  969. for (int i = 0; i < p_attachments; i++) {
  970. bs.attachments.push_back(Attachment());
  971. }
  972. return bs;
  973. }
  974. static PipelineColorBlendState create_blend(int p_attachments = 1) {
  975. PipelineColorBlendState bs;
  976. for (int i = 0; i < p_attachments; i++) {
  977. Attachment ba;
  978. ba.enable_blend = true;
  979. ba.src_color_blend_factor = BLEND_FACTOR_SRC_ALPHA;
  980. ba.dst_color_blend_factor = BLEND_FACTOR_ONE_MINUS_SRC_ALPHA;
  981. ba.src_alpha_blend_factor = BLEND_FACTOR_SRC_ALPHA;
  982. ba.dst_alpha_blend_factor = BLEND_FACTOR_ONE_MINUS_SRC_ALPHA;
  983. bs.attachments.push_back(ba);
  984. }
  985. return bs;
  986. }
  987. Vector<Attachment> attachments; //one per render target texture
  988. Color blend_constant;
  989. PipelineColorBlendState() {
  990. enable_logic_op = false;
  991. logic_op = LOGIC_OP_CLEAR;
  992. }
  993. };
  994. enum PipelineDynamicStateFlags {
  995. DYNAMIC_STATE_LINE_WIDTH = (1 << 0),
  996. DYNAMIC_STATE_DEPTH_BIAS = (1 << 1),
  997. DYNAMIC_STATE_BLEND_CONSTANTS = (1 << 2),
  998. DYNAMIC_STATE_DEPTH_BOUNDS = (1 << 3),
  999. DYNAMIC_STATE_STENCIL_COMPARE_MASK = (1 << 4),
  1000. DYNAMIC_STATE_STENCIL_WRITE_MASK = (1 << 5),
  1001. DYNAMIC_STATE_STENCIL_REFERENCE = (1 << 6),
  1002. };
  1003. virtual bool render_pipeline_is_valid(RID p_pipeline) = 0;
  1004. virtual RID render_pipeline_create(RID p_shader, FramebufferFormatID p_framebuffer_format, VertexFormatID p_vertex_format, RenderPrimitive p_render_primitive, const PipelineRasterizationState &p_rasterization_state, const PipelineMultisampleState &p_multisample_state, const PipelineDepthStencilState &p_depth_stencil_state, const PipelineColorBlendState &p_blend_state, BitField<PipelineDynamicStateFlags> p_dynamic_state_flags = 0, uint32_t p_for_render_pass = 0, const Vector<PipelineSpecializationConstant> &p_specialization_constants = Vector<PipelineSpecializationConstant>()) = 0;
  1005. /**************************/
  1006. /**** COMPUTE PIPELINE ****/
  1007. /**************************/
  1008. virtual RID compute_pipeline_create(RID p_shader, const Vector<PipelineSpecializationConstant> &p_specialization_constants = Vector<PipelineSpecializationConstant>()) = 0;
  1009. virtual bool compute_pipeline_is_valid(RID p_pipeline) = 0;
  1010. /****************/
  1011. /**** SCREEN ****/
  1012. /****************/
  1013. virtual int screen_get_width(DisplayServer::WindowID p_screen = 0) const = 0;
  1014. virtual int screen_get_height(DisplayServer::WindowID p_screen = 0) const = 0;
  1015. virtual FramebufferFormatID screen_get_framebuffer_format() const = 0;
  1016. /********************/
  1017. /**** DRAW LISTS ****/
  1018. /********************/
  1019. enum InitialAction {
  1020. INITIAL_ACTION_CLEAR, //start rendering and clear the whole framebuffer (region or not) (supply params)
  1021. INITIAL_ACTION_CLEAR_REGION, //start rendering and clear the framebuffer in the specified region (supply params)
  1022. INITIAL_ACTION_CLEAR_REGION_CONTINUE, //continue rendering and clear the framebuffer in the specified region (supply params)
  1023. INITIAL_ACTION_KEEP, //start rendering, but keep attached color texture contents (depth will be cleared)
  1024. INITIAL_ACTION_DROP, //start rendering, ignore what is there, just write above it
  1025. INITIAL_ACTION_CONTINUE, //continue rendering (framebuffer must have been left in "continue" state as final action previously)
  1026. INITIAL_ACTION_MAX
  1027. };
  1028. enum FinalAction {
  1029. FINAL_ACTION_READ, //will no longer render to it, allows attached textures to be read again, but depth buffer contents will be dropped (Can't be read from)
  1030. FINAL_ACTION_DISCARD, // discard contents after rendering
  1031. FINAL_ACTION_CONTINUE, //will continue rendering later, attached textures can't be read until re-bound with "finish"
  1032. FINAL_ACTION_MAX
  1033. };
  1034. typedef int64_t DrawListID;
  1035. virtual DrawListID draw_list_begin_for_screen(DisplayServer::WindowID p_screen = 0, const Color &p_clear_color = Color()) = 0;
  1036. virtual DrawListID draw_list_begin(RID p_framebuffer, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const Vector<RID> &p_storage_textures = Vector<RID>()) = 0;
  1037. virtual Error draw_list_begin_split(RID p_framebuffer, uint32_t p_splits, DrawListID *r_split_ids, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const Vector<RID> &p_storage_textures = Vector<RID>()) = 0;
  1038. virtual void draw_list_set_blend_constants(DrawListID p_list, const Color &p_color) = 0;
  1039. virtual void draw_list_bind_render_pipeline(DrawListID p_list, RID p_render_pipeline) = 0;
  1040. virtual void draw_list_bind_uniform_set(DrawListID p_list, RID p_uniform_set, uint32_t p_index) = 0;
  1041. virtual void draw_list_bind_vertex_array(DrawListID p_list, RID p_vertex_array) = 0;
  1042. virtual void draw_list_bind_index_array(DrawListID p_list, RID p_index_array) = 0;
  1043. virtual void draw_list_set_line_width(DrawListID p_list, float p_width) = 0;
  1044. virtual void draw_list_set_push_constant(DrawListID p_list, const void *p_data, uint32_t p_data_size) = 0;
  1045. virtual void draw_list_draw(DrawListID p_list, bool p_use_indices, uint32_t p_instances = 1, uint32_t p_procedural_vertices = 0) = 0;
  1046. virtual void draw_list_enable_scissor(DrawListID p_list, const Rect2 &p_rect) = 0;
  1047. virtual void draw_list_disable_scissor(DrawListID p_list) = 0;
  1048. virtual uint32_t draw_list_get_current_pass() = 0;
  1049. virtual DrawListID draw_list_switch_to_next_pass() = 0;
  1050. virtual Error draw_list_switch_to_next_pass_split(uint32_t p_splits, DrawListID *r_split_ids) = 0;
  1051. virtual void draw_list_end(BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  1052. /***********************/
  1053. /**** COMPUTE LISTS ****/
  1054. /***********************/
  1055. typedef int64_t ComputeListID;
  1056. virtual ComputeListID compute_list_begin(bool p_allow_draw_overlap = false) = 0;
  1057. virtual void compute_list_bind_compute_pipeline(ComputeListID p_list, RID p_compute_pipeline) = 0;
  1058. virtual void compute_list_bind_uniform_set(ComputeListID p_list, RID p_uniform_set, uint32_t p_index) = 0;
  1059. virtual void compute_list_set_push_constant(ComputeListID p_list, const void *p_data, uint32_t p_data_size) = 0;
  1060. virtual void compute_list_dispatch(ComputeListID p_list, uint32_t p_x_groups, uint32_t p_y_groups, uint32_t p_z_groups) = 0;
  1061. virtual void compute_list_dispatch_threads(ComputeListID p_list, uint32_t p_x_threads, uint32_t p_y_threads, uint32_t p_z_threads) = 0;
  1062. virtual void compute_list_dispatch_indirect(ComputeListID p_list, RID p_buffer, uint32_t p_offset) = 0;
  1063. virtual void compute_list_add_barrier(ComputeListID p_list) = 0;
  1064. virtual void compute_list_end(BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS) = 0;
  1065. virtual void barrier(BitField<BarrierMask> p_from = BARRIER_MASK_ALL_BARRIERS, BitField<BarrierMask> p_to = BARRIER_MASK_ALL_BARRIERS) = 0;
  1066. virtual void full_barrier() = 0;
  1067. /***************/
  1068. /**** FREE! ****/
  1069. /***************/
  1070. virtual void free(RID p_id) = 0;
  1071. /****************/
  1072. /**** Timing ****/
  1073. /****************/
  1074. virtual void capture_timestamp(const String &p_name) = 0;
  1075. virtual uint32_t get_captured_timestamps_count() const = 0;
  1076. virtual uint64_t get_captured_timestamps_frame() const = 0;
  1077. virtual uint64_t get_captured_timestamp_gpu_time(uint32_t p_index) const = 0;
  1078. virtual uint64_t get_captured_timestamp_cpu_time(uint32_t p_index) const = 0;
  1079. virtual String get_captured_timestamp_name(uint32_t p_index) const = 0;
  1080. /****************/
  1081. /**** LIMITS ****/
  1082. /****************/
  1083. enum Limit {
  1084. LIMIT_MAX_BOUND_UNIFORM_SETS,
  1085. LIMIT_MAX_FRAMEBUFFER_COLOR_ATTACHMENTS,
  1086. LIMIT_MAX_TEXTURES_PER_UNIFORM_SET,
  1087. LIMIT_MAX_SAMPLERS_PER_UNIFORM_SET,
  1088. LIMIT_MAX_STORAGE_BUFFERS_PER_UNIFORM_SET,
  1089. LIMIT_MAX_STORAGE_IMAGES_PER_UNIFORM_SET,
  1090. LIMIT_MAX_UNIFORM_BUFFERS_PER_UNIFORM_SET,
  1091. LIMIT_MAX_DRAW_INDEXED_INDEX,
  1092. LIMIT_MAX_FRAMEBUFFER_HEIGHT,
  1093. LIMIT_MAX_FRAMEBUFFER_WIDTH,
  1094. LIMIT_MAX_TEXTURE_ARRAY_LAYERS,
  1095. LIMIT_MAX_TEXTURE_SIZE_1D,
  1096. LIMIT_MAX_TEXTURE_SIZE_2D,
  1097. LIMIT_MAX_TEXTURE_SIZE_3D,
  1098. LIMIT_MAX_TEXTURE_SIZE_CUBE,
  1099. LIMIT_MAX_TEXTURES_PER_SHADER_STAGE,
  1100. LIMIT_MAX_SAMPLERS_PER_SHADER_STAGE,
  1101. LIMIT_MAX_STORAGE_BUFFERS_PER_SHADER_STAGE,
  1102. LIMIT_MAX_STORAGE_IMAGES_PER_SHADER_STAGE,
  1103. LIMIT_MAX_UNIFORM_BUFFERS_PER_SHADER_STAGE,
  1104. LIMIT_MAX_PUSH_CONSTANT_SIZE,
  1105. LIMIT_MAX_UNIFORM_BUFFER_SIZE,
  1106. LIMIT_MAX_VERTEX_INPUT_ATTRIBUTE_OFFSET,
  1107. LIMIT_MAX_VERTEX_INPUT_ATTRIBUTES,
  1108. LIMIT_MAX_VERTEX_INPUT_BINDINGS,
  1109. LIMIT_MAX_VERTEX_INPUT_BINDING_STRIDE,
  1110. LIMIT_MIN_UNIFORM_BUFFER_OFFSET_ALIGNMENT,
  1111. LIMIT_MAX_COMPUTE_SHARED_MEMORY_SIZE,
  1112. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_X,
  1113. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_Y,
  1114. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_Z,
  1115. LIMIT_MAX_COMPUTE_WORKGROUP_INVOCATIONS,
  1116. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_X,
  1117. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_Y,
  1118. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_Z,
  1119. LIMIT_MAX_VIEWPORT_DIMENSIONS_X,
  1120. LIMIT_MAX_VIEWPORT_DIMENSIONS_Y,
  1121. LIMIT_SUBGROUP_SIZE,
  1122. LIMIT_SUBGROUP_IN_SHADERS, // Set flags using SHADER_STAGE_VERTEX_BIT, SHADER_STAGE_FRAGMENT_BIT, etc.
  1123. LIMIT_SUBGROUP_OPERATIONS,
  1124. LIMIT_VRS_TEXEL_WIDTH,
  1125. LIMIT_VRS_TEXEL_HEIGHT,
  1126. };
  1127. virtual uint64_t limit_get(Limit p_limit) const = 0;
  1128. //methods below not exposed, used by RenderingDeviceRD
  1129. virtual void prepare_screen_for_drawing() = 0;
  1130. virtual void swap_buffers() = 0;
  1131. virtual uint32_t get_frame_delay() const = 0;
  1132. virtual void submit() = 0;
  1133. virtual void sync() = 0;
  1134. enum MemoryType {
  1135. MEMORY_TEXTURES,
  1136. MEMORY_BUFFERS,
  1137. MEMORY_TOTAL
  1138. };
  1139. virtual uint64_t get_memory_usage(MemoryType p_type) const = 0;
  1140. virtual RenderingDevice *create_local_device() = 0;
  1141. virtual void set_resource_name(RID p_id, const String p_name) = 0;
  1142. virtual void draw_command_begin_label(String p_label_name, const Color p_color = Color(1, 1, 1, 1)) = 0;
  1143. virtual void draw_command_insert_label(String p_label_name, const Color p_color = Color(1, 1, 1, 1)) = 0;
  1144. virtual void draw_command_end_label() = 0;
  1145. virtual String get_device_vendor_name() const = 0;
  1146. virtual String get_device_name() const = 0;
  1147. virtual RenderingDevice::DeviceType get_device_type() const = 0;
  1148. virtual String get_device_api_version() const = 0;
  1149. virtual String get_device_pipeline_cache_uuid() const = 0;
  1150. virtual uint64_t get_driver_resource(DriverResource p_resource, RID p_rid = RID(), uint64_t p_index = 0) = 0;
  1151. static RenderingDevice *get_singleton();
  1152. RenderingDevice();
  1153. protected:
  1154. static const char *shader_stage_names[RenderingDevice::SHADER_STAGE_MAX];
  1155. static const uint32_t MAX_UNIFORM_SETS = 16;
  1156. //binders to script API
  1157. RID _texture_create(const Ref<RDTextureFormat> &p_format, const Ref<RDTextureView> &p_view, const TypedArray<PackedByteArray> &p_data = Array());
  1158. RID _texture_create_shared(const Ref<RDTextureView> &p_view, RID p_with_texture);
  1159. RID _texture_create_shared_from_slice(const Ref<RDTextureView> &p_view, RID p_with_texture, uint32_t p_layer, uint32_t p_mipmap, uint32_t p_mipmaps = 1, TextureSliceType p_slice_type = TEXTURE_SLICE_2D);
  1160. FramebufferFormatID _framebuffer_format_create(const TypedArray<RDAttachmentFormat> &p_attachments, uint32_t p_view_count);
  1161. FramebufferFormatID _framebuffer_format_create_multipass(const TypedArray<RDAttachmentFormat> &p_attachments, const TypedArray<RDFramebufferPass> &p_passes, uint32_t p_view_count);
  1162. RID _framebuffer_create(const TypedArray<RID> &p_textures, FramebufferFormatID p_format_check = INVALID_ID, uint32_t p_view_count = 1);
  1163. RID _framebuffer_create_multipass(const TypedArray<RID> &p_textures, const TypedArray<RDFramebufferPass> &p_passes, FramebufferFormatID p_format_check = INVALID_ID, uint32_t p_view_count = 1);
  1164. RID _sampler_create(const Ref<RDSamplerState> &p_state);
  1165. VertexFormatID _vertex_format_create(const TypedArray<RDVertexAttribute> &p_vertex_formats);
  1166. RID _vertex_array_create(uint32_t p_vertex_count, VertexFormatID p_vertex_format, const TypedArray<RID> &p_src_buffers, const Vector<int64_t> &p_offsets = Vector<int64_t>());
  1167. Ref<RDShaderSPIRV> _shader_compile_spirv_from_source(const Ref<RDShaderSource> &p_source, bool p_allow_cache = true);
  1168. Vector<uint8_t> _shader_compile_binary_from_spirv(const Ref<RDShaderSPIRV> &p_bytecode, const String &p_shader_name = "");
  1169. RID _shader_create_from_spirv(const Ref<RDShaderSPIRV> &p_spirv, const String &p_shader_name = "");
  1170. RID _uniform_set_create(const TypedArray<RDUniform> &p_uniforms, RID p_shader, uint32_t p_shader_set);
  1171. Error _buffer_update(RID p_buffer, uint32_t p_offset, uint32_t p_size, const Vector<uint8_t> &p_data, BitField<BarrierMask> p_post_barrier = BARRIER_MASK_ALL_BARRIERS);
  1172. RID _render_pipeline_create(RID p_shader, FramebufferFormatID p_framebuffer_format, VertexFormatID p_vertex_format, RenderPrimitive p_render_primitive, const Ref<RDPipelineRasterizationState> &p_rasterization_state, const Ref<RDPipelineMultisampleState> &p_multisample_state, const Ref<RDPipelineDepthStencilState> &p_depth_stencil_state, const Ref<RDPipelineColorBlendState> &p_blend_state, BitField<PipelineDynamicStateFlags> p_dynamic_state_flags, uint32_t p_for_render_pass, const TypedArray<RDPipelineSpecializationConstant> &p_specialization_constants);
  1173. RID _compute_pipeline_create(RID p_shader, const TypedArray<RDPipelineSpecializationConstant> &p_specialization_constants);
  1174. Vector<int64_t> _draw_list_begin_split(RID p_framebuffer, uint32_t p_splits, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const TypedArray<RID> &p_storage_textures = TypedArray<RID>());
  1175. void _draw_list_set_push_constant(DrawListID p_list, const Vector<uint8_t> &p_data, uint32_t p_data_size);
  1176. void _compute_list_set_push_constant(ComputeListID p_list, const Vector<uint8_t> &p_data, uint32_t p_data_size);
  1177. Vector<int64_t> _draw_list_switch_to_next_pass_split(uint32_t p_splits);
  1178. struct SpirvReflectionData {
  1179. BitField<ShaderStage> stages_mask;
  1180. uint32_t vertex_input_mask;
  1181. uint32_t fragment_output_mask;
  1182. bool is_compute;
  1183. uint32_t compute_local_size[3];
  1184. uint32_t push_constant_size;
  1185. BitField<ShaderStage> push_constant_stages_mask;
  1186. struct Uniform {
  1187. UniformType type;
  1188. uint32_t binding;
  1189. BitField<ShaderStage> stages_mask;
  1190. uint32_t length; // Size of arrays (in total elements), or ubos (in bytes * total elements).
  1191. bool writable;
  1192. };
  1193. Vector<Vector<Uniform>> uniforms;
  1194. struct SpecializationConstant {
  1195. PipelineSpecializationConstantType type;
  1196. uint32_t constant_id;
  1197. union {
  1198. uint32_t int_value;
  1199. float float_value;
  1200. bool bool_value;
  1201. };
  1202. BitField<ShaderStage> stages_mask;
  1203. };
  1204. Vector<SpecializationConstant> specialization_constants;
  1205. };
  1206. Error _reflect_spirv(const Vector<ShaderStageSPIRVData> &p_spirv, SpirvReflectionData &r_reflection_data);
  1207. };
  1208. VARIANT_ENUM_CAST(RenderingDevice::DeviceType)
  1209. VARIANT_ENUM_CAST(RenderingDevice::DriverResource)
  1210. VARIANT_ENUM_CAST(RenderingDevice::ShaderStage)
  1211. VARIANT_ENUM_CAST(RenderingDevice::ShaderLanguage)
  1212. VARIANT_ENUM_CAST(RenderingDevice::CompareOperator)
  1213. VARIANT_ENUM_CAST(RenderingDevice::DataFormat)
  1214. VARIANT_BITFIELD_CAST(RenderingDevice::BarrierMask);
  1215. VARIANT_ENUM_CAST(RenderingDevice::TextureType)
  1216. VARIANT_ENUM_CAST(RenderingDevice::TextureSamples)
  1217. VARIANT_BITFIELD_CAST(RenderingDevice::TextureUsageBits)
  1218. VARIANT_ENUM_CAST(RenderingDevice::TextureSwizzle)
  1219. VARIANT_ENUM_CAST(RenderingDevice::TextureSliceType)
  1220. VARIANT_ENUM_CAST(RenderingDevice::SamplerFilter)
  1221. VARIANT_ENUM_CAST(RenderingDevice::SamplerRepeatMode)
  1222. VARIANT_ENUM_CAST(RenderingDevice::SamplerBorderColor)
  1223. VARIANT_ENUM_CAST(RenderingDevice::VertexFrequency)
  1224. VARIANT_ENUM_CAST(RenderingDevice::IndexBufferFormat)
  1225. VARIANT_BITFIELD_CAST(RenderingDevice::StorageBufferUsage)
  1226. VARIANT_ENUM_CAST(RenderingDevice::UniformType)
  1227. VARIANT_ENUM_CAST(RenderingDevice::RenderPrimitive)
  1228. VARIANT_ENUM_CAST(RenderingDevice::PolygonCullMode)
  1229. VARIANT_ENUM_CAST(RenderingDevice::PolygonFrontFace)
  1230. VARIANT_ENUM_CAST(RenderingDevice::StencilOperation)
  1231. VARIANT_ENUM_CAST(RenderingDevice::LogicOperation)
  1232. VARIANT_ENUM_CAST(RenderingDevice::BlendFactor)
  1233. VARIANT_ENUM_CAST(RenderingDevice::BlendOperation)
  1234. VARIANT_BITFIELD_CAST(RenderingDevice::PipelineDynamicStateFlags)
  1235. VARIANT_ENUM_CAST(RenderingDevice::PipelineSpecializationConstantType)
  1236. VARIANT_ENUM_CAST(RenderingDevice::InitialAction)
  1237. VARIANT_ENUM_CAST(RenderingDevice::FinalAction)
  1238. VARIANT_ENUM_CAST(RenderingDevice::Limit)
  1239. VARIANT_ENUM_CAST(RenderingDevice::MemoryType)
  1240. VARIANT_ENUM_CAST(RenderingDevice::Features)
  1241. typedef RenderingDevice RD;
  1242. #endif // RENDERING_DEVICE_H