rendering_device.h 43 KB

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  1. /*************************************************************************/
  2. /* rendering_device.h */
  3. /*************************************************************************/
  4. /* This file is part of: */
  5. /* GODOT ENGINE */
  6. /* https://godotengine.org */
  7. /*************************************************************************/
  8. /* Copyright (c) 2007-2021 Juan Linietsky, Ariel Manzur. */
  9. /* Copyright (c) 2014-2021 Godot Engine contributors (cf. AUTHORS.md). */
  10. /* */
  11. /* Permission is hereby granted, free of charge, to any person obtaining */
  12. /* a copy of this software and associated documentation files (the */
  13. /* "Software"), to deal in the Software without restriction, including */
  14. /* without limitation the rights to use, copy, modify, merge, publish, */
  15. /* distribute, sublicense, and/or sell copies of the Software, and to */
  16. /* permit persons to whom the Software is furnished to do so, subject to */
  17. /* the following conditions: */
  18. /* */
  19. /* The above copyright notice and this permission notice shall be */
  20. /* included in all copies or substantial portions of the Software. */
  21. /* */
  22. /* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, */
  23. /* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF */
  24. /* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.*/
  25. /* IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY */
  26. /* CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, */
  27. /* TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE */
  28. /* SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
  29. /*************************************************************************/
  30. #ifndef RENDERING_DEVICE_H
  31. #define RENDERING_DEVICE_H
  32. #include "core/object/class_db.h"
  33. #include "core/variant/typed_array.h"
  34. #include "servers/display_server.h"
  35. class RDTextureFormat;
  36. class RDTextureView;
  37. class RDAttachmentFormat;
  38. class RDSamplerState;
  39. class RDVertexAttribute;
  40. class RDShaderSource;
  41. class RDShaderBytecode;
  42. class RDUniforms;
  43. class RDPipelineRasterizationState;
  44. class RDPipelineMultisampleState;
  45. class RDPipelineDepthStencilState;
  46. class RDPipelineColorBlendState;
  47. class RenderingDevice : public Object {
  48. GDCLASS(RenderingDevice, Object)
  49. public:
  50. enum DeviceFamily {
  51. DEVICE_UNKNOWN,
  52. DEVICE_OPENGL,
  53. DEVICE_VULKAN,
  54. DEVICE_DIRECTX
  55. };
  56. enum ShaderStage {
  57. SHADER_STAGE_VERTEX,
  58. SHADER_STAGE_FRAGMENT,
  59. SHADER_STAGE_TESSELATION_CONTROL,
  60. SHADER_STAGE_TESSELATION_EVALUATION,
  61. SHADER_STAGE_COMPUTE,
  62. SHADER_STAGE_MAX,
  63. SHADER_STAGE_VERTEX_BIT = (1 << SHADER_STAGE_VERTEX),
  64. SHADER_STAGE_FRAGMENT_BIT = (1 << SHADER_STAGE_FRAGMENT),
  65. SHADER_STAGE_TESSELATION_CONTROL_BIT = (1 << SHADER_STAGE_TESSELATION_CONTROL),
  66. SHADER_STAGE_TESSELATION_EVALUATION_BIT = (1 << SHADER_STAGE_TESSELATION_EVALUATION),
  67. SHADER_STAGE_COMPUTE_BIT = (1 << SHADER_STAGE_COMPUTE),
  68. };
  69. enum ShaderLanguage {
  70. SHADER_LANGUAGE_GLSL,
  71. SHADER_LANGUAGE_HLSL
  72. };
  73. enum SubgroupOperations {
  74. SUBGROUP_BASIC_BIT = 1,
  75. SUBGROUP_VOTE_BIT = 2,
  76. SUBGROUP_ARITHMETIC_BIT = 4,
  77. SUBGROUP_BALLOT_BIT = 8,
  78. SUBGROUP_SHUFFLE_BIT = 16,
  79. SUBGROUP_SHUFFLE_RELATIVE_BIT = 32,
  80. SUBGROUP_CLUSTERED_BIT = 64,
  81. SUBGROUP_QUAD_BIT = 128,
  82. };
  83. struct Capabilities {
  84. // main device info
  85. DeviceFamily device_family = DEVICE_UNKNOWN;
  86. uint32_t version_major = 1.0;
  87. uint32_t version_minor = 0.0;
  88. // subgroup capabilities
  89. uint32_t subgroup_size = 0;
  90. uint32_t subgroup_in_shaders = 0; // Set flags using SHADER_STAGE_VERTEX_BIT, SHADER_STAGE_FRAGMENT_BIT, etc.
  91. uint32_t subgroup_operations = 0; // Set flags, using SubgroupOperations
  92. // features
  93. bool supports_multiview = false; // If true this device supports multiview options
  94. };
  95. typedef String (*ShaderGetCacheKeyFunction)(const Capabilities *p_capabilities);
  96. typedef Vector<uint8_t> (*ShaderCompileFunction)(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language, String *r_error, const Capabilities *p_capabilities);
  97. typedef Vector<uint8_t> (*ShaderCacheFunction)(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language);
  98. private:
  99. static ShaderCompileFunction compile_function;
  100. static ShaderCacheFunction cache_function;
  101. static ShaderGetCacheKeyFunction get_cache_key_function;
  102. static RenderingDevice *singleton;
  103. protected:
  104. static void _bind_methods();
  105. Capabilities device_capabilities;
  106. public:
  107. //base numeric ID for all types
  108. enum {
  109. INVALID_ID = -1,
  110. INVALID_FORMAT_ID = -1
  111. };
  112. /*****************/
  113. /**** GENERIC ****/
  114. /*****************/
  115. enum CompareOperator {
  116. COMPARE_OP_NEVER,
  117. COMPARE_OP_LESS,
  118. COMPARE_OP_EQUAL,
  119. COMPARE_OP_LESS_OR_EQUAL,
  120. COMPARE_OP_GREATER,
  121. COMPARE_OP_NOT_EQUAL,
  122. COMPARE_OP_GREATER_OR_EQUAL,
  123. COMPARE_OP_ALWAYS,
  124. COMPARE_OP_MAX //not an actual operator, just the amount of operators :D
  125. };
  126. enum DataFormat {
  127. DATA_FORMAT_R4G4_UNORM_PACK8,
  128. DATA_FORMAT_R4G4B4A4_UNORM_PACK16,
  129. DATA_FORMAT_B4G4R4A4_UNORM_PACK16,
  130. DATA_FORMAT_R5G6B5_UNORM_PACK16,
  131. DATA_FORMAT_B5G6R5_UNORM_PACK16,
  132. DATA_FORMAT_R5G5B5A1_UNORM_PACK16,
  133. DATA_FORMAT_B5G5R5A1_UNORM_PACK16,
  134. DATA_FORMAT_A1R5G5B5_UNORM_PACK16,
  135. DATA_FORMAT_R8_UNORM,
  136. DATA_FORMAT_R8_SNORM,
  137. DATA_FORMAT_R8_USCALED,
  138. DATA_FORMAT_R8_SSCALED,
  139. DATA_FORMAT_R8_UINT,
  140. DATA_FORMAT_R8_SINT,
  141. DATA_FORMAT_R8_SRGB,
  142. DATA_FORMAT_R8G8_UNORM,
  143. DATA_FORMAT_R8G8_SNORM,
  144. DATA_FORMAT_R8G8_USCALED,
  145. DATA_FORMAT_R8G8_SSCALED,
  146. DATA_FORMAT_R8G8_UINT,
  147. DATA_FORMAT_R8G8_SINT,
  148. DATA_FORMAT_R8G8_SRGB,
  149. DATA_FORMAT_R8G8B8_UNORM,
  150. DATA_FORMAT_R8G8B8_SNORM,
  151. DATA_FORMAT_R8G8B8_USCALED,
  152. DATA_FORMAT_R8G8B8_SSCALED,
  153. DATA_FORMAT_R8G8B8_UINT,
  154. DATA_FORMAT_R8G8B8_SINT,
  155. DATA_FORMAT_R8G8B8_SRGB,
  156. DATA_FORMAT_B8G8R8_UNORM,
  157. DATA_FORMAT_B8G8R8_SNORM,
  158. DATA_FORMAT_B8G8R8_USCALED,
  159. DATA_FORMAT_B8G8R8_SSCALED,
  160. DATA_FORMAT_B8G8R8_UINT,
  161. DATA_FORMAT_B8G8R8_SINT,
  162. DATA_FORMAT_B8G8R8_SRGB,
  163. DATA_FORMAT_R8G8B8A8_UNORM,
  164. DATA_FORMAT_R8G8B8A8_SNORM,
  165. DATA_FORMAT_R8G8B8A8_USCALED,
  166. DATA_FORMAT_R8G8B8A8_SSCALED,
  167. DATA_FORMAT_R8G8B8A8_UINT,
  168. DATA_FORMAT_R8G8B8A8_SINT,
  169. DATA_FORMAT_R8G8B8A8_SRGB,
  170. DATA_FORMAT_B8G8R8A8_UNORM,
  171. DATA_FORMAT_B8G8R8A8_SNORM,
  172. DATA_FORMAT_B8G8R8A8_USCALED,
  173. DATA_FORMAT_B8G8R8A8_SSCALED,
  174. DATA_FORMAT_B8G8R8A8_UINT,
  175. DATA_FORMAT_B8G8R8A8_SINT,
  176. DATA_FORMAT_B8G8R8A8_SRGB,
  177. DATA_FORMAT_A8B8G8R8_UNORM_PACK32,
  178. DATA_FORMAT_A8B8G8R8_SNORM_PACK32,
  179. DATA_FORMAT_A8B8G8R8_USCALED_PACK32,
  180. DATA_FORMAT_A8B8G8R8_SSCALED_PACK32,
  181. DATA_FORMAT_A8B8G8R8_UINT_PACK32,
  182. DATA_FORMAT_A8B8G8R8_SINT_PACK32,
  183. DATA_FORMAT_A8B8G8R8_SRGB_PACK32,
  184. DATA_FORMAT_A2R10G10B10_UNORM_PACK32,
  185. DATA_FORMAT_A2R10G10B10_SNORM_PACK32,
  186. DATA_FORMAT_A2R10G10B10_USCALED_PACK32,
  187. DATA_FORMAT_A2R10G10B10_SSCALED_PACK32,
  188. DATA_FORMAT_A2R10G10B10_UINT_PACK32,
  189. DATA_FORMAT_A2R10G10B10_SINT_PACK32,
  190. DATA_FORMAT_A2B10G10R10_UNORM_PACK32,
  191. DATA_FORMAT_A2B10G10R10_SNORM_PACK32,
  192. DATA_FORMAT_A2B10G10R10_USCALED_PACK32,
  193. DATA_FORMAT_A2B10G10R10_SSCALED_PACK32,
  194. DATA_FORMAT_A2B10G10R10_UINT_PACK32,
  195. DATA_FORMAT_A2B10G10R10_SINT_PACK32,
  196. DATA_FORMAT_R16_UNORM,
  197. DATA_FORMAT_R16_SNORM,
  198. DATA_FORMAT_R16_USCALED,
  199. DATA_FORMAT_R16_SSCALED,
  200. DATA_FORMAT_R16_UINT,
  201. DATA_FORMAT_R16_SINT,
  202. DATA_FORMAT_R16_SFLOAT,
  203. DATA_FORMAT_R16G16_UNORM,
  204. DATA_FORMAT_R16G16_SNORM,
  205. DATA_FORMAT_R16G16_USCALED,
  206. DATA_FORMAT_R16G16_SSCALED,
  207. DATA_FORMAT_R16G16_UINT,
  208. DATA_FORMAT_R16G16_SINT,
  209. DATA_FORMAT_R16G16_SFLOAT,
  210. DATA_FORMAT_R16G16B16_UNORM,
  211. DATA_FORMAT_R16G16B16_SNORM,
  212. DATA_FORMAT_R16G16B16_USCALED,
  213. DATA_FORMAT_R16G16B16_SSCALED,
  214. DATA_FORMAT_R16G16B16_UINT,
  215. DATA_FORMAT_R16G16B16_SINT,
  216. DATA_FORMAT_R16G16B16_SFLOAT,
  217. DATA_FORMAT_R16G16B16A16_UNORM,
  218. DATA_FORMAT_R16G16B16A16_SNORM,
  219. DATA_FORMAT_R16G16B16A16_USCALED,
  220. DATA_FORMAT_R16G16B16A16_SSCALED,
  221. DATA_FORMAT_R16G16B16A16_UINT,
  222. DATA_FORMAT_R16G16B16A16_SINT,
  223. DATA_FORMAT_R16G16B16A16_SFLOAT,
  224. DATA_FORMAT_R32_UINT,
  225. DATA_FORMAT_R32_SINT,
  226. DATA_FORMAT_R32_SFLOAT,
  227. DATA_FORMAT_R32G32_UINT,
  228. DATA_FORMAT_R32G32_SINT,
  229. DATA_FORMAT_R32G32_SFLOAT,
  230. DATA_FORMAT_R32G32B32_UINT,
  231. DATA_FORMAT_R32G32B32_SINT,
  232. DATA_FORMAT_R32G32B32_SFLOAT,
  233. DATA_FORMAT_R32G32B32A32_UINT,
  234. DATA_FORMAT_R32G32B32A32_SINT,
  235. DATA_FORMAT_R32G32B32A32_SFLOAT,
  236. DATA_FORMAT_R64_UINT,
  237. DATA_FORMAT_R64_SINT,
  238. DATA_FORMAT_R64_SFLOAT,
  239. DATA_FORMAT_R64G64_UINT,
  240. DATA_FORMAT_R64G64_SINT,
  241. DATA_FORMAT_R64G64_SFLOAT,
  242. DATA_FORMAT_R64G64B64_UINT,
  243. DATA_FORMAT_R64G64B64_SINT,
  244. DATA_FORMAT_R64G64B64_SFLOAT,
  245. DATA_FORMAT_R64G64B64A64_UINT,
  246. DATA_FORMAT_R64G64B64A64_SINT,
  247. DATA_FORMAT_R64G64B64A64_SFLOAT,
  248. DATA_FORMAT_B10G11R11_UFLOAT_PACK32,
  249. DATA_FORMAT_E5B9G9R9_UFLOAT_PACK32,
  250. DATA_FORMAT_D16_UNORM,
  251. DATA_FORMAT_X8_D24_UNORM_PACK32,
  252. DATA_FORMAT_D32_SFLOAT,
  253. DATA_FORMAT_S8_UINT,
  254. DATA_FORMAT_D16_UNORM_S8_UINT,
  255. DATA_FORMAT_D24_UNORM_S8_UINT,
  256. DATA_FORMAT_D32_SFLOAT_S8_UINT,
  257. DATA_FORMAT_BC1_RGB_UNORM_BLOCK,
  258. DATA_FORMAT_BC1_RGB_SRGB_BLOCK,
  259. DATA_FORMAT_BC1_RGBA_UNORM_BLOCK,
  260. DATA_FORMAT_BC1_RGBA_SRGB_BLOCK,
  261. DATA_FORMAT_BC2_UNORM_BLOCK,
  262. DATA_FORMAT_BC2_SRGB_BLOCK,
  263. DATA_FORMAT_BC3_UNORM_BLOCK,
  264. DATA_FORMAT_BC3_SRGB_BLOCK,
  265. DATA_FORMAT_BC4_UNORM_BLOCK,
  266. DATA_FORMAT_BC4_SNORM_BLOCK,
  267. DATA_FORMAT_BC5_UNORM_BLOCK,
  268. DATA_FORMAT_BC5_SNORM_BLOCK,
  269. DATA_FORMAT_BC6H_UFLOAT_BLOCK,
  270. DATA_FORMAT_BC6H_SFLOAT_BLOCK,
  271. DATA_FORMAT_BC7_UNORM_BLOCK,
  272. DATA_FORMAT_BC7_SRGB_BLOCK,
  273. DATA_FORMAT_ETC2_R8G8B8_UNORM_BLOCK,
  274. DATA_FORMAT_ETC2_R8G8B8_SRGB_BLOCK,
  275. DATA_FORMAT_ETC2_R8G8B8A1_UNORM_BLOCK,
  276. DATA_FORMAT_ETC2_R8G8B8A1_SRGB_BLOCK,
  277. DATA_FORMAT_ETC2_R8G8B8A8_UNORM_BLOCK,
  278. DATA_FORMAT_ETC2_R8G8B8A8_SRGB_BLOCK,
  279. DATA_FORMAT_EAC_R11_UNORM_BLOCK,
  280. DATA_FORMAT_EAC_R11_SNORM_BLOCK,
  281. DATA_FORMAT_EAC_R11G11_UNORM_BLOCK,
  282. DATA_FORMAT_EAC_R11G11_SNORM_BLOCK,
  283. DATA_FORMAT_ASTC_4x4_UNORM_BLOCK,
  284. DATA_FORMAT_ASTC_4x4_SRGB_BLOCK,
  285. DATA_FORMAT_ASTC_5x4_UNORM_BLOCK,
  286. DATA_FORMAT_ASTC_5x4_SRGB_BLOCK,
  287. DATA_FORMAT_ASTC_5x5_UNORM_BLOCK,
  288. DATA_FORMAT_ASTC_5x5_SRGB_BLOCK,
  289. DATA_FORMAT_ASTC_6x5_UNORM_BLOCK,
  290. DATA_FORMAT_ASTC_6x5_SRGB_BLOCK,
  291. DATA_FORMAT_ASTC_6x6_UNORM_BLOCK,
  292. DATA_FORMAT_ASTC_6x6_SRGB_BLOCK,
  293. DATA_FORMAT_ASTC_8x5_UNORM_BLOCK,
  294. DATA_FORMAT_ASTC_8x5_SRGB_BLOCK,
  295. DATA_FORMAT_ASTC_8x6_UNORM_BLOCK,
  296. DATA_FORMAT_ASTC_8x6_SRGB_BLOCK,
  297. DATA_FORMAT_ASTC_8x8_UNORM_BLOCK,
  298. DATA_FORMAT_ASTC_8x8_SRGB_BLOCK,
  299. DATA_FORMAT_ASTC_10x5_UNORM_BLOCK,
  300. DATA_FORMAT_ASTC_10x5_SRGB_BLOCK,
  301. DATA_FORMAT_ASTC_10x6_UNORM_BLOCK,
  302. DATA_FORMAT_ASTC_10x6_SRGB_BLOCK,
  303. DATA_FORMAT_ASTC_10x8_UNORM_BLOCK,
  304. DATA_FORMAT_ASTC_10x8_SRGB_BLOCK,
  305. DATA_FORMAT_ASTC_10x10_UNORM_BLOCK,
  306. DATA_FORMAT_ASTC_10x10_SRGB_BLOCK,
  307. DATA_FORMAT_ASTC_12x10_UNORM_BLOCK,
  308. DATA_FORMAT_ASTC_12x10_SRGB_BLOCK,
  309. DATA_FORMAT_ASTC_12x12_UNORM_BLOCK,
  310. DATA_FORMAT_ASTC_12x12_SRGB_BLOCK,
  311. DATA_FORMAT_G8B8G8R8_422_UNORM,
  312. DATA_FORMAT_B8G8R8G8_422_UNORM,
  313. DATA_FORMAT_G8_B8_R8_3PLANE_420_UNORM,
  314. DATA_FORMAT_G8_B8R8_2PLANE_420_UNORM,
  315. DATA_FORMAT_G8_B8_R8_3PLANE_422_UNORM,
  316. DATA_FORMAT_G8_B8R8_2PLANE_422_UNORM,
  317. DATA_FORMAT_G8_B8_R8_3PLANE_444_UNORM,
  318. DATA_FORMAT_R10X6_UNORM_PACK16,
  319. DATA_FORMAT_R10X6G10X6_UNORM_2PACK16,
  320. DATA_FORMAT_R10X6G10X6B10X6A10X6_UNORM_4PACK16,
  321. DATA_FORMAT_G10X6B10X6G10X6R10X6_422_UNORM_4PACK16,
  322. DATA_FORMAT_B10X6G10X6R10X6G10X6_422_UNORM_4PACK16,
  323. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_420_UNORM_3PACK16,
  324. DATA_FORMAT_G10X6_B10X6R10X6_2PLANE_420_UNORM_3PACK16,
  325. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_422_UNORM_3PACK16,
  326. DATA_FORMAT_G10X6_B10X6R10X6_2PLANE_422_UNORM_3PACK16,
  327. DATA_FORMAT_G10X6_B10X6_R10X6_3PLANE_444_UNORM_3PACK16,
  328. DATA_FORMAT_R12X4_UNORM_PACK16,
  329. DATA_FORMAT_R12X4G12X4_UNORM_2PACK16,
  330. DATA_FORMAT_R12X4G12X4B12X4A12X4_UNORM_4PACK16,
  331. DATA_FORMAT_G12X4B12X4G12X4R12X4_422_UNORM_4PACK16,
  332. DATA_FORMAT_B12X4G12X4R12X4G12X4_422_UNORM_4PACK16,
  333. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_420_UNORM_3PACK16,
  334. DATA_FORMAT_G12X4_B12X4R12X4_2PLANE_420_UNORM_3PACK16,
  335. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_422_UNORM_3PACK16,
  336. DATA_FORMAT_G12X4_B12X4R12X4_2PLANE_422_UNORM_3PACK16,
  337. DATA_FORMAT_G12X4_B12X4_R12X4_3PLANE_444_UNORM_3PACK16,
  338. DATA_FORMAT_G16B16G16R16_422_UNORM,
  339. DATA_FORMAT_B16G16R16G16_422_UNORM,
  340. DATA_FORMAT_G16_B16_R16_3PLANE_420_UNORM,
  341. DATA_FORMAT_G16_B16R16_2PLANE_420_UNORM,
  342. DATA_FORMAT_G16_B16_R16_3PLANE_422_UNORM,
  343. DATA_FORMAT_G16_B16R16_2PLANE_422_UNORM,
  344. DATA_FORMAT_G16_B16_R16_3PLANE_444_UNORM,
  345. DATA_FORMAT_PVRTC1_2BPP_UNORM_BLOCK_IMG,
  346. DATA_FORMAT_PVRTC1_4BPP_UNORM_BLOCK_IMG,
  347. DATA_FORMAT_PVRTC2_2BPP_UNORM_BLOCK_IMG,
  348. DATA_FORMAT_PVRTC2_4BPP_UNORM_BLOCK_IMG,
  349. DATA_FORMAT_PVRTC1_2BPP_SRGB_BLOCK_IMG,
  350. DATA_FORMAT_PVRTC1_4BPP_SRGB_BLOCK_IMG,
  351. DATA_FORMAT_PVRTC2_2BPP_SRGB_BLOCK_IMG,
  352. DATA_FORMAT_PVRTC2_4BPP_SRGB_BLOCK_IMG,
  353. DATA_FORMAT_MAX
  354. };
  355. /*****************/
  356. /**** BARRIER ****/
  357. /*****************/
  358. enum BarrierMask {
  359. BARRIER_MASK_RASTER = 1,
  360. BARRIER_MASK_COMPUTE = 2,
  361. BARRIER_MASK_TRANSFER = 4,
  362. BARRIER_MASK_NO_BARRIER = 8,
  363. BARRIER_MASK_ALL = BARRIER_MASK_RASTER | BARRIER_MASK_COMPUTE | BARRIER_MASK_TRANSFER
  364. };
  365. /*****************/
  366. /**** TEXTURE ****/
  367. /*****************/
  368. enum TextureType {
  369. TEXTURE_TYPE_1D,
  370. TEXTURE_TYPE_2D,
  371. TEXTURE_TYPE_3D,
  372. TEXTURE_TYPE_CUBE,
  373. TEXTURE_TYPE_1D_ARRAY,
  374. TEXTURE_TYPE_2D_ARRAY,
  375. TEXTURE_TYPE_CUBE_ARRAY,
  376. TEXTURE_TYPE_MAX
  377. };
  378. enum TextureSamples {
  379. TEXTURE_SAMPLES_1,
  380. TEXTURE_SAMPLES_2,
  381. TEXTURE_SAMPLES_4,
  382. TEXTURE_SAMPLES_8,
  383. TEXTURE_SAMPLES_16,
  384. TEXTURE_SAMPLES_32,
  385. TEXTURE_SAMPLES_64,
  386. TEXTURE_SAMPLES_MAX
  387. };
  388. enum TextureUsageBits {
  389. TEXTURE_USAGE_SAMPLING_BIT = (1 << 0),
  390. TEXTURE_USAGE_COLOR_ATTACHMENT_BIT = (1 << 1),
  391. TEXTURE_USAGE_DEPTH_STENCIL_ATTACHMENT_BIT = (1 << 2),
  392. TEXTURE_USAGE_STORAGE_BIT = (1 << 3),
  393. TEXTURE_USAGE_STORAGE_ATOMIC_BIT = (1 << 4),
  394. TEXTURE_USAGE_CPU_READ_BIT = (1 << 5),
  395. TEXTURE_USAGE_CAN_UPDATE_BIT = (1 << 6),
  396. TEXTURE_USAGE_CAN_COPY_FROM_BIT = (1 << 7),
  397. TEXTURE_USAGE_CAN_COPY_TO_BIT = (1 << 8),
  398. TEXTURE_USAGE_RESOLVE_ATTACHMENT_BIT = (1 << 9),
  399. };
  400. enum TextureSwizzle {
  401. TEXTURE_SWIZZLE_IDENTITY,
  402. TEXTURE_SWIZZLE_ZERO,
  403. TEXTURE_SWIZZLE_ONE,
  404. TEXTURE_SWIZZLE_R,
  405. TEXTURE_SWIZZLE_G,
  406. TEXTURE_SWIZZLE_B,
  407. TEXTURE_SWIZZLE_A,
  408. TEXTURE_SWIZZLE_MAX
  409. };
  410. struct TextureFormat {
  411. DataFormat format;
  412. uint32_t width;
  413. uint32_t height;
  414. uint32_t depth;
  415. uint32_t array_layers;
  416. uint32_t mipmaps;
  417. TextureType texture_type;
  418. TextureSamples samples;
  419. uint32_t usage_bits;
  420. Vector<DataFormat> shareable_formats;
  421. TextureFormat() {
  422. format = DATA_FORMAT_R8_UNORM;
  423. width = 1;
  424. height = 1;
  425. depth = 1;
  426. array_layers = 1;
  427. mipmaps = 1;
  428. texture_type = TEXTURE_TYPE_2D;
  429. samples = TEXTURE_SAMPLES_1;
  430. usage_bits = 0;
  431. }
  432. };
  433. struct TextureView {
  434. DataFormat format_override;
  435. TextureSwizzle swizzle_r;
  436. TextureSwizzle swizzle_g;
  437. TextureSwizzle swizzle_b;
  438. TextureSwizzle swizzle_a;
  439. TextureView() {
  440. format_override = DATA_FORMAT_MAX; //means, use same as format
  441. swizzle_r = TEXTURE_SWIZZLE_R;
  442. swizzle_g = TEXTURE_SWIZZLE_G;
  443. swizzle_b = TEXTURE_SWIZZLE_B;
  444. swizzle_a = TEXTURE_SWIZZLE_A;
  445. }
  446. };
  447. virtual RID texture_create(const TextureFormat &p_format, const TextureView &p_view, const Vector<Vector<uint8_t>> &p_data = Vector<Vector<uint8_t>>()) = 0;
  448. virtual RID texture_create_shared(const TextureView &p_view, RID p_with_texture) = 0;
  449. enum TextureSliceType {
  450. TEXTURE_SLICE_2D,
  451. TEXTURE_SLICE_CUBEMAP,
  452. TEXTURE_SLICE_3D,
  453. TEXTURE_SLICE_2D_ARRAY,
  454. };
  455. virtual RID texture_create_shared_from_slice(const TextureView &p_view, RID p_with_texture, uint32_t p_layer, uint32_t p_mipmap, TextureSliceType p_slice_type = TEXTURE_SLICE_2D) = 0;
  456. virtual Error texture_update(RID p_texture, uint32_t p_layer, const Vector<uint8_t> &p_data, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  457. virtual Vector<uint8_t> texture_get_data(RID p_texture, uint32_t p_layer) = 0; // CPU textures will return immediately, while GPU textures will most likely force a flush
  458. virtual bool texture_is_format_supported_for_usage(DataFormat p_format, uint32_t p_usage) const = 0;
  459. virtual bool texture_is_shared(RID p_texture) = 0;
  460. virtual bool texture_is_valid(RID p_texture) = 0;
  461. virtual Error texture_copy(RID p_from_texture, RID p_to_texture, const Vector3 &p_from, const Vector3 &p_to, const Vector3 &p_size, uint32_t p_src_mipmap, uint32_t p_dst_mipmap, uint32_t p_src_layer, uint32_t p_dst_layer, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  462. virtual Error texture_clear(RID p_texture, const Color &p_color, uint32_t p_base_mipmap, uint32_t p_mipmaps, uint32_t p_base_layer, uint32_t p_layers, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  463. virtual Error texture_resolve_multisample(RID p_from_texture, RID p_to_texture, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  464. /*********************/
  465. /**** FRAMEBUFFER ****/
  466. /*********************/
  467. struct AttachmentFormat {
  468. DataFormat format;
  469. TextureSamples samples;
  470. uint32_t usage_flags;
  471. AttachmentFormat() {
  472. format = DATA_FORMAT_R8G8B8A8_UNORM;
  473. samples = TEXTURE_SAMPLES_1;
  474. usage_flags = 0;
  475. }
  476. };
  477. typedef int64_t FramebufferFormatID;
  478. // This ID is warranted to be unique for the same formats, does not need to be freed
  479. virtual FramebufferFormatID framebuffer_format_create(const Vector<AttachmentFormat> &p_format, uint32_t p_view_count = 1) = 0;
  480. virtual FramebufferFormatID framebuffer_format_create_empty(TextureSamples p_samples = TEXTURE_SAMPLES_1) = 0;
  481. virtual TextureSamples framebuffer_format_get_texture_samples(FramebufferFormatID p_format) = 0;
  482. virtual RID framebuffer_create(const Vector<RID> &p_texture_attachments, FramebufferFormatID p_format_check = INVALID_ID, uint32_t p_view_count = 1) = 0;
  483. virtual RID framebuffer_create_empty(const Size2i &p_size, TextureSamples p_samples = TEXTURE_SAMPLES_1, FramebufferFormatID p_format_check = INVALID_ID) = 0;
  484. virtual FramebufferFormatID framebuffer_get_format(RID p_framebuffer) = 0;
  485. /*****************/
  486. /**** SAMPLER ****/
  487. /*****************/
  488. enum SamplerFilter {
  489. SAMPLER_FILTER_NEAREST,
  490. SAMPLER_FILTER_LINEAR,
  491. };
  492. enum SamplerRepeatMode {
  493. SAMPLER_REPEAT_MODE_REPEAT,
  494. SAMPLER_REPEAT_MODE_MIRRORED_REPEAT,
  495. SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE,
  496. SAMPLER_REPEAT_MODE_CLAMP_TO_BORDER,
  497. SAMPLER_REPEAT_MODE_MIRROR_CLAMP_TO_EDGE,
  498. SAMPLER_REPEAT_MODE_MAX
  499. };
  500. enum SamplerBorderColor {
  501. SAMPLER_BORDER_COLOR_FLOAT_TRANSPARENT_BLACK,
  502. SAMPLER_BORDER_COLOR_INT_TRANSPARENT_BLACK,
  503. SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_BLACK,
  504. SAMPLER_BORDER_COLOR_INT_OPAQUE_BLACK,
  505. SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_WHITE,
  506. SAMPLER_BORDER_COLOR_INT_OPAQUE_WHITE,
  507. SAMPLER_BORDER_COLOR_MAX
  508. };
  509. struct SamplerState {
  510. SamplerFilter mag_filter;
  511. SamplerFilter min_filter;
  512. SamplerFilter mip_filter;
  513. SamplerRepeatMode repeat_u;
  514. SamplerRepeatMode repeat_v;
  515. SamplerRepeatMode repeat_w;
  516. float lod_bias;
  517. bool use_anisotropy;
  518. float anisotropy_max;
  519. bool enable_compare;
  520. CompareOperator compare_op;
  521. float min_lod;
  522. float max_lod;
  523. SamplerBorderColor border_color;
  524. bool unnormalized_uvw;
  525. SamplerState() {
  526. mag_filter = SAMPLER_FILTER_NEAREST;
  527. min_filter = SAMPLER_FILTER_NEAREST;
  528. mip_filter = SAMPLER_FILTER_NEAREST;
  529. repeat_u = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  530. repeat_v = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  531. repeat_w = SAMPLER_REPEAT_MODE_CLAMP_TO_EDGE;
  532. lod_bias = 0;
  533. use_anisotropy = false;
  534. anisotropy_max = 1.0;
  535. enable_compare = false;
  536. compare_op = COMPARE_OP_ALWAYS;
  537. min_lod = 0;
  538. max_lod = 1e20; //something very large should do
  539. border_color = SAMPLER_BORDER_COLOR_FLOAT_OPAQUE_BLACK;
  540. unnormalized_uvw = false;
  541. }
  542. };
  543. virtual RID sampler_create(const SamplerState &p_state) = 0;
  544. /**********************/
  545. /**** VERTEX ARRAY ****/
  546. /**********************/
  547. enum VertexFrequency {
  548. VERTEX_FREQUENCY_VERTEX,
  549. VERTEX_FREQUENCY_INSTANCE,
  550. };
  551. struct VertexAttribute {
  552. uint32_t location; //shader location
  553. uint32_t offset;
  554. DataFormat format;
  555. uint32_t stride;
  556. VertexFrequency frequency;
  557. VertexAttribute() {
  558. location = 0;
  559. offset = 0;
  560. stride = 0;
  561. format = DATA_FORMAT_MAX;
  562. frequency = VERTEX_FREQUENCY_VERTEX;
  563. }
  564. };
  565. virtual RID vertex_buffer_create(uint32_t p_size_bytes, const Vector<uint8_t> &p_data = Vector<uint8_t>(), bool p_use_as_storage = false) = 0;
  566. typedef int64_t VertexFormatID;
  567. // This ID is warranted to be unique for the same formats, does not need to be freed
  568. virtual VertexFormatID vertex_format_create(const Vector<VertexAttribute> &p_vertex_formats) = 0;
  569. virtual RID vertex_array_create(uint32_t p_vertex_count, VertexFormatID p_vertex_format, const Vector<RID> &p_src_buffers) = 0;
  570. enum IndexBufferFormat {
  571. INDEX_BUFFER_FORMAT_UINT16,
  572. INDEX_BUFFER_FORMAT_UINT32,
  573. };
  574. virtual RID index_buffer_create(uint32_t p_size_indices, IndexBufferFormat p_format, const Vector<uint8_t> &p_data = Vector<uint8_t>(), bool p_use_restart_indices = false) = 0;
  575. virtual RID index_array_create(RID p_index_buffer, uint32_t p_index_offset, uint32_t p_index_count) = 0;
  576. /****************/
  577. /**** SHADER ****/
  578. /****************/
  579. const Capabilities *get_device_capabilities() const { return &device_capabilities; };
  580. virtual Vector<uint8_t> shader_compile_from_source(ShaderStage p_stage, const String &p_source_code, ShaderLanguage p_language = SHADER_LANGUAGE_GLSL, String *r_error = nullptr, bool p_allow_cache = true);
  581. virtual String shader_get_cache_key() const;
  582. static void shader_set_compile_function(ShaderCompileFunction p_function);
  583. static void shader_set_cache_function(ShaderCacheFunction p_function);
  584. static void shader_set_get_cache_key_function(ShaderGetCacheKeyFunction p_function);
  585. struct ShaderStageData {
  586. ShaderStage shader_stage;
  587. Vector<uint8_t> spir_v;
  588. ShaderStageData() {
  589. shader_stage = SHADER_STAGE_VERTEX;
  590. }
  591. };
  592. RID shader_create_from_bytecode(const Ref<RDShaderBytecode> &p_bytecode);
  593. virtual RID shader_create(const Vector<ShaderStageData> &p_stages) = 0;
  594. virtual uint32_t shader_get_vertex_input_attribute_mask(RID p_shader) = 0;
  595. /******************/
  596. /**** UNIFORMS ****/
  597. /******************/
  598. enum UniformType {
  599. UNIFORM_TYPE_SAMPLER, //for sampling only (sampler GLSL type)
  600. UNIFORM_TYPE_SAMPLER_WITH_TEXTURE, // for sampling only, but includes a texture, (samplerXX GLSL type), first a sampler then a texture
  601. UNIFORM_TYPE_TEXTURE, //only texture, (textureXX GLSL type)
  602. UNIFORM_TYPE_IMAGE, // storage image (imageXX GLSL type), for compute mostly
  603. UNIFORM_TYPE_TEXTURE_BUFFER, // buffer texture (or TBO, textureBuffer type)
  604. UNIFORM_TYPE_SAMPLER_WITH_TEXTURE_BUFFER, // buffer texture with a sampler(or TBO, samplerBuffer type)
  605. UNIFORM_TYPE_IMAGE_BUFFER, //texel buffer, (imageBuffer type), for compute mostly
  606. UNIFORM_TYPE_UNIFORM_BUFFER, //regular uniform buffer (or UBO).
  607. UNIFORM_TYPE_STORAGE_BUFFER, //storage buffer ("buffer" qualifier) like UBO, but supports storage, for compute mostly
  608. UNIFORM_TYPE_INPUT_ATTACHMENT, //used for sub-pass read/write, for mobile mostly
  609. UNIFORM_TYPE_MAX
  610. };
  611. enum StorageBufferUsage {
  612. STORAGE_BUFFER_USAGE_DISPATCH_INDIRECT = 1
  613. };
  614. virtual RID uniform_buffer_create(uint32_t p_size_bytes, const Vector<uint8_t> &p_data = Vector<uint8_t>()) = 0;
  615. virtual RID storage_buffer_create(uint32_t p_size, const Vector<uint8_t> &p_data = Vector<uint8_t>(), uint32_t p_usage = 0) = 0;
  616. virtual RID texture_buffer_create(uint32_t p_size_elements, DataFormat p_format, const Vector<uint8_t> &p_data = Vector<uint8_t>()) = 0;
  617. struct Uniform {
  618. UniformType uniform_type;
  619. int binding; //binding index as specified in shader
  620. //for single items, provide one ID, for
  621. //multiple items (declared as arrays in shader),
  622. //provide more
  623. //for sampler with texture, supply two IDs for each.
  624. //accepted IDs are: Sampler, Texture, Uniform Buffer and Texture Buffer
  625. Vector<RID> ids;
  626. Uniform() {
  627. uniform_type = UNIFORM_TYPE_IMAGE;
  628. binding = 0;
  629. }
  630. };
  631. virtual RID uniform_set_create(const Vector<Uniform> &p_uniforms, RID p_shader, uint32_t p_shader_set) = 0;
  632. virtual bool uniform_set_is_valid(RID p_uniform_set) = 0;
  633. virtual Error buffer_update(RID p_buffer, uint32_t p_offset, uint32_t p_size, const void *p_data, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  634. virtual Error buffer_clear(RID p_buffer, uint32_t p_offset, uint32_t p_size, uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  635. virtual Vector<uint8_t> buffer_get_data(RID p_buffer) = 0; //this causes stall, only use to retrieve large buffers for saving
  636. /*************************/
  637. /**** RENDER PIPELINE ****/
  638. /*************************/
  639. enum RenderPrimitive {
  640. RENDER_PRIMITIVE_POINTS,
  641. RENDER_PRIMITIVE_LINES,
  642. RENDER_PRIMITIVE_LINES_WITH_ADJACENCY,
  643. RENDER_PRIMITIVE_LINESTRIPS,
  644. RENDER_PRIMITIVE_LINESTRIPS_WITH_ADJACENCY,
  645. RENDER_PRIMITIVE_TRIANGLES,
  646. RENDER_PRIMITIVE_TRIANGLES_WITH_ADJACENCY,
  647. RENDER_PRIMITIVE_TRIANGLE_STRIPS,
  648. RENDER_PRIMITIVE_TRIANGLE_STRIPS_WITH_AJACENCY,
  649. RENDER_PRIMITIVE_TRIANGLE_STRIPS_WITH_RESTART_INDEX,
  650. RENDER_PRIMITIVE_TESSELATION_PATCH,
  651. RENDER_PRIMITIVE_MAX
  652. };
  653. //disable optimization, tessellate control points
  654. enum PolygonCullMode {
  655. POLYGON_CULL_DISABLED,
  656. POLYGON_CULL_FRONT,
  657. POLYGON_CULL_BACK,
  658. };
  659. enum PolygonFrontFace {
  660. POLYGON_FRONT_FACE_CLOCKWISE,
  661. POLYGON_FRONT_FACE_COUNTER_CLOCKWISE,
  662. };
  663. enum StencilOperation {
  664. STENCIL_OP_KEEP,
  665. STENCIL_OP_ZERO,
  666. STENCIL_OP_REPLACE,
  667. STENCIL_OP_INCREMENT_AND_CLAMP,
  668. STENCIL_OP_DECREMENT_AND_CLAMP,
  669. STENCIL_OP_INVERT,
  670. STENCIL_OP_INCREMENT_AND_WRAP,
  671. STENCIL_OP_DECREMENT_AND_WRAP,
  672. STENCIL_OP_MAX //not an actual operator, just the amount of operators :D
  673. };
  674. enum LogicOperation {
  675. LOGIC_OP_CLEAR,
  676. LOGIC_OP_AND,
  677. LOGIC_OP_AND_REVERSE,
  678. LOGIC_OP_COPY,
  679. LOGIC_OP_AND_INVERTED,
  680. LOGIC_OP_NO_OP,
  681. LOGIC_OP_XOR,
  682. LOGIC_OP_OR,
  683. LOGIC_OP_NOR,
  684. LOGIC_OP_EQUIVALENT,
  685. LOGIC_OP_INVERT,
  686. LOGIC_OP_OR_REVERSE,
  687. LOGIC_OP_COPY_INVERTED,
  688. LOGIC_OP_OR_INVERTED,
  689. LOGIC_OP_NAND,
  690. LOGIC_OP_SET,
  691. LOGIC_OP_MAX //not an actual operator, just the amount of operators :D
  692. };
  693. enum BlendFactor {
  694. BLEND_FACTOR_ZERO,
  695. BLEND_FACTOR_ONE,
  696. BLEND_FACTOR_SRC_COLOR,
  697. BLEND_FACTOR_ONE_MINUS_SRC_COLOR,
  698. BLEND_FACTOR_DST_COLOR,
  699. BLEND_FACTOR_ONE_MINUS_DST_COLOR,
  700. BLEND_FACTOR_SRC_ALPHA,
  701. BLEND_FACTOR_ONE_MINUS_SRC_ALPHA,
  702. BLEND_FACTOR_DST_ALPHA,
  703. BLEND_FACTOR_ONE_MINUS_DST_ALPHA,
  704. BLEND_FACTOR_CONSTANT_COLOR,
  705. BLEND_FACTOR_ONE_MINUS_CONSTANT_COLOR,
  706. BLEND_FACTOR_CONSTANT_ALPHA,
  707. BLEND_FACTOR_ONE_MINUS_CONSTANT_ALPHA,
  708. BLEND_FACTOR_SRC_ALPHA_SATURATE,
  709. BLEND_FACTOR_SRC1_COLOR,
  710. BLEND_FACTOR_ONE_MINUS_SRC1_COLOR,
  711. BLEND_FACTOR_SRC1_ALPHA,
  712. BLEND_FACTOR_ONE_MINUS_SRC1_ALPHA,
  713. BLEND_FACTOR_MAX
  714. };
  715. enum BlendOperation {
  716. BLEND_OP_ADD,
  717. BLEND_OP_SUBTRACT,
  718. BLEND_OP_REVERSE_SUBTRACT,
  719. BLEND_OP_MINIMUM,
  720. BLEND_OP_MAXIMUM, //yes this one is an actual operator
  721. BLEND_OP_MAX //not an actual operator, just the amount of operators :D
  722. };
  723. struct PipelineRasterizationState {
  724. bool enable_depth_clamp;
  725. bool discard_primitives;
  726. bool wireframe;
  727. PolygonCullMode cull_mode;
  728. PolygonFrontFace front_face;
  729. bool depth_bias_enable;
  730. float depth_bias_constant_factor;
  731. float depth_bias_clamp;
  732. float depth_bias_slope_factor;
  733. float line_width;
  734. uint32_t patch_control_points;
  735. PipelineRasterizationState() {
  736. enable_depth_clamp = false;
  737. discard_primitives = false;
  738. wireframe = false;
  739. cull_mode = POLYGON_CULL_DISABLED;
  740. front_face = POLYGON_FRONT_FACE_CLOCKWISE;
  741. depth_bias_enable = false;
  742. depth_bias_constant_factor = 0;
  743. depth_bias_clamp = 0;
  744. depth_bias_slope_factor = 0;
  745. line_width = 1.0;
  746. patch_control_points = 1;
  747. }
  748. };
  749. struct PipelineMultisampleState {
  750. TextureSamples sample_count;
  751. bool enable_sample_shading;
  752. float min_sample_shading;
  753. Vector<uint32_t> sample_mask;
  754. bool enable_alpha_to_coverage;
  755. bool enable_alpha_to_one;
  756. PipelineMultisampleState() {
  757. sample_count = TEXTURE_SAMPLES_1;
  758. enable_sample_shading = false;
  759. min_sample_shading = 0;
  760. enable_alpha_to_coverage = false;
  761. enable_alpha_to_one = false;
  762. }
  763. };
  764. struct PipelineDepthStencilState {
  765. bool enable_depth_test;
  766. bool enable_depth_write;
  767. CompareOperator depth_compare_operator;
  768. bool enable_depth_range;
  769. float depth_range_min;
  770. float depth_range_max;
  771. bool enable_stencil;
  772. struct StencilOperationState {
  773. StencilOperation fail;
  774. StencilOperation pass;
  775. StencilOperation depth_fail;
  776. CompareOperator compare;
  777. uint32_t compare_mask;
  778. uint32_t write_mask;
  779. uint32_t reference;
  780. StencilOperationState() {
  781. fail = STENCIL_OP_ZERO;
  782. pass = STENCIL_OP_ZERO;
  783. depth_fail = STENCIL_OP_ZERO;
  784. compare = COMPARE_OP_ALWAYS;
  785. compare_mask = 0;
  786. write_mask = 0;
  787. reference = 0;
  788. }
  789. };
  790. StencilOperationState front_op;
  791. StencilOperationState back_op;
  792. PipelineDepthStencilState() {
  793. enable_depth_test = false;
  794. enable_depth_write = false;
  795. depth_compare_operator = COMPARE_OP_ALWAYS;
  796. enable_depth_range = false;
  797. depth_range_min = 0;
  798. depth_range_max = 0;
  799. enable_stencil = false;
  800. }
  801. };
  802. struct PipelineColorBlendState {
  803. bool enable_logic_op;
  804. LogicOperation logic_op;
  805. struct Attachment {
  806. bool enable_blend;
  807. BlendFactor src_color_blend_factor;
  808. BlendFactor dst_color_blend_factor;
  809. BlendOperation color_blend_op;
  810. BlendFactor src_alpha_blend_factor;
  811. BlendFactor dst_alpha_blend_factor;
  812. BlendOperation alpha_blend_op;
  813. bool write_r;
  814. bool write_g;
  815. bool write_b;
  816. bool write_a;
  817. Attachment() {
  818. enable_blend = false;
  819. src_color_blend_factor = BLEND_FACTOR_ZERO;
  820. dst_color_blend_factor = BLEND_FACTOR_ZERO;
  821. color_blend_op = BLEND_OP_ADD;
  822. src_alpha_blend_factor = BLEND_FACTOR_ZERO;
  823. dst_alpha_blend_factor = BLEND_FACTOR_ZERO;
  824. alpha_blend_op = BLEND_OP_ADD;
  825. write_r = true;
  826. write_g = true;
  827. write_b = true;
  828. write_a = true;
  829. }
  830. };
  831. static PipelineColorBlendState create_disabled(int p_attachments = 1) {
  832. PipelineColorBlendState bs;
  833. for (int i = 0; i < p_attachments; i++) {
  834. bs.attachments.push_back(Attachment());
  835. }
  836. return bs;
  837. }
  838. static PipelineColorBlendState create_blend(int p_attachments = 1) {
  839. PipelineColorBlendState bs;
  840. for (int i = 0; i < p_attachments; i++) {
  841. Attachment ba;
  842. ba.enable_blend = true;
  843. ba.src_color_blend_factor = BLEND_FACTOR_SRC_ALPHA;
  844. ba.dst_color_blend_factor = BLEND_FACTOR_ONE_MINUS_SRC_ALPHA;
  845. ba.src_alpha_blend_factor = BLEND_FACTOR_SRC_ALPHA;
  846. ba.dst_alpha_blend_factor = BLEND_FACTOR_ONE_MINUS_SRC_ALPHA;
  847. bs.attachments.push_back(ba);
  848. }
  849. return bs;
  850. }
  851. Vector<Attachment> attachments; //one per render target texture
  852. Color blend_constant;
  853. PipelineColorBlendState() {
  854. enable_logic_op = false;
  855. logic_op = LOGIC_OP_CLEAR;
  856. }
  857. };
  858. enum PipelineDynamicStateFlags {
  859. DYNAMIC_STATE_LINE_WIDTH = (1 << 0),
  860. DYNAMIC_STATE_DEPTH_BIAS = (1 << 1),
  861. DYNAMIC_STATE_BLEND_CONSTANTS = (1 << 2),
  862. DYNAMIC_STATE_DEPTH_BOUNDS = (1 << 3),
  863. DYNAMIC_STATE_STENCIL_COMPARE_MASK = (1 << 4),
  864. DYNAMIC_STATE_STENCIL_WRITE_MASK = (1 << 5),
  865. DYNAMIC_STATE_STENCIL_REFERENCE = (1 << 6),
  866. };
  867. virtual bool render_pipeline_is_valid(RID p_pipeline) = 0;
  868. virtual RID render_pipeline_create(RID p_shader, FramebufferFormatID p_framebuffer_format, VertexFormatID p_vertex_format, RenderPrimitive p_render_primitive, const PipelineRasterizationState &p_rasterization_state, const PipelineMultisampleState &p_multisample_state, const PipelineDepthStencilState &p_depth_stencil_state, const PipelineColorBlendState &p_blend_state, int p_dynamic_state_flags = 0) = 0;
  869. /**************************/
  870. /**** COMPUTE PIPELINE ****/
  871. /**************************/
  872. virtual RID compute_pipeline_create(RID p_shader) = 0;
  873. virtual bool compute_pipeline_is_valid(RID p_pipeline) = 0;
  874. /****************/
  875. /**** SCREEN ****/
  876. /****************/
  877. virtual int screen_get_width(DisplayServer::WindowID p_screen = 0) const = 0;
  878. virtual int screen_get_height(DisplayServer::WindowID p_screen = 0) const = 0;
  879. virtual FramebufferFormatID screen_get_framebuffer_format() const = 0;
  880. /********************/
  881. /**** DRAW LISTS ****/
  882. /********************/
  883. enum InitialAction {
  884. INITIAL_ACTION_CLEAR, //start rendering and clear the whole framebuffer (region or not) (supply params)
  885. INITIAL_ACTION_CLEAR_REGION, //start rendering and clear the framebuffer in the specified region (supply params)
  886. INITIAL_ACTION_CLEAR_REGION_CONTINUE, //continue rendering and clear the framebuffer in the specified region (supply params)
  887. INITIAL_ACTION_KEEP, //start rendering, but keep attached color texture contents (depth will be cleared)
  888. INITIAL_ACTION_DROP, //start rendering, ignore what is there, just write above it
  889. INITIAL_ACTION_CONTINUE, //continue rendering (framebuffer must have been left in "continue" state as final action previously)
  890. INITIAL_ACTION_MAX
  891. };
  892. enum FinalAction {
  893. FINAL_ACTION_READ, //will no longer render to it, allows attached textures to be read again, but depth buffer contents will be dropped (Can't be read from)
  894. FINAL_ACTION_DISCARD, // discard contents after rendering
  895. FINAL_ACTION_CONTINUE, //will continue rendering later, attached textures can't be read until re-bound with "finish"
  896. FINAL_ACTION_MAX
  897. };
  898. typedef int64_t DrawListID;
  899. virtual DrawListID draw_list_begin_for_screen(DisplayServer::WindowID p_screen = 0, const Color &p_clear_color = Color()) = 0;
  900. virtual DrawListID draw_list_begin(RID p_framebuffer, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const Vector<RID> &p_storage_textures = Vector<RID>()) = 0;
  901. virtual Error draw_list_begin_split(RID p_framebuffer, uint32_t p_splits, DrawListID *r_split_ids, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const Vector<RID> &p_storage_textures = Vector<RID>()) = 0;
  902. virtual void draw_list_bind_render_pipeline(DrawListID p_list, RID p_render_pipeline) = 0;
  903. virtual void draw_list_bind_uniform_set(DrawListID p_list, RID p_uniform_set, uint32_t p_index) = 0;
  904. virtual void draw_list_bind_vertex_array(DrawListID p_list, RID p_vertex_array) = 0;
  905. virtual void draw_list_bind_index_array(DrawListID p_list, RID p_index_array) = 0;
  906. virtual void draw_list_set_line_width(DrawListID p_list, float p_width) = 0;
  907. virtual void draw_list_set_push_constant(DrawListID p_list, const void *p_data, uint32_t p_data_size) = 0;
  908. virtual void draw_list_draw(DrawListID p_list, bool p_use_indices, uint32_t p_instances = 1, uint32_t p_procedural_vertices = 0) = 0;
  909. virtual void draw_list_enable_scissor(DrawListID p_list, const Rect2 &p_rect) = 0;
  910. virtual void draw_list_disable_scissor(DrawListID p_list) = 0;
  911. virtual void draw_list_end(uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  912. /***********************/
  913. /**** COMPUTE LISTS ****/
  914. /***********************/
  915. typedef int64_t ComputeListID;
  916. virtual ComputeListID compute_list_begin(bool p_allow_draw_overlap = false) = 0;
  917. virtual void compute_list_bind_compute_pipeline(ComputeListID p_list, RID p_compute_pipeline) = 0;
  918. virtual void compute_list_bind_uniform_set(ComputeListID p_list, RID p_uniform_set, uint32_t p_index) = 0;
  919. virtual void compute_list_set_push_constant(ComputeListID p_list, const void *p_data, uint32_t p_data_size) = 0;
  920. virtual void compute_list_dispatch(ComputeListID p_list, uint32_t p_x_groups, uint32_t p_y_groups, uint32_t p_z_groups) = 0;
  921. virtual void compute_list_dispatch_threads(ComputeListID p_list, uint32_t p_x_threads, uint32_t p_y_threads, uint32_t p_z_threads) = 0;
  922. virtual void compute_list_dispatch_indirect(ComputeListID p_list, RID p_buffer, uint32_t p_offset) = 0;
  923. virtual void compute_list_add_barrier(ComputeListID p_list) = 0;
  924. virtual void compute_list_end(uint32_t p_post_barrier = BARRIER_MASK_ALL) = 0;
  925. virtual void barrier(uint32_t p_from = BARRIER_MASK_ALL, uint32_t p_to = BARRIER_MASK_ALL) = 0;
  926. virtual void full_barrier() = 0;
  927. /***************/
  928. /**** FREE! ****/
  929. /***************/
  930. virtual void free(RID p_id) = 0;
  931. /****************/
  932. /**** Timing ****/
  933. /****************/
  934. virtual void capture_timestamp(const String &p_name) = 0;
  935. virtual uint32_t get_captured_timestamps_count() const = 0;
  936. virtual uint64_t get_captured_timestamps_frame() const = 0;
  937. virtual uint64_t get_captured_timestamp_gpu_time(uint32_t p_index) const = 0;
  938. virtual uint64_t get_captured_timestamp_cpu_time(uint32_t p_index) const = 0;
  939. virtual String get_captured_timestamp_name(uint32_t p_index) const = 0;
  940. /****************/
  941. /**** LIMITS ****/
  942. /****************/
  943. enum Limit {
  944. LIMIT_MAX_BOUND_UNIFORM_SETS,
  945. LIMIT_MAX_FRAMEBUFFER_COLOR_ATTACHMENTS,
  946. LIMIT_MAX_TEXTURES_PER_UNIFORM_SET,
  947. LIMIT_MAX_SAMPLERS_PER_UNIFORM_SET,
  948. LIMIT_MAX_STORAGE_BUFFERS_PER_UNIFORM_SET,
  949. LIMIT_MAX_STORAGE_IMAGES_PER_UNIFORM_SET,
  950. LIMIT_MAX_UNIFORM_BUFFERS_PER_UNIFORM_SET,
  951. LIMIT_MAX_DRAW_INDEXED_INDEX,
  952. LIMIT_MAX_FRAMEBUFFER_HEIGHT,
  953. LIMIT_MAX_FRAMEBUFFER_WIDTH,
  954. LIMIT_MAX_TEXTURE_ARRAY_LAYERS,
  955. LIMIT_MAX_TEXTURE_SIZE_1D,
  956. LIMIT_MAX_TEXTURE_SIZE_2D,
  957. LIMIT_MAX_TEXTURE_SIZE_3D,
  958. LIMIT_MAX_TEXTURE_SIZE_CUBE,
  959. LIMIT_MAX_TEXTURES_PER_SHADER_STAGE,
  960. LIMIT_MAX_SAMPLERS_PER_SHADER_STAGE,
  961. LIMIT_MAX_STORAGE_BUFFERS_PER_SHADER_STAGE,
  962. LIMIT_MAX_STORAGE_IMAGES_PER_SHADER_STAGE,
  963. LIMIT_MAX_UNIFORM_BUFFERS_PER_SHADER_STAGE,
  964. LIMIT_MAX_PUSH_CONSTANT_SIZE,
  965. LIMIT_MAX_UNIFORM_BUFFER_SIZE,
  966. LIMIT_MAX_VERTEX_INPUT_ATTRIBUTE_OFFSET,
  967. LIMIT_MAX_VERTEX_INPUT_ATTRIBUTES,
  968. LIMIT_MAX_VERTEX_INPUT_BINDINGS,
  969. LIMIT_MAX_VERTEX_INPUT_BINDING_STRIDE,
  970. LIMIT_MIN_UNIFORM_BUFFER_OFFSET_ALIGNMENT,
  971. LIMIT_MAX_COMPUTE_SHARED_MEMORY_SIZE,
  972. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_X,
  973. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_Y,
  974. LIMIT_MAX_COMPUTE_WORKGROUP_COUNT_Z,
  975. LIMIT_MAX_COMPUTE_WORKGROUP_INVOCATIONS,
  976. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_X,
  977. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_Y,
  978. LIMIT_MAX_COMPUTE_WORKGROUP_SIZE_Z,
  979. };
  980. virtual int limit_get(Limit p_limit) = 0;
  981. //methods below not exposed, used by RenderingDeviceRD
  982. virtual void prepare_screen_for_drawing() = 0;
  983. virtual void swap_buffers() = 0;
  984. virtual uint32_t get_frame_delay() const = 0;
  985. virtual void submit() = 0;
  986. virtual void sync() = 0;
  987. virtual uint64_t get_memory_usage() const = 0;
  988. virtual RenderingDevice *create_local_device() = 0;
  989. virtual void set_resource_name(RID p_id, const String p_name) = 0;
  990. virtual void draw_command_begin_label(String p_label_name, const Color p_color = Color(1, 1, 1, 1)) = 0;
  991. virtual void draw_command_insert_label(String p_label_name, const Color p_color = Color(1, 1, 1, 1)) = 0;
  992. virtual void draw_command_end_label() = 0;
  993. virtual String get_device_vendor_name() const = 0;
  994. virtual String get_device_name() const = 0;
  995. virtual String get_device_pipeline_cache_uuid() const = 0;
  996. static RenderingDevice *get_singleton();
  997. RenderingDevice();
  998. protected:
  999. //binders to script API
  1000. RID _texture_create(const Ref<RDTextureFormat> &p_format, const Ref<RDTextureView> &p_view, const TypedArray<PackedByteArray> &p_data = Array());
  1001. RID _texture_create_shared(const Ref<RDTextureView> &p_view, RID p_with_texture);
  1002. RID _texture_create_shared_from_slice(const Ref<RDTextureView> &p_view, RID p_with_texture, uint32_t p_layer, uint32_t p_mipmap, TextureSliceType p_slice_type = TEXTURE_SLICE_2D);
  1003. FramebufferFormatID _framebuffer_format_create(const TypedArray<RDAttachmentFormat> &p_attachments);
  1004. RID _framebuffer_create(const Array &p_textures, FramebufferFormatID p_format_check = INVALID_ID);
  1005. RID _sampler_create(const Ref<RDSamplerState> &p_state);
  1006. VertexFormatID _vertex_format_create(const TypedArray<RDVertexAttribute> &p_vertex_formats);
  1007. RID _vertex_array_create(uint32_t p_vertex_count, VertexFormatID p_vertex_format, const TypedArray<RID> &p_src_buffers);
  1008. Ref<RDShaderBytecode> _shader_compile_from_source(const Ref<RDShaderSource> &p_source, bool p_allow_cache = true);
  1009. RID _uniform_set_create(const Array &p_uniforms, RID p_shader, uint32_t p_shader_set);
  1010. Error _buffer_update(RID p_buffer, uint32_t p_offset, uint32_t p_size, const Vector<uint8_t> &p_data, uint32_t p_post_barrier = BARRIER_MASK_ALL);
  1011. RID _render_pipeline_create(RID p_shader, FramebufferFormatID p_framebuffer_format, VertexFormatID p_vertex_format, RenderPrimitive p_render_primitive, const Ref<RDPipelineRasterizationState> &p_rasterization_state, const Ref<RDPipelineMultisampleState> &p_multisample_state, const Ref<RDPipelineDepthStencilState> &p_depth_stencil_state, const Ref<RDPipelineColorBlendState> &p_blend_state, int p_dynamic_state_flags = 0);
  1012. Vector<int64_t> _draw_list_begin_split(RID p_framebuffer, uint32_t p_splits, InitialAction p_initial_color_action, FinalAction p_final_color_action, InitialAction p_initial_depth_action, FinalAction p_final_depth_action, const Vector<Color> &p_clear_color_values = Vector<Color>(), float p_clear_depth = 1.0, uint32_t p_clear_stencil = 0, const Rect2 &p_region = Rect2(), const TypedArray<RID> &p_storage_textures = TypedArray<RID>());
  1013. void _draw_list_set_push_constant(DrawListID p_list, const Vector<uint8_t> &p_data, uint32_t p_data_size);
  1014. void _compute_list_set_push_constant(ComputeListID p_list, const Vector<uint8_t> &p_data, uint32_t p_data_size);
  1015. };
  1016. VARIANT_ENUM_CAST(RenderingDevice::ShaderStage)
  1017. VARIANT_ENUM_CAST(RenderingDevice::ShaderLanguage)
  1018. VARIANT_ENUM_CAST(RenderingDevice::CompareOperator)
  1019. VARIANT_ENUM_CAST(RenderingDevice::DataFormat)
  1020. VARIANT_ENUM_CAST(RenderingDevice::TextureType)
  1021. VARIANT_ENUM_CAST(RenderingDevice::TextureSamples)
  1022. VARIANT_ENUM_CAST(RenderingDevice::TextureUsageBits)
  1023. VARIANT_ENUM_CAST(RenderingDevice::TextureSwizzle)
  1024. VARIANT_ENUM_CAST(RenderingDevice::TextureSliceType)
  1025. VARIANT_ENUM_CAST(RenderingDevice::SamplerFilter)
  1026. VARIANT_ENUM_CAST(RenderingDevice::SamplerRepeatMode)
  1027. VARIANT_ENUM_CAST(RenderingDevice::SamplerBorderColor)
  1028. VARIANT_ENUM_CAST(RenderingDevice::VertexFrequency)
  1029. VARIANT_ENUM_CAST(RenderingDevice::IndexBufferFormat)
  1030. VARIANT_ENUM_CAST(RenderingDevice::StorageBufferUsage)
  1031. VARIANT_ENUM_CAST(RenderingDevice::UniformType)
  1032. VARIANT_ENUM_CAST(RenderingDevice::RenderPrimitive)
  1033. VARIANT_ENUM_CAST(RenderingDevice::PolygonCullMode)
  1034. VARIANT_ENUM_CAST(RenderingDevice::PolygonFrontFace)
  1035. VARIANT_ENUM_CAST(RenderingDevice::StencilOperation)
  1036. VARIANT_ENUM_CAST(RenderingDevice::LogicOperation)
  1037. VARIANT_ENUM_CAST(RenderingDevice::BlendFactor)
  1038. VARIANT_ENUM_CAST(RenderingDevice::BlendOperation)
  1039. VARIANT_ENUM_CAST(RenderingDevice::PipelineDynamicStateFlags)
  1040. VARIANT_ENUM_CAST(RenderingDevice::InitialAction)
  1041. VARIANT_ENUM_CAST(RenderingDevice::FinalAction)
  1042. VARIANT_ENUM_CAST(RenderingDevice::Limit)
  1043. typedef RenderingDevice RD;
  1044. #endif // RENDERING_DEVICE_H