aesni.c 32 KB

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  1. /*
  2. * AES-NI support functions
  3. *
  4. * Copyright The Mbed TLS Contributors
  5. * SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
  6. */
  7. /*
  8. * [AES-WP] https://www.intel.com/content/www/us/en/developer/articles/tool/intel-advanced-encryption-standard-aes-instructions-set.html
  9. * [CLMUL-WP] https://www.intel.com/content/www/us/en/develop/download/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode.html
  10. */
  11. #include "common.h"
  12. #if defined(MBEDTLS_AESNI_C)
  13. #include "aesni.h"
  14. #include <string.h>
  15. #if defined(MBEDTLS_AESNI_HAVE_CODE)
  16. #if MBEDTLS_AESNI_HAVE_CODE == 2
  17. #if defined(__GNUC__)
  18. #include <cpuid.h>
  19. #elif defined(_MSC_VER)
  20. #include <intrin.h>
  21. #else
  22. #error "`__cpuid` required by MBEDTLS_AESNI_C is not supported by the compiler"
  23. #endif
  24. #include <immintrin.h>
  25. #endif
  26. #if defined(MBEDTLS_ARCH_IS_X86)
  27. #if defined(MBEDTLS_COMPILER_IS_GCC)
  28. #pragma GCC push_options
  29. #pragma GCC target ("pclmul,sse2,aes")
  30. #define MBEDTLS_POP_TARGET_PRAGMA
  31. #elif defined(__clang__) && (__clang_major__ >= 5)
  32. #pragma clang attribute push (__attribute__((target("pclmul,sse2,aes"))), apply_to=function)
  33. #define MBEDTLS_POP_TARGET_PRAGMA
  34. #endif
  35. #endif
  36. #if !defined(MBEDTLS_AES_USE_HARDWARE_ONLY)
  37. /*
  38. * AES-NI support detection routine
  39. */
  40. int mbedtls_aesni_has_support(unsigned int what)
  41. {
  42. static int done = 0;
  43. static unsigned int c = 0;
  44. if (!done) {
  45. #if MBEDTLS_AESNI_HAVE_CODE == 2
  46. static int info[4] = { 0, 0, 0, 0 };
  47. #if defined(_MSC_VER)
  48. __cpuid(info, 1);
  49. #else
  50. __cpuid(1, info[0], info[1], info[2], info[3]);
  51. #endif
  52. c = info[2];
  53. #else /* AESNI using asm */
  54. asm ("movl $1, %%eax \n\t"
  55. "cpuid \n\t"
  56. : "=c" (c)
  57. :
  58. : "eax", "ebx", "edx");
  59. #endif /* MBEDTLS_AESNI_HAVE_CODE */
  60. done = 1;
  61. }
  62. return (c & what) != 0;
  63. }
  64. #endif /* !MBEDTLS_AES_USE_HARDWARE_ONLY */
  65. #if MBEDTLS_AESNI_HAVE_CODE == 2
  66. /*
  67. * AES-NI AES-ECB block en(de)cryption
  68. */
  69. int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
  70. int mode,
  71. const unsigned char input[16],
  72. unsigned char output[16])
  73. {
  74. const __m128i *rk = (const __m128i *) (ctx->buf + ctx->rk_offset);
  75. unsigned nr = ctx->nr; // Number of remaining rounds
  76. // Load round key 0
  77. __m128i state;
  78. memcpy(&state, input, 16);
  79. state = _mm_xor_si128(state, rk[0]); // state ^= *rk;
  80. ++rk;
  81. --nr;
  82. #if !defined(MBEDTLS_BLOCK_CIPHER_NO_DECRYPT)
  83. if (mode == MBEDTLS_AES_DECRYPT) {
  84. while (nr != 0) {
  85. state = _mm_aesdec_si128(state, *rk);
  86. ++rk;
  87. --nr;
  88. }
  89. state = _mm_aesdeclast_si128(state, *rk);
  90. } else
  91. #else
  92. (void) mode;
  93. #endif
  94. {
  95. while (nr != 0) {
  96. state = _mm_aesenc_si128(state, *rk);
  97. ++rk;
  98. --nr;
  99. }
  100. state = _mm_aesenclast_si128(state, *rk);
  101. }
  102. memcpy(output, &state, 16);
  103. return 0;
  104. }
  105. /*
  106. * GCM multiplication: c = a times b in GF(2^128)
  107. * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
  108. */
  109. static void gcm_clmul(const __m128i aa, const __m128i bb,
  110. __m128i *cc, __m128i *dd)
  111. {
  112. /*
  113. * Caryless multiplication dd:cc = aa * bb
  114. * using [CLMUL-WP] algorithm 1 (p. 12).
  115. */
  116. *cc = _mm_clmulepi64_si128(aa, bb, 0x00); // a0*b0 = c1:c0
  117. *dd = _mm_clmulepi64_si128(aa, bb, 0x11); // a1*b1 = d1:d0
  118. __m128i ee = _mm_clmulepi64_si128(aa, bb, 0x10); // a0*b1 = e1:e0
  119. __m128i ff = _mm_clmulepi64_si128(aa, bb, 0x01); // a1*b0 = f1:f0
  120. ff = _mm_xor_si128(ff, ee); // e1+f1:e0+f0
  121. ee = ff; // e1+f1:e0+f0
  122. ff = _mm_srli_si128(ff, 8); // 0:e1+f1
  123. ee = _mm_slli_si128(ee, 8); // e0+f0:0
  124. *dd = _mm_xor_si128(*dd, ff); // d1:d0+e1+f1
  125. *cc = _mm_xor_si128(*cc, ee); // c1+e0+f0:c0
  126. }
  127. static void gcm_shift(__m128i *cc, __m128i *dd)
  128. {
  129. /* [CMUCL-WP] Algorithm 5 Step 1: shift cc:dd one bit to the left,
  130. * taking advantage of [CLMUL-WP] eq 27 (p. 18). */
  131. // // *cc = r1:r0
  132. // // *dd = r3:r2
  133. __m128i cc_lo = _mm_slli_epi64(*cc, 1); // r1<<1:r0<<1
  134. __m128i dd_lo = _mm_slli_epi64(*dd, 1); // r3<<1:r2<<1
  135. __m128i cc_hi = _mm_srli_epi64(*cc, 63); // r1>>63:r0>>63
  136. __m128i dd_hi = _mm_srli_epi64(*dd, 63); // r3>>63:r2>>63
  137. __m128i xmm5 = _mm_srli_si128(cc_hi, 8); // 0:r1>>63
  138. cc_hi = _mm_slli_si128(cc_hi, 8); // r0>>63:0
  139. dd_hi = _mm_slli_si128(dd_hi, 8); // 0:r1>>63
  140. *cc = _mm_or_si128(cc_lo, cc_hi); // r1<<1|r0>>63:r0<<1
  141. *dd = _mm_or_si128(_mm_or_si128(dd_lo, dd_hi), xmm5); // r3<<1|r2>>62:r2<<1|r1>>63
  142. }
  143. static __m128i gcm_reduce(__m128i xx)
  144. {
  145. // // xx = x1:x0
  146. /* [CLMUL-WP] Algorithm 5 Step 2 */
  147. __m128i aa = _mm_slli_epi64(xx, 63); // x1<<63:x0<<63 = stuff:a
  148. __m128i bb = _mm_slli_epi64(xx, 62); // x1<<62:x0<<62 = stuff:b
  149. __m128i cc = _mm_slli_epi64(xx, 57); // x1<<57:x0<<57 = stuff:c
  150. __m128i dd = _mm_slli_si128(_mm_xor_si128(_mm_xor_si128(aa, bb), cc), 8); // a+b+c:0
  151. return _mm_xor_si128(dd, xx); // x1+a+b+c:x0 = d:x0
  152. }
  153. static __m128i gcm_mix(__m128i dx)
  154. {
  155. /* [CLMUL-WP] Algorithm 5 Steps 3 and 4 */
  156. __m128i ee = _mm_srli_epi64(dx, 1); // e1:x0>>1 = e1:e0'
  157. __m128i ff = _mm_srli_epi64(dx, 2); // f1:x0>>2 = f1:f0'
  158. __m128i gg = _mm_srli_epi64(dx, 7); // g1:x0>>7 = g1:g0'
  159. // e0'+f0'+g0' is almost e0+f0+g0, except for some missing
  160. // bits carried from d. Now get those bits back in.
  161. __m128i eh = _mm_slli_epi64(dx, 63); // d<<63:stuff
  162. __m128i fh = _mm_slli_epi64(dx, 62); // d<<62:stuff
  163. __m128i gh = _mm_slli_epi64(dx, 57); // d<<57:stuff
  164. __m128i hh = _mm_srli_si128(_mm_xor_si128(_mm_xor_si128(eh, fh), gh), 8); // 0:missing bits of d
  165. return _mm_xor_si128(_mm_xor_si128(_mm_xor_si128(_mm_xor_si128(ee, ff), gg), hh), dx);
  166. }
  167. void mbedtls_aesni_gcm_mult(unsigned char c[16],
  168. const unsigned char a[16],
  169. const unsigned char b[16])
  170. {
  171. __m128i aa = { 0 }, bb = { 0 }, cc, dd;
  172. /* The inputs are in big-endian order, so byte-reverse them */
  173. for (size_t i = 0; i < 16; i++) {
  174. ((uint8_t *) &aa)[i] = a[15 - i];
  175. ((uint8_t *) &bb)[i] = b[15 - i];
  176. }
  177. gcm_clmul(aa, bb, &cc, &dd);
  178. gcm_shift(&cc, &dd);
  179. /*
  180. * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
  181. * using [CLMUL-WP] algorithm 5 (p. 18).
  182. * Currently dd:cc holds x3:x2:x1:x0 (already shifted).
  183. */
  184. __m128i dx = gcm_reduce(cc);
  185. __m128i xh = gcm_mix(dx);
  186. cc = _mm_xor_si128(xh, dd); // x3+h1:x2+h0
  187. /* Now byte-reverse the outputs */
  188. for (size_t i = 0; i < 16; i++) {
  189. c[i] = ((uint8_t *) &cc)[15 - i];
  190. }
  191. return;
  192. }
  193. /*
  194. * Compute decryption round keys from encryption round keys
  195. */
  196. #if !defined(MBEDTLS_BLOCK_CIPHER_NO_DECRYPT)
  197. void mbedtls_aesni_inverse_key(unsigned char *invkey,
  198. const unsigned char *fwdkey, int nr)
  199. {
  200. __m128i *ik = (__m128i *) invkey;
  201. const __m128i *fk = (const __m128i *) fwdkey + nr;
  202. *ik = *fk;
  203. for (--fk, ++ik; fk > (const __m128i *) fwdkey; --fk, ++ik) {
  204. *ik = _mm_aesimc_si128(*fk);
  205. }
  206. *ik = *fk;
  207. }
  208. #endif
  209. /*
  210. * Key expansion, 128-bit case
  211. */
  212. static __m128i aesni_set_rk_128(__m128i state, __m128i xword)
  213. {
  214. /*
  215. * Finish generating the next round key.
  216. *
  217. * On entry state is r3:r2:r1:r0 and xword is X:stuff:stuff:stuff
  218. * with X = rot( sub( r3 ) ) ^ RCON (obtained with AESKEYGENASSIST).
  219. *
  220. * On exit, xword is r7:r6:r5:r4
  221. * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
  222. * and this is returned, to be written to the round key buffer.
  223. */
  224. xword = _mm_shuffle_epi32(xword, 0xff); // X:X:X:X
  225. xword = _mm_xor_si128(xword, state); // X+r3:X+r2:X+r1:r4
  226. state = _mm_slli_si128(state, 4); // r2:r1:r0:0
  227. xword = _mm_xor_si128(xword, state); // X+r3+r2:X+r2+r1:r5:r4
  228. state = _mm_slli_si128(state, 4); // r1:r0:0:0
  229. xword = _mm_xor_si128(xword, state); // X+r3+r2+r1:r6:r5:r4
  230. state = _mm_slli_si128(state, 4); // r0:0:0:0
  231. state = _mm_xor_si128(xword, state); // r7:r6:r5:r4
  232. return state;
  233. }
  234. static void aesni_setkey_enc_128(unsigned char *rk_bytes,
  235. const unsigned char *key)
  236. {
  237. __m128i *rk = (__m128i *) rk_bytes;
  238. memcpy(&rk[0], key, 16);
  239. rk[1] = aesni_set_rk_128(rk[0], _mm_aeskeygenassist_si128(rk[0], 0x01));
  240. rk[2] = aesni_set_rk_128(rk[1], _mm_aeskeygenassist_si128(rk[1], 0x02));
  241. rk[3] = aesni_set_rk_128(rk[2], _mm_aeskeygenassist_si128(rk[2], 0x04));
  242. rk[4] = aesni_set_rk_128(rk[3], _mm_aeskeygenassist_si128(rk[3], 0x08));
  243. rk[5] = aesni_set_rk_128(rk[4], _mm_aeskeygenassist_si128(rk[4], 0x10));
  244. rk[6] = aesni_set_rk_128(rk[5], _mm_aeskeygenassist_si128(rk[5], 0x20));
  245. rk[7] = aesni_set_rk_128(rk[6], _mm_aeskeygenassist_si128(rk[6], 0x40));
  246. rk[8] = aesni_set_rk_128(rk[7], _mm_aeskeygenassist_si128(rk[7], 0x80));
  247. rk[9] = aesni_set_rk_128(rk[8], _mm_aeskeygenassist_si128(rk[8], 0x1B));
  248. rk[10] = aesni_set_rk_128(rk[9], _mm_aeskeygenassist_si128(rk[9], 0x36));
  249. }
  250. /*
  251. * Key expansion, 192-bit case
  252. */
  253. #if !defined(MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH)
  254. static void aesni_set_rk_192(__m128i *state0, __m128i *state1, __m128i xword,
  255. unsigned char *rk)
  256. {
  257. /*
  258. * Finish generating the next 6 quarter-keys.
  259. *
  260. * On entry state0 is r3:r2:r1:r0, state1 is stuff:stuff:r5:r4
  261. * and xword is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON
  262. * (obtained with AESKEYGENASSIST).
  263. *
  264. * On exit, state0 is r9:r8:r7:r6 and state1 is stuff:stuff:r11:r10
  265. * and those are written to the round key buffer.
  266. */
  267. xword = _mm_shuffle_epi32(xword, 0x55); // X:X:X:X
  268. xword = _mm_xor_si128(xword, *state0); // X+r3:X+r2:X+r1:X+r0
  269. *state0 = _mm_slli_si128(*state0, 4); // r2:r1:r0:0
  270. xword = _mm_xor_si128(xword, *state0); // X+r3+r2:X+r2+r1:X+r1+r0:X+r0
  271. *state0 = _mm_slli_si128(*state0, 4); // r1:r0:0:0
  272. xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1:X+r2+r1+r0:X+r1+r0:X+r0
  273. *state0 = _mm_slli_si128(*state0, 4); // r0:0:0:0
  274. xword = _mm_xor_si128(xword, *state0); // X+r3+r2+r1+r0:X+r2+r1+r0:X+r1+r0:X+r0
  275. *state0 = xword; // = r9:r8:r7:r6
  276. xword = _mm_shuffle_epi32(xword, 0xff); // r9:r9:r9:r9
  277. xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5:r9+r4
  278. *state1 = _mm_slli_si128(*state1, 4); // stuff:stuff:r4:0
  279. xword = _mm_xor_si128(xword, *state1); // stuff:stuff:r9+r5+r4:r9+r4
  280. *state1 = xword; // = stuff:stuff:r11:r10
  281. /* Store state0 and the low half of state1 into rk, which is conceptually
  282. * an array of 24-byte elements. Since 24 is not a multiple of 16,
  283. * rk is not necessarily aligned so just `*rk = *state0` doesn't work. */
  284. memcpy(rk, state0, 16);
  285. memcpy(rk + 16, state1, 8);
  286. }
  287. static void aesni_setkey_enc_192(unsigned char *rk,
  288. const unsigned char *key)
  289. {
  290. /* First round: use original key */
  291. memcpy(rk, key, 24);
  292. /* aes.c guarantees that rk is aligned on a 16-byte boundary. */
  293. __m128i state0 = ((__m128i *) rk)[0];
  294. __m128i state1 = _mm_loadl_epi64(((__m128i *) rk) + 1);
  295. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x01), rk + 24 * 1);
  296. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x02), rk + 24 * 2);
  297. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x04), rk + 24 * 3);
  298. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x08), rk + 24 * 4);
  299. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x10), rk + 24 * 5);
  300. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x20), rk + 24 * 6);
  301. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x40), rk + 24 * 7);
  302. aesni_set_rk_192(&state0, &state1, _mm_aeskeygenassist_si128(state1, 0x80), rk + 24 * 8);
  303. }
  304. #endif /* !MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH */
  305. /*
  306. * Key expansion, 256-bit case
  307. */
  308. #if !defined(MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH)
  309. static void aesni_set_rk_256(__m128i state0, __m128i state1, __m128i xword,
  310. __m128i *rk0, __m128i *rk1)
  311. {
  312. /*
  313. * Finish generating the next two round keys.
  314. *
  315. * On entry state0 is r3:r2:r1:r0, state1 is r7:r6:r5:r4 and
  316. * xword is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
  317. * (obtained with AESKEYGENASSIST).
  318. *
  319. * On exit, *rk0 is r11:r10:r9:r8 and *rk1 is r15:r14:r13:r12
  320. */
  321. xword = _mm_shuffle_epi32(xword, 0xff);
  322. xword = _mm_xor_si128(xword, state0);
  323. state0 = _mm_slli_si128(state0, 4);
  324. xword = _mm_xor_si128(xword, state0);
  325. state0 = _mm_slli_si128(state0, 4);
  326. xword = _mm_xor_si128(xword, state0);
  327. state0 = _mm_slli_si128(state0, 4);
  328. state0 = _mm_xor_si128(state0, xword);
  329. *rk0 = state0;
  330. /* Set xword to stuff:Y:stuff:stuff with Y = subword( r11 )
  331. * and proceed to generate next round key from there */
  332. xword = _mm_aeskeygenassist_si128(state0, 0x00);
  333. xword = _mm_shuffle_epi32(xword, 0xaa);
  334. xword = _mm_xor_si128(xword, state1);
  335. state1 = _mm_slli_si128(state1, 4);
  336. xword = _mm_xor_si128(xword, state1);
  337. state1 = _mm_slli_si128(state1, 4);
  338. xword = _mm_xor_si128(xword, state1);
  339. state1 = _mm_slli_si128(state1, 4);
  340. state1 = _mm_xor_si128(state1, xword);
  341. *rk1 = state1;
  342. }
  343. static void aesni_setkey_enc_256(unsigned char *rk_bytes,
  344. const unsigned char *key)
  345. {
  346. __m128i *rk = (__m128i *) rk_bytes;
  347. memcpy(&rk[0], key, 16);
  348. memcpy(&rk[1], key + 16, 16);
  349. /*
  350. * Main "loop" - Generating one more key than necessary,
  351. * see definition of mbedtls_aes_context.buf
  352. */
  353. aesni_set_rk_256(rk[0], rk[1], _mm_aeskeygenassist_si128(rk[1], 0x01), &rk[2], &rk[3]);
  354. aesni_set_rk_256(rk[2], rk[3], _mm_aeskeygenassist_si128(rk[3], 0x02), &rk[4], &rk[5]);
  355. aesni_set_rk_256(rk[4], rk[5], _mm_aeskeygenassist_si128(rk[5], 0x04), &rk[6], &rk[7]);
  356. aesni_set_rk_256(rk[6], rk[7], _mm_aeskeygenassist_si128(rk[7], 0x08), &rk[8], &rk[9]);
  357. aesni_set_rk_256(rk[8], rk[9], _mm_aeskeygenassist_si128(rk[9], 0x10), &rk[10], &rk[11]);
  358. aesni_set_rk_256(rk[10], rk[11], _mm_aeskeygenassist_si128(rk[11], 0x20), &rk[12], &rk[13]);
  359. aesni_set_rk_256(rk[12], rk[13], _mm_aeskeygenassist_si128(rk[13], 0x40), &rk[14], &rk[15]);
  360. }
  361. #endif /* !MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH */
  362. #if defined(MBEDTLS_POP_TARGET_PRAGMA)
  363. #if defined(__clang__)
  364. #pragma clang attribute pop
  365. #elif defined(__GNUC__)
  366. #pragma GCC pop_options
  367. #endif
  368. #undef MBEDTLS_POP_TARGET_PRAGMA
  369. #endif
  370. #else /* MBEDTLS_AESNI_HAVE_CODE == 1 */
  371. #if defined(__has_feature)
  372. #if __has_feature(memory_sanitizer)
  373. #warning \
  374. "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
  375. #endif
  376. #endif
  377. /*
  378. * Binutils needs to be at least 2.19 to support AES-NI instructions.
  379. * Unfortunately, a lot of users have a lower version now (2014-04).
  380. * Emit bytecode directly in order to support "old" version of gas.
  381. *
  382. * Opcodes from the Intel architecture reference manual, vol. 3.
  383. * We always use registers, so we don't need prefixes for memory operands.
  384. * Operand macros are in gas order (src, dst) as opposed to Intel order
  385. * (dst, src) in order to blend better into the surrounding assembly code.
  386. */
  387. #define AESDEC(regs) ".byte 0x66,0x0F,0x38,0xDE," regs "\n\t"
  388. #define AESDECLAST(regs) ".byte 0x66,0x0F,0x38,0xDF," regs "\n\t"
  389. #define AESENC(regs) ".byte 0x66,0x0F,0x38,0xDC," regs "\n\t"
  390. #define AESENCLAST(regs) ".byte 0x66,0x0F,0x38,0xDD," regs "\n\t"
  391. #define AESIMC(regs) ".byte 0x66,0x0F,0x38,0xDB," regs "\n\t"
  392. #define AESKEYGENA(regs, imm) ".byte 0x66,0x0F,0x3A,0xDF," regs "," imm "\n\t"
  393. #define PCLMULQDQ(regs, imm) ".byte 0x66,0x0F,0x3A,0x44," regs "," imm "\n\t"
  394. #define xmm0_xmm0 "0xC0"
  395. #define xmm0_xmm1 "0xC8"
  396. #define xmm0_xmm2 "0xD0"
  397. #define xmm0_xmm3 "0xD8"
  398. #define xmm0_xmm4 "0xE0"
  399. #define xmm1_xmm0 "0xC1"
  400. #define xmm1_xmm2 "0xD1"
  401. /*
  402. * AES-NI AES-ECB block en(de)cryption
  403. */
  404. int mbedtls_aesni_crypt_ecb(mbedtls_aes_context *ctx,
  405. int mode,
  406. const unsigned char input[16],
  407. unsigned char output[16])
  408. {
  409. asm ("movdqu (%3), %%xmm0 \n\t" // load input
  410. "movdqu (%1), %%xmm1 \n\t" // load round key 0
  411. "pxor %%xmm1, %%xmm0 \n\t" // round 0
  412. "add $16, %1 \n\t" // point to next round key
  413. "subl $1, %0 \n\t" // normal rounds = nr - 1
  414. "test %2, %2 \n\t" // mode?
  415. "jz 2f \n\t" // 0 = decrypt
  416. "1: \n\t" // encryption loop
  417. "movdqu (%1), %%xmm1 \n\t" // load round key
  418. AESENC(xmm1_xmm0) // do round
  419. "add $16, %1 \n\t" // point to next round key
  420. "subl $1, %0 \n\t" // loop
  421. "jnz 1b \n\t"
  422. "movdqu (%1), %%xmm1 \n\t" // load round key
  423. AESENCLAST(xmm1_xmm0) // last round
  424. #if !defined(MBEDTLS_BLOCK_CIPHER_NO_DECRYPT)
  425. "jmp 3f \n\t"
  426. "2: \n\t" // decryption loop
  427. "movdqu (%1), %%xmm1 \n\t"
  428. AESDEC(xmm1_xmm0) // do round
  429. "add $16, %1 \n\t"
  430. "subl $1, %0 \n\t"
  431. "jnz 2b \n\t"
  432. "movdqu (%1), %%xmm1 \n\t" // load round key
  433. AESDECLAST(xmm1_xmm0) // last round
  434. #endif
  435. "3: \n\t"
  436. "movdqu %%xmm0, (%4) \n\t" // export output
  437. :
  438. : "r" (ctx->nr), "r" (ctx->buf + ctx->rk_offset), "r" (mode), "r" (input), "r" (output)
  439. : "memory", "cc", "xmm0", "xmm1");
  440. return 0;
  441. }
  442. /*
  443. * GCM multiplication: c = a times b in GF(2^128)
  444. * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
  445. */
  446. void mbedtls_aesni_gcm_mult(unsigned char c[16],
  447. const unsigned char a[16],
  448. const unsigned char b[16])
  449. {
  450. unsigned char aa[16], bb[16], cc[16];
  451. size_t i;
  452. /* The inputs are in big-endian order, so byte-reverse them */
  453. for (i = 0; i < 16; i++) {
  454. aa[i] = a[15 - i];
  455. bb[i] = b[15 - i];
  456. }
  457. asm ("movdqu (%0), %%xmm0 \n\t" // a1:a0
  458. "movdqu (%1), %%xmm1 \n\t" // b1:b0
  459. /*
  460. * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
  461. * using [CLMUL-WP] algorithm 1 (p. 12).
  462. */
  463. "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
  464. "movdqa %%xmm1, %%xmm3 \n\t" // same
  465. "movdqa %%xmm1, %%xmm4 \n\t" // same
  466. PCLMULQDQ(xmm0_xmm1, "0x00") // a0*b0 = c1:c0
  467. PCLMULQDQ(xmm0_xmm2, "0x11") // a1*b1 = d1:d0
  468. PCLMULQDQ(xmm0_xmm3, "0x10") // a0*b1 = e1:e0
  469. PCLMULQDQ(xmm0_xmm4, "0x01") // a1*b0 = f1:f0
  470. "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
  471. "movdqa %%xmm4, %%xmm3 \n\t" // same
  472. "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
  473. "pslldq $8, %%xmm3 \n\t" // e0+f0:0
  474. "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
  475. "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
  476. /*
  477. * Now shift the result one bit to the left,
  478. * taking advantage of [CLMUL-WP] eq 27 (p. 18)
  479. */
  480. "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
  481. "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
  482. "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
  483. "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
  484. "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
  485. "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
  486. "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
  487. "pslldq $8, %%xmm3 \n\t" // r0>>63:0
  488. "pslldq $8, %%xmm4 \n\t" // r2>>63:0
  489. "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
  490. "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
  491. "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
  492. "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
  493. /*
  494. * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
  495. * using [CLMUL-WP] algorithm 5 (p. 18).
  496. * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
  497. */
  498. /* Step 2 (1) */
  499. "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
  500. "movdqa %%xmm1, %%xmm4 \n\t" // same
  501. "movdqa %%xmm1, %%xmm5 \n\t" // same
  502. "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
  503. "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
  504. "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
  505. /* Step 2 (2) */
  506. "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
  507. "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
  508. "pslldq $8, %%xmm3 \n\t" // a+b+c:0
  509. "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
  510. /* Steps 3 and 4 */
  511. "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
  512. "movdqa %%xmm1,%%xmm4 \n\t" // same
  513. "movdqa %%xmm1,%%xmm5 \n\t" // same
  514. "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
  515. "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
  516. "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
  517. "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
  518. "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
  519. // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
  520. // bits carried from d. Now get those\t bits back in.
  521. "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
  522. "movdqa %%xmm1,%%xmm4 \n\t" // same
  523. "movdqa %%xmm1,%%xmm5 \n\t" // same
  524. "psllq $63, %%xmm3 \n\t" // d<<63:stuff
  525. "psllq $62, %%xmm4 \n\t" // d<<62:stuff
  526. "psllq $57, %%xmm5 \n\t" // d<<57:stuff
  527. "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
  528. "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
  529. "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
  530. "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
  531. "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
  532. "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
  533. "movdqu %%xmm0, (%2) \n\t" // done
  534. :
  535. : "r" (aa), "r" (bb), "r" (cc)
  536. : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");
  537. /* Now byte-reverse the outputs */
  538. for (i = 0; i < 16; i++) {
  539. c[i] = cc[15 - i];
  540. }
  541. return;
  542. }
  543. /*
  544. * Compute decryption round keys from encryption round keys
  545. */
  546. #if !defined(MBEDTLS_BLOCK_CIPHER_NO_DECRYPT)
  547. void mbedtls_aesni_inverse_key(unsigned char *invkey,
  548. const unsigned char *fwdkey, int nr)
  549. {
  550. unsigned char *ik = invkey;
  551. const unsigned char *fk = fwdkey + 16 * nr;
  552. memcpy(ik, fk, 16);
  553. for (fk -= 16, ik += 16; fk > fwdkey; fk -= 16, ik += 16) {
  554. asm ("movdqu (%0), %%xmm0 \n\t"
  555. AESIMC(xmm0_xmm0)
  556. "movdqu %%xmm0, (%1) \n\t"
  557. :
  558. : "r" (fk), "r" (ik)
  559. : "memory", "xmm0");
  560. }
  561. memcpy(ik, fk, 16);
  562. }
  563. #endif
  564. /*
  565. * Key expansion, 128-bit case
  566. */
  567. static void aesni_setkey_enc_128(unsigned char *rk,
  568. const unsigned char *key)
  569. {
  570. asm ("movdqu (%1), %%xmm0 \n\t" // copy the original key
  571. "movdqu %%xmm0, (%0) \n\t" // as round key 0
  572. "jmp 2f \n\t" // skip auxiliary routine
  573. /*
  574. * Finish generating the next round key.
  575. *
  576. * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
  577. * with X = rot( sub( r3 ) ) ^ RCON.
  578. *
  579. * On exit, xmm0 is r7:r6:r5:r4
  580. * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
  581. * and those are written to the round key buffer.
  582. */
  583. "1: \n\t"
  584. "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
  585. "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
  586. "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
  587. "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
  588. "pslldq $4, %%xmm0 \n\t" // etc
  589. "pxor %%xmm0, %%xmm1 \n\t"
  590. "pslldq $4, %%xmm0 \n\t"
  591. "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
  592. "add $16, %0 \n\t" // point to next round key
  593. "movdqu %%xmm0, (%0) \n\t" // write it
  594. "ret \n\t"
  595. /* Main "loop" */
  596. "2: \n\t"
  597. AESKEYGENA(xmm0_xmm1, "0x01") "call 1b \n\t"
  598. AESKEYGENA(xmm0_xmm1, "0x02") "call 1b \n\t"
  599. AESKEYGENA(xmm0_xmm1, "0x04") "call 1b \n\t"
  600. AESKEYGENA(xmm0_xmm1, "0x08") "call 1b \n\t"
  601. AESKEYGENA(xmm0_xmm1, "0x10") "call 1b \n\t"
  602. AESKEYGENA(xmm0_xmm1, "0x20") "call 1b \n\t"
  603. AESKEYGENA(xmm0_xmm1, "0x40") "call 1b \n\t"
  604. AESKEYGENA(xmm0_xmm1, "0x80") "call 1b \n\t"
  605. AESKEYGENA(xmm0_xmm1, "0x1B") "call 1b \n\t"
  606. AESKEYGENA(xmm0_xmm1, "0x36") "call 1b \n\t"
  607. :
  608. : "r" (rk), "r" (key)
  609. : "memory", "cc", "0");
  610. }
  611. /*
  612. * Key expansion, 192-bit case
  613. */
  614. #if !defined(MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH)
  615. static void aesni_setkey_enc_192(unsigned char *rk,
  616. const unsigned char *key)
  617. {
  618. asm ("movdqu (%1), %%xmm0 \n\t" // copy original round key
  619. "movdqu %%xmm0, (%0) \n\t"
  620. "add $16, %0 \n\t"
  621. "movq 16(%1), %%xmm1 \n\t"
  622. "movq %%xmm1, (%0) \n\t"
  623. "add $8, %0 \n\t"
  624. "jmp 2f \n\t" // skip auxiliary routine
  625. /*
  626. * Finish generating the next 6 quarter-keys.
  627. *
  628. * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
  629. * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
  630. *
  631. * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
  632. * and those are written to the round key buffer.
  633. */
  634. "1: \n\t"
  635. "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
  636. "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
  637. "pslldq $4, %%xmm0 \n\t" // etc
  638. "pxor %%xmm0, %%xmm2 \n\t"
  639. "pslldq $4, %%xmm0 \n\t"
  640. "pxor %%xmm0, %%xmm2 \n\t"
  641. "pslldq $4, %%xmm0 \n\t"
  642. "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
  643. "movdqu %%xmm0, (%0) \n\t"
  644. "add $16, %0 \n\t"
  645. "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
  646. "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
  647. "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
  648. "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
  649. "movq %%xmm1, (%0) \n\t"
  650. "add $8, %0 \n\t"
  651. "ret \n\t"
  652. "2: \n\t"
  653. AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
  654. AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
  655. AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
  656. AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
  657. AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
  658. AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
  659. AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
  660. AESKEYGENA(xmm1_xmm2, "0x80") "call 1b \n\t"
  661. :
  662. : "r" (rk), "r" (key)
  663. : "memory", "cc", "0");
  664. }
  665. #endif /* !MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH */
  666. /*
  667. * Key expansion, 256-bit case
  668. */
  669. #if !defined(MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH)
  670. static void aesni_setkey_enc_256(unsigned char *rk,
  671. const unsigned char *key)
  672. {
  673. asm ("movdqu (%1), %%xmm0 \n\t"
  674. "movdqu %%xmm0, (%0) \n\t"
  675. "add $16, %0 \n\t"
  676. "movdqu 16(%1), %%xmm1 \n\t"
  677. "movdqu %%xmm1, (%0) \n\t"
  678. "jmp 2f \n\t" // skip auxiliary routine
  679. /*
  680. * Finish generating the next two round keys.
  681. *
  682. * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
  683. * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
  684. *
  685. * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
  686. * and those have been written to the output buffer.
  687. */
  688. "1: \n\t"
  689. "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
  690. "pxor %%xmm0, %%xmm2 \n\t"
  691. "pslldq $4, %%xmm0 \n\t"
  692. "pxor %%xmm0, %%xmm2 \n\t"
  693. "pslldq $4, %%xmm0 \n\t"
  694. "pxor %%xmm0, %%xmm2 \n\t"
  695. "pslldq $4, %%xmm0 \n\t"
  696. "pxor %%xmm2, %%xmm0 \n\t"
  697. "add $16, %0 \n\t"
  698. "movdqu %%xmm0, (%0) \n\t"
  699. /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
  700. * and proceed to generate next round key from there */
  701. AESKEYGENA(xmm0_xmm2, "0x00")
  702. "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
  703. "pxor %%xmm1, %%xmm2 \n\t"
  704. "pslldq $4, %%xmm1 \n\t"
  705. "pxor %%xmm1, %%xmm2 \n\t"
  706. "pslldq $4, %%xmm1 \n\t"
  707. "pxor %%xmm1, %%xmm2 \n\t"
  708. "pslldq $4, %%xmm1 \n\t"
  709. "pxor %%xmm2, %%xmm1 \n\t"
  710. "add $16, %0 \n\t"
  711. "movdqu %%xmm1, (%0) \n\t"
  712. "ret \n\t"
  713. /*
  714. * Main "loop" - Generating one more key than necessary,
  715. * see definition of mbedtls_aes_context.buf
  716. */
  717. "2: \n\t"
  718. AESKEYGENA(xmm1_xmm2, "0x01") "call 1b \n\t"
  719. AESKEYGENA(xmm1_xmm2, "0x02") "call 1b \n\t"
  720. AESKEYGENA(xmm1_xmm2, "0x04") "call 1b \n\t"
  721. AESKEYGENA(xmm1_xmm2, "0x08") "call 1b \n\t"
  722. AESKEYGENA(xmm1_xmm2, "0x10") "call 1b \n\t"
  723. AESKEYGENA(xmm1_xmm2, "0x20") "call 1b \n\t"
  724. AESKEYGENA(xmm1_xmm2, "0x40") "call 1b \n\t"
  725. :
  726. : "r" (rk), "r" (key)
  727. : "memory", "cc", "0");
  728. }
  729. #endif /* !MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH */
  730. #endif /* MBEDTLS_AESNI_HAVE_CODE */
  731. /*
  732. * Key expansion, wrapper
  733. */
  734. int mbedtls_aesni_setkey_enc(unsigned char *rk,
  735. const unsigned char *key,
  736. size_t bits)
  737. {
  738. switch (bits) {
  739. case 128: aesni_setkey_enc_128(rk, key); break;
  740. #if !defined(MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH)
  741. case 192: aesni_setkey_enc_192(rk, key); break;
  742. case 256: aesni_setkey_enc_256(rk, key); break;
  743. #endif /* !MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH */
  744. default: return MBEDTLS_ERR_AES_INVALID_KEY_LENGTH;
  745. }
  746. return 0;
  747. }
  748. #endif /* MBEDTLS_AESNI_HAVE_CODE */
  749. #endif /* MBEDTLS_AESNI_C */