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@@ -1,657 +0,0 @@
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-// Original code is:
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-// Copyright (c) 2005 Intel Corporation
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-// All Rights Reserved
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-//
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-// CPUCount.cpp : Detects three forms of hardware multi-threading support across IA-32 platform
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-// The three forms of HW multithreading are: Multi-processor, Multi-core, and
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-// HyperThreading Technology.
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-// This application enumerates all the logical processors enabled by OS and BIOS,
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-// determine the HW topology of these enabled logical processors in the system
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-// using information provided by CPUID instruction.
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-// A multi-processing system can support any combination of the three forms of HW
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-// multi-threading support. The relevant topology can be identified using a
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-// three level decomposition of the "initial APIC ID" into
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-// Package_id, core_id, and SMT_id. Such decomposition provides a three-level map of
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-// the topology of hardware resources and
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-// allow multi-threaded software to manage shared hardware resources in
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-// the platform to reduce resource contention
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-
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-// Multicore detection algorithm for processor and cache topology requires
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-// all leaf functions of CPUID instructions be available. System administrator
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-// must ensure BIOS settings is not configured to restrict CPUID functionalities.
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-//-------------------------------------------------------------------------------------------------
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-
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-#if defined(TORQUE_OS_LINUX) || defined(LINUX)
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-
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-// TODO GCC code don't compile on Release with optimizations, mover code to platform layer
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-
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-#else
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-
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-#include "platform/platform.h"
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-#include "platform/platformCPUCount.h"
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-
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-#if defined(TORQUE_OS_LINUX) || defined(TORQUE_OS_OSX)
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-
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-#ifdef TORQUE_OS_LINUX
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-// The Linux source code listing can be compiled using Linux kernel verison 2.6
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-// or higher (e.g. RH 4AS-2.8 using GCC 3.4.4).
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-// Due to syntax variances of Linux affinity APIs with earlier kernel versions
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-// and dependence on glibc library versions, compilation on Linux environment
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-// with older kernels and compilers may require kernel patches or compiler upgrades.
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-
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-#include <stdlib.h>
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-#include <unistd.h>
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-#include <string.h>
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-#include <sched.h>
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-#define DWORD unsigned long
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-#elif defined( TORQUE_OS_WIN )
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-#include <windows.h>
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-#elif defined( TORQUE_OS_MAC )
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-# include <sys/types.h>
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-# include <sys/sysctl.h>
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-#else
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-#error Not implemented on platform.
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-#endif
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-#include <stdio.h>
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-#include <assert.h>
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-
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-namespace CPUInfo {
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-
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-#define HWD_MT_BIT 0x10000000 // EDX[28] Bit 28 is set if HT or multi-core is supported
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-#define NUM_LOGICAL_BITS 0x00FF0000 // EBX[23:16] Bit 16-23 in ebx contains the number of logical
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- // processors per physical processor when execute cpuid with
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- // eax set to 1
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-#define NUM_CORE_BITS 0xFC000000 // EAX[31:26] Bit 26-31 in eax contains the number of cores minus one
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- // per physical processor when execute cpuid with
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- // eax set to 4.
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-
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-
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-#define INITIAL_APIC_ID_BITS 0xFF000000 // EBX[31:24] Bits 24-31 (8 bits) return the 8-bit unique
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- // initial APIC ID for the processor this code is running on.
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-
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-
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- #ifndef TORQUE_OS_MAC
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- static U32 CpuIDSupported(void);
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- static U32 find_maskwidth(unsigned int);
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- static U32 HWD_MTSupported(void);
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- static U32 MaxLogicalProcPerPhysicalProc(void);
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- static U32 MaxCorePerPhysicalProc(void);
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- static U8 GetAPIC_ID(void);
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- static U8 GetNzbSubID(U8, U8, U8);
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- #endif
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-
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- static char g_s3Levels[2048];
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-
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-#ifndef TORQUE_OS_MAC
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-
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- //
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- // CpuIDSupported will return 0 if CPUID instruction is unavailable. Otherwise, it will return
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- // the maximum supported standard function.
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- //
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- static U32 CpuIDSupported(void)
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- {
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- U32 maxInputValue = 0;
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- // If CPUID instruction is supported
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-#ifdef TORQUE_COMPILER_GCC
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- try
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- {
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- // call cpuid with eax = 0
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- asm
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- (
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- "pushl %%ebx\n\t"
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- "xorl %%eax,%%eax\n\t"
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- "cpuid\n\t"
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- "popl %%ebx\n\t"
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- : "=a" (maxInputValue)
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- :
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- : "%ecx", "%edx"
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- );
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- }
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- catch (...)
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- {
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- return(0); // cpuid instruction is unavailable
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- }
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- try
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- {
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- // call cpuid with eax = 0
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- __asm
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- {
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- xor eax, eax
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- cpuid
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- mov maxInputValue, eax
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- }
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- }
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- catch (...)
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- {
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- // cpuid instruction is unavailable
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- }
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-#else
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-# error Not implemented.
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-#endif
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-
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- return maxInputValue;
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- }
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-
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-
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-
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- //
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- // Function returns the maximum cores per physical package. Note that the number of
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- // AVAILABLE cores per physical to be used by an application might be less than this
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- // maximum value.
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- //
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-
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- static U32 MaxCorePerPhysicalProc(void)
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- {
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-
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- U32 Regeax = 0;
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-
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- if (!HWD_MTSupported()) return (U32) 1; // Single core
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-#ifdef TORQUE_COMPILER_GCC
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- {
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- asm
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- (
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- "pushl %ebx\n\t"
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- "xorl %eax, %eax\n\t"
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- "cpuid\n\t"
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- "cmpl $4, %eax\n\t" // check if cpuid supports leaf 4
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- "jl .single_core\n\t" // Single core
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- "movl $4, %eax\n\t"
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- "movl $0, %ecx\n\t" // start with index = 0; Leaf 4 reports
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- "popl %ebx\n\t"
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- ); // at least one valid cache level
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- asm
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- (
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- "cpuid"
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- : "=a" (Regeax)
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- :
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- : "%ecx", "%edx"
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- );
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- asm
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- (
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- "jmp .multi_core\n"
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- ".single_core:\n\t"
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- "xor %eax, %eax\n"
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- ".multi_core:"
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- );
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- }
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- __asm
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- {
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- xor eax, eax
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- cpuid
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- cmp eax, 4 // check if cpuid supports leaf 4
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- jl single_core // Single core
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- mov eax, 4
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- mov ecx, 0 // start with index = 0; Leaf 4 reports
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- cpuid // at least one valid cache level
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- mov Regeax, eax
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- jmp multi_core
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-
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-single_core:
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- xor eax, eax
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-
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-multi_core:
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-
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- }
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-#else
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-# error Not implemented.
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-#endif
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- return (U32)((Regeax & NUM_CORE_BITS) >> 26)+1;
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-
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- }
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-
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-
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-
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- //
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- // The function returns 0 when the hardware multi-threaded bit is not set.
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- //
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- static U32 HWD_MTSupported(void)
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- {
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-
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-
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- U32 Regedx = 0;
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-
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-
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- if ((CpuIDSupported() >= 1))
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- {
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-#ifdef TORQUE_COMPILER_GCC
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- asm
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- (
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- "pushl %%ebx\n\t"
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- "movl $1,%%eax\n\t"
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- "cpuid\n\t"
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- "popl %%ebx\n\t"
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- : "=d" (Regedx)
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- :
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- : "%eax","%ecx"
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- );
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- __asm
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- {
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- mov eax, 1
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- cpuid
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- mov Regedx, edx
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- }
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-#else
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-# error Not implemented.
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-#endif
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- }
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-
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- return (Regedx & HWD_MT_BIT);
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-
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-
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- }
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-
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-
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-
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- //
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- // Function returns the maximum logical processors per physical package. Note that the number of
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- // AVAILABLE logical processors per physical to be used by an application might be less than this
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- // maximum value.
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- //
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- static U32 MaxLogicalProcPerPhysicalProc(void)
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- {
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-
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- U32 Regebx = 0;
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-
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- if (!HWD_MTSupported()) return (U32) 1;
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-#ifdef TORQUE_COMPILER_GCC
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- asm
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- (
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- "movl $1,%%eax\n\t"
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- "cpuid"
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- : "=b" (Regebx)
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- :
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- : "%eax","%ecx","%edx"
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- );
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- __asm
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- {
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- mov eax, 1
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- cpuid
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- mov Regebx, ebx
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- }
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-#else
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-# error Not implemented.
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-#endif
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- return (unsigned int) ((Regebx & NUM_LOGICAL_BITS) >> 16);
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-
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- }
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-
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-
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- static U8 GetAPIC_ID(void)
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- {
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-
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- U32 Regebx = 0;
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-#ifdef TORQUE_COMPILER_GCC
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- asm
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- (
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- "movl $1, %%eax\n\t"
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- "cpuid"
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- : "=b" (Regebx)
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- :
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- : "%eax","%ecx","%edx"
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- );
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-
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- __asm
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- {
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- mov eax, 1
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- cpuid
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- mov Regebx, ebx
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- }
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-#else
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-# error Not implemented.
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-#endif
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-
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- return (unsigned char) ((Regebx & INITIAL_APIC_ID_BITS) >> 24);
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-
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- }
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-
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- //
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- // Determine the width of the bit field that can represent the value count_item.
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- //
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- U32 find_maskwidth(U32 CountItem)
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- {
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- U32 MaskWidth,
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- count = CountItem;
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-#ifdef TORQUE_COMPILER_GCC
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- asm
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- (
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-#ifdef __x86_64__ // define constant to compile
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- "push %%rcx\n\t" // under 64-bit Linux
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- "push %%rax\n\t"
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-#else
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- "pushl %%ecx\n\t"
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- "pushl %%eax\n\t"
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-#endif
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- // "movl $count, %%eax\n\t" //done by Assembler below
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- "xorl %%ecx, %%ecx"
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- // "movl %%ecx, MaskWidth\n\t" //done by Assembler below
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- : "=c" (MaskWidth)
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- : "a" (count)
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- // : "%ecx", "%eax" We don't list these as clobbered because we don't want the assembler
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- //to put them back when we are done
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- );
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- asm
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- (
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- "decl %%eax\n\t"
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- "bsrw %%ax,%%cx\n\t"
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- "jz next\n\t"
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- "incw %%cx\n\t"
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- // "movl %%ecx, MaskWidth\n" //done by Assembler below
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- : "=c" (MaskWidth)
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- :
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- );
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- asm
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- (
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- "next:\n\t"
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-#ifdef __x86_64__
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- "pop %rax\n\t"
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- "pop %rcx"
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-#else
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- "popl %eax\n\t"
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- "popl %ecx"
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-#endif
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- );
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-
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-#elif defined( TORQUE_COMPILER_VISUALC )
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- __asm
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- {
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- mov eax, count
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- mov ecx, 0
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- mov MaskWidth, ecx
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- dec eax
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- bsr cx, ax
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- jz next
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- inc cx
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- mov MaskWidth, ecx
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-next:
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-
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- }
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-#else
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-# error Not implemented.
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-#endif
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- return MaskWidth;
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- }
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-
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-
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- //
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- // Extract the subset of bit field from the 8-bit value FullID. It returns the 8-bit sub ID value
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- //
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- static U8 GetNzbSubID(U8 FullID,
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- U8 MaxSubIDValue,
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- U8 ShiftCount)
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- {
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- U32 MaskWidth;
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- U8 MaskBits;
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-
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- MaskWidth = find_maskwidth((U32) MaxSubIDValue);
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- MaskBits = (0xff << ShiftCount) ^
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- ((U8) (0xff << (ShiftCount + MaskWidth)));
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-
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- return (FullID & MaskBits);
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- }
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-
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-#endif
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-
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-
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- //
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- //
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- //
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- EConfig CPUCount(U32& TotAvailLogical, U32& TotAvailCore, U32& PhysicalNum)
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- {
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- EConfig StatusFlag = CONFIG_UserConfigIssue;
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-
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- g_s3Levels[0] = 0;
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- TotAvailCore = 1;
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- PhysicalNum = 1;
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-
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- U32 numLPEnabled = 0;
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- S32 MaxLPPerCore = 1;
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-
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-#ifdef TORQUE_OS_MAC
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-
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- //FIXME: This isn't a proper port but more or less just some sneaky cheating
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- // to get around having to mess with yet another crap UNIX-style API. Seems
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- // like there isn't a way to do this that's working across all OSX incarnations
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- // and machine configurations anyway.
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-
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- S32 numCPUs;
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- S32 numPackages;
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-
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- // Get the number of CPUs.
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-
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- size_t len = sizeof( numCPUs );
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- if( sysctlbyname( "hw.ncpu", &numCPUs, &len, 0, 0 ) == -1 )
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- return CONFIG_UserConfigIssue;
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-
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- // Get the number of packages.
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- len = sizeof( numPackages );
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- if( sysctlbyname( "hw.packages", &numPackages, &len, 0, 0 ) == -1 )
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- return CONFIG_UserConfigIssue;
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-
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- TotAvailCore = numCPUs;
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- TotAvailLogical = numCPUs;
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- PhysicalNum = numPackages;
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-#else
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-
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- U32 dwAffinityMask;
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- S32 j = 0;
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- U8 apicID, PackageIDMask;
|
|
|
- U8 tblPkgID[256], tblCoreID[256], tblSMTID[256];
|
|
|
- char tmp[256];
|
|
|
-
|
|
|
-#ifdef TORQUE_OS_LINUX
|
|
|
- //we need to make sure that this process is allowed to run on
|
|
|
- //all of the logical processors that the OS itself can run on.
|
|
|
- //A process could acquire/inherit affinity settings that restricts the
|
|
|
- // current process to run on a subset of all logical processor visible to OS.
|
|
|
-
|
|
|
- // Linux doesn't easily allow us to look at the Affinity Bitmask directly,
|
|
|
- // but it does provide an API to test affinity maskbits of the current process
|
|
|
- // against each logical processor visible under OS.
|
|
|
- S32 sysNumProcs = sysconf(_SC_NPROCESSORS_CONF); //This will tell us how many
|
|
|
- //CPUs are currently enabled.
|
|
|
-
|
|
|
- //this will tell us which processors this process can run on.
|
|
|
- cpu_set_t allowedCPUs;
|
|
|
- sched_getaffinity(0, sizeof(allowedCPUs), &allowedCPUs);
|
|
|
-
|
|
|
- for (S32 i = 0; i < sysNumProcs; i++ )
|
|
|
- {
|
|
|
- if ( CPU_ISSET(i, &allowedCPUs) == 0 )
|
|
|
- return CONFIG_UserConfigIssue;
|
|
|
- }
|
|
|
-#elif defined( TORQUE_OS_WIN )
|
|
|
- DWORD dwProcessAffinity, dwSystemAffinity;
|
|
|
- GetProcessAffinityMask(GetCurrentProcess(),
|
|
|
- &dwProcessAffinity,
|
|
|
- &dwSystemAffinity);
|
|
|
- if (dwProcessAffinity != dwSystemAffinity) // not all CPUs are enabled
|
|
|
- return CONFIG_UserConfigIssue;
|
|
|
-#else
|
|
|
-# error Not implemented.
|
|
|
-#endif
|
|
|
-
|
|
|
- // Assume that cores within a package have the SAME number of
|
|
|
- // logical processors. Also, values returned by
|
|
|
- // MaxLogicalProcPerPhysicalProc and MaxCorePerPhysicalProc do not have
|
|
|
- // to be power of 2.
|
|
|
-
|
|
|
- MaxLPPerCore = MaxLogicalProcPerPhysicalProc() / MaxCorePerPhysicalProc();
|
|
|
- dwAffinityMask = 1;
|
|
|
-
|
|
|
-#ifdef TORQUE_OS_LINUX
|
|
|
- cpu_set_t currentCPU;
|
|
|
- while ( j < sysNumProcs )
|
|
|
- {
|
|
|
- CPU_ZERO(¤tCPU);
|
|
|
- CPU_SET(j, ¤tCPU);
|
|
|
- if ( sched_setaffinity (0, sizeof(currentCPU), ¤tCPU) == 0 )
|
|
|
- {
|
|
|
- sleep(0); // Ensure system to switch to the right CPU
|
|
|
-#elif defined( TORQUE_OS_WIN )
|
|
|
- while (dwAffinityMask && dwAffinityMask <= dwSystemAffinity)
|
|
|
- {
|
|
|
- if (SetThreadAffinityMask(GetCurrentThread(), dwAffinityMask))
|
|
|
- {
|
|
|
- Sleep(0); // Ensure system to switch to the right CPU
|
|
|
-#else
|
|
|
-# error Not implemented.
|
|
|
-#endif
|
|
|
- apicID = GetAPIC_ID();
|
|
|
-
|
|
|
-
|
|
|
- // Store SMT ID and core ID of each logical processor
|
|
|
- // Shift vlaue for SMT ID is 0
|
|
|
- // Shift value for core ID is the mask width for maximum logical
|
|
|
- // processors per core
|
|
|
-
|
|
|
- tblSMTID[j] = GetNzbSubID(apicID, MaxLPPerCore, 0);
|
|
|
- U8 maxCorePPP = MaxCorePerPhysicalProc();
|
|
|
- U8 maskWidth = find_maskwidth(MaxLPPerCore);
|
|
|
- tblCoreID[j] = GetNzbSubID(apicID, maxCorePPP, maskWidth);
|
|
|
-
|
|
|
- // Extract package ID, assume single cluster.
|
|
|
- // Shift value is the mask width for max Logical per package
|
|
|
-
|
|
|
- PackageIDMask = (unsigned char) (0xff <<
|
|
|
- find_maskwidth(MaxLogicalProcPerPhysicalProc()));
|
|
|
-
|
|
|
- tblPkgID[j] = apicID & PackageIDMask;
|
|
|
- sprintf(tmp," AffinityMask = %d; Initial APIC = %d; Physical ID = %d, Core ID = %d, SMT ID = %d\n",
|
|
|
- dwAffinityMask, apicID, tblPkgID[j], tblCoreID[j], tblSMTID[j]);
|
|
|
- dStrcat(g_s3Levels, tmp, 2048);
|
|
|
-
|
|
|
- numLPEnabled ++; // Number of available logical processors in the system.
|
|
|
-
|
|
|
- } // if
|
|
|
-
|
|
|
- j++;
|
|
|
- dwAffinityMask = 1 << j;
|
|
|
- } // while
|
|
|
-
|
|
|
- // restore the affinity setting to its original state
|
|
|
-#ifdef TORQUE_OS_LINUX
|
|
|
- sched_setaffinity (0, sizeof(allowedCPUs), &allowedCPUs);
|
|
|
- sleep(0);
|
|
|
-#elif defined( TORQUE_OS_WIN )
|
|
|
- SetThreadAffinityMask(GetCurrentThread(), dwProcessAffinity);
|
|
|
- Sleep(0);
|
|
|
-#else
|
|
|
-# error Not implemented.
|
|
|
-#endif
|
|
|
- TotAvailLogical = numLPEnabled;
|
|
|
-
|
|
|
- //
|
|
|
- // Count available cores (TotAvailCore) in the system
|
|
|
- //
|
|
|
- U8 CoreIDBucket[256];
|
|
|
- DWORD ProcessorMask, pCoreMask[256];
|
|
|
- U32 i, ProcessorNum;
|
|
|
-
|
|
|
- CoreIDBucket[0] = tblPkgID[0] | tblCoreID[0];
|
|
|
- ProcessorMask = 1;
|
|
|
- pCoreMask[0] = ProcessorMask;
|
|
|
-
|
|
|
- for (ProcessorNum = 1; ProcessorNum < numLPEnabled; ProcessorNum++)
|
|
|
- {
|
|
|
- ProcessorMask <<= 1;
|
|
|
- for (i = 0; i < TotAvailCore; i++)
|
|
|
- {
|
|
|
- // Comparing bit-fields of logical processors residing in different packages
|
|
|
- // Assuming the bit-masks are the same on all processors in the system.
|
|
|
- if ((tblPkgID[ProcessorNum] | tblCoreID[ProcessorNum]) == CoreIDBucket[i])
|
|
|
- {
|
|
|
- pCoreMask[i] |= ProcessorMask;
|
|
|
- break;
|
|
|
- }
|
|
|
-
|
|
|
- } // for i
|
|
|
-
|
|
|
- if (i == TotAvailCore) // did not match any bucket. Start a new one.
|
|
|
- {
|
|
|
- CoreIDBucket[i] = tblPkgID[ProcessorNum] | tblCoreID[ProcessorNum];
|
|
|
- pCoreMask[i] = ProcessorMask;
|
|
|
-
|
|
|
- TotAvailCore++; // Number of available cores in the system
|
|
|
-
|
|
|
- }
|
|
|
-
|
|
|
- } // for ProcessorNum
|
|
|
-
|
|
|
-
|
|
|
- //
|
|
|
- // Count physical processor (PhysicalNum) in the system
|
|
|
- //
|
|
|
- U8 PackageIDBucket[256];
|
|
|
- DWORD pPackageMask[256];
|
|
|
-
|
|
|
- PackageIDBucket[0] = tblPkgID[0];
|
|
|
- ProcessorMask = 1;
|
|
|
- pPackageMask[0] = ProcessorMask;
|
|
|
-
|
|
|
- for (ProcessorNum = 1; ProcessorNum < numLPEnabled; ProcessorNum++)
|
|
|
- {
|
|
|
- ProcessorMask <<= 1;
|
|
|
- for (i = 0; i < PhysicalNum; i++)
|
|
|
- {
|
|
|
- // Comparing bit-fields of logical processors residing in different packages
|
|
|
- // Assuming the bit-masks are the same on all processors in the system.
|
|
|
- if (tblPkgID[ProcessorNum]== PackageIDBucket[i])
|
|
|
- {
|
|
|
- pPackageMask[i] |= ProcessorMask;
|
|
|
- break;
|
|
|
- }
|
|
|
-
|
|
|
- } // for i
|
|
|
-
|
|
|
- if (i == PhysicalNum) // did not match any bucket. Start a new one.
|
|
|
- {
|
|
|
- PackageIDBucket[i] = tblPkgID[ProcessorNum];
|
|
|
- pPackageMask[i] = ProcessorMask;
|
|
|
-
|
|
|
- PhysicalNum++; // Total number of physical processors in the system
|
|
|
-
|
|
|
- }
|
|
|
-
|
|
|
- } // for ProcessorNum
|
|
|
-#endif
|
|
|
-
|
|
|
- //
|
|
|
- // Check to see if the system is multi-core
|
|
|
- // Check if the system is hyper-threading
|
|
|
- //
|
|
|
- if (TotAvailCore > PhysicalNum)
|
|
|
- {
|
|
|
- // Multi-core
|
|
|
- if (MaxLPPerCore == 1)
|
|
|
- StatusFlag = CONFIG_MultiCoreAndHTNotCapable;
|
|
|
- else if (numLPEnabled > TotAvailCore)
|
|
|
- StatusFlag = CONFIG_MultiCoreAndHTEnabled;
|
|
|
- else StatusFlag = CONFIG_MultiCoreAndHTDisabled;
|
|
|
-
|
|
|
- }
|
|
|
- else
|
|
|
- {
|
|
|
- // Single-core
|
|
|
- if (MaxLPPerCore == 1)
|
|
|
- StatusFlag = CONFIG_SingleCoreAndHTNotCapable;
|
|
|
- else if (numLPEnabled > TotAvailCore)
|
|
|
- StatusFlag = CONFIG_SingleCoreHTEnabled;
|
|
|
- else StatusFlag = CONFIG_SingleCoreHTDisabled;
|
|
|
-
|
|
|
-
|
|
|
- }
|
|
|
-
|
|
|
-
|
|
|
-
|
|
|
- return StatusFlag;
|
|
|
- }
|
|
|
-
|
|
|
-} // namespace CPUInfo
|
|
|
-#endif
|
|
|
-
|
|
|
-#endif
|