Add support for aarch64 / apple silicon

Engine/lib/convexDecomp/NvThreadConfig.cpp

@@ -135,6 +135,8 @@ void tc_spinloop()
       // Pause would do nothing on the Xbox. Threads are not scheduled.
    #elif defined( _WIN64 )
       YieldProcessor( );
+   #elif (defined( __arm64__ ) && defined( __APPLE__ )) || defined( __arch64__ )
+      asm( "yield" );
    #else
       __asm { pause };
    #endif

Engine/source/console/codeBlock.cpp

@@ -447,7 +447,7 @@ bool CodeBlock::read(StringTableEntry fileName, Stream &st)
       {
          U32 ip;
          st.read(&ip);
-#ifdef TORQUE_CPU_X64
+#if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
          *(U64*)(code + ip) = (U64)ste;
 #else
          code[ip] = *((U32 *)&ste);

Engine/source/console/compiler.cpp

@@ -65,7 +65,7 @@ namespace Compiler
 
    void evalSTEtoCode(StringTableEntry ste, U32 ip, U32 *ptr)
    {
-#ifdef TORQUE_CPU_X64
+#if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
       *(U64*)(ptr) = (U64)ste;
 #else
       *ptr = (U32)ste;

Engine/source/console/compiler.h

@@ -254,7 +254,7 @@ namespace Compiler
 
    inline StringTableEntry CodeToSTE(U32 *code, U32 ip)
    {
-#ifdef TORQUE_CPU_X64
+#if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
       return (StringTableEntry)(*((U64*)(code + ip)));
 #else
       return (StringTableEntry)(*(code + ip));

Engine/source/core/util/uuid.cpp

@@ -70,7 +70,7 @@
 #include "core/util/md5.h"
 #include "console/enginePrimitives.h"
 
-#if defined (TORQUE_OS_MAC) && defined(TORQUE_CPU_X64)
+#if defined (TORQUE_OS_MAC) && (defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64))
 typedef unsigned int    unsigned32;
 #else
 typedef unsigned long   unsigned32;

Engine/source/platform/types.gcc.h

@@ -120,6 +120,11 @@ typedef unsigned long  U64;
 #  define TORQUE_CPU_X64
 #  define TORQUE_LITTLE_ENDIAN
 
+#elif (defined( __arm64__ ) && defined( __APPLE__ )) || defined( __arch64__ )
+#  define TORQUE_CPU_STRING "Arm 64"
+#  define TORQUE_CPU_ARM64
+#  define TORQUE_LITTLE_ENDIAN
+
 #else
 #  error "GCC: Unsupported Target CPU"
 #endif

Engine/source/platform/types.h

@@ -128,7 +128,7 @@ static const F32 F32_MAX = F32(3.402823466e+38F);                 ///< Constant
 #endif
 
 /// Integral type matching the host's memory address width.
-#ifdef TORQUE_CPU_X64
+#if defined(TORQUE_CPU_X64) || defined(TORQUE_CPU_ARM64)
    typedef U64 MEM_ADDRESS;
 #else
    typedef U32 MEM_ADDRESS;

Engine/source/platformMac/macMath.mm

@@ -34,21 +34,29 @@ static MRandomLCG sgPlatRandom;
 
 U32 Platform::getMathControlState()
 {
+#ifdef TORQUE_CPU_X86
    U16 cw;
    asm("fstcw %0" : "=m" (cw) :);
    return cw;
+#else
+   return 0;
+#endif
 }
 
 void Platform::setMathControlState(U32 state)
 {
+#ifdef TORQUE_CPU_X86
    U16 cw = state;
    asm("fldcw %0" : : "m" (cw));
+#endif
 }
 
 void Platform::setMathControlStateKnown()
 {
+#ifdef TORQUE_CPU_X86
    U16 cw = 0x27F;
    asm("fldcw %0" : : "m" (cw));
+#endif
 }
 
 //--------------------------------------